CN114156300A - Backside illuminated image sensor and forming method thereof - Google Patents

Backside illuminated image sensor and forming method thereof Download PDF

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Publication number
CN114156300A
CN114156300A CN202111563810.4A CN202111563810A CN114156300A CN 114156300 A CN114156300 A CN 114156300A CN 202111563810 A CN202111563810 A CN 202111563810A CN 114156300 A CN114156300 A CN 114156300A
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semiconductor substrate
dielectric layer
forming
metal
image sensor
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李梦
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Shanghai Weijing Electronic Technology Co ltd
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Shanghai Weijing Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention discloses a back side illuminated image sensor, comprising a semiconductor substrate, a back side illuminated image sensor and a light source, wherein the semiconductor substrate is provided with a front surface and a back surface; the shallow isolation groove and the photosensitive unit are arranged in the semiconductor substrate; a deep isolation trench disposed in the semiconductor substrate; a first dielectric layer overlying a front surface of the semiconductor substrate, the first dielectric layer including a metal interconnect structure; the second dielectric layer covers the back surface of the semiconductor substrate and comprises a metal grid and a conduction structure, one end of the conduction structure is conducted with the metal grid, and the other end of the conduction structure is conducted with the pad structure; and the pad structure penetrates through the semiconductor substrate and the second dielectric layer and is communicated with the metal interconnection structure. Compared with the existing structure, the process steps of the back-illuminated image sensor can reduce the use of a photomask plate, can realize the adjustment of the potential of the metal grid, reduce the process steps, save the cost and improve the performance of the image sensor.

Description

Backside illuminated image sensor and forming method thereof
Technical Field
The invention relates to the technical field of semiconductor integrated circuit manufacturing processes, in particular to a back-illuminated image sensor and a forming method thereof.
Background
At present, the CMOS image sensor is widely used in a plurality of fields such as mobile phones, digital cameras, medical instruments, automotive electronics, security monitoring, and the like. The pixel structure of the CMOS image sensor also experiences the trend of the prior front-illuminated pixel structure to the back-illuminated pixel structure, and the back-illuminated pixel structure becomes the mainstream basically at present. Because of the front-illuminated structure, incident light needs to pass through the metal interconnection layer and the dielectric layer before reaching the photosensitive region, and the incident light is lost to a certain extent in the process. And the incident light of the back-illuminated pixel structure can directly enter the photosensitive area, almost no loss exists in the middle, the filling factor can basically reach one hundred percent, and the sensitivity performance is greatly improved.
There are mainly two forms of crosstalk in image sensors, optical crosstalk and electronic crosstalk, respectively. Optical crosstalk is mainly caused by light incident on adjacent pixels. Electron crosstalk refers to the diffusion or drift of electrons to other pixels. Deep trench isolation is commonly used in the prior art to improve electronic crosstalk, and metal grid isolation is used to improve optical crosstalk. The metal grid in the back-illuminated pixel basic structure is connected with the silicon substrate through the conducting structure, and therefore the metal grid and the silicon substrate can be connected only by additionally adding a photomask plate to manufacture the conducting structure, so that charges are led out, the number of process steps is increased, and the cost is increased.
Disclosure of Invention
Embodiments of the present invention provide a backside illuminated image sensor, which is used to reduce process steps, save cost, and improve the performance of the image sensor.
In a first aspect, the present invention provides a back-illuminated image sensor comprising: a semiconductor substrate 100 having a front surface 1001 and a back surface 1002; a shallow isolation groove 101 and a photosensitive unit 102 which are arranged in the semiconductor substrate 100; a deep isolation trench 103 provided in the semiconductor substrate 100; a first dielectric layer 200 covering the front surface of the semiconductor substrate, the first dielectric layer 200 including a metal interconnect structure 201; a second dielectric layer 300 covering the back surface of the semiconductor substrate 100, wherein the second dielectric layer 300 includes a metal grid 301 and a conducting structure 500, one end of the conducting structure 500 is conducted with the metal grid 301, and the other end is conducted with the pad structure 400; and the pad structure 400 penetrates through the semiconductor substrate 100 and the second dielectric layer 300 and is communicated with the metal interconnection structure 201.
Compared with the prior art, the back-illuminated image sensor has the advantages that the number of the process steps of the structure is reduced, the number of the photomask plates can be reduced, the potential of the metal grid can be adjusted, the process steps are reduced, the cost is saved, and the performance of the image sensor is improved. The pad to be connected can be freely selected, can be a pad to be grounded, and can be a pad to be connected with electric potential, and the advantage that the metal grid can be subjected to electric potential adjustment is favorable for improving the performance of the image sensor.
Optionally, the metal grid 301 encloses an opening corresponding to the photodiode in the second dielectric layer 300. The metal grid 301 is mainly used to improve optical crosstalk.
Optionally, the width of the via structure 500 does not exceed the maximum dimension of the metal grid 301.
Optionally, the first dielectric layer further includes a peripheral circuit 202, and the peripheral circuit 202 is configured to implement signal transmission or signal processing.
Optionally, the deep isolation groove (103) and the shallow isolation groove (101) are located between different photosensitive units (102) and used for isolating the different photosensitive units (102), and the deep isolation groove 103 is in the vertical direction of the shallow isolation groove 101, and a gap may exist between the deep isolation groove and the shallow isolation groove 101, or may be connected to the deep isolation groove. The deep isolation trenches 103 are used to improve electrical crosstalk.
In a second aspect, the present invention provides a method of forming a back-illuminated image sensor, the method comprising the steps of: providing a semiconductor substrate 100 having a front surface and a back surface; forming a shallow isolation groove (101) and a photosensitive unit (102) which are positioned in the semiconductor substrate (100), wherein the shallow isolation groove (101) and the photosensitive unit (102) are in contact with the front surface (1001) of the semiconductor substrate (100); forming a deep isolation trench (103) within the semiconductor substrate (100), the deep isolation trench (103) contacting a back surface (1002) of the semiconductor substrate (100); forming a first dielectric layer 200 covering the front surface of the semiconductor substrate; forming a metal interconnection structure 201 positioned on the first dielectric layer 200; forming a second dielectric layer 300 covering the back surface of the semiconductor substrate 100; forming a metal grid 301 positioned on the second dielectric layer 300 by patterning and depositing metal; forming a conducting structure 500 and a pad structure 400 on the second dielectric layer 300, wherein one end of the conducting structure 500 is conducted with the metal grid 301, and the other end is conducted with the pad structure 400; the pad structure 400 penetrates through the semiconductor substrate 100 and the second dielectric layer 300, and is communicated with the metal interconnection structure 201.
Compared with the prior structure, the forming method of the back-illuminated image sensor has the advantages that the use of a photomask plate can be reduced, the potential adjustment of the metal grid can be realized, the process steps are reduced, the cost is saved, and the performance of the image sensor is improved. The pad to be connected can be freely selected, can be a pad to be grounded, and can be a pad to be connected with electric potential, and the advantage that the metal grid can be subjected to electric potential adjustment is favorable for improving the performance of the image sensor.
Optionally, the forming the conducting structure 500 and the pad structure 400 on the second dielectric layer 300 includes: forming a first trench penetrating through the semiconductor substrate (100) and the second dielectric layer (300) by patterning, and contacting with a front surface (1001) of the semiconductor substrate (100);
forming a second trench through patterning, wherein a first part of the second trench is positioned in the first dielectric layer (200) and is in contact with the first metal interconnection layer of the metal interconnection structure (201), and a second part of the second trench is positioned in the second dielectric layer (300) and is in contact with the metal grid (301);
filling the first groove and the second groove by deposition, and forming a metal layer on the surface of the second dielectric layer 300; and patterning the metal layer to form the conducting structure 500 and the pad structure 400 of the second dielectric layer 300.
Optionally, the forming a deep isolation trench 103 located in the semiconductor substrate 100 includes: a deep isolation trench 103 located in the semiconductor substrate 100 is formed by patterning the back surface of the semiconductor substrate.
Optionally, the forming the metal grid 301 on the second dielectric layer 300 includes: a metal grid 301 located on the second dielectric layer 300 is formed by deposition and patterning.
Optionally, a peripheral circuit 202 is formed on the front surface of the first dielectric layer 200 by deposition and patterned etching of polysilicon, and the peripheral circuit 202 is used for signal transmission or signal processing.
The beneficial effects of the forming method provided by the invention can be seen from the description of the structural part, and in conclusion, the back-illuminated image sensor not only can reduce the use of a photomask, but also can realize the potential adjustment of the metal isolation gate, reduce the process steps, save the cost and improve the performance of the image sensor.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1A and 1B are schematic diagrams illustrating a method for forming an image sensor structure according to the prior art;
fig. 2 is a schematic structural diagram of an image sensor according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating a method for forming an image sensor according to an embodiment of the invention;
fig. 4 is a schematic diagram of various process stages of manufacturing an image sensor according to an embodiment of the invention.
Description of the element reference numerals
100 semiconductor substrate
Front surface of 1001 semiconductor substrate
1002 back surface of semiconductor substrate
101 shallow isolation groove
102 photosensitive unit
103 deep isolation groove
200 first dielectric layer
201 metal interconnection structure
202 peripheral circuit
300 second dielectric layer
301 metal grid
400 pad structure
500 conducting structure
Detailed Description
Currently, a method for forming a backside-illuminated image sensor is shown in fig. 1A and 1B. The structure shown in fig. 1A includes a shallow isolation trench 101 located on the front surface of a semiconductor substrate, a photo-sensing unit 102 (such as a Photodiode (PD)), other transistors (not shown in the figure), a metal interconnection structure 201, and a deep isolation trench 103 located on the back surface of the semiconductor substrate, and the formation processes of the back-illuminated image sensor are not shown by the figures.
Based on the process device of this structure, a trench a is further formed by the first patterning, as shown in (a) of fig. 1A. Next, by the second patterning, a trench b is formed as shown in fig. 1 (b). Then, metal deposition is performed on the trenches a and b, as shown in fig. 1A (c), and then, through third patterning, a via structure 500 and a metal grid 301 are simultaneously formed, the via structure 500 being in contact with the metal grid 301, as shown in fig. 1A (d).
After that, by the fourth patterning as shown in (e) in fig. 1B, the trench c is formed. The trench d is formed by the fifth patterning, as shown in (f) of fig. 1B, and the pad 400 shown in (f) of fig. 1B is formed by the metal deposition shown in (g) of fig. 1B and the sixth patterning shown in (e) of fig. 1B. As can be seen in fig. 1, a total of six etches are performed to form the image sensing device.
In order to reduce the process steps, save the cost and improve the performance of the image sensor, the invention provides a novel method for manufacturing a back-illuminated image sensor, which saves the manufacturing of a photomask plate on the premise of connecting the conducting structure 500 with the semiconductor substrate 100 and can also adjust the potential of the metal grid.
In order to make the contents of the present invention more comprehensible, the present invention is further described below with reference to the accompanying drawings. The invention is of course not limited to this particular embodiment, and general alternatives known to those skilled in the art are also covered by the scope of the invention.
In the following detailed description of the embodiments of the present invention, in order to clearly illustrate the structure of the present invention and to facilitate explanation, the structure shown in the drawings is not drawn to a general scale and is partially enlarged, deformed and simplified, so that the present invention should not be construed as limited thereto.
According to an object of the present invention, the present invention provides a back-illuminated image sensor, as shown in fig. 2, comprising:
a semiconductor substrate 100 having a front surface 1001 and a back surface 1002.
The shallow isolation groove 101 and the photosensitive unit 102 are arranged in the semiconductor substrate 100, and the shallow isolation groove 101 and the photosensitive unit 102 contact the front surface 1001 of the semiconductor substrate 100.
The deep isolation trench 103 is disposed in the semiconductor substrate 100, and the deep isolation trench 103 contacts the back surface 1002 of the semiconductor substrate 100.
A first dielectric layer 200 covering the front surface of the semiconductor substrate, the first dielectric layer 200 comprising a metal interconnect structure 201.
A second dielectric layer 300 covering the back surface of the semiconductor substrate 100, wherein the second dielectric layer 300 includes a metal grid 301 and a conducting structure 500, one end of the conducting structure 500 is conducted with the metal grid 301, and the other end is conducted with a pad structure 400 (pad). Optionally, the metal grid 301 surrounds an opening corresponding to the photodiode in the second dielectric layer 300, so as to improve optical crosstalk. The deep isolation groove 103 and the shallow isolation groove 101 are located between different photosensitive units 102 and used for isolating the different photosensitive units 102, and the deep isolation groove 103 is in the vertical direction of the shallow isolation groove 101, and a gap may exist between the deep isolation groove 103 and the shallow isolation groove 101 or may be connected with the shallow isolation groove. The deep isolation trenches 103 are used to improve electrical crosstalk.
Optionally, the width of the via structure 500 does not exceed the maximum dimension of the metal grid 301.
And the pad structure 400 penetrates through the semiconductor substrate 100 and the second dielectric layer 300 and is communicated with the metal interconnection structure 201. The pad structure 400 and the via structure 500 material may be any one or more of a metal, a metal compound, or a metal silicide.
Optionally, the first dielectric layer further includes a peripheral circuit 202, a capacitor, a driving circuit, and the like (not shown in the figure), and the peripheral circuit 202 is used for signal transmission or signal processing. In one possible design, the peripheral circuit 202 may be a pass transistor, a reset transistor, a row select transistor, and a source follower transistor.
In order to make the objects, technical solutions and advantages of the present invention clearer, a flow chart of a method for forming a back-illuminated image sensor structure is further shown in conjunction with fig. 3, in the present invention, the photosensitive unit 102 may be formed after the groove structure of the storage node 304 is completed or before the groove structure is formed. Taking the photosensitive unit formed after the groove structure is formed as an example, fig. 4 is a schematic diagram showing the stage-wise results of the manufacturing stages of the processes.
Referring to fig. 3, a method for forming a backside illuminated image sensor structure according to an embodiment of the present invention includes the following steps:
s301, a semiconductor substrate 100 is provided, the semiconductor substrate having a front surface 1001 and a back surface 1002.
As shown in fig. 4, the semiconductor substrate 100 may be an N-type or P-type silicon substrate. The material of the semiconductor substrate 202 includes one or more of silicon, germanium, silicon carbide, gallium arsenide, and indium gallium arsenide, and the semiconductor substrate 100 may also be a silicon-on-insulator semiconductor substrate or a germanium-on-insulator semiconductor substrate.
And S302, forming a shallow isolation groove 101 and a photosensitive unit 102 in the semiconductor substrate 100, wherein the shallow isolation groove 101 and the photosensitive unit 102 are in contact with the front surface 1001 of the semiconductor substrate 100.
Alternatively, the polysilicon 303 may be any one or more of silicon nitride, silicon carbide, silicon oxynitride, or silicon carbonitride. Optionally, the photosensitive unit 102 is formed by performing ion implantation on the semiconductor substrate 100 by using an ion implantation process, implantation energy of the ion implantation process may be 120keV to 200keV, and the photosensitive unit 102 may be a photodiode.
S303, forming a deep isolation trench 103 in the semiconductor substrate 100, wherein the deep isolation trench 103 contacts the back surface 1002 of the semiconductor substrate 100.
Optionally, a deep isolation trench 103 located in the semiconductor substrate 100 is formed by patterning the semiconductor substrate 100.
S304, a first dielectric layer 200 is formed covering the front surface 1001 of the semiconductor substrate.
And S305, forming a metal interconnection structure 201 positioned on the first dielectric layer 200.
It should be noted that the number of layers of the metal interconnection structure 201 is not limited to the three layers illustrated in fig. 4, and may be more or less.
Optionally, S306 is further included, and the peripheral circuit 202 on the front surface 1001 of the first dielectric layer 200 is formed by deposition and patterned etching of polysilicon. The peripheral circuit 202 is used to implement signal transmission or signal processing.
S307, a second dielectric layer 300 is formed covering the back surface 1002 of the semiconductor substrate 100.
S308, forming a metal grid 301 on the second dielectric layer 300.
Schematically, as shown in fig. 4 (a), a metal grid 301 is formed on the second dielectric layer 300 by one patterning and metal deposition.
And S309, forming a conducting structure 500 and a pad structure 400 on the second dielectric layer 300.
In this step, as shown in fig. 4 (b), a first trench penetrating through the semiconductor substrate 100 and the second dielectric layer 300 is formed by one patterning. As shown in (c) of fig. 4, a second trench is formed by one-time patterning, i.e., a first portion of the second trench is located in the second dielectric layer 300 and is in contact with the first metal interconnection layer of the metal interconnection structure 201, and a second portion of the second trench is located in the second dielectric layer 300 and is in contact with the metal grid 301, and the second trench penetrates through the second dielectric layer 300 until being in contact with the first metal interconnection layer of the metal interconnection structure 201. And (d) filling the first trench and the second trench by deposition, and forming a metal layer on the surface of the second dielectric layer (300) as shown in fig. 4. The metal layer on the surface of the second dielectric layer 300 is patterned once, as shown in fig. 4 (e), to form a conducting structure 500 and a pad structure 400 of the second dielectric layer 300. One end of the conductive structure 500 is conductive to the metal grid 301, and the other end is conductive to the pad structure 400; the pad structure 400 penetrates through the semiconductor substrate 100 and the second dielectric layer 300, and is communicated with the metal interconnection structure 201.
In addition, in this embodiment, the structure of the photomask plate may be optimally designed, and the thickness of the dielectric layer in which the conducting structure 500 is located is adjusted according to the thickness of the dielectric layer in which the front-end first-layer metal M1201 is located, so as to achieve the conduction between the pad and M1 and the conduction between the conducting structure 500 and the metal grid. Because the composition of the dielectric layer where the front-end metal M1 is located is substantially the same as that of the dielectric layer of the via structure 500, the process difficulty is not additionally increased in the etching process, and the adjustment of the etching process is easy to implement.
It can be seen that the above process steps of the structure shown in fig. 4 include four-step patterning, which can reduce the use of two mask plates, and at the same time, can realize metal grid potential adjustment, reduce the process steps, save the cost, and improve the performance of the image sensor, compared with the six-step patterning in the structure forming method shown in fig. 1. The pad structure 400 can be freely selected for connection, and can be a grounded pad (pad) or a potential-connected pad (pad), which is advantageous in that the metal grid can be potential-adjusted, which is beneficial for improving the performance of the image sensor.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A backside illuminated image sensor, comprising:
a semiconductor substrate (100) having a front surface (1001) and a back surface (1002);
the light-sensitive device comprises a shallow isolation groove (101) and a light-sensitive unit (102) which are arranged in the semiconductor substrate (100), wherein the shallow isolation groove (101) and the light-sensitive unit (102) are in contact with the front surface (1001) of the semiconductor substrate (100);
a deep isolation trench (103) disposed within the semiconductor substrate (100), and the deep isolation trench (103) contacts a back surface (1002) of the semiconductor substrate (100);
a first dielectric layer (200) covering a front surface (1001) of the semiconductor substrate, the first dielectric layer (200) comprising a metal interconnect structure (201);
a second dielectric layer (300) covering a back surface (1002) of the semiconductor substrate (100), the second dielectric layer (300) comprising a metal grid (301) and a conducting structure (500), one end of the conducting structure (500) being in conduction with the metal grid (301) and the other end being in conduction with a pad structure (400);
a pad structure (400) penetrating through the semiconductor substrate (100) and the second dielectric layer (300) and communicating with the metal interconnect structure (201).
2. The back-illuminated image sensor according to claim 1, wherein the metal grid (301) encloses openings in the second dielectric layer (300) corresponding to the photodiodes.
3. The back-illuminated image sensor according to claim 2, characterized in that the width of the conducting structure (500) does not exceed the maximum dimension of the metal grid (301).
4. The back-illuminated image sensor according to any one of claims 1 to 3, wherein the first dielectric layer further comprises a peripheral circuit (202), the peripheral circuit (202) being configured to implement signal transmission or signal processing.
5. The back-illuminated image sensor according to any one of claims 1 to 3, wherein the deep isolation trenches (103) and the shallow isolation trenches (101) are located between different photosensitive cells (102) for isolating the different photosensitive cells (102), and the deep isolation trenches (103) are in a vertical direction of the shallow isolation trenches (101).
6. A method of forming a backside illuminated image sensor, comprising:
providing a semiconductor substrate (100) having a front surface (1001) and a back surface (1002);
forming a shallow isolation groove (101) and a photosensitive unit (102) which are positioned in the semiconductor substrate (100), wherein the shallow isolation groove (101) and the photosensitive unit (102) are in contact with the front surface (1001) of the semiconductor substrate (100);
forming a deep isolation trench (103) within the semiconductor substrate (100), the deep isolation trench (103) contacting a back surface (1002) of the semiconductor substrate (100);
forming a first dielectric layer (200) covering a front surface (1001) of the semiconductor substrate;
forming a metal interconnection structure (201) located in the first dielectric layer (200);
forming a second dielectric layer (300) covering a back surface (1002) of the semiconductor substrate (100);
forming a metal grid (301) on the second dielectric layer (300) by patterning and depositing metal;
forming a conducting structure (500) and a pad structure (400) which are positioned on the second dielectric layer (300), wherein one end of the conducting structure (500) is conducted with the metal grid (301), and the other end of the conducting structure is conducted with the pad structure (400); the pad structure (400) penetrates through the semiconductor substrate (100) and the second dielectric layer (300) and is communicated with the metal interconnection structure (201).
7. The method of claim 6, wherein said forming a via structure (500) and a pad structure (400) in said second dielectric layer (300) comprises:
forming a first trench penetrating through the semiconductor substrate (100) and the second dielectric layer (300) by patterning, and contacting with a front surface (1001) of the semiconductor substrate (100);
forming a second trench through patterning, wherein a first part of the second trench is positioned in the first dielectric layer (200) and is in contact with the first metal interconnection layer of the metal interconnection structure (201), and a second part of the second trench is positioned in the second dielectric layer (300) and is in contact with the metal grid (301);
filling the first groove and the second groove by deposition, and forming a metal layer on the surface of the second dielectric layer (300);
and patterning the metal layer to form a conducting structure (500) and a bonding pad structure (400) of the second dielectric layer (300).
8. The method according to claim 6 or 7, wherein the forming of deep isolation trenches (103) within the semiconductor substrate (100) comprises:
and forming a deep isolation groove (103) in the semiconductor substrate (100) by patterning the semiconductor substrate.
9. The method according to claim 6 or 7, wherein the forming of the metal grid (301) on the second dielectric layer (300) comprises:
and forming a metal grid (301) positioned on the second dielectric layer (300) by deposition and patterning.
10. The method of claim 6 or 7, further comprising, prior to forming a second dielectric layer (300) overlying the back surface (1002) of the semiconductor substrate (100):
and forming a peripheral circuit (202) on the front surface (1001) of the first dielectric layer (200) by deposition and patterning of polysilicon, wherein the peripheral circuit 202 is used for realizing signal transmission or signal processing.
CN202111563810.4A 2021-12-20 2021-12-20 Backside illuminated image sensor and forming method thereof Pending CN114156300A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116682837A (en) * 2023-08-02 2023-09-01 武汉楚兴技术有限公司 Semiconductor structure and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116682837A (en) * 2023-08-02 2023-09-01 武汉楚兴技术有限公司 Semiconductor structure and preparation method thereof
CN116682837B (en) * 2023-08-02 2023-10-24 武汉楚兴技术有限公司 Semiconductor structure and preparation method thereof

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