WO2014071814A1 - Chip packaging structure and packaging method - Google Patents

Chip packaging structure and packaging method Download PDF

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Publication number
WO2014071814A1
WO2014071814A1 PCT/CN2013/086211 CN2013086211W WO2014071814A1 WO 2014071814 A1 WO2014071814 A1 WO 2014071814A1 CN 2013086211 W CN2013086211 W CN 2013086211W WO 2014071814 A1 WO2014071814 A1 WO 2014071814A1
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WO
WIPO (PCT)
Prior art keywords
metal
ball
under
electrode
layer
Prior art date
Application number
PCT/CN2013/086211
Other languages
French (fr)
Chinese (zh)
Inventor
林仲珉
石磊
沈海军
Original Assignee
南通富士通微电子股份有限公司
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Publication date
Priority claimed from CN201210444530.6A external-priority patent/CN102931101B/en
Priority claimed from CN201210444502.4A external-priority patent/CN102915986B/en
Application filed by 南通富士通微电子股份有限公司 filed Critical 南通富士通微电子股份有限公司
Priority to US14/441,477 priority Critical patent/US9293432B2/en
Publication of WO2014071814A1 publication Critical patent/WO2014071814A1/en

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Definitions

  • the present invention relates to the field of semiconductor technologies, and in particular, to a chip package structure and a chip package method.
  • connection between the IC chip and the external circuit is through metal wire bonding (Wire
  • Wafer Level Chip Scale Packaging is a technology that performs a package test on a whole wafer and then cuts a single finished chip.
  • the packaged chip size is exactly the same as the chip.
  • Wafer-level chip-scale packaging technology completely overturns the traditional packaging such as Ceramic Leadless Chip Carrier (Ceramic Leadless Chip Carrier), organic leadless chip carrier (Organic Leadless Chip Carrier) mode, in line with the market is increasingly lighter electronic products , small, short, thin and low-cost requirements.
  • Wafer-level chip-scale packaging technology is a technology that can integrate IC design, wafer fabrication, package testing, and integration. It is a hot spot and future development trend in the current packaging field.
  • FIG. 1 is a schematic cross-sectional view of a prior art wafer level chip size package structure, including: a semiconductor substrate 101; a metal pad 103 inside; an insulating layer 102 on a surface of the semiconductor substrate 101, the insulating layer 102 having an opening exposing the metal pad 103; being located in the opening and covering a portion of the metal solder
  • the contact area between the solder ball 105 and the under-ball metal electrode 104 is small, and the adhesion between the solder ball 105 and the under-ball metal electrode 104 is poor.
  • the solder ball 105 is directly on the under-ball metal electrode 104.
  • the material of the ball-metal electrode 104 is usually copper, and the material of the solder ball 105 is usually tin.
  • the tin atoms will diffuse into the copper electrode, and the copper atoms will also diffuse into the solder balls, forming an intermetallic compound (IMC) and voids.
  • IMC intermetallic compound
  • the interface alloy compound has brittleness and will affect the solder joint machinery. Strength and longevity.
  • the prior art chip packaging method has poor reliability.
  • the problem solved by the present invention is that the adhesion between the solder balls of the prior art and the metal electrodes under the ball is poor, and the reliability is poor.
  • the present invention provides a chip package structure comprising: a semiconductor substrate; a metal pad located in the semiconductor substrate; an insulating layer on the semiconductor substrate, the insulating layer having an exposure An opening of the metal pad; a ball under the metal electrode on the metal pad; a solder ball on a surface of the metal electrode under the ball, the solder ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball.
  • the material of the metal pad is gold, copper, aluminum or silver.
  • the metal pad is a re-distributed pad.
  • the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the under-metal electrode is an alloy containing gold, copper, or silver.
  • the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball Metal electrode top.
  • the electrode tail height is 0.005 to 1.5 times the height of the electrode body.
  • the under-metal metal electrode surface has a cover layer, the cover layer has a second apron structure, and the second apron structure covers a metal pad around the bottom of the under-ball metal electrode, the second apron The structural surface is covered by the first apron structure.
  • the cover layer is a stacking structure of a diffusion prevention layer and a wetting layer
  • the anti-diffusion layer is located on a surface of the under-metal electrode
  • the wetting layer is located on a surface of the anti-diffusion layer
  • the anti-diffusion layer There is a third apron structure
  • the wetting layer has a fourth apron structure.
  • the material of the anti-diffusion layer is nickel.
  • the material of the wetting layer is one of tin, gold, and silver, or the material of the wetting layer is an alloy containing tin, gold, or silver.
  • the present invention further provides a chip packaging method, comprising: providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad; Forming a ball under metal electrode on the metal pad; forming a solder ball on the surface of the ball under the metal electrode, the solder ball having a first apron structure, the first apron structure covering the bottom of the bottom metal electrode Metal pad.
  • the material of the metal pad is gold, copper, aluminum or silver.
  • the metal pad is a re-distributed pad.
  • the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the under-metal electrode is an alloy containing gold, copper, or silver.
  • the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball Metal electrode top.
  • the method for forming the under-metal metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of a tail portion of the electrode to be formed; and the wire clip cutting the metal wire, A ball under metal electrode is formed.
  • the electrode tail height is 0.005 to 1.5 times the height of the electrode body.
  • the surface of the under-metal metal electrode is formed with a cover layer, the cover layer has a second apron structure, and the second apron structure covers a metal pad around the bottom of the under-metal electrode.
  • the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer, the anti-diffusion layer is located on a surface of the under-ball metal electrode, and the wetting layer is located on a surface of the anti-diffusion layer.
  • the anti-diffusion layer has a third apron structure, and the anti-diffusion layer is formed by chemical plating.
  • the present invention has the following advantages:
  • the solder ball has a first apron structure that covers a portion of the metal pad around the bottom of the under-metal electrode.
  • the first apron structure increases the contact area of the solder ball and the metal pad, and enhances the adhesion of the solder ball and the metal pad, so that the solder ball is less likely to fall off from the surface of the metal pad when subjected to an external force.
  • the cover layer is a stacking structure of the anti-diffusion layer and the wetting layer, the anti-diffusion layer is located on the surface of the under-ball metal electrode, and the wetting layer is located on the surface of the anti-diffusion layer.
  • the solder ball is directly located on the metal electrode under the ball, and the diffusion between the metal electrode and the solder ball under the ball forms an interface alloy compound and a void, and the interface alloy compound has brittleness, which will affect the solder joint. Mechanical strength and longevity.
  • an anti-diffusion layer is formed on the surface of the metal electrode under the ball, and the material of the anti-diffusion layer is nickel. Compared with the metal electrode under the ball, the anti-diffusion layer and the solder ball form an interface alloy alloy, which is much slower. As a barrier between the metal electrode under the ball and the solder ball, it prevents the formation of interface alloy compounds and voids.
  • a wetting layer is further formed on the surface of the diffusion preventing layer to prevent oxidation of the diffusion preventing layer, and the wetting layer and the subsequently formed solder ball are infiltrated and have better adhesion.
  • the material of the wetting layer is one of tin, gold, and silver, or the material of the wetting layer is an alloy containing tin, gold, or silver.
  • the cover layer has a second apron structure, and the second apron structure of the cover layer increases the contact area of the cover layer and the metal pad, and enhances the adhesion of the solder ball, the cover layer, the under-ball metal electrode, and the metal pad.
  • the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball metal Top of the electrode.
  • the tail of the electrode is embedded in the solder ball, which increases the contact area between the metal electrode under the ball and the solder ball, so the adhesion between the metal electrode under the ball and the solder ball is enhanced, so that the solder ball is less likely to be subjected to an external force. Falling off the surface of the metal electrode under the ball.
  • the method for forming the under-metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of a tail portion of the electrode to be formed; and the wire clip cutting the metal wire, A ball under metal electrode is formed.
  • the method of forming a ball metal electrode by a wire bonding method has a low manufacturing cost.
  • FIG. 1 is a schematic diagram of a prior art chip package structure
  • FIG. 2 is a schematic diagram of a chip package structure according to a first embodiment of the present invention.
  • FIG. 3 is a schematic flow chart of a chip packaging method for forming a chip package structure according to a first embodiment of the present invention
  • FIG. 7 is a schematic diagram of a chip package structure according to a second embodiment of the present invention
  • FIG. 3 is a schematic flow chart of a chip packaging method for forming a chip package structure according to a first embodiment of the present invention
  • FIG. 7 is a schematic diagram of a chip package structure according to a second embodiment of the present invention.
  • FIG. 8 to FIG. 10 are schematic cross-sectional views showing a chip package method of a chip package structure according to a second embodiment of the present invention.
  • FIG. 11 is a schematic diagram of a chip package structure according to a third embodiment of the present invention.
  • FIG. 12 is a schematic flow chart of a chip packaging method for forming a chip package structure of a second embodiment of the present invention.
  • FIG. 13 to FIG. 17 are schematic cross-sectional views showing a chip package method of a chip package structure according to a third embodiment of the present invention.
  • FIG. 18 is a schematic diagram of a chip package structure according to a fourth embodiment of the present invention.
  • 19 to 23 are schematic cross-sectional views showing a chip package method of a chip package structure according to a third embodiment of the present invention.
  • the solder ball 105 is located above the ball metal electrode 104, and the solder ball 105 is in contact with the upper surface of the ball metal electrode 104, and the contact area is small, and the solder ball 105 is The adhesion between the under-ball metal electrodes 104 is poor.
  • the material of the under-ball metal electrode 104 is usually copper, and the material of the solder ball 105 is usually tin.
  • the tin atom diffuses into the metal electrode under the copper ball, and the copper atom At the same time, it will diffuse into the solder ball to form an intermetallic compound (IMC) and a void.
  • IMC intermetallic compound
  • the interface alloy compound has brittleness, which will affect the mechanical strength and life of the solder joint.
  • the present invention provides a new chip package structure and package method, the chip package structure comprising: a semiconductor substrate; a metal pad located in the semiconductor substrate; an insulating layer on the semiconductor substrate, The insulating layer has an opening exposing the metal pad; a ball-down metal electrode on the metal pad, a lower surface area of the under-ball metal electrode is smaller than a metal pad area; and a soldering on the surface of the ball under the metal electrode
  • the ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball.
  • the chip packaging method includes: providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad; forming a ball under the metal pad a metal electrode, a lower surface area of the under-metal electrode is smaller than a metal pad area; a solder ball is formed on the surface of the under-metal electrode, the solder ball has a first apron structure, and the first apron structure covers the ball A metal pad around the bottom of the metal electrode.
  • FIG. 2 is a schematic diagram of a chip package structure according to a first embodiment of the present invention, including: a semiconductor substrate 201; a metal pad 203 located in the semiconductor substrate 201; and a semiconductor substrate 201 An insulating layer 202 having an opening exposing the metal pad 203; a ball under metal electrode 204 on the metal pad 203; and a solder ball 207 on a surface of the under ball metal electrode 204
  • the solder ball 207 has a first apron structure 207a that covers the metal pad 203 around the bottom of the under-ball metal electrode 204.
  • the semiconductor substrate 201 may be a single crystal silicon, an SOI (Silicon On Insulator), a SiGe or a III-V compound wafer, and the semiconductor substrate 201 includes a layer or a mutual layer located inside and on the surface thereof. And other semiconductor structures.
  • the metal pad 203 is located in the semiconductor substrate 201, and the metal pad 203 is a top layer interconnection metal electrode of the semiconductor substrate 201, and the material of the metal pad is gold, copper, aluminum or silver.
  • the metal pad 203 is used in the package structure to connect the chip internal circuit and the external package component.
  • the insulating layer 202 is on the semiconductor substrate 201, and the insulating layer 202 has an opening exposing the metal pad 203.
  • the insulating layer 202 includes a passivation layer and a polymer layer (not shown) for protecting the metal pad 203, electrically isolating, and forming an opening exposing the metal pad 203, the passivation
  • the material of the layer may be silicon oxide, silicon nitride or a low K material; the polymer layer is on the passivation layer, the polymer layer has an opening exposing the metal pad 203, the polymer
  • the material may be polyimide, epoxy (Epoxy) or Benzocyclobutene.
  • the semiconductor substrate 201 is single crystal silicon, and the semiconductor substrate 201 also included are semiconductor devices, metal interconnects, and other semiconductor structures fabricated thereon.
  • the insulating layer 202 includes a passivation layer of silicon oxide and a polymer layer of polyimide material, the insulating layer 202 having an opening exposing the metal pad 203, the metal pad 203 being the semiconductor.
  • the top layer of the substrate 201 interconnects the metal electrodes, and the material of the metal pads 203 is copper.
  • the under-ball metal electrode 204 on the metal pad 203 is used to connect the metal pad 203 and the solder ball 207.
  • the material of the under-ball metal electrode 204 is one of gold, copper, and silver, or the material of the under-ball metal electrode 204 is an alloy containing gold, copper, or silver.
  • the process of forming the under-ball metal electrode 204 is specifically: forming a photoresist layer on a surface of the semiconductor substrate 201, the photoresist layer having an opening exposing a portion of the metal pad 203 The opening is filled with a metal material using a process of electroplating, physical vapor deposition or vapor deposition, and the photoresist layer is removed, and the metal material forms the under-ball metal electrode 204.
  • the process of forming the under-ball metal electrode 204 is wire bonding, and the specific steps are as follows: the metal wire reaches the top of the metal pad 203 through the bonding head, and generates an electric spark by using an oxyhydrogen flame or an electric discharge system. By melting the metal lead, under the action of surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), and the bonding head is lowered, under appropriate pressure, temperature, kinetic energy and time. The metal ball is pressed against the metal pad 203.
  • the solder ball 207 is located on the surface of the under-ball metal electrode 204, and the solder ball 207 has a first apron structure 207a, and the first apron structure 207a covers a portion of the metal solder around the bottom of the under-ball metal electrode 204. Disk 203.
  • the first apron structure 207a increases the contact area of the solder ball 207 and the metal pad 203, and enhances the adhesion of the solder ball 207 and the metal pad 203, so that the solder ball 207 is less likely to be metal from the external force.
  • the surface of the pad is peeled off.
  • the solder balls 207 may be formed by a printing process, and the solder balls 207 are made of tin or a tin alloy.
  • the specific process for forming the solder balls 207 is as follows: The solder is printed on the under-ball metal electrode 204 through a screen, and then subjected to high-temperature reflow, and the solder is transformed into a solder ball 207 under surface tension.
  • FIG. 3 is a schematic flowchart of a chip packaging method for forming the chip package structure, including:
  • Step S101 providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad;
  • Step S102 forming a ball under metal electrode on the metal pad
  • Step S103 forming a solder ball on the surface of the under-metal electrode, the solder ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball.
  • a semiconductor substrate 201 having a metal pad 203 and an insulating layer 202 having an opening exposing the metal pad 203 is provided.
  • the semiconductor substrate 201 may be a single crystal silicon, SOI (Silicon On Insulator), SiGe or III-V compound wafer, the semiconductor substrate 201 including one or several layers of dielectrics and other semiconductors located inside and on the surface thereof. structure.
  • SOI Silicon On Insulator
  • SiGe SiGe or III-V compound wafer
  • the insulating layer 202 includes a passivation layer and a polymer layer (not shown) for protecting the metal pad 203, electrically isolating, and forming an opening exposing the metal pad 203, the passivation
  • the material of the layer may be silicon oxide, silicon nitride or a low K material; the polymer layer is on the passivation layer, the polymer layer having an opening exposing the metal pad 203, the polymer
  • the material may be Polyimide, Epoxy or Benzocyclobutene.
  • the metal pad 203 is a top-level interconnect metal electrode of the semiconductor substrate 201, and the material of the metal pad 203 may be gold, copper, aluminum or silver.
  • the semiconductor substrate 201 is monocrystalline silicon, and the semiconductor substrate 201 further includes semiconductor devices, metal interconnects, and other semiconductor structures fabricated thereon.
  • the insulating layer 202 includes a passivation layer of silicon oxide and a polymer layer of polyimide material, the insulating layer 202 having an opening exposing the metal pad 203, the metal pad 203 being the semiconductor.
  • the top layer of the substrate 201 interconnects the metal electrodes, and the material of the metal pads 203 is copper.
  • a ball under metal electrode 204 is formed on the metal pad 203, and the ball under metal electrode 204 is used to connect the metal pad 203 and the subsequently formed solder balls.
  • the material of the under-ball metal electrode 204 is one of gold, copper, and silver, or the material of the under-ball metal electrode 204 is An alloy of gold, copper, or silver.
  • the process of forming the under-ball metal electrode 204 is specifically: forming a photoresist layer on a surface of the semiconductor substrate 201, the photoresist layer having an opening exposing a portion of the metal pad 203 The opening is filled with a metal material using a process of electroplating, physical vapor deposition or vapor deposition, and the photoresist layer is removed, and the metal material forms the under-ball metal electrode 204.
  • the process of forming the under-ball metal electrode 204 is wire bonding, and the specific steps are as follows: the metal wire reaches the top of the metal pad 203 through the bonding head, and generates an electric spark by using an oxyhydrogen flame or an electric discharge system. By melting the metal lead, under the action of surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), and the bonding head is lowered, under appropriate pressure, temperature, kinetic energy and time. The metal ball is pressed against the metal pad 203.
  • a solder ball 207 is formed on the surface of the under-ball metal electrode 204.
  • the solder ball 207 has a first apron structure 207a, and the first apron structure 207a covers the bottom of the under-ball metal electrode 204.
  • the first apron structure 207a increases the contact area of the solder ball 207 and the metal pad 203, and enhances the adhesion of the solder ball 207 and the metal pad 203, so that the solder ball 207 is less likely to be metal from the external force.
  • the surface of the pad is peeled off.
  • the solder balls 207 are formed by a printing process, and the solder balls 207 are made of tin or a tin alloy.
  • the specific process for forming the solder balls 207 is as follows: The solder is printed on the under-metal electrode 204 through the screen, and then subjected to high-temperature reflow, and the solder is converted into the solder balls 207 under the surface tension.
  • the formed solder ball 207 covers the under-ball metal electrode 204 and the metal pad 203, that is, the solder ball 207 has a first apron structure 207a, and the first apron structure 207a A metal pad 203 around the bottom of the under-ball metal electrode 204 is covered.
  • FIG. 7 is a schematic diagram of a chip package structure according to a second embodiment of the present invention, including: a semiconductor substrate 301; a metal pad 303 located in the semiconductor substrate 301; and a semiconductor substrate 301 An insulating layer 302 having an opening exposing the metal pad 303; a ball under metal electrode 304 on the metal pad 303, the under-ball metal electrode 304 having an electrode body portion 304a and an electrode tail portion 304b, the electrode body portion 304a is located under the ball metal a bottom portion of the electrode 304 is in contact with the metal pad 303, the electrode tail portion 304b is located at the top of the under-ball metal electrode 304; a solder ball 307 is located on the surface of the under-ball metal electrode 304, and the solder ball 307 has a A skirt structure 307a, the first apron structure 307a covers the metal pad 303 around the bottom of the under-ball metal electrode 304.
  • the under-ball metal electrode 304 has an electrode body portion 304a and an electrode tail portion 304b, and the electrode body portion 304a is located at the bottom of the under-ball metal electrode 304 and is The metal pads 303 are in contact, and the electrode tails 304b are located on top of the under-ball metal electrodes 304.
  • the electrode body portion 304a connects the metal pad 303 and the solder ball and supports the electrode tail portion 304b.
  • the electrode tail portion 304b is embedded in the solder ball, thereby increasing the contact area between the ball metal electrode 304 and the solder ball.
  • the adhesion of the under-ball metal electrode 304 to the solder ball is enhanced, so that the solder ball is less likely to fall off from the surface of the under-ball metal electrode 304 when subjected to an external force.
  • the under-ball metal electrode 304 can be formed by a wire bonding process, which is further described below in conjunction with a method of forming the under-ball metal electrode 304 in a specific embodiment.
  • the process of forming the under-ball metal electrode 304 by using a wire bonding method is specifically as follows: a metal wire reaches the top of the metal pad 303 through a bonding head, and an electric spark is generated by an oxyhydrogen flame or an electric discharge system to melt the metal wire, in surface tension Under the action of the molten metal, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), the bonding head is lowered, and the metal ball is pressed against the metal pad 303 under appropriate pressure, temperature, kinetic energy and time.
  • the wire bonding is commonly used in the process of connecting the internal chip of the semiconductor package and the external pin and the chip, and the inventors of the present invention apply the same to the formation of the under-metal electrode 304 by improving the wire bonding process.
  • the electrode tail portion 304b can be formed by the metal lead arcing after the bonding head is lifted while forming the electrode body portion 304a, and the process cartridge is single, and the forming efficiency is high.
  • the material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver.
  • the height of the electrode tail portion 304b is 0.005 to 1.5 times the height of the electrode body portion 304a, and the height of the electrode tail portion 304b is lower than the electrode body portion 304a.
  • the length of the electrode tail 304b embedded in the subsequently formed solder ball 307 is limited, and the adhesion to the under-ball metal electrode 304 and the solder ball is limited; and when the height of the electrode tail portion 304b is higher than the height of the electrode body portion 304a
  • the electrode tail portion 304b is thinner than the electrode body portion 304a, and the metal texture is soft, which is easily deformed and bent during the manufacturing process, and the yield is lowered, and Not conducive to flip chip packaging.
  • the material of the under-ball metal electrode 304 is copper, and the height of the electrode tail portion 304b is the same as the height of the electrode body portion 304a.
  • the material and structure of the semiconductor substrate 301, the insulating layer 302, the metal pad 303, and the solder ball 307 in this embodiment are similar to those of the first embodiment. For details, please refer to the first embodiment, This will not be repeated here.
  • FIG. 8 to FIG. 10 are packaging methods of the chip package structure described in the second embodiment.
  • a semiconductor substrate 301 having a metal pad 303 and an insulating layer 302 having an opening exposing the metal pad 303 is provided.
  • a semiconductor substrate 301 having a metal pad 303 and an insulating layer 302 having an opening exposing the metal pad 303 is provided.
  • a ball under metal electrode 304 is formed on the metal pad 303, and the ball under metal electrode 304 is used to connect the metal pad 303 and the subsequently formed solder balls.
  • the material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver.
  • the under-ball metal electrode 304 has an electrode body portion 304a and an electrode tail portion 304b, and the electrode body portion 304a is located at the bottom of the under-ball metal electrode 304 and is in contact with the metal pad 303.
  • the electrode tail 304b is located on top of the under-ball metal electrode 304.
  • the electrode body portion 304a connects the metal pad 303 and the subsequently formed solder ball and supports the electrode tail portion 304b.
  • the electrode tail portion 304b is embedded in the subsequently formed solder ball, and the under-ball metal electrode 304 and the solder are enlarged.
  • the contact area of the ball is such that the adhesion of the under-metal electrode 304 to the solder ball is enhanced, so that the solder ball is less likely to fall off the surface of the under-metal electrode 304 when subjected to an external force.
  • the method of forming the under-ball metal electrode 304 is wire bonding, including: metal wire bonding with the metal pad to form the electrode body portion 304a; metal wire arcing to the height of the electrode tail portion 304b to be formed; Metal leads form a ball under metal electrode 304.
  • the process of forming the under-ball metal electrode 304 is specifically as follows: metal wire passing key The head reaches the top of the metal pad 303, and an electric spark is generated by an oxyhydrogen flame or an electric discharge system to melt the metal lead. Under the action of the surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 times to 4 times the diameter of the metal lead). ⁇ ), lowering the bonding head, pressing the metal ball on the metal pad 303 under appropriate pressure, temperature, kinetic energy and time, in the process, applying pressure to the metal ball through the bonding head, and promoting the lead metal and The metal pad 303 is plastically deformed and inter-diffused between the atoms to form the electrode body portion 304a.
  • the bonding head is lifted up, and the metal wire is arced to a specific height (the height of the electrode tail portion 304b to be formed), and is cut by the bonding wire clip.
  • the wire bonding is commonly used in the process of connecting the internal chip of the semiconductor package and the external pin and the chip, and the inventors of the present invention apply the same to the formation of the under-metal electrode 304 by improving the wire bonding process.
  • the electrode tail portion 304b can be formed by the metal lead arcing after the bonding head is lifted while forming the electrode body portion 304a, and the process cartridge is single, and the forming efficiency is high.
  • the material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver.
  • the height of the electrode tail portion 304b is 0.005 to 1.5 times the height of the electrode body portion 304a. When the height of the electrode tail portion 304b is less than 0.005 times the height of the electrode body portion 304a, the electrode tail portion 304b is embedded in the length of the subsequently formed solder ball.
  • the adhesion enhancement to the under-ball metal electrode 304 and the solder ball is limited; and when the height of the electrode tail portion 304b is higher than 1.5 times the height of the electrode body portion 304a, since the electrode tail portion 304b is formed by the wire bonding, the arc is formed.
  • the electrode tail portion 304b is thinner than the electrode body portion 304a, and has a soft metal texture. It is easily deformed and bent during the manufacturing process and affects the shape of the subsequently formed solder ball, and the yield is lowered, which is disadvantageous for the reverse chip package.
  • the material of the under-ball metal electrode 304 is copper, and the height of the electrode tail portion 304b is the same as the height of the electrode body portion 304a.
  • solder ball 307 is formed on the surface of the under-ball metal electrode 304.
  • the solder ball 307 has a first apron structure 307a, and the first apron structure 307a covers the bottom of the under-ball metal electrode 304.
  • Metal pad 303 for the specific formation process and related descriptions, please refer to the corresponding parts of the first embodiment, and details are not described herein again.
  • FIG. 11 is a schematic diagram of a chip package structure according to a third embodiment of the present invention, including: a semiconductor substrate 401; a metal pad 403 located in the semiconductor substrate 401; an insulating layer 402 on the semiconductor substrate 401, the insulating layer 402 having an opening exposing the metal pad 403;
  • the under-ball metal electrode 404 on the metal pad 403 has an electrode body portion and an electrode tail portion, the electrode body portion being located at the bottom of the under-ball metal electrode 404 and with the metal pad 403
  • the electrode tail is located at the top of the under-ball metal electrode 404; a cover layer on the surface of the under-ball metal electrode 404, the cover layer has a second apron structure, and the second apron structure covers the ball A metal pad 403 around the bottom of the lower metal electrode 404; a solder ball 407 on the surface of the cover layer, the solder ball 407 having a first apron structure 407a, the first apron structure
  • the surface of the under-ball metal electrode 404 has a cover layer
  • the cover layer has a second apron structure
  • the second apron structure covers the under-ball metal electrode 404.
  • the cover layer is a stacked structure of the diffusion prevention layer 405 and the wetting layer 406, the anti-diffusion layer 405 is located on the surface of the under-ball metal electrode 404, and the wetting layer 406 is located on the surface of the anti-diffusion layer 405.
  • the diffusion barrier layer 405 has a third apron structure 405a having a fourth apron structure 406a.
  • the second apron structure is a stacked structure of a third apron structure 405a and a fourth apron structure 406a.
  • the anti-diffusion layer 405 has a third apron structure 405a covering the surface of the metal pad 403, increasing the contact area of the diffusion prevention layer 405 and the metal pad 403, and enhancing the diffusion prevention layer 405 and the metal.
  • the anti-diffusion layer 405 is made of nickel. Compared with the under-ball metal electrode 404, the anti-diffusion layer 405 and the solder ball form an interface alloy compound are much slower, and can serve as a barrier layer between the under-ball metal electrode 404 and the solder ball. , to prevent the formation of interface alloy compounds and voids. Interface alloy compounds and voids can affect the soldering problem and improve the reliability of the chip package.
  • the thickness of the anti-diffusion layer 405 is 0.05 ⁇ m to 5 ⁇ m.
  • the thickness of the anti-diffusion layer 405 is related to the process of the chip packaging process. When the process temperature of the chip packaging process is lower, the thickness of the anti-diffusion layer 405 may be Reduced.
  • the diffusion prevention The layer 405 is a nickel layer, and the nickel layer has a thickness of 0.5 ⁇ m to 3 ⁇ m.
  • the anti-diffusion layer 405 is usually a nickel layer, and the nickel layer is easily oxidized, resulting in an increase in interface resistivity. Therefore, a wetting layer 406 is further provided on the surface of the nickel layer to prevent oxidation of the nickel layer. In addition, the wetting layer 406 is formed subsequently.
  • the material of the solder ball is infiltrated and the adhesion is better.
  • the material of the wetting layer 406 is one of tin, gold, and silver, or the material of the wetting layer 406 is an alloy containing tin, gold, or silver.
  • the wetting layer 406 has a fourth apron structure 406a that acts to increase the contact area of the wetting layer 406 and the diffusion preventing layer 405, and cooperates with the third apron structure 405a to enhance the metal pad. 403 adhesion effect.
  • the fourth apron structure 406a and the third apron structure 405a together form a second apron structure.
  • the thickness of the wetting layer 406 is from 0.05 ⁇ m to ⁇ , and the thickness of the wetting layer 406 is also related to the process of chip packaging.
  • the wetting layer 406 is a tin layer, the tin layer is not easily oxidized in the air, and is infiltrated with the subsequently formed solder ball material, and the adhesion is better.
  • the thickness of the tin layer is ⁇ . ⁇ To 5 ⁇ .
  • the semiconductor substrate 401, the insulating layer 402, the metal pad 403, and the under-ball metal electrode 404, the material and structure of the solder ball 407 are similar to those of the second embodiment, and are described in detail. Please refer to the second embodiment, and details are not described herein again.
  • FIG. 12 is a flowchart of a third embodiment of the present invention, including:
  • Step S201 providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad;
  • Step S202 forming a ball under metal electrode on the metal pad
  • Step S203 forming a cover layer on the surface of the under-metal electrode, the cover layer having a second apron structure, the second apron structure covering the metal pad around the bottom of the metal electrode under the ball;
  • Step S204 forming The under-ball metal electrode surface having a cover layer forms a solder ball, the solder ball having a first apron structure, and the first apron structure covering the second apron structure.
  • a semiconductor substrate 401 having a metal pad 403 and an insulating layer 402 having an opening exposing the metal pad 403 is provided.
  • a semiconductor substrate 401 having a metal pad 403 and an insulating layer 402 having an opening exposing the metal pad 403 is provided.
  • a sub-ball metal electrode 404 is formed on the metal pad 403,
  • the under-ball metal electrode 404 has an electrode body portion 404a located at the bottom of the under-ball metal electrode 404 and being in contact with the metal pad 403, and an electrode tail portion 404b located at the ball The top of the lower metal electrode 404.
  • a cover layer is formed on the surface of the under-ball metal electrode 404, the cover layer has a second apron structure, and the second apron structure covers the periphery of the bottom of the under-ball metal electrode 404.
  • the cover layer is a stacked structure of the anti-diffusion layer 405 and the wetting layer 406, the anti-diffusion layer 405 is located on the surface of the under-ball metal electrode 404, and the wetting layer 406 is located on the surface of the anti-diffusion layer 405.
  • the diffusion barrier layer 405 has a third apron structure 405a having a fourth skirt structure 406a.
  • the second apron structure is a stacked structure of a third apron structure 405a and a fourth apron structure 406a.
  • Fig. 15 is a schematic cross-sectional view showing the formation of the diffusion preventing layer 405 on the surface of the under-ball metal electrode 404.
  • the diffusion prevention layer 405 has a third apron structure 405a, and the diffusion prevention layer 405 is formed by electroless plating.
  • Electroless plating also called electroless plating, is a method of obtaining a metal plating on the surface of a plating member by an oxidation reduction reaction without being energized.
  • the plating layer is uniform, and the electroless plating apparatus is single, and does not require a power source and an anode.
  • An anti-diffusion layer 405 is formed on the surface of the under-ball metal electrode 404 by electroless plating.
  • the anti-diffusion layer 405 has a third apron structure 405a, and the third apron structure 405a covers the surface of the metal pad 403, and an anti-diffusion layer is added.
  • the contact area of 405 and the metal pad 403 enhances the adhesion of the diffusion prevention layer 405 and the metal pad 403.
  • the under-ball metal electrode 404 and the metal The adhesion of the pad 403 is also enhanced, so that the under-ball metal electrode 404 is less likely to fall off the surface of the metal pad 403 when subjected to an external force.
  • the material of the anti-diffusion layer is nickel.
  • the anti-diffusion layer 405 forms a fine interface alloy with the solder ball, and can be used as a barrier layer between the under-metal electrode 404 and the solder ball. Prevent the formation of interface alloy compounds and voids. Interface alloying compounds and voids can affect the solder joint's machine reliability.
  • the thickness of the anti-diffusion layer 405 is 0.05 ⁇ m to 3 ⁇ m, and the thickness of the anti-diffusion layer 405 is related to the process of the chip packaging process. When low, the thickness of the diffusion prevention layer 405 can be reduced.
  • the diffusion prevention layer 405 is a nickel layer, and the nickel layer has a thickness of 0.5 ⁇ m to 5 ⁇ m.
  • the under-ball metal electrode 404 is treated prior to electroless plating to remove the oxide film on the surface thereof to reduce the contact resistance; then, a nickel layer is formed by electroless plating on the surface of the under-metal electrode 404, the nickel layer
  • the thickness is from 0.5 ⁇ m to 3 ⁇ m.
  • Fig. 16 is a schematic cross-sectional view showing the formation of the wetting layer 406 on the surface of the diffusion prevention layer 405.
  • the anti-diffusion layer 405 is a nickel layer, and the nickel layer is easily oxidized, resulting in an increase in interface resistivity. Therefore, a wetting layer 406 is further formed on the surface of the nickel layer to prevent oxidation of the nickel layer. In addition, the wetting layer 406 is subsequently formed.
  • the material of the ball is infiltrated and the adhesion is better.
  • the material of the wetting layer 406 is one of tin, gold, and silver, or the material of the wetting layer 406 is an alloy containing tin, gold, or silver.
  • the method of forming the wetting layer 406 is electroless plating, and the wetting layer 406 has a fourth apron structure 406a, and the fourth apron structure 406a functions to increase the contact area between the wetting layer 406 and the diffusion preventing layer 405, and the same
  • the three apron structures 405a collectively serve to enhance adhesion to the metal pads 403.
  • the fourth apron structure 406a and the third apron structure 405a together form a second apron structure.
  • the thickness of the wetting layer 406 is from 0.05 ⁇ m to ⁇ , and the thickness of the wetting layer 406 is also related to the process of the chip package.
  • the wetting layer 406 is a tin layer, the tin layer is not easily oxidized in the air, and is infiltrated with the subsequently formed solder ball material, and the adhesion is better.
  • the tin layer is formed by electroless plating.
  • the tin layer has an apron structure, and the tin layer has a thickness of ⁇ . ⁇ to 5 ⁇ .
  • a solder ball 407 is formed on the surface of the under-ball metal electrode 404 formed with the cap layer, the solder ball 407 has a first apron structure 407a, and the first apron structure 407a covers the second apron structure. .
  • the specific formation process and related descriptions please refer to the corresponding parts of the first embodiment, and details are not described herein again.
  • FIG. 18 is a schematic diagram of a chip package structure according to a fourth embodiment of the present invention, including: a semiconductor substrate 501; a metal electrode 508 located in the semiconductor substrate 501; and a second portion on the semiconductor substrate 501
  • the metal pad 503 of the embodiment is a re-distributed pad (RDL).
  • the redistributed pad is formed by adding a first insulating layer 509, a transition metal layer 510 and a second insulating layer 502 on the surface of the chip, which can position the metal electrode 508 in the semiconductor substrate 501 according to the design rule of the packaging process. Rearrange the position as a re-distributed pad. Re-distribution pads can greatly reduce the size of the chip package, meet the needs of high-density packaging, and increase the speed and stability of data transmission.
  • the method of forming the redistribution pad is well known to those skilled in the art and will not be described herein.
  • the material and structure of the semiconductor substrate 501, the under-ball metal electrode 504, the anti-diffusion layer 505, the wetting layer 506, and the solder ball 507 in this embodiment are similar to those of the third embodiment, and are described in detail. Please refer to the third embodiment, and details are not described herein again.
  • FIG. 19 to FIG. 23 a schematic structural view of a chip dispensing method for forming the chip package structure of the fourth embodiment.
  • the semiconductor substrate 501 includes: a metal electrode 508 located in the semiconductor substrate 501; and a portion located in the semiconductor substrate 501 and covering a portion of the metal electrode 508 An insulating layer 509 having a first opening exposing the metal electrode 508; a transition metal layer 510 covering a sidewall and a bottom surface of the first opening, the transition metal layer 510 a first opening surface forming a second opening; a metal pad 503 on the transition metal layer 510 and filling the second opening; a second insulating layer 502 on the metal pad 503, the second insulation Layer 502 has a third opening that exposes metal pad 503.
  • the metal pad 503 in this embodiment is Distributed Pad (RDL).
  • the redistributed pad is formed by adding a first insulating layer 509, a transition metal layer 510 and a second insulating layer 502 on the surface of the chip, which can position the metal electrode 508 in the semiconductor substrate 501 according to the design rule of the packaging process. Rearrange the position as a re-distributed pad. Re-distributed pads can greatly reduce the size of the chip package to meet the needs of high-density packaging, and improve the speed and stability of data transmission.
  • the method for forming the re-distributed pad is well known to those skilled in the art and will not be described herein.
  • a sub-ball metal electrode 504 is formed on the metal pad 503.
  • the sub-ball metal electrode 504 has an electrode body portion 504a and an electrode tail portion 504b.
  • the electrode body portion 504a is located under the ball.
  • the bottom of the metal electrode 504 is in contact with the metal pad 503, and the electrode tail 504b is located at the top of the under-ball metal electrode 504.
  • a cover layer is formed on the surface of the under-ball metal electrode 504, the cover layer has a second apron structure, and the second apron structure covers the periphery of the bottom of the under-ball metal electrode 504.
  • the cover layer is a stacked structure of the diffusion prevention layer 505 and the wetting layer 506, the anti-diffusion layer 505 is located on the surface of the under-ball metal electrode 504, and the wetting layer 506 is located on the surface of the anti-diffusion layer 505.
  • the diffusion barrier layer 505 has a third apron structure 505a, and the wetting layer 506 has a fourth apron structure 506a.
  • the second apron structure is a stacked structure of a third apron structure 505a and a fourth apron structure 506a.
  • a solder ball 507 is formed on the surface of the under-ball metal electrode 504 formed with the cover layer, the solder ball 507 has a first apron structure 507a, and the first apron structure 507a covers the second apron structure. .
  • the solder ball has a first skirt structure, and the first apron structure covers a portion of the metal pad around the bottom of the under-metal electrode.
  • the first apron structure increases the contact area between the solder ball and the metal pad, and enhances the adhesion of the solder ball and the metal pad, so that the solder ball is less likely to fall off from the surface of the metal pad when subjected to an external force.
  • the under-ball metal electrode has an electrode body portion and an electrode tail portion, and the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad.
  • the electrode tail is located on top of the under-ball metal electrode.
  • the tail of the electrode is embedded in the solder ball, and the ball is enlarged The contact area between the lower metal electrode and the solder ball, so that the adhesion of the metal electrode under the ball to the solder ball is enhanced, so that the solder ball is less likely to fall off from the surface of the metal electrode under the ball when subjected to an external force.
  • the method for forming the under-metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of an electrode tail to be formed; and the wire clip cutting the metal wire to form a ball Lower metal electrode.
  • the method of forming the under-ball metal electrode by the wire bonding method has a low manufacturing cost.
  • the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer
  • the diffusion prevention layer is located on the surface of the under-ball metal electrode
  • the wetting layer is located on the surface of the diffusion prevention layer.
  • the solder ball is directly located on the metal electrode under the ball, and the interdiffusion between the metal electrode and the solder ball under the ball forms an interface alloy compound and void, and the interface alloy compound has brittleness, which will affect The mechanical strength and life of the solder joint.
  • an anti-diffusion layer is formed on the surface of the metal electrode under the ball, and the material of the anti-diffusion layer is nickel.
  • the anti-diffusion layer and the solder ball form an interface alloy compound, which is much slower.
  • a wetting layer is further formed on the surface of the diffusion preventing layer to prevent oxidation of the diffusion preventing layer, and the wetting layer and the subsequently formed solder ball are immersed in the material to have better adhesion.
  • the material of the wetting layer is one of tin, gold, silver, or the material of the wetting layer is an alloy containing tin, gold, or silver.
  • the cover layer has a second apron structure, and the second apron structure of the cover layer increases the contact area of the cover layer and the metal pad, and enhances the attachment of the solder ball, the cover layer, the under-ball metal electrode, and the metal pad. Focus on.

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  • Engineering & Computer Science (AREA)
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Abstract

A chip packaging structure and packaging method. The packaging structure comprises: a semiconductor substrate; a metal pad provided inside the semiconductor substrate; an insulating layer provided on the semiconductor substrate, the insulating layer having an opening for exposing the metal pad; a sub-ball metal electrode provided on the metal pad; a solder ball provided on the surface of the sub-ball metal electrode, the solder ball having a first apron structure and the first apron structure covering partial metal pad on the periphery of the bottom of the under-ball metal electrode. The chip packaging structure of the present invention enhances the adhesion between the solder ball and the metal pad, and improves the reliability in chip packaging.

Description

芯片封装结构和封装方法  Chip package structure and packaging method
本申请要求 2012年 11月 8日提交中国专利局、申请号为 201210444502.4、 发明名称为 "芯片封装结构"的中国专利申请的优先权和 2012年 11月 8 日提 交中国专利局、 申请号为 201210444530.6、 发明名称为 "芯片封装方法"的中 国专利申请的优先权， 其全部内容通过引用结合在本申请中。  This application claims the priority of the Chinese patent application filed on November 8, 2012, the Chinese Patent Office, the application number is 201210444502.4, the invention name is "chip package structure" and the Chinese Patent Office submitted to the Chinese Patent Office on November 8, 2012, the application number is 201210444530.6 The priority of the Chinese patent application entitled "Chip Packaging Method" is hereby incorporated by reference in its entirety.
技术领域 Technical field
本发明涉及半导体技术领域， 尤其涉及一种芯片封装结构和芯片封装方 法。  The present invention relates to the field of semiconductor technologies, and in particular, to a chip package structure and a chip package method.
背景技术 Background technique
传统技术上， IC 芯片与外部电路的连接是通过金属引线键合 （Wire Traditionally, the connection between the IC chip and the external circuit is through metal wire bonding (Wire
Bonding ) 的方式实现。 随着 IC芯片特征尺寸的缩小和集成电路规模的扩大， 引线键合技术不再适用。 晶圆级芯片尺寸封装 （Wafer Level Chip Scale Packaging, WLCSP )技术是对整片晶圆进行封装测试后再切割得到单个成品 芯片的技术，封装后的芯片尺寸与棵片完全一致。 晶圆级芯片尺寸封装技术彻 底颠覆了传统封装如陶瓷无引线芯片载具（Ceramic Leadless Chip Carrier )、有 机无引线芯片载具（Organic Leadless Chip Carrier ) 的模式， 顺应了市场对敖 电子产品日益轻、 小、 短、 薄化和低价化要求。 经晶圆级芯片尺寸封装技术封 装后的芯片尺寸达到了高度微型化，芯片成本随着芯片尺寸的减 d、和晶圆尺寸 的增大而显著降低。 晶圆级芯片尺寸封装技术是可以将 IC设计、 晶圆制造、 封装测试、 整合为一体的技术， 是当前封装领域的热点和未来发展的趋势。 Bonding) is implemented in a way. As the feature size of IC chips shrinks and the scale of integrated circuits expands, wire bonding technology is no longer applicable. The Wafer Level Chip Scale Packaging (WLCSP) technology is a technology that performs a package test on a whole wafer and then cuts a single finished chip. The packaged chip size is exactly the same as the chip. Wafer-level chip-scale packaging technology completely overturns the traditional packaging such as Ceramic Leadless Chip Carrier (Ceramic Leadless Chip Carrier), organic leadless chip carrier (Organic Leadless Chip Carrier) mode, in line with the market is increasingly lighter electronic products , small, short, thin and low-cost requirements. The chip size after wafer-level chip-scale packaging technology is highly miniaturized, and the chip cost is significantly reduced as the chip size is reduced by d and the wafer size is increased. Wafer-level chip-scale packaging technology is a technology that can integrate IC design, wafer fabrication, package testing, and integration. It is a hot spot and future development trend in the current packaging field.
现有技术公开了一种晶圆级芯片尺寸封装技术， 请参考图 1 , 图 1为现有 技术晶圆级芯片尺寸封装结构的剖面示意图， 包括： 半导体衬底 101 ; 位于所 述半导体衬底 101内部的金属焊盘 103; 位于所述半导体衬底 101表面的绝缘 层 102, 所述绝缘层 102具有暴露出所述金属焊盘 103的开口； 位于所述开口 内且覆盖部分所述金属焊盘 103的球下金属电极 104; 位于所述球下金属电极 104上的焊球 105 , 所述焊球 105覆盖球下金属电极 104的上表面。  The prior art discloses a wafer level chip size packaging technology. Please refer to FIG. 1. FIG. 1 is a schematic cross-sectional view of a prior art wafer level chip size package structure, including: a semiconductor substrate 101; a metal pad 103 inside; an insulating layer 102 on a surface of the semiconductor substrate 101, the insulating layer 102 having an opening exposing the metal pad 103; being located in the opening and covering a portion of the metal solder The under-ball metal electrode 104 of the disk 103; the solder ball 105 on the under-ball metal electrode 104, the solder ball 105 covering the upper surface of the under-ball metal electrode 104.
现有技术中焊球 105与球下金属电极 104的接触面积小，焊球 105与球下 金属电极 104之间的附着力差。 另外，现有技术中焊球 105直接位于球下金属 电极 104之上，球下金属电极 104的材料通常为铜，焊球 105的材料通常为锡， 锡原子会扩散进入铜电极中去， 而铜原子也同时会扩散进入锡球中， 形成介面 合金共化物（IMC: Intermetallic Compound )和空洞， 介面合金共化物具有脆 性， 将会影响焊点的机械强度和寿命。 In the prior art, the contact area between the solder ball 105 and the under-ball metal electrode 104 is small, and the adhesion between the solder ball 105 and the under-ball metal electrode 104 is poor. In addition, in the prior art, the solder ball 105 is directly on the under-ball metal electrode 104. The material of the ball-metal electrode 104 is usually copper, and the material of the solder ball 105 is usually tin. The tin atoms will diffuse into the copper electrode, and the copper atoms will also diffuse into the solder balls, forming an intermetallic compound (IMC) and voids. The interface alloy compound has brittleness and will affect the solder joint machinery. Strength and longevity.
现有技术的芯片封装方法可靠性差。  The prior art chip packaging method has poor reliability.
其他有关芯片的分装方法还可以参考公开号为 CN101211791 的中国发明 专利申请， 其公开了一种晶圆级芯片封装制程与芯片封装结构。  Other methods for dispensing chips can also be found in the Chinese Patent Application Publication No. CN101211791, which discloses a wafer level chip packaging process and a chip package structure.
发明内容 Summary of the invention
本发明解决的问题是现有技术的焊球和球下金属电极之间附着力差，可靠 性差。  The problem solved by the present invention is that the adhesion between the solder balls of the prior art and the metal electrodes under the ball is poor, and the reliability is poor.
为解决上述问题， 本发明提供了一种芯片封装结构， 包括： 半导体衬底； 位于所述半导体衬底内的金属焊盘； 位于所述半导体衬底上的绝缘层， 所述绝 缘层具有暴露所述金属焊盘的开口； 位于所述金属焊盘上的球下金属电极； 位 于所述球下金属电极表面的焊球， 所述焊球具有第一围裙结构， 所述第一围裙 结构覆盖所述球下金属电极底部周围的金属焊盘。  In order to solve the above problems, the present invention provides a chip package structure comprising: a semiconductor substrate; a metal pad located in the semiconductor substrate; an insulating layer on the semiconductor substrate, the insulating layer having an exposure An opening of the metal pad; a ball under the metal electrode on the metal pad; a solder ball on a surface of the metal electrode under the ball, the solder ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball.
可选的， 所述金属焊盘的材料为金、 铜、 铝或者银。  Optionally, the material of the metal pad is gold, copper, aluminum or silver.
可选的， 所述金属焊盘为再分布式焊盘。  Optionally, the metal pad is a re-distributed pad.
可选的， 所述球下金属电极的材料为金、 铜、 银中的一种， 或者所述球下 金属电极的材料为含金、 铜、 或银的合金。  Optionally, the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the under-metal electrode is an alloy containing gold, copper, or silver.
可选的， 所述球下金属电极具有电极体部和电极尾部， 所述电极体部位于 所述球下金属电极底部且与所述金属焊盘相接，所述电极尾部位于所述球下金 属电极顶部。  Optionally, the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball Metal electrode top.
可选的， 所述电极尾部高度为所述电极体部高度的 0.005~1.5倍。  Optionally, the electrode tail height is 0.005 to 1.5 times the height of the electrode body.
可选的， 所述球下金属电极表面具有覆盖层， 所述覆盖层具有第二围裙结 构，所述第二围裙结构覆盖所述球下金属电极底部周围的金属焊盘， 所述第二 围裙结构表面被所述第一围裙结构覆盖。  Optionally, the under-metal metal electrode surface has a cover layer, the cover layer has a second apron structure, and the second apron structure covers a metal pad around the bottom of the under-ball metal electrode, the second apron The structural surface is covered by the first apron structure.
可选的， 所述覆盖层为防扩散层和浸润层的堆叠结构， 所述防扩散层位于 所述球下金属电极表面， 所述浸润层位于所述防扩散层表面， 所述防扩散层具 有第三围裙结构， 所述浸润层具有第四围裙结构。  Optionally, the cover layer is a stacking structure of a diffusion prevention layer and a wetting layer, the anti-diffusion layer is located on a surface of the under-metal electrode, the wetting layer is located on a surface of the anti-diffusion layer, and the anti-diffusion layer There is a third apron structure, and the wetting layer has a fourth apron structure.
可选的， 所述防扩散层的材料为镍。 可选的， 所述浸润层的材料为锡、 金、 银中的一种， 或者所述浸润层的材 料为含锡、 金、 或银的合金。 Optionally, the material of the anti-diffusion layer is nickel. Optionally, the material of the wetting layer is one of tin, gold, and silver, or the material of the wetting layer is an alloy containing tin, gold, or silver.
为解决上述问题， 本发明还提供一种芯片封装方法， 包括： 提供半导体衬 底， 所述半导体衬底上具有金属焊盘和绝缘层， 所述绝缘层具有暴露所述金属 焊盘的开口； 在所述金属焊盘上形成球下金属电极； 在所述球下金属电极表面 形成焊球， 所述焊球具有第一围裙结构， 所述第一围裙结构覆盖所述球下金属 电极底部周围的金属焊盘。  In order to solve the above problems, the present invention further provides a chip packaging method, comprising: providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad; Forming a ball under metal electrode on the metal pad; forming a solder ball on the surface of the ball under the metal electrode, the solder ball having a first apron structure, the first apron structure covering the bottom of the bottom metal electrode Metal pad.
可选的， 所述金属焊盘的材料为金、 铜、 铝或者银。  Optionally, the material of the metal pad is gold, copper, aluminum or silver.
可选的， 所述金属焊盘为再分布式焊盘。  Optionally, the metal pad is a re-distributed pad.
可选的， 所述球下金属电极的材料为金、 铜、 银中的一种， 或者所述球下 金属电极的材料为含金、 铜、 或银的合金。  Optionally, the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the under-metal electrode is an alloy containing gold, copper, or silver.
可选的， 所述球下金属电极具有电极体部和电极尾部， 所述电极体部位于 所述球下金属电极底部且与所述金属焊盘相接，所述电极尾部位于所述球下金 属电极顶部。  Optionally, the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball Metal electrode top.
可选的， 形成所述球下金属电极的方法为引线键合， 包括： 金属引线与金 属焊盘键合形成电极体部； 金属引线起弧到待形成电极尾部高度； 线夹切断金 属引线， 形成球下金属电极。  Optionally, the method for forming the under-metal metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of a tail portion of the electrode to be formed; and the wire clip cutting the metal wire, A ball under metal electrode is formed.
可选的， 所述电极尾部高度为所述电极体部高度的 0.005~1.5倍。  Optionally, the electrode tail height is 0.005 to 1.5 times the height of the electrode body.
可选的， 所述球下金属电极表面形成有覆盖层， 所述覆盖层具有第二围裙 结构， 所述第二围裙结构覆盖所述球下金属电极底部周围的金属焊盘。  Optionally, the surface of the under-metal metal electrode is formed with a cover layer, the cover layer has a second apron structure, and the second apron structure covers a metal pad around the bottom of the under-metal electrode.
可选的， 所述覆盖层为防扩散层和浸润层的堆叠结构， 所述防扩散层位于 所述球下金属电极表面， 所述浸润层位于所述防扩散层表面。  Optionally, the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer, the anti-diffusion layer is located on a surface of the under-ball metal electrode, and the wetting layer is located on a surface of the anti-diffusion layer.
可选的， 所述防扩散层具有第三围裙结构， 所述防扩散层的形成方法为化 学镀。  Optionally, the anti-diffusion layer has a third apron structure, and the anti-diffusion layer is formed by chemical plating.
与现有技术相比， 本发明具有以下优点：  Compared with the prior art, the present invention has the following advantages:
所述焊球具有第一围裙结构，所述第一围裙结构覆盖所述球下金属电极底 部周围的部分金属焊盘。 所述第一围裙结构增大了焊球和金属焊盘的接触面 积，增强了焊球和金属焊盘的附着力，使得焊球在受外力作用时更不容易从金 属焊盘表面脱落。 进一步的， 所述覆盖层为防扩散层和浸润层的堆叠结构， 所述防扩散层位 于所述球下金属电极表面， 所述浸润层位于所述防扩散层表面。 现有技术中， 焊球直接位于球下金属电极之上，球下金属电极与焊球之间通过原子的扩散会 形成介面合金共化物和空洞，介面合金共化物具有脆性，将会影响焊点的机械 强度和寿命。 在本发明中， 在球下金属电极表面先形成防扩散层， 所述防扩散 层的材料为镍，与球下金属电极相比防扩散层与焊球形成介面合金共化物要慢 很多， 可以作为球下金属电极和焊球之间的阻隔层， 防止形成介面合金共化物 和空洞。 而由于防扩散层容易氧化， 进一步的在防扩散层表面形成浸润层防止 防扩散层的氧化， 另外， 浸润层与后续形成的焊球的材料浸润， 附着力更好。 所述浸润层的材料为锡、金、银中的一种，或者所述浸润层的材料为含锡、金、 或银的合金。 与现有技术相比，在球下金属电极表面形成覆盖层改善了介面合 金共化物问题， 提升了芯片封装的可靠性。 所述覆盖层具有第二围裙结构， 覆 盖层的第二围裙结构增大了覆盖层和金属焊盘的接触面积，增强了焊球、覆盖 层、 球下金属电极和金属焊盘的附着力。 The solder ball has a first apron structure that covers a portion of the metal pad around the bottom of the under-metal electrode. The first apron structure increases the contact area of the solder ball and the metal pad, and enhances the adhesion of the solder ball and the metal pad, so that the solder ball is less likely to fall off from the surface of the metal pad when subjected to an external force. Further, the cover layer is a stacking structure of the anti-diffusion layer and the wetting layer, the anti-diffusion layer is located on the surface of the under-ball metal electrode, and the wetting layer is located on the surface of the anti-diffusion layer. In the prior art, the solder ball is directly located on the metal electrode under the ball, and the diffusion between the metal electrode and the solder ball under the ball forms an interface alloy compound and a void, and the interface alloy compound has brittleness, which will affect the solder joint. Mechanical strength and longevity. In the present invention, an anti-diffusion layer is formed on the surface of the metal electrode under the ball, and the material of the anti-diffusion layer is nickel. Compared with the metal electrode under the ball, the anti-diffusion layer and the solder ball form an interface alloy alloy, which is much slower. As a barrier between the metal electrode under the ball and the solder ball, it prevents the formation of interface alloy compounds and voids. Further, since the diffusion preventing layer is easily oxidized, a wetting layer is further formed on the surface of the diffusion preventing layer to prevent oxidation of the diffusion preventing layer, and the wetting layer and the subsequently formed solder ball are infiltrated and have better adhesion. The material of the wetting layer is one of tin, gold, and silver, or the material of the wetting layer is an alloy containing tin, gold, or silver. Compared with the prior art, forming a coating layer on the surface of the metal electrode under the ball improves the interface alloy common compound problem and improves the reliability of the chip package. The cover layer has a second apron structure, and the second apron structure of the cover layer increases the contact area of the cover layer and the metal pad, and enhances the adhesion of the solder ball, the cover layer, the under-ball metal electrode, and the metal pad.
进一步的， 所述球下金属电极具有电极体部和电极尾部， 所述电极体部位 于所述球下金属电极底部且与所述金属焊盘相接，所述电极尾部位于所述球下 金属电极顶部。所述电极尾部嵌入所述焊球内，增大了球下金属电极与焊球的 接触面积，因此球下金属电极与焊球的附着力增强，使得焊球在受外力作用时， 更不容易从球下金属电极表面脱落。 另夕卜，形成所述球下金属电极的方法为引 线键合， 包括： 金属引线与金属焊盘键合形成电极体部； 金属引线起弧到待形 成电极尾部高度； 线夹切断金属引线， 形成球下金属电极。 采用引线键合方法 形成球下金属电极的方法与现有技术相比， 工艺筒单， 制造成本低。  Further, the under-ball metal electrode has an electrode body portion and an electrode tail portion, the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad, and the electrode tail portion is located under the ball metal Top of the electrode. The tail of the electrode is embedded in the solder ball, which increases the contact area between the metal electrode under the ball and the solder ball, so the adhesion between the metal electrode under the ball and the solder ball is enhanced, so that the solder ball is less likely to be subjected to an external force. Falling off the surface of the metal electrode under the ball. In addition, the method for forming the under-metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of a tail portion of the electrode to be formed; and the wire clip cutting the metal wire, A ball under metal electrode is formed. Compared with the prior art, the method of forming a ball metal electrode by a wire bonding method has a low manufacturing cost.
附图说明 DRAWINGS
图 1是现有技术芯片封装结构示意图；  1 is a schematic diagram of a prior art chip package structure;
图 2为本发明第一实施例芯片封装结构示意图；  2 is a schematic diagram of a chip package structure according to a first embodiment of the present invention;
图 3 为本发明形成第一实施例的芯片封装结构的芯片封装方法的流程示 意图； 示意图； 图 7为本发明第二实施例芯片封装结构示意图； 3 is a schematic flow chart of a chip packaging method for forming a chip package structure according to a first embodiment of the present invention; FIG. 7 is a schematic diagram of a chip package structure according to a second embodiment of the present invention; FIG.
图 8至图 10为本发明第二实施例芯片封装结构的芯片封装方法的剖面结 构示意图；  8 to FIG. 10 are schematic cross-sectional views showing a chip package method of a chip package structure according to a second embodiment of the present invention;
图 11为本发明第三实施例芯片封装结构示意图；  11 is a schematic diagram of a chip package structure according to a third embodiment of the present invention;
图 12为本发明形成第二实施例的芯片封装结构的芯片封装方法的流程示 意图；  12 is a schematic flow chart of a chip packaging method for forming a chip package structure of a second embodiment of the present invention;
图 13至图 17为本发明第三实施例芯片封装结构的芯片封装方法的剖面结 构示意图；  13 to FIG. 17 are schematic cross-sectional views showing a chip package method of a chip package structure according to a third embodiment of the present invention;
图 18为本发明第四实施例芯片封装结构示意图；  18 is a schematic diagram of a chip package structure according to a fourth embodiment of the present invention;
图 19至图 23为本发明第三实施例芯片封装结构的芯片封装方法的剖面结 构示意图。  19 to 23 are schematic cross-sectional views showing a chip package method of a chip package structure according to a third embodiment of the present invention.
具体实施方式 detailed description
由背景技术可知， 请继续参考图 1 , 现有技术中， 焊球 105位于球下金属 电极 104之上， 焊球 105与球下金属电极 104的上表面接触， 接触面积小， 焊 球 105与球下金属电极 104之间的附着力差。 另外，球下金属电极 104的材料 通常为铜， 焊球 105的材料通常为锡， 在铜球下金属电极表面形成锡球时， 锡 原子会扩散进入铜球下金属电极中去， 而铜原子也同时会扩散进入锡球中， 形 成介面合金共化物（IMC: Intermetallic Compound )和空洞， 介面合金共化物 具有脆性， 将会影响焊点的机械强度和寿命。  As can be seen from the background art, please continue to refer to FIG. 1. In the prior art, the solder ball 105 is located above the ball metal electrode 104, and the solder ball 105 is in contact with the upper surface of the ball metal electrode 104, and the contact area is small, and the solder ball 105 is The adhesion between the under-ball metal electrodes 104 is poor. In addition, the material of the under-ball metal electrode 104 is usually copper, and the material of the solder ball 105 is usually tin. When a solder ball is formed on the surface of the metal electrode under the copper ball, the tin atom diffuses into the metal electrode under the copper ball, and the copper atom At the same time, it will diffuse into the solder ball to form an intermetallic compound (IMC) and a void. The interface alloy compound has brittleness, which will affect the mechanical strength and life of the solder joint.
本发明提出一种新的芯片封装结构和封装方法， 所述芯片封装结构包括： 半导体衬底； 位于所述半导体衬底内的金属焊盘； 位于所述半导体衬底上的绝 缘层， 所述绝缘层具有暴露所述金属焊盘的开口； 位于所述金属焊盘上的球下 金属电极， 所述球下金属电极的下表面积小于金属焊盘面积； 位于所述球下金 属电极表面的焊球， 所述焊球具有第一围裙结构， 所述第一围裙结构覆盖所述 球下金属电极底部周围的金属焊盘。所述芯片封装方法包括：提供半导体衬底， 所述半导体衬底上具有金属焊盘和绝缘层，所述绝缘层具有暴露所述金属焊盘 的开口； 在所述金属焊盘上形成球下金属电极， 所述球下金属电极的下表面积 小于金属焊盘面积； 在所述球下金属电极表面形成焊球， 所述焊球具有第一围 裙结构， 所述第一围裙结构覆盖所述球下金属电极底部周围的金属焊盘。 下面结合说明书附图描述本发明提供的四个具体实施例，上述的目的和本 发明的优点将更加清楚。 需要说明的是，提供这些附图的目的是有助于理解本 发明的实施例， 而不应解释为对本发明的不当的限制。 为了更清楚起见， 图中 所示尺寸并未按比例绘制， 可能会做放大、 缩小或其他改变。 下面的描述中阐 述了很多具体细节以便充分理解本发明。但是本发明能够以很多不同于在此描 述的其他方式来实施，本领域技术人员可以在不违背本发明内涵的情况下做类 似推广， 因此本发明不受下面公开的具体实施例的限制。 The present invention provides a new chip package structure and package method, the chip package structure comprising: a semiconductor substrate; a metal pad located in the semiconductor substrate; an insulating layer on the semiconductor substrate, The insulating layer has an opening exposing the metal pad; a ball-down metal electrode on the metal pad, a lower surface area of the under-ball metal electrode is smaller than a metal pad area; and a soldering on the surface of the ball under the metal electrode The ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball. The chip packaging method includes: providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad; forming a ball under the metal pad a metal electrode, a lower surface area of the under-metal electrode is smaller than a metal pad area; a solder ball is formed on the surface of the under-metal electrode, the solder ball has a first apron structure, and the first apron structure covers the ball A metal pad around the bottom of the metal electrode. The four specific embodiments of the present invention are described below in conjunction with the drawings, and the above objects and advantages of the present invention will become more apparent. It is to be understood that the appended drawings are intended to be illustrative of the embodiments of the invention and are not to be construed as limiting. For the sake of clarity, the dimensions shown in the figures are not drawn to scale and may be enlarged, reduced, or otherwise changed. Numerous specific details are set forth in the following description in order to provide a thorough understanding of the invention. However, the present invention can be implemented in many other ways than those described herein, and a person skilled in the art can make a similar promotion without departing from the scope of the present invention, and thus the present invention is not limited by the specific embodiments disclosed below.
第一实施例  First embodiment
请参考图 2, 图 2为本发明第一实施例的芯片封装结构示意图， 包括： 半 导体衬底 201 ; 位于所述半导体衬底 201 内的金属焊盘 203; 位于所述半导体 衬底 201上的绝缘层 202,所述绝缘层 202具有暴露所述金属焊盘 203的开口； 位于所述金属焊盘 203上的球下金属电极 204; 位于所述球下金属电极 204表 面的焊球 207,所述焊球 207具有第一围裙结构 207a,所述第一围裙结构 207a 覆盖所述球下金属电极 204底部周围的金属焊盘 203。  Please refer to FIG. 2. FIG. 2 is a schematic diagram of a chip package structure according to a first embodiment of the present invention, including: a semiconductor substrate 201; a metal pad 203 located in the semiconductor substrate 201; and a semiconductor substrate 201 An insulating layer 202 having an opening exposing the metal pad 203; a ball under metal electrode 204 on the metal pad 203; and a solder ball 207 on a surface of the under ball metal electrode 204 The solder ball 207 has a first apron structure 207a that covers the metal pad 203 around the bottom of the under-ball metal electrode 204.
具体地， 所述半导体衬底 201 可以为单晶硅、 SOI (绝缘体上硅）、 SiGe 或 III-V族化合物晶圆， 所述半导体衬底 201包括位于其内部和表面的一层或 属互连以及其他半导体结构。  Specifically, the semiconductor substrate 201 may be a single crystal silicon, an SOI (Silicon On Insulator), a SiGe or a III-V compound wafer, and the semiconductor substrate 201 includes a layer or a mutual layer located inside and on the surface thereof. And other semiconductor structures.
所述金属焊盘 203位于所述半导体衬底 201内，所述金属焊盘 203为所述 半导体衬底 201的顶层互连金属电极， 所述金属焊盘的材料为金、铜、 铝或者 银， 所述金属焊盘 203在封装结构中用于连接芯片内部电路和外部封装部件。  The metal pad 203 is located in the semiconductor substrate 201, and the metal pad 203 is a top layer interconnection metal electrode of the semiconductor substrate 201, and the material of the metal pad is gold, copper, aluminum or silver. The metal pad 203 is used in the package structure to connect the chip internal circuit and the external package component.
所述绝缘层 202位于所述半导体衬底 201上，所述绝缘层 202具有暴露所 述金属焊盘 203的开口。 所述绝缘层 202包括钝化层和聚合物层（未示出）， 所述钝化层用于保护金属焊盘 203、 电学隔离和形成暴露所述金属焊盘 203的 开口， 所述钝化层的材料可以为氧化硅、 氮化硅或者低 K材料； 所述聚合物 层位于所述钝化层上， 所述聚合物层具有暴露所述金属焊盘 203的开口， 所述 聚合物的材料可以为聚酖亚胺（Polyimide )、 环氧树脂 （ Epoxy )或苯并环丁 婦树月旨 ( Benzocyclobutene )。  The insulating layer 202 is on the semiconductor substrate 201, and the insulating layer 202 has an opening exposing the metal pad 203. The insulating layer 202 includes a passivation layer and a polymer layer (not shown) for protecting the metal pad 203, electrically isolating, and forming an opening exposing the metal pad 203, the passivation The material of the layer may be silicon oxide, silicon nitride or a low K material; the polymer layer is on the passivation layer, the polymer layer has an opening exposing the metal pad 203, the polymer The material may be polyimide, epoxy (Epoxy) or Benzocyclobutene.
在一具体实施例中， 所述半导体衬底 201为单晶硅， 所述半导体衬底 201 还包括了制作于其上的半导体器件、金属互联以及其他半导体结构。所述绝缘 层 202包括材料为氧化硅的钝化层和材料为聚酖亚胺的聚合物层，所述绝缘层 202具有暴露金属焊盘 203的开口， 所述金属焊盘 203为所述半导体衬底 201 的顶层互联金属电极， 所述金属焊盘 203的材料为铜。 In a specific embodiment, the semiconductor substrate 201 is single crystal silicon, and the semiconductor substrate 201 Also included are semiconductor devices, metal interconnects, and other semiconductor structures fabricated thereon. The insulating layer 202 includes a passivation layer of silicon oxide and a polymer layer of polyimide material, the insulating layer 202 having an opening exposing the metal pad 203, the metal pad 203 being the semiconductor The top layer of the substrate 201 interconnects the metal electrodes, and the material of the metal pads 203 is copper.
具体地， 位于所述金属焊盘 203上的球下金属电极 204, 所述球下金属电 极 204用于连接金属焊盘 203和焊球 207。所述球下金属电极 204的材料为金、 铜、银中的一种，或者所述球下金属电极 204的材料为含金、铜、或银的合金。  Specifically, the under-ball metal electrode 204 on the metal pad 203 is used to connect the metal pad 203 and the solder ball 207. The material of the under-ball metal electrode 204 is one of gold, copper, and silver, or the material of the under-ball metal electrode 204 is an alloy containing gold, copper, or silver.
在一实施例中， 形成所述球下金属电极 204的工艺具体为： 在所述半导体 衬底 201 表面形成光刻胶层， 所述光刻胶层具有暴露部分所述金属焊盘 203 的开口，使用电镀、物理气相沉积或者蒸发气相沉积的工艺向所述开口填充金 属材料， 去除光刻胶层， 所述金属材料形成球下金属电极 204。  In one embodiment, the process of forming the under-ball metal electrode 204 is specifically: forming a photoresist layer on a surface of the semiconductor substrate 201, the photoresist layer having an opening exposing a portion of the metal pad 203 The opening is filled with a metal material using a process of electroplating, physical vapor deposition or vapor deposition, and the photoresist layer is removed, and the metal material forms the under-ball metal electrode 204.
在另一实施例中， 形成所述球下金属电极 204的工艺为引线键合， 具体步 骤为： 金属引线通过键合头到达金属焊盘 203顶部， 利用氢氧焰或者电气放电 系统产生电火花以熔化金属引线，在表面张力的作用下，熔融金属凝固形成球 形 （球直径一般是金属引线直径的 1.5倍至 4倍）， 降下键合头， 在适当的压 力， 温度， 动能和时间内将金属球压在金属焊盘 203上， 在此过程中， 通过键 合头向金属球施加压力，同时促进引线金属和金属焊盘 203发生塑性形变和原 子之间相互扩散， 形成球下金属电极 204, 利用键合线夹切断金属引线。  In another embodiment, the process of forming the under-ball metal electrode 204 is wire bonding, and the specific steps are as follows: the metal wire reaches the top of the metal pad 203 through the bonding head, and generates an electric spark by using an oxyhydrogen flame or an electric discharge system. By melting the metal lead, under the action of surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), and the bonding head is lowered, under appropriate pressure, temperature, kinetic energy and time. The metal ball is pressed against the metal pad 203. During this process, pressure is applied to the metal ball through the bonding head, and at the same time, the lead metal and the metal pad 203 are plastically deformed and the atoms are interdiffused to form the under-ball metal electrode 204. , Use the bond wire clamp to cut the metal lead.
具体地， 位于所述球下金属电极 204表面的焊球 207, 所述焊球 207具有 第一围裙结构 207a, 所述第一围裙结构 207a覆盖所述球下金属电极 204底部 周围的部分金属焊盘 203。 所述第一围裙结构 207a增大了焊球 207和金属焊 盘 203的接触面积， 增强了焊球 207和金属焊盘 203的附着力， 使得焊球 207 在受外力作用时更不容易从金属焊盘表面脱落。  Specifically, the solder ball 207 is located on the surface of the under-ball metal electrode 204, and the solder ball 207 has a first apron structure 207a, and the first apron structure 207a covers a portion of the metal solder around the bottom of the under-ball metal electrode 204. Disk 203. The first apron structure 207a increases the contact area of the solder ball 207 and the metal pad 203, and enhances the adhesion of the solder ball 207 and the metal pad 203, so that the solder ball 207 is less likely to be metal from the external force. The surface of the pad is peeled off.
所述焊球 207可以通过印刷工艺形成，所述焊球 207的材料为锡或者锡合 金。 形成焊球 207 的具体工艺为： 将焊料通过网板印刷于球下金属电极 204 上， 然后进行高温回流，在表面张力作用下，使得所述焊料转变形成焊球 207。 由于焊料材料浸润球下金属电极材料和金属焊盘材料，形成的焊球 207覆盖球 下金属电极 204和金属焊盘 203 , 即焊球 207具有第一围裙结构 207a, 所述第 一围裙结构 207a覆盖所述球下金属电极 204底部周围的金属焊盘 203。 请参考图 3,图 3为形成上述芯片封装结构的芯片封装方法的流程示意图， 包括： The solder balls 207 may be formed by a printing process, and the solder balls 207 are made of tin or a tin alloy. The specific process for forming the solder balls 207 is as follows: The solder is printed on the under-ball metal electrode 204 through a screen, and then subjected to high-temperature reflow, and the solder is transformed into a solder ball 207 under surface tension. Since the solder material infiltrates the under-ball metal electrode material and the metal pad material, the formed solder ball 207 covers the under-ball metal electrode 204 and the metal pad 203, that is, the solder ball 207 has a first apron structure 207a, and the first apron structure 207a A metal pad 203 around the bottom of the under-ball metal electrode 204 is covered. Please refer to FIG. 3. FIG. 3 is a schematic flowchart of a chip packaging method for forming the chip package structure, including:
步骤 S101 , 提供半导体衬底， 所述半导体衬底上具有金属焊盘和绝缘层， 所述绝缘层具有暴露所述金属焊盘的开口；  Step S101, providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad;
步骤 S102, 所述金属焊盘上形成球下金属电极；  Step S102, forming a ball under metal electrode on the metal pad;
步骤 S103 , 在所述球下金属电极表面形成焊球， 所述焊球具有第一围裙 结构， 所述第一围裙结构覆盖所述球下金属电极底部周围的金属焊盘。  Step S103, forming a solder ball on the surface of the under-metal electrode, the solder ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the metal electrode under the ball.
下面， 结合图 4至图 6对芯片封装方法作详细描述。  Next, the chip packaging method will be described in detail with reference to FIGS. 4 to 6.
首先， 请参考图 4, 提供半导体衬底 201 , 所述半导体衬底 201上具有金 属焊盘 203和绝缘层 202,所述绝缘层 202具有暴露所述金属焊盘 203的开口。  First, referring to FIG. 4, a semiconductor substrate 201 having a metal pad 203 and an insulating layer 202 having an opening exposing the metal pad 203 is provided.
所述半导体衬底 201可以为单晶硅、 SOI (绝缘体上硅）、 SiGe或 III-V族 化合物晶圆，所述半导体衬底 201包括位于其内部和表面的一层或若干层介质 其他半导体结构。  The semiconductor substrate 201 may be a single crystal silicon, SOI (Silicon On Insulator), SiGe or III-V compound wafer, the semiconductor substrate 201 including one or several layers of dielectrics and other semiconductors located inside and on the surface thereof. structure.
所述绝缘层 202包括钝化层和聚合物层（未示出）， 所述钝化层用于保护 金属焊盘 203、 电学隔离和形成暴露所述金属焊盘 203的开口， 所述钝化层的 材料可以为氧化硅、 氮化硅或者低 K材料； 所述聚合物层位于所述钝化层上， 所述聚合物层具有暴露所述金属焊盘 203的开口，所述聚合物的材料可以为聚 酖亚胺（ Polyimide )、环氧树脂（ Epoxy )或苯并环丁烯树脂（ Benzocyclobutene )。 所述金属焊盘 203为所述半导体衬底 201的顶层互连金属电极，所述金属焊盘 203的材料可以为金， 铜、 铝或者银。  The insulating layer 202 includes a passivation layer and a polymer layer (not shown) for protecting the metal pad 203, electrically isolating, and forming an opening exposing the metal pad 203, the passivation The material of the layer may be silicon oxide, silicon nitride or a low K material; the polymer layer is on the passivation layer, the polymer layer having an opening exposing the metal pad 203, the polymer The material may be Polyimide, Epoxy or Benzocyclobutene. The metal pad 203 is a top-level interconnect metal electrode of the semiconductor substrate 201, and the material of the metal pad 203 may be gold, copper, aluminum or silver.
在一具体实施例中， 所述半导体衬底 201为单晶硅， 所述半导体衬底 201 还包括了制作于其上的半导体器件、金属互联以及其他半导体结构。所述绝缘 层 202包括材料为氧化硅的钝化层和材料为聚酖亚胺的聚合物层，所述绝缘层 202具有暴露金属焊盘 203的开口， 所述金属焊盘 203为所述半导体衬底 201 的顶层互联金属电极， 所述金属焊盘 203的材料为铜。  In one embodiment, the semiconductor substrate 201 is monocrystalline silicon, and the semiconductor substrate 201 further includes semiconductor devices, metal interconnects, and other semiconductor structures fabricated thereon. The insulating layer 202 includes a passivation layer of silicon oxide and a polymer layer of polyimide material, the insulating layer 202 having an opening exposing the metal pad 203, the metal pad 203 being the semiconductor The top layer of the substrate 201 interconnects the metal electrodes, and the material of the metal pads 203 is copper.
接着， 请参考图 5, 在所述金属焊盘 203上形成球下金属电极 204, 所述 球下金属电极 204用于连接金属焊盘 203和后续形成的焊球。所述球下金属电 极 204的材料为金、铜、 银中的一种， 或者所述球下金属电极 204的材料为含 金、 铜、 或银的合金。 Next, referring to FIG. 5, a ball under metal electrode 204 is formed on the metal pad 203, and the ball under metal electrode 204 is used to connect the metal pad 203 and the subsequently formed solder balls. The material of the under-ball metal electrode 204 is one of gold, copper, and silver, or the material of the under-ball metal electrode 204 is An alloy of gold, copper, or silver.
在一实施例中， 形成所述球下金属电极 204的工艺具体为： 在所述半导体 衬底 201 表面形成光刻胶层， 所述光刻胶层具有暴露部分所述金属焊盘 203 的开口，使用电镀、物理气相沉积或者蒸发气相沉积的工艺向所述开口填充金 属材料， 去除光刻胶层， 所述金属材料形成球下金属电极 204。  In one embodiment, the process of forming the under-ball metal electrode 204 is specifically: forming a photoresist layer on a surface of the semiconductor substrate 201, the photoresist layer having an opening exposing a portion of the metal pad 203 The opening is filled with a metal material using a process of electroplating, physical vapor deposition or vapor deposition, and the photoresist layer is removed, and the metal material forms the under-ball metal electrode 204.
在另一实施例中， 形成所述球下金属电极 204的工艺为引线键合， 具体步 骤为： 金属引线通过键合头到达金属焊盘 203顶部， 利用氢氧焰或者电气放电 系统产生电火花以熔化金属引线，在表面张力的作用下，熔融金属凝固形成球 形 （球直径一般是金属引线直径的 1.5倍至 4倍）， 降下键合头， 在适当的压 力， 温度， 动能和时间内将金属球压在金属焊盘 203上， 在此过程中， 通过键 合头向金属球施加压力，同时促进引线金属和金属焊盘 203发生塑性形变和原 子之间相互扩散， 形成球下金属电极 204, 利用键合线夹切断金属引线。  In another embodiment, the process of forming the under-ball metal electrode 204 is wire bonding, and the specific steps are as follows: the metal wire reaches the top of the metal pad 203 through the bonding head, and generates an electric spark by using an oxyhydrogen flame or an electric discharge system. By melting the metal lead, under the action of surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), and the bonding head is lowered, under appropriate pressure, temperature, kinetic energy and time. The metal ball is pressed against the metal pad 203. During this process, pressure is applied to the metal ball through the bonding head, and at the same time, the lead metal and the metal pad 203 are plastically deformed and the atoms are interdiffused to form the under-ball metal electrode 204. , Use the bond wire clamp to cut the metal lead.
接着， 请参考图 6, 在所述球下金属电极 204表面形成焊球 207, 所述焊 球 207具有第一围裙结构 207a, 所述第一围裙结构 207a覆盖所述球下金属电 极 204底部周围的金属焊盘 203。 所述第一围裙结构 207a增大了焊球 207和 金属焊盘 203的接触面积，增强了焊球 207和金属焊盘 203的附着力，使得焊 球 207在受外力作用时更不容易从金属焊盘表面脱落。  Next, referring to FIG. 6, a solder ball 207 is formed on the surface of the under-ball metal electrode 204. The solder ball 207 has a first apron structure 207a, and the first apron structure 207a covers the bottom of the under-ball metal electrode 204. Metal pad 203. The first apron structure 207a increases the contact area of the solder ball 207 and the metal pad 203, and enhances the adhesion of the solder ball 207 and the metal pad 203, so that the solder ball 207 is less likely to be metal from the external force. The surface of the pad is peeled off.
所述焊球 207通过印刷工艺形成， 所述焊球 207的材料为锡或者锡合金。 形成焊球 207的具体工艺为： 将焊料通过网板印刷于球下金属电极 204上， 然 后进行高温回流， 在表面张力作用下， 使得所述焊料转变为焊球 207。 由于焊 料材料浸润球下金属电极材料和金属焊盘材料，形成的焊球 207覆盖球下金属 电极 204和金属焊盘 203 , 即焊球 207具有第一围裙结构 207a, 所述第一围裙 结构 207a覆盖所述球下金属电极 204底部周围的金属焊盘 203。  The solder balls 207 are formed by a printing process, and the solder balls 207 are made of tin or a tin alloy. The specific process for forming the solder balls 207 is as follows: The solder is printed on the under-metal electrode 204 through the screen, and then subjected to high-temperature reflow, and the solder is converted into the solder balls 207 under the surface tension. Since the solder material infiltrates the under-ball metal electrode material and the metal pad material, the formed solder ball 207 covers the under-ball metal electrode 204 and the metal pad 203, that is, the solder ball 207 has a first apron structure 207a, and the first apron structure 207a A metal pad 203 around the bottom of the under-ball metal electrode 204 is covered.
第二实施例  Second embodiment
请参考图 7, 图 7为本发明第二实施例的芯片封装结构示意图， 包括： 半导体衬底 301 ; 位于所述半导体衬底 301 内的金属焊盘 303; 位于所述 半导体衬底 301上的绝缘层 302, 所述绝缘层 302具有暴露所述金属焊盘 303 的开口；位于所述金属焊盘 303上的球下金属电极 304,所述球下金属电极 304 具有电极体部 304a和电极尾部 304b, 所述电极体部 304a位于所述球下金属 电极 304底部且与所述金属焊盘 303相接， 所述电极尾部 304b位于所述球下 金属电极 304顶部；位于所述球下金属电极 304表面的焊球 307,所述焊球 307 具有第一围裙结构 307a, 所述第一围裙结构 307a覆盖所述球下金属电极 304 底部周围的金属焊盘 303。 Please refer to FIG. 7. FIG. 7 is a schematic diagram of a chip package structure according to a second embodiment of the present invention, including: a semiconductor substrate 301; a metal pad 303 located in the semiconductor substrate 301; and a semiconductor substrate 301 An insulating layer 302 having an opening exposing the metal pad 303; a ball under metal electrode 304 on the metal pad 303, the under-ball metal electrode 304 having an electrode body portion 304a and an electrode tail portion 304b, the electrode body portion 304a is located under the ball metal a bottom portion of the electrode 304 is in contact with the metal pad 303, the electrode tail portion 304b is located at the top of the under-ball metal electrode 304; a solder ball 307 is located on the surface of the under-ball metal electrode 304, and the solder ball 307 has a A skirt structure 307a, the first apron structure 307a covers the metal pad 303 around the bottom of the under-ball metal electrode 304.
本实施例与第一实施例相比， 区别在于： 所述球下金属电极 304具有电极 体部 304a和电极尾部 304b, 所述电极体部 304a位于所述球下金属电极 304 底部且与所述金属焊盘 303相接， 所述电极尾部 304b位于所述球下金属电极 304顶部。 其中， 所述电极体部 304a连接金属焊盘 303和焊球并支撑所述电 极尾部 304b, 所述电极尾部 304b嵌入焊球内， 增大了球下金属电极 304与焊 球的接触面积， 因此球下金属电极 304与焊球的附着力增强，使得焊球在受外 力作用时， 更不容易从球下金属电极 304表面脱落。  The difference between the present embodiment and the first embodiment is that: the under-ball metal electrode 304 has an electrode body portion 304a and an electrode tail portion 304b, and the electrode body portion 304a is located at the bottom of the under-ball metal electrode 304 and is The metal pads 303 are in contact, and the electrode tails 304b are located on top of the under-ball metal electrodes 304. The electrode body portion 304a connects the metal pad 303 and the solder ball and supports the electrode tail portion 304b. The electrode tail portion 304b is embedded in the solder ball, thereby increasing the contact area between the ball metal electrode 304 and the solder ball. The adhesion of the under-ball metal electrode 304 to the solder ball is enhanced, so that the solder ball is less likely to fall off from the surface of the under-ball metal electrode 304 when subjected to an external force.
需要说明的是，所述球下金属电极 304可以通过引线键合 ( Wire Bonding ) 的工艺来形成，下面结合一具体实施例中所述球下金属电极 304的形成方法来 进一步说明其特征。使用引线键合方法形成所述球下金属电极 304的工艺具体 为： 金属引线通过键合头到达金属焊盘 303顶部， 利用氢氧焰或者电气放电系 统产生电火花以熔化金属引线，在表面张力的作用下，熔融金属凝固形成球形 (球直径一般是金属引线直径的 1.5倍至 4倍）， 降下键合头， 在适当的压力， 温度， 动能和时间内将金属球压在金属焊盘 303上， 在此过程中， 通过键合头 向金属球施加压力，同时促进引线金属和金属焊盘 303发生塑性形变和原子之 间相互扩散， 形成电极体部 304a, 然后， 键合头抬起， 金属引线起弧到特定 高度（待形成电极尾部 304b 高度）， 利用键合线夹切断金属引线， 电极体部 304a上金属引线即电极尾部 304b, 形成球下金属电极 304。 需要说明的是， 引线键合常用于半导体封装内部芯片和外部管脚以及芯片之间连接的工艺，而 本发明的发明人通过改进引线键合工艺，将其应用于球下金属电极 304的形成 工艺中， 能够在形成电极体部 304a的同时采用键合头抬起后金属引线起弧形 成电极尾部 304b, 工艺筒单， 形成效率高。  It should be noted that the under-ball metal electrode 304 can be formed by a wire bonding process, which is further described below in conjunction with a method of forming the under-ball metal electrode 304 in a specific embodiment. The process of forming the under-ball metal electrode 304 by using a wire bonding method is specifically as follows: a metal wire reaches the top of the metal pad 303 through a bonding head, and an electric spark is generated by an oxyhydrogen flame or an electric discharge system to melt the metal wire, in surface tension Under the action of the molten metal, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 to 4 times the diameter of the metal lead), the bonding head is lowered, and the metal ball is pressed against the metal pad 303 under appropriate pressure, temperature, kinetic energy and time. In the process, pressure is applied to the metal ball through the bonding head, and at the same time, the lead metal and the metal pad 303 are plastically deformed and the atoms are mutually diffused to form the electrode body portion 304a, and then the bonding head is lifted. The metal lead is arced to a specific height (the height of the electrode tail portion 304b to be formed), the metal lead is cut by the bonding wire clip, and the metal tail 304b is formed on the electrode body portion 304a to form the under-ball metal electrode 304. It should be noted that the wire bonding is commonly used in the process of connecting the internal chip of the semiconductor package and the external pin and the chip, and the inventors of the present invention apply the same to the formation of the under-metal electrode 304 by improving the wire bonding process. In the process, the electrode tail portion 304b can be formed by the metal lead arcing after the bonding head is lifted while forming the electrode body portion 304a, and the process cartridge is single, and the forming efficiency is high.
所述球下金属电极 304的材料为金、铜、 银中的一种， 或者所述球下金属 电极 304的材料为含金、 铜、 或银的合金。 所述电极尾部 304b的高度为所述 电极体部 304a高度的 0.005~1.5倍，当电极尾部 304b的高度低于电极体部 304a 高度的 0.005倍时， 电极尾部 304b嵌入后续形成的焊球 307的长度有限， 对 球下金属电极 304和焊球的附着力增强有限； 而当电极尾部 304b的高度高于 电极体部 304a的高度的 1.5倍时， 由于电极尾部 304b通过引线键合后起弧形 成， 电极尾部 304b与电极体部 304a相比直径较细， 且金属质地较软， 制造过 程中容易变形弯曲， 成品率降低， 且不利于倒芯片封装。 The material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver. The height of the electrode tail portion 304b is 0.005 to 1.5 times the height of the electrode body portion 304a, and the height of the electrode tail portion 304b is lower than the electrode body portion 304a. At a height of 0.005 times, the length of the electrode tail 304b embedded in the subsequently formed solder ball 307 is limited, and the adhesion to the under-ball metal electrode 304 and the solder ball is limited; and when the height of the electrode tail portion 304b is higher than the height of the electrode body portion 304a At 1.5 times, since the electrode tail portion 304b is formed by arcing after wire bonding, the electrode tail portion 304b is thinner than the electrode body portion 304a, and the metal texture is soft, which is easily deformed and bent during the manufacturing process, and the yield is lowered, and Not conducive to flip chip packaging.
在一具体实施例中， 所述球下金属电极 304 的材料为铜， 所述电极尾部 304b的高度与所述电极体部 304a的高度相同。  In one embodiment, the material of the under-ball metal electrode 304 is copper, and the height of the electrode tail portion 304b is the same as the height of the electrode body portion 304a.
本实施例中所述半导体衬底 301、 所述绝缘层 302、 所述金属焊盘 303、 所述焊球 307的材料和结构与第一实施例类似， 详细介绍请参考第一实施例， 在此不再赘述。  The material and structure of the semiconductor substrate 301, the insulating layer 302, the metal pad 303, and the solder ball 307 in this embodiment are similar to those of the first embodiment. For details, please refer to the first embodiment, This will not be repeated here.
请参考图 8至图 10, 为第二实施例中所述的芯片封装结构的封装方法。 请参考图 8, 提供半导体衬底 301 , 所述半导体衬底 301上具有金属焊盘 303和绝缘层 302, 所述绝缘层 302具有暴露所述金属焊盘 303的开口。 上述 具体的形成过程和相关描述请参考第一实施例的相应部分， 在此不再赘述。  Please refer to FIG. 8 to FIG. 10, which are packaging methods of the chip package structure described in the second embodiment. Referring to FIG. 8, a semiconductor substrate 301 having a metal pad 303 and an insulating layer 302 having an opening exposing the metal pad 303 is provided. For the specific formation process and related descriptions, please refer to the corresponding parts of the first embodiment, and details are not described herein again.
接着， 请参考图 9, 在所述金属焊盘 303上形成球下金属电极 304, 所述 球下金属电极 304用于连接金属焊盘 303和后续形成的焊球。所述球下金属电 极 304的材料为金、铜、 银中的一种， 或者所述球下金属电极 304的材料为含 金、 铜、 或银的合金。  Next, referring to FIG. 9, a ball under metal electrode 304 is formed on the metal pad 303, and the ball under metal electrode 304 is used to connect the metal pad 303 and the subsequently formed solder balls. The material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver.
在本实施例中， 所述球下金属电极 304 具有电极体部 304a和电极尾部 304b, 所述电极体部 304a位于所述球下金属电极 304底部且与所述金属焊盘 303相接， 所述电极尾部 304b位于所述球下金属电极 304顶部。 其中， 所述 电极体部 304a连接金属焊盘 303和后续形成的焊球并支撑所述电极尾部 304b, 所述电极尾部 304b嵌入后续形成的焊球内， 增大了球下金属电极 304与焊球 的接触面积， 因此球下金属电极 304与焊球的附着力增强，使得焊球在受外力 作用时， 更不容易从球下金属电极 304表面脱落。  In this embodiment, the under-ball metal electrode 304 has an electrode body portion 304a and an electrode tail portion 304b, and the electrode body portion 304a is located at the bottom of the under-ball metal electrode 304 and is in contact with the metal pad 303. The electrode tail 304b is located on top of the under-ball metal electrode 304. The electrode body portion 304a connects the metal pad 303 and the subsequently formed solder ball and supports the electrode tail portion 304b. The electrode tail portion 304b is embedded in the subsequently formed solder ball, and the under-ball metal electrode 304 and the solder are enlarged. The contact area of the ball is such that the adhesion of the under-metal electrode 304 to the solder ball is enhanced, so that the solder ball is less likely to fall off the surface of the under-metal electrode 304 when subjected to an external force.
形成所述球下金属电极 304的方法为引线键合 ( Wire Bonding ), 包括： 金属引线与金属焊盘键合形成电极体部 304a; 金属引线起弧到待形成电极尾 部 304b高度； 线夹切断金属引线， 形成球下金属电极 304。  The method of forming the under-ball metal electrode 304 is wire bonding, including: metal wire bonding with the metal pad to form the electrode body portion 304a; metal wire arcing to the height of the electrode tail portion 304b to be formed; Metal leads form a ball under metal electrode 304.
在一实施例， 形成所述球下金属电极 304的工艺具体为： 金属引线通过键 合头到达金属焊盘 303顶部，利用氢氧焰或者电气放电系统产生电火花以熔化 金属引线， 在表面张力的作用下， 熔融金属凝固形成球形（球直径一般是金属 引线直径的 1.5倍至 4倍）， 降下键合头， 在适当的压力， 温度， 动能和时间 内将金属球压在金属焊盘 303上，在此过程中，通过键合头向金属球施加压力， 同时促进引线金属和金属焊盘 303发生塑性形变和原子之间相互扩散，形成电 极体部 304a, 然后， 键合头抬起， 金属引线起弧到特定高度（待形成电极尾 部 304b高度）， 利用键合线夹切断金属引线， 电极体部 304a上金属引线即电 极尾部 304b, 形成球下金属电极 304。 需要说明的是， 引线键合常用于半导体 封装内部芯片和外部管脚以及芯片之间连接的工艺，而本发明的发明人通过改 进引线键合工艺，将其应用于球下金属电极 304的形成工艺中， 能够在形成电 极体部 304a的同时采用键合头抬起后金属引线起弧形成电极尾部 304b, 工艺 筒单， 形成效率高。 In one embodiment, the process of forming the under-ball metal electrode 304 is specifically as follows: metal wire passing key The head reaches the top of the metal pad 303, and an electric spark is generated by an oxyhydrogen flame or an electric discharge system to melt the metal lead. Under the action of the surface tension, the molten metal solidifies to form a sphere (the diameter of the sphere is generally 1.5 times to 4 times the diameter of the metal lead).倍), lowering the bonding head, pressing the metal ball on the metal pad 303 under appropriate pressure, temperature, kinetic energy and time, in the process, applying pressure to the metal ball through the bonding head, and promoting the lead metal and The metal pad 303 is plastically deformed and inter-diffused between the atoms to form the electrode body portion 304a. Then, the bonding head is lifted up, and the metal wire is arced to a specific height (the height of the electrode tail portion 304b to be formed), and is cut by the bonding wire clip. The metal lead, the metal lead on the electrode body portion 304a, that is, the electrode tail portion 304b, forms the under-ball metal electrode 304. It should be noted that the wire bonding is commonly used in the process of connecting the internal chip of the semiconductor package and the external pin and the chip, and the inventors of the present invention apply the same to the formation of the under-metal electrode 304 by improving the wire bonding process. In the process, the electrode tail portion 304b can be formed by the metal lead arcing after the bonding head is lifted while forming the electrode body portion 304a, and the process cartridge is single, and the forming efficiency is high.
所述球下金属电极 304的材料为金、铜、 银中的一种， 或者所述球下金属 电极 304的材料为含金、 铜、 或银的合金。 所述电极尾部 304b的高度为所述 电极体部 304a高度的 0.005~1.5倍，当电极尾部 304b的高度低于电极体部 304a 高度的 0.005倍时， 电极尾部 304b嵌入后续形成的焊球的长度有限， 对球下 金属电极 304和焊球的附着力增强有限； 而当电极尾部 304b的高度高于电极 体部 304a的高度的 1.5倍时， 由于电极尾部 304b通过引线键合后起弧形成， 电极尾部 304b与电极体部 304a相比直径较细， 且金属质地较软， 制造过程中 容易变形弯曲并影响后续形成的焊球的形状， 成品率降低，且不利于倒芯片封 装。  The material of the under-ball metal electrode 304 is one of gold, copper, and silver, or the material of the under-ball metal electrode 304 is an alloy containing gold, copper, or silver. The height of the electrode tail portion 304b is 0.005 to 1.5 times the height of the electrode body portion 304a. When the height of the electrode tail portion 304b is less than 0.005 times the height of the electrode body portion 304a, the electrode tail portion 304b is embedded in the length of the subsequently formed solder ball. Limited, the adhesion enhancement to the under-ball metal electrode 304 and the solder ball is limited; and when the height of the electrode tail portion 304b is higher than 1.5 times the height of the electrode body portion 304a, since the electrode tail portion 304b is formed by the wire bonding, the arc is formed. The electrode tail portion 304b is thinner than the electrode body portion 304a, and has a soft metal texture. It is easily deformed and bent during the manufacturing process and affects the shape of the subsequently formed solder ball, and the yield is lowered, which is disadvantageous for the reverse chip package.
在一具体实施例中， 所述球下金属电极 304 的材料为铜， 所述电极尾部 304b的高度与所述电极体部 304a的高度相同。  In one embodiment, the material of the under-ball metal electrode 304 is copper, and the height of the electrode tail portion 304b is the same as the height of the electrode body portion 304a.
接着， 请参考图 10, 在所述球下金属电极 304表面形成焊球 307, 所述焊 球 307具有第一围裙结构 307a, 所述第一围裙结构 307a覆盖所述球下金属电 极 304底部周围的金属焊盘 303。 上述具体的形成过程和相关描述请参考第一 实施例的相应部分， 在此不再赘述。  Next, referring to FIG. 10, a solder ball 307 is formed on the surface of the under-ball metal electrode 304. The solder ball 307 has a first apron structure 307a, and the first apron structure 307a covers the bottom of the under-ball metal electrode 304. Metal pad 303. For the specific formation process and related descriptions, please refer to the corresponding parts of the first embodiment, and details are not described herein again.
第三实施例  Third embodiment
请参考图 11 , 图 11为本发明第三实施例的芯片封装结构示意图， 包括： 半导体衬底 401 ; 位于所述半导体衬底 401 内的金属焊盘 403 ; 位于所述半导 体衬底 401上的绝缘层 402, 所述绝缘层 402具有暴露所述金属焊盘 403的开 口； 位于所述金属焊盘 403上的球下金属电极 404, 所述球下金属电极 404具 有电极体部和电极尾部，所述电极体部位于所述球下金属电极 404底部且与所 述金属焊盘 403相接， 所述电极尾部位于所述球下金属电极 404顶部； 位于所 述球下金属电极 404表面的覆盖层，所述覆盖层具有第二围裙结构， 所述第二 围裙结构覆盖所述球下金属电极 404底部周围的金属焊盘 403; 位于所述覆盖 层表面的焊球 407, 所述焊球 407具有第一围裙结构 407a, 所述第一围裙结构 407a覆盖所述第二围裙结构。 Please refer to FIG. 11. FIG. 11 is a schematic diagram of a chip package structure according to a third embodiment of the present invention, including: a semiconductor substrate 401; a metal pad 403 located in the semiconductor substrate 401; an insulating layer 402 on the semiconductor substrate 401, the insulating layer 402 having an opening exposing the metal pad 403; The under-ball metal electrode 404 on the metal pad 403 has an electrode body portion and an electrode tail portion, the electrode body portion being located at the bottom of the under-ball metal electrode 404 and with the metal pad 403 In connection, the electrode tail is located at the top of the under-ball metal electrode 404; a cover layer on the surface of the under-ball metal electrode 404, the cover layer has a second apron structure, and the second apron structure covers the ball A metal pad 403 around the bottom of the lower metal electrode 404; a solder ball 407 on the surface of the cover layer, the solder ball 407 having a first apron structure 407a, the first apron structure 407a covering the second apron structure.
本实施例与第二实施例相比， 区别在于： 所述球下金属电极 404表面具有 覆盖层， 所述覆盖层具有第二围裙结构， 所述第二围裙结构覆盖所述球下金属 电极 404底部周围的金属焊盘 403。 所述覆盖层为防扩散层 405和浸润层 406 的堆叠结构， 所述防扩散层 405位于所述球下金属电极 404表面， 所述浸润层 406位于所述防扩散层 405表面。 所述防扩散层 405具有第三围裙结构 405a, 所述浸润层 406具有第四围裙结构 406a。 所述第二围裙结构为第三围裙结构 405a和第四围裙结构 406a的堆叠结构。  The difference between this embodiment and the second embodiment is that: the surface of the under-ball metal electrode 404 has a cover layer, the cover layer has a second apron structure, and the second apron structure covers the under-ball metal electrode 404. Metal pad 403 around the bottom. The cover layer is a stacked structure of the diffusion prevention layer 405 and the wetting layer 406, the anti-diffusion layer 405 is located on the surface of the under-ball metal electrode 404, and the wetting layer 406 is located on the surface of the anti-diffusion layer 405. The diffusion barrier layer 405 has a third apron structure 405a having a fourth apron structure 406a. The second apron structure is a stacked structure of a third apron structure 405a and a fourth apron structure 406a.
所述防扩散层 405具有第三围裙结构 405a, 所述第三围裙结构 405a覆盖 金属焊盘 403表面，增加了防扩散层 405和金属焊盘 403的接触面积，增强了 防扩散层 405和金属焊盘 403的附着力， 另外， 由于防扩散层 405对球下金属 电极 404的包覆作用，球下金属电极 404和金属焊盘 403的附着力也得到了增 强，使得球下金属电极 404在受外力作用时， 更不容易从金属焊盘 403表面脱 落。  The anti-diffusion layer 405 has a third apron structure 405a covering the surface of the metal pad 403, increasing the contact area of the diffusion prevention layer 405 and the metal pad 403, and enhancing the diffusion prevention layer 405 and the metal. The adhesion of the pad 403, in addition, due to the coating effect of the anti-diffusion layer 405 on the under-ball metal electrode 404, the adhesion of the under-ball metal electrode 404 and the metal pad 403 is also enhanced, so that the under-ball metal electrode 404 is subjected to When an external force acts, it is less likely to fall off the surface of the metal pad 403.
所述防扩散层 405 的材料为镍， 与球下金属电极 404相比防扩散层 405 与焊球形成介面合金共化物要慢很多，可以作为球下金属电极 404和焊球之间 的阻隔层， 防止形成介面合金共化物和空洞。介面合金共化物和空洞会影响焊 题， 提升了芯片封装的可靠性。 所述防扩散层 405的厚度为 0.05μηι至 5μηι, 所述防扩散层 405的厚度跟芯片封装过程的工艺有关，当芯片封装过程的工艺 温度越低时， 所述防扩散层 405的厚度可以减小。 在一实施例中， 所述防扩散 层 405为镍层， 所述镍层的厚度为 0.5μηι至 3μηι。 The anti-diffusion layer 405 is made of nickel. Compared with the under-ball metal electrode 404, the anti-diffusion layer 405 and the solder ball form an interface alloy compound are much slower, and can serve as a barrier layer between the under-ball metal electrode 404 and the solder ball. , to prevent the formation of interface alloy compounds and voids. Interface alloy compounds and voids can affect the soldering problem and improve the reliability of the chip package. The thickness of the anti-diffusion layer 405 is 0.05 μm to 5 μm. The thickness of the anti-diffusion layer 405 is related to the process of the chip packaging process. When the process temperature of the chip packaging process is lower, the thickness of the anti-diffusion layer 405 may be Reduced. In an embodiment, the diffusion prevention The layer 405 is a nickel layer, and the nickel layer has a thickness of 0.5 μm to 3 μm.
所述防扩散层 405通常为镍层， 镍层容易氧化， 造成界面电阻率增大， 所 以进一步的在镍层表面具有浸润层 406以防止镍层的氧化， 另外， 浸润层 406 与后续形成的焊球的材料浸润，附着力更好。所述浸润层 406的材料为锡、金、 银中的一种， 或者所述浸润层 406的材料为含锡、 金、 或银的合金。 所述浸润 层 406具有第四围裙结构 406a, 所述第四围裙结构 406a起到增加浸润层 406 和防扩散层 405接触面积的作用， 并同第三围裙结构 405a共同起到增强与金 属焊盘 403附着力的作用。所述第四围裙结构 406a和第三围裙结构 405a共同 构成第二围裙结构。 所述浸润层 406的厚度为 0.05μηι至 ΙΟμηι, 所述浸润层 406的厚度也与芯片封装的工艺有关。在一实施例中，所述浸润层 406为锡层， 锡层在空气中不容易被氧化， 且与后续形成的焊球材料浸润， 附着力更好， 所 述锡层的厚度为 Ο.ΐμηι至 5μηι。  The anti-diffusion layer 405 is usually a nickel layer, and the nickel layer is easily oxidized, resulting in an increase in interface resistivity. Therefore, a wetting layer 406 is further provided on the surface of the nickel layer to prevent oxidation of the nickel layer. In addition, the wetting layer 406 is formed subsequently. The material of the solder ball is infiltrated and the adhesion is better. The material of the wetting layer 406 is one of tin, gold, and silver, or the material of the wetting layer 406 is an alloy containing tin, gold, or silver. The wetting layer 406 has a fourth apron structure 406a that acts to increase the contact area of the wetting layer 406 and the diffusion preventing layer 405, and cooperates with the third apron structure 405a to enhance the metal pad. 403 adhesion effect. The fourth apron structure 406a and the third apron structure 405a together form a second apron structure. The thickness of the wetting layer 406 is from 0.05 μm to ΙΟμηι, and the thickness of the wetting layer 406 is also related to the process of chip packaging. In one embodiment, the wetting layer 406 is a tin layer, the tin layer is not easily oxidized in the air, and is infiltrated with the subsequently formed solder ball material, and the adhesion is better. The thickness of the tin layer is Ο.ΐμηι To 5μηι.
本实施例中所述半导体衬底 401、 所述绝缘层 402、 所述金属焊盘 403、 所述球下金属电极 404, 所述焊球 407的材料和结构与第二实施例类似， 详细 介绍请参考第二实施例， 在此不再赘述。  In the present embodiment, the semiconductor substrate 401, the insulating layer 402, the metal pad 403, and the under-ball metal electrode 404, the material and structure of the solder ball 407 are similar to those of the second embodiment, and are described in detail. Please refer to the second embodiment, and details are not described herein again.
请参考图 12, 图 12为本发明第三实施例的流程图， 包括：  Please refer to FIG. 12. FIG. 12 is a flowchart of a third embodiment of the present invention, including:
步骤 S201 , 提供半导体衬底， 所述半导体衬底上具有金属焊盘和绝缘层， 所述绝缘层具有暴露所述金属焊盘的开口；  Step S201, providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad;
步骤 S202, 所述金属焊盘上形成球下金属电极；  Step S202, forming a ball under metal electrode on the metal pad;
步骤 S203 , 在所述球下金属电极表面形成覆盖层， 所述覆盖层具有第二 围裙结构， 所述第二围裙结构覆盖所述球下金属电极底部周围的金属焊盘； 步骤 S204, 在形成有覆盖层的球下金属电极表面形成焊球， 所述焊球具 有第一围裙结构， 所述第一围裙结构覆盖所述第二围裙结构。  Step S203, forming a cover layer on the surface of the under-metal electrode, the cover layer having a second apron structure, the second apron structure covering the metal pad around the bottom of the metal electrode under the ball; Step S204, forming The under-ball metal electrode surface having a cover layer forms a solder ball, the solder ball having a first apron structure, and the first apron structure covering the second apron structure.
下面， 结合图 13至图 17对芯片封装方法作详细描述。  Next, the chip packaging method will be described in detail with reference to Figs. 13 to 17 .
首先， 请参考图 13 , 提供半导体衬底 401 , 所述半导体衬底 401上具有金 属焊盘 403和绝缘层 402,所述绝缘层 402具有暴露所述金属焊盘 403的开口。 上述具体的形成过程和相关描述请参考第一实施例的相应部分， 在此不再赘 述。  First, referring to FIG. 13, a semiconductor substrate 401 having a metal pad 403 and an insulating layer 402 having an opening exposing the metal pad 403 is provided. For the specific formation process and related descriptions mentioned above, please refer to the corresponding parts of the first embodiment, and details are not described herein.
接着， 请参考图 14, 在所述金属焊盘 403上形成球下金属电极 404, 所述 球下金属电极 404具有电极体部 404a和电极尾部 404b, 所述电极体部 404a 位于所述球下金属电极 404底部且与所述金属焊盘 403相接， 所述电极尾部 404b位于所述球下金属电极 404顶部。 上述具体的形成过程和相关描述请参 考第二实施例的相应部分， 在此也不再赘述。 Next, referring to FIG. 14, a sub-ball metal electrode 404 is formed on the metal pad 403, The under-ball metal electrode 404 has an electrode body portion 404a located at the bottom of the under-ball metal electrode 404 and being in contact with the metal pad 403, and an electrode tail portion 404b located at the ball The top of the lower metal electrode 404. For the specific formation process and related descriptions mentioned above, please refer to the corresponding parts of the second embodiment, and details are not described herein again.
接着， 请参考图 15和图 16, 在所述球下金属电极 404表面形成覆盖层， 所述覆盖层具有第二围裙结构， 所述第二围裙结构覆盖所述球下金属电极 404 底部周围的金属焊盘 403。 所述覆盖层为防扩散层 405和浸润层 406的堆叠结 构， 所述防扩散层 405位于所述球下金属电极 404表面， 所述浸润层 406位于 所述防扩散层 405表面。  Next, referring to FIG. 15 and FIG. 16, a cover layer is formed on the surface of the under-ball metal electrode 404, the cover layer has a second apron structure, and the second apron structure covers the periphery of the bottom of the under-ball metal electrode 404. Metal pad 403. The cover layer is a stacked structure of the anti-diffusion layer 405 and the wetting layer 406, the anti-diffusion layer 405 is located on the surface of the under-ball metal electrode 404, and the wetting layer 406 is located on the surface of the anti-diffusion layer 405.
所述防扩散层 405具有第三围裙结构 405a, 所述浸润层 406具有第四围 裙结构 406a。 所述第二围裙结构为第三围裙结构 405a和第四围裙结构 406a 的堆叠结构。  The diffusion barrier layer 405 has a third apron structure 405a having a fourth skirt structure 406a. The second apron structure is a stacked structure of a third apron structure 405a and a fourth apron structure 406a.
图 15为在所述球下金属电极 404表面形成防扩散层 405的剖面结构示意 图。 所述防扩散层 405具有第三围裙结构 405a, 所述防扩散层 405的形成方 法为化学镀。 化学镀， 也叫做无电解镀， 它是在不通电的情况下， 利用氧化还 原反应在镀件表面获得金属镀层的方法，所形成镀层均匀，且化学镀设备筒单， 不需要电源及阳极。利用化学镀的方法在球下金属电极 404表面形成防扩散层 405 , 所述防扩散层 405具有第三围裙结构 405a, 所述第三围裙结构 405a覆 盖金属焊盘 403表面，增加了防扩散层 405和金属焊盘 403的接触面积，增强 了防扩散层 405和金属焊盘 403的附着力， 另外， 由于防扩散层 405对球下金 属电极 404的包覆作用，球下金属电极 404和金属焊盘 403的附着力也得到了 增强，使得球下金属电极 404在受外力作用时， 更不容易从金属焊盘 403表面 脱落。  Fig. 15 is a schematic cross-sectional view showing the formation of the diffusion preventing layer 405 on the surface of the under-ball metal electrode 404. The diffusion prevention layer 405 has a third apron structure 405a, and the diffusion prevention layer 405 is formed by electroless plating. Electroless plating, also called electroless plating, is a method of obtaining a metal plating on the surface of a plating member by an oxidation reduction reaction without being energized. The plating layer is uniform, and the electroless plating apparatus is single, and does not require a power source and an anode. An anti-diffusion layer 405 is formed on the surface of the under-ball metal electrode 404 by electroless plating. The anti-diffusion layer 405 has a third apron structure 405a, and the third apron structure 405a covers the surface of the metal pad 403, and an anti-diffusion layer is added. The contact area of 405 and the metal pad 403 enhances the adhesion of the diffusion prevention layer 405 and the metal pad 403. In addition, due to the coating effect of the diffusion prevention layer 405 on the under-ball metal electrode 404, the under-ball metal electrode 404 and the metal The adhesion of the pad 403 is also enhanced, so that the under-ball metal electrode 404 is less likely to fall off the surface of the metal pad 403 when subjected to an external force.
所述防扩散层的材料为镍，与球下金属电极 404相比防扩散层 405与焊球 形成介面合金共化物要慢很多，可以作为球下金属电极 404和焊球之间的阻隔 层， 防止形成介面合金共化物和空洞。介面合金共化物和空洞会影响焊点的机 升了芯片封装的可靠性。 所述防扩散层 405的厚度为 0.05μηι至 3μηι, 所述防 扩散层 405的厚度跟芯片封装过程的工艺有关，当芯片封装过程的工艺温度越 低时， 所述防扩散层 405的厚度可以减小。 在一实施例中， 所述防扩散层 405 为镍层， 所述镍层的厚度为 0.5μηι至 5μηι。 The material of the anti-diffusion layer is nickel. Compared with the under-ball metal electrode 404, the anti-diffusion layer 405 forms a fine interface alloy with the solder ball, and can be used as a barrier layer between the under-metal electrode 404 and the solder ball. Prevent the formation of interface alloy compounds and voids. Interface alloying compounds and voids can affect the solder joint's machine reliability. The thickness of the anti-diffusion layer 405 is 0.05 μm to 3 μm, and the thickness of the anti-diffusion layer 405 is related to the process of the chip packaging process. When low, the thickness of the diffusion prevention layer 405 can be reduced. In one embodiment, the diffusion prevention layer 405 is a nickel layer, and the nickel layer has a thickness of 0.5 μm to 5 μm.
在一实施例中，化学镀之前先对球下金属电极 404进行处理，去除其表面 的氧化膜， 以降低接触电阻； 然后在球下金属电极 404表面化学镀形成镍层， 所述镍层的厚度为 0.5μηι至 3μηι。  In one embodiment, the under-ball metal electrode 404 is treated prior to electroless plating to remove the oxide film on the surface thereof to reduce the contact resistance; then, a nickel layer is formed by electroless plating on the surface of the under-metal electrode 404, the nickel layer The thickness is from 0.5 μm to 3 μm.
图 16为在所述防扩散层 405表面形成浸润层 406的剖面结构示意图。 所 述防扩散层 405为镍层， 镍层容易氧化， 造成界面电阻率增大， 所以进一步的 在镍层表面形成浸润层 406以防止镍层的氧化， 另外， 浸润层 406与后续形成 的焊球的材料浸润， 附着力更好。 所述浸润层 406的材料为锡、 金、 银中的一 种， 或者所述浸润层 406 的材料为含锡、 金、 或银的合金。 所述浸润层 406 的形成方法为化学镀， 所述浸润层 406具有第四围裙结构 406a, 所述第四围 裙结构 406a起到增加浸润层 406和防扩散层 405接触面积的作用， 并同第三 围裙结构 405a共同起到增强与金属焊盘 403附着力的作用。 所述第四围裙结 构 406a和第三围裙结构 405a共同构成第二围裙结构。所述浸润层 406的厚度 为 0.05μηι至 ΙΟμηι, 所述浸润层 406的厚度也与芯片封装的工艺有关。  Fig. 16 is a schematic cross-sectional view showing the formation of the wetting layer 406 on the surface of the diffusion prevention layer 405. The anti-diffusion layer 405 is a nickel layer, and the nickel layer is easily oxidized, resulting in an increase in interface resistivity. Therefore, a wetting layer 406 is further formed on the surface of the nickel layer to prevent oxidation of the nickel layer. In addition, the wetting layer 406 is subsequently formed. The material of the ball is infiltrated and the adhesion is better. The material of the wetting layer 406 is one of tin, gold, and silver, or the material of the wetting layer 406 is an alloy containing tin, gold, or silver. The method of forming the wetting layer 406 is electroless plating, and the wetting layer 406 has a fourth apron structure 406a, and the fourth apron structure 406a functions to increase the contact area between the wetting layer 406 and the diffusion preventing layer 405, and the same The three apron structures 405a collectively serve to enhance adhesion to the metal pads 403. The fourth apron structure 406a and the third apron structure 405a together form a second apron structure. The thickness of the wetting layer 406 is from 0.05 μm to ΙΟμηι, and the thickness of the wetting layer 406 is also related to the process of the chip package.
在一实施例中， 所述浸润层 406为锡层， 锡层在空气中不容易被氧化， 且 与后续形成的焊球材料浸润， 附着力更好， 所述锡层的形成方法为化学镀， 所 述锡层具有围裙结构， 所述锡层的厚度为 Ο.ΐμηι至 5μηι。  In one embodiment, the wetting layer 406 is a tin layer, the tin layer is not easily oxidized in the air, and is infiltrated with the subsequently formed solder ball material, and the adhesion is better. The tin layer is formed by electroless plating. The tin layer has an apron structure, and the tin layer has a thickness of Ο.ΐμηι to 5μηι.
接着， 请参考图 17, 在形成有覆盖层的球下金属电极 404表面形成焊球 407, 所述焊球 407具有第一围裙结构 407a, 所述第一围裙结构 407a覆盖所 述第二围裙结构。上述具体的形成过程和相关描述请参考第一实施例的相应部 分， 在此不再赘述。  Next, referring to FIG. 17, a solder ball 407 is formed on the surface of the under-ball metal electrode 404 formed with the cap layer, the solder ball 407 has a first apron structure 407a, and the first apron structure 407a covers the second apron structure. . For the specific formation process and related descriptions, please refer to the corresponding parts of the first embodiment, and details are not described herein again.
第四实施例  Fourth embodiment
请参考图 18, 图 18为本发明第四实施例的芯片封装结构示意图， 包括： 半导体衬底 501 ; 位于所述半导体衬底 501内的金属电极 508; 位于所述半导 体衬底 501上的第一绝缘层 509, 所述第一绝缘层 509覆盖部分所述金属电极 508, 所述第一绝缘层 509具有暴露所述金属电极 508的第一开口； 位于所述 第一绝缘层 509上的过渡金属层 510, 所述过渡金属层 510覆盖所述第一开口 的侧壁和底表面，所述过渡金属层 510沿所述第一开口表面形成第二开口； 位 于过渡金属层 510上的金属焊盘 503 ,所述金属焊盘 503填充满所述第二开口； 位于所述金属焊盘 503上的第二绝缘层 502, 所述第二绝缘层具有暴露所述金 属焊盘 503的第三开口； 位于所述金属焊盘 503上的球下金属电极 504, 所述 球下金属电极 504具有电极体部和电极尾部，所述电极体部位于所述球下金属 电极 504底部且与所述金属焊盘 503相接，所述电极尾部位于所述球下金属电 极 504顶部； 位于所述球下金属电极 504表面的覆盖层， 所述覆盖层具有第二 围裙结构，所述第二围裙结构覆盖所述球下金属电极 504底部周围的金属焊盘 503; 位于所述覆盖层表面的焊球 507, 所述焊球 507具有第一围裙结构 507a, 所述第一围裙结构 507a覆盖所述第二围裙结构。 Referring to FIG. 18, FIG. 18 is a schematic diagram of a chip package structure according to a fourth embodiment of the present invention, including: a semiconductor substrate 501; a metal electrode 508 located in the semiconductor substrate 501; and a second portion on the semiconductor substrate 501 An insulating layer 509, the first insulating layer 509 covers a portion of the metal electrode 508, the first insulating layer 509 has a first opening exposing the metal electrode 508; a transition on the first insulating layer 509 a metal layer 510, the transition metal layer 510 covers sidewalls and a bottom surface of the first opening, and the transition metal layer 510 forms a second opening along the first opening surface; a metal pad 503 on the transition metal layer 510, the metal pad 503 filling the second opening; a second insulating layer 502 on the metal pad 503, the second insulating layer having an exposed a third opening of the metal pad 503; a ball under metal electrode 504 on the metal pad 503, the under ball metal electrode 504 having an electrode body portion and an electrode tail portion, the electrode body portion being located under the ball a metal electrode 504 is at the bottom and is in contact with the metal pad 503, the electrode tail is located at the top of the under-ball metal electrode 504; a cover layer is located on the surface of the under-ball metal electrode 504, and the cover layer has a second apron a second apron structure covering the metal pad 503 around the bottom of the under-ball metal electrode 504; a solder ball 507 on the surface of the cover layer, the solder ball 507 having a first apron structure 507a, An apron structure 507a covers the second apron structure.
本实施例与第三实施例相比， 区别在于： 本实施例所述金属焊盘 503为再 分布式焊盘（RDL )。 所述再分布式焊盘通过在芯片表面增加第一绝缘层 509、 过渡金属层 510和第二绝缘层 502形成，它可以根据封装工艺的设计规则将半 导体衬底 501内的金属电极 508的位置重新排布为再分布式焊盘的位置。再分 布式焊盘可以大大缩小芯片封装尺寸， 达到高密度封装的需求，且提升了数据 传输的速度和稳定性。 所述再分布式焊盘的形成方法为本领域技术人员所熟 知， 在此不再赘述。  The difference between this embodiment and the third embodiment is that the metal pad 503 of the embodiment is a re-distributed pad (RDL). The redistributed pad is formed by adding a first insulating layer 509, a transition metal layer 510 and a second insulating layer 502 on the surface of the chip, which can position the metal electrode 508 in the semiconductor substrate 501 according to the design rule of the packaging process. Rearrange the position as a re-distributed pad. Re-distribution pads can greatly reduce the size of the chip package, meet the needs of high-density packaging, and increase the speed and stability of data transmission. The method of forming the redistribution pad is well known to those skilled in the art and will not be described herein.
本实施例中所述半导体衬底 501、 所述球下金属电极 504、 所述防扩散层 505、 所述浸润层 506、 所述焊球 507的材料和结构与第三实施例类似， 详细 介绍请参考第三实施例， 在此不再赘述。  The material and structure of the semiconductor substrate 501, the under-ball metal electrode 504, the anti-diffusion layer 505, the wetting layer 506, and the solder ball 507 in this embodiment are similar to those of the third embodiment, and are described in detail. Please refer to the third embodiment, and details are not described herein again.
请参考图 19至图 23 , 为形成第四实施例的芯片封装结构的芯片分装方法 的结构示意图。  Referring to FIG. 19 to FIG. 23, a schematic structural view of a chip dispensing method for forming the chip package structure of the fourth embodiment.
请参考图 19, 提供半导体衬底 501 , 所述半导体衬底 501包括： 位于所述 半导体衬底 501内的金属电极 508; 位于所述半导体衬底 501内且覆盖部分所 述金属电极 508的第一绝缘层 509, 所述第一绝缘层 509具有暴露所述金属电 极 508的第一开口； 覆盖所述第一开口的侧壁和底表面的过渡金属层 510, 所 述过渡金属层 510 沿所述第一开口表面形成第二开口； 位于过渡金属层 510 上， 且填充所述第二开口的金属焊盘 503; 位于所述金属焊盘 503上的第二绝 缘层 502, 所述第二绝缘层 502具有暴露所述金属焊盘 503的第三开口。  Referring to FIG. 19, a semiconductor substrate 501 is provided. The semiconductor substrate 501 includes: a metal electrode 508 located in the semiconductor substrate 501; and a portion located in the semiconductor substrate 501 and covering a portion of the metal electrode 508 An insulating layer 509 having a first opening exposing the metal electrode 508; a transition metal layer 510 covering a sidewall and a bottom surface of the first opening, the transition metal layer 510 a first opening surface forming a second opening; a metal pad 503 on the transition metal layer 510 and filling the second opening; a second insulating layer 502 on the metal pad 503, the second insulation Layer 502 has a third opening that exposes metal pad 503.
本实施例与第三实施例相比， 区别在于： 本实施例所述金属焊盘 503为再 分布式焊盘（RDL )。 所述再分布式焊盘通过在芯片表面增加第一绝缘层 509、 过渡金属层 510和第二绝缘层 502形成，它可以根据封装工艺的设计规则将半 导体衬底 501内的金属电极 508的位置重新排布为再分布式焊盘的位置。再分 布式焊盘可以大大缩小芯片封装尺寸， 达到高密度封装的需求，且提升了数据 传输的速度和稳定性。 所述再分布式焊盘的形成方法为本领域技术人员所熟 知， 在此不再赘述。 Compared with the third embodiment, the difference between the embodiment is that: the metal pad 503 in this embodiment is Distributed Pad (RDL). The redistributed pad is formed by adding a first insulating layer 509, a transition metal layer 510 and a second insulating layer 502 on the surface of the chip, which can position the metal electrode 508 in the semiconductor substrate 501 according to the design rule of the packaging process. Rearrange the position as a re-distributed pad. Re-distributed pads can greatly reduce the size of the chip package to meet the needs of high-density packaging, and improve the speed and stability of data transmission. The method for forming the re-distributed pad is well known to those skilled in the art and will not be described herein.
接着， 请参考图 20, 在所述金属焊盘 503上形成球下金属电极 504, 所述 球下金属电极 504具有电极体部 504a和电极尾部 504b, 所述电极体部 504a 位于所述球下金属电极 504底部且与所述金属焊盘 503相接， 所述电极尾部 504b位于所述球下金属电极 504顶部。  Next, referring to FIG. 20, a sub-ball metal electrode 504 is formed on the metal pad 503. The sub-ball metal electrode 504 has an electrode body portion 504a and an electrode tail portion 504b. The electrode body portion 504a is located under the ball. The bottom of the metal electrode 504 is in contact with the metal pad 503, and the electrode tail 504b is located at the top of the under-ball metal electrode 504.
接着， 请参考图 21和图 22 , 在所述球下金属电极 504表面形成覆盖层， 所述覆盖层具有第二围裙结构， 所述第二围裙结构覆盖所述球下金属电极 504 底部周围的金属焊盘 503。 所述覆盖层为防扩散层 505和浸润层 506的堆叠结 构， 所述防扩散层 505位于所述球下金属电极 504表面， 所述浸润层 506位于 所述防扩散层 505表面。 所述防扩散层 505具有第三围裙结构 505a, 所述浸 润层 506具有第四围裙结构 506a。 所述第二围裙结构为第三围裙结构 505a和 第四围裙结构 506a的堆叠结构。  Next, referring to FIG. 21 and FIG. 22, a cover layer is formed on the surface of the under-ball metal electrode 504, the cover layer has a second apron structure, and the second apron structure covers the periphery of the bottom of the under-ball metal electrode 504. Metal pad 503. The cover layer is a stacked structure of the diffusion prevention layer 505 and the wetting layer 506, the anti-diffusion layer 505 is located on the surface of the under-ball metal electrode 504, and the wetting layer 506 is located on the surface of the anti-diffusion layer 505. The diffusion barrier layer 505 has a third apron structure 505a, and the wetting layer 506 has a fourth apron structure 506a. The second apron structure is a stacked structure of a third apron structure 505a and a fourth apron structure 506a.
接着， 请参考图 23 , 在形成有覆盖层的球下金属电极 504表面形成焊球 507, 所述焊球 507具有第一围裙结构 507a, 所述第一围裙结构 507a覆盖所 述第二围裙结构。  Next, referring to FIG. 23, a solder ball 507 is formed on the surface of the under-ball metal electrode 504 formed with the cover layer, the solder ball 507 has a first apron structure 507a, and the first apron structure 507a covers the second apron structure. .
上述具体的形成过程和相关描述请参考第一实施例的相应部分，在此不再 赘述。  For the specific formation process and related descriptions mentioned above, please refer to the corresponding parts of the first embodiment, and details are not described herein again.
综上所述， 与现有技术相比， 本发明具有以下优点： 所述焊球具有第一围 裙结构， 所述第一围裙结构覆盖所述球下金属电极底部周围的部分金属焊盘。 所述第一围裙结构增大了焊球和金属焊盘的接触面积，增强了焊球和金属焊盘 的附着力， 使得焊球在受外力作用时更不容易从金属焊盘表面脱落。  In summary, the present invention has the following advantages over the prior art: The solder ball has a first skirt structure, and the first apron structure covers a portion of the metal pad around the bottom of the under-metal electrode. The first apron structure increases the contact area between the solder ball and the metal pad, and enhances the adhesion of the solder ball and the metal pad, so that the solder ball is less likely to fall off from the surface of the metal pad when subjected to an external force.
在第二、 第三和第四实施例中所述球下金属电极具有电极体部和电极尾 部， 所述电极体部位于所述球下金属电极底部且与所述金属焊盘相接， 所述电 极尾部位于所述球下金属电极顶部。所述电极尾部嵌入所述焊球内，增大了球 下金属电极与焊球的接触面积， 因此球下金属电极与焊球的附着力增强，使得 焊球在受外力作用时， 更不容易从球下金属电极表面脱落。 并且， 形成所述球 下金属电极的方法为引线键合，包括：金属引线与金属焊盘键合形成电极体部； 金属引线起弧到待形成电极尾部高度；线夹切断金属引线，形成球下金属电极。 采用引线键合方法形成球下金属电极的方法与现有技术相比， 工艺筒单， 制造 成本低。 In the second, third, and fourth embodiments, the under-ball metal electrode has an electrode body portion and an electrode tail portion, and the electrode body portion is located at a bottom of the under-ball metal electrode and is in contact with the metal pad. The electrode tail is located on top of the under-ball metal electrode. The tail of the electrode is embedded in the solder ball, and the ball is enlarged The contact area between the lower metal electrode and the solder ball, so that the adhesion of the metal electrode under the ball to the solder ball is enhanced, so that the solder ball is less likely to fall off from the surface of the metal electrode under the ball when subjected to an external force. Moreover, the method for forming the under-metal electrode is wire bonding, comprising: bonding a metal wire to a metal pad to form an electrode body portion; the metal wire arcing to a height of an electrode tail to be formed; and the wire clip cutting the metal wire to form a ball Lower metal electrode. Compared with the prior art, the method of forming the under-ball metal electrode by the wire bonding method has a low manufacturing cost.
在第三、第四实施例中所述覆盖层为防扩散层和浸润层的堆叠结构， 所述 防扩散层位于所述球下金属电极表面， 所述浸润层位于所述防扩散层表面。现 有技术中， 焊球直接位于球下金属电极之上，球下金属电极与焊球之间通过原 子的相互扩散会形成介面合金共化物与空洞，且介面合金共化物具有脆性，将 会影响焊点的机械强度和寿命。在本发明中，在球下金属电极表面先形成防扩 散层， 所述防扩散层的材料为镍， 与球下金属电极相比防扩散层与焊球形成介 面合金共化物要慢很多， 可以作为球下金属电极和焊球之间的阻隔层， 防止形 成介面合金共化物和空洞。 而由于防扩散层容易氧化，进一步的在防扩散层表 面形成浸润层防止防扩散层的氧化， 另外， 浸润层与后续形成的焊球的材料浸 润， 附着力更好。 所述浸润层的材料为锡、 金、 银中的一种， 或者所述浸润层 的材料为含锡、 金、 或银的合金。 与现有技术相比， 在球下金属电极表面形成 覆盖层改善了介面合金共化物问题， 提升了芯片封装的可靠性。 另外， 所述覆 盖层具有第二围裙结构，覆盖层的第二围裙结构增大了覆盖层和金属焊盘的接 触面积， 增强了焊球、 覆盖层、 球下金属电极和金属焊盘的附着力。  In the third and fourth embodiments, the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer, the diffusion prevention layer is located on the surface of the under-ball metal electrode, and the wetting layer is located on the surface of the diffusion prevention layer. In the prior art, the solder ball is directly located on the metal electrode under the ball, and the interdiffusion between the metal electrode and the solder ball under the ball forms an interface alloy compound and void, and the interface alloy compound has brittleness, which will affect The mechanical strength and life of the solder joint. In the present invention, an anti-diffusion layer is formed on the surface of the metal electrode under the ball, and the material of the anti-diffusion layer is nickel. Compared with the metal electrode under the ball, the anti-diffusion layer and the solder ball form an interface alloy compound, which is much slower. As a barrier between the metal electrode under the ball and the solder ball, it prevents the formation of interface alloy compounds and voids. Further, since the diffusion preventing layer is easily oxidized, a wetting layer is further formed on the surface of the diffusion preventing layer to prevent oxidation of the diffusion preventing layer, and the wetting layer and the subsequently formed solder ball are immersed in the material to have better adhesion. The material of the wetting layer is one of tin, gold, silver, or the material of the wetting layer is an alloy containing tin, gold, or silver. Compared with the prior art, forming a coating layer on the surface of the metal electrode under the ball improves the interface alloy common compound problem and improves the reliability of the chip package. In addition, the cover layer has a second apron structure, and the second apron structure of the cover layer increases the contact area of the cover layer and the metal pad, and enhances the attachment of the solder ball, the cover layer, the under-ball metal electrode, and the metal pad. Focus on.
本发明虽然已以较佳实施例公开如上，但其并不是用来限定本发明，任何 本领域技术人员在不脱离本发明的精神和范围内，都可以利用上述揭示的方法 和技术对本发明技术方案做出可能的变动和修改， 因此，凡是未脱离本发明技 同变化及修饰， 均属于本发明技术方案的保护范围。  The present invention has been disclosed in the above preferred embodiments, but it is not intended to limit the present invention, and those skilled in the art can utilize the above disclosed methods and techniques to the present invention without departing from the spirit and scope of the invention. The possible changes and modifications of the present invention are therefore within the scope of protection of the technical solutions of the present invention.

Claims

权 利 要 求 Rights request
1. 一种芯片封装结构， 其特征在于， 包括： A chip package structure, comprising:
半导体衬底；  Semiconductor substrate
位于所述半导体衬底内的金属焊盘；  a metal pad located within the semiconductor substrate;
位于所述半导体衬底上的绝缘层，所述绝缘层具有暴露所述金属焊盘的开 口；  An insulating layer on the semiconductor substrate, the insulating layer having an opening exposing the metal pad;
位于所述金属焊盘上的球下金属电极；  a ball under metal electrode on the metal pad;
位于所述球下金属电极表面的焊球， 所述焊球具有第一围裙结构， 所述第 一围裙结构覆盖所述球下金属电极底部周围的金属焊盘。  a solder ball on a surface of the under-metal electrode, the solder ball having a first apron structure, the first apron structure covering a metal pad around a bottom of the under-metal electrode.
2. 如权利要求 1所述的芯片封装结构， 其特征在于， 所述金属焊盘的材料为 金、 铜、 铝或者银。 2. The chip package structure according to claim 1, wherein the metal pad is made of gold, copper, aluminum or silver.
3. 如权利要求 1所述的芯片封装结构， 其特征在于， 所述金属焊盘为再分布 式焊盘。  3. The chip package structure according to claim 1, wherein the metal pad is a redistribution pad.
4. 如权利要求 1所述的芯片封装结构， 其特征在于， 所述球下金属电极的材 料为金、 铜、 银中的一种， 或者所述球下金属电极的材料为含金、 铜、 或银的 合金。  The chip package structure according to claim 1 , wherein the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the under-ball metal electrode is gold or copper. , or an alloy of silver.
5. 如权利要求 1所述的芯片封装结构， 其特征在于， 所述球下金属电极具有 电极体部和电极尾部，所述电极体部位于所述球下金属电极底部且与所述金属 焊盘相接， 所述电极尾部位于所述球下金属电极顶部。  The chip package structure according to claim 1 , wherein the under-ball metal electrode has an electrode body portion and an electrode tail portion, and the electrode body portion is located at a bottom of the under-ball metal electrode and is soldered to the metal The discs are connected, and the electrode tail is located at the top of the under-metal electrode.
6. 如权利要求 5所述的芯片封装结构， 其特征在于， 所述电极尾部高度为所 述电极体部高度的 0.005~1.5倍。 The chip package structure according to claim 5, wherein the electrode tail height is 0.005 to 1.5 times the height of the electrode body portion.
7. 如权利要求 1所述的芯片封装结构， 其特征在于， 所述球下金属电极表面 具有覆盖层， 所述覆盖层具有第二围裙结构， 所述第二围裙结构覆盖所述球下 金属电极底部周围的金属焊盘，所述第二围裙结构表面被所述第一围裙结构覆 。  The chip package structure according to claim 1 , wherein the under-ball metal electrode surface has a cover layer, the cover layer has a second apron structure, and the second apron structure covers the under-ball metal a metal pad around the bottom of the electrode, the second apron structure surface being covered by the first apron structure.
8. 如权利要求 7所述的芯片封装结构， 其特征在于， 所述覆盖层为防扩散层 和浸润层的堆叠结构， 所述防扩散层位于所述球下金属电极表面， 所述浸润层 位于所述防扩散层表面， 所述防扩散层具有第三围裙结构， 所述浸润层具有第 四围裙结构。 The chip package structure according to claim 7, wherein the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer, and the diffusion prevention layer is located on a surface of the under-metal electrode, the wetting layer Located on the surface of the anti-diffusion layer, the anti-diffusion layer has a third apron structure, and the wetting layer has a fourth apron structure.
9. 如权利要求 8所述的芯片封装结构， 其特征在于， 所述防扩散层的材料为 镍。 9. The chip package structure according to claim 8, wherein the material of the diffusion prevention layer is nickel.
10.如权利要求 8所述的芯片封装结构，其特征在于， 所述浸润层的材料为锡、 金、 银中的一种， 或者所述浸润层的材料为含锡、 金、 或银的合金。  The chip package structure according to claim 8, wherein the material of the wetting layer is one of tin, gold and silver, or the material of the wetting layer is tin, gold or silver. alloy.
11.—种芯片封装方法， 其特征在于， 包括： 11. A chip packaging method, comprising:
提供半导体衬底， 所述半导体衬底上具有金属焊盘和绝缘层， 所述绝缘层 具有暴露所述金属焊盘的开口；  Providing a semiconductor substrate having a metal pad and an insulating layer thereon, the insulating layer having an opening exposing the metal pad;
在所述金属焊盘上形成球下金属电极；  Forming a ball under metal electrode on the metal pad;
在所述球下金属电极表面形成焊球， 所述焊球具有第一围裙结构， 所述第 一围裙结构覆盖所述球下金属电极底部周围的金属焊盘。  A solder ball is formed on the surface of the under-metal electrode, the solder ball has a first apron structure, and the first apron structure covers a metal pad around the bottom of the under-metal electrode.
12.如权利要求 11所述的芯片封装方法， 其特征在于， 所述金属焊盘的材料为 金、 铜、 铝或者银。  The chip packaging method according to claim 11, wherein the metal pad is made of gold, copper, aluminum or silver.
13.如权利要求 11所述的芯片封装方法， 其特征在于， 所述金属焊盘为再分布 式焊盘。  The chip packaging method according to claim 11, wherein the metal pad is a redistribution pad.
14.如权利要求 11所述的芯片封装方法， 其特征在于， 所述球下金属电极的材 料为金、 铜、 银中的一种， 或者所述球下金属电极的材料为含金、 铜、 或银的 合金。 The chip packaging method according to claim 11, wherein the material of the under-ball metal electrode is one of gold, copper, and silver, or the material of the metal electrode under the ball is gold or copper. , or an alloy of silver.
15.如权利要求 11所述的芯片封装方法， 其特征在于， 所述球下金属电极具有 电极体部和电极尾部，所述电极体部位于所述球下金属电极底部且与所述金属 焊盘相接， 所述电极尾部位于所述球下金属电极顶部。  The chip packaging method according to claim 11, wherein the under-ball metal electrode has an electrode body portion and an electrode tail portion, and the electrode body portion is located at a bottom of the under-ball metal electrode and is soldered to the metal The discs are connected, and the electrode tail is located at the top of the under-metal electrode.
16.如权利要求 15所述的芯片封装方法，其特征在于， 形成所述球下金属电极 的方法为引线键合， 包括：  The chip packaging method according to claim 15, wherein the method of forming the under-metal metal electrode is wire bonding, comprising:
金属引线与金属焊盘键合形成电极体部；  Metal wires are bonded to the metal pads to form an electrode body portion;
金属引线起弧到待形成电极尾部高度；  The metal lead is arced to the height of the tail of the electrode to be formed;
线夹切断金属引线， 形成球下金属电极。  The wire clip cuts the metal lead to form a ball under the metal electrode.
17.如权利要求 15所述的芯片封装方法，其特征在于， 所述电极尾部高度为所 述电极体部高度的 0.005~1.5倍。  The chip packaging method according to claim 15, wherein the electrode tail height is 0.005 to 1.5 times the height of the electrode body portion.
18.如权利要求 11所述的芯片封装方法， 其特征在于， 所述球下金属电极表面 形成有覆盖层， 所述覆盖层具有第二围裙结构， 所述第二围裙结构覆盖所述球 下金属电极底部周围的金属焊盘。 The chip packaging method according to claim 11, wherein a surface of the under-ball metal electrode is formed with a cover layer, the cover layer has a second apron structure, and the second apron structure covers the ball A metal pad around the bottom of the metal electrode.
19.如权利要求 18所述的芯片封装方法， 其特征在于， 所述覆盖层为防扩散层 和浸润层的堆叠结构， 所述防扩散层位于所述球下金属电极表面， 所述浸润层 位于所述防扩散层表面。  The chip packaging method according to claim 18, wherein the cover layer is a stacked structure of a diffusion prevention layer and a wetting layer, and the diffusion prevention layer is located on a surface of the under-ball metal electrode, the wetting layer Located on the surface of the anti-diffusion layer.
20.如权利要求 19所述的芯片封装方法， 其特征在于， 所述防扩散层具有第三 围裙结构， 所述防扩散层的形成方法为化学镀。 The chip packaging method according to claim 19, wherein the diffusion prevention layer has a third apron structure, and the diffusion prevention layer is formed by electroless plating.
PCT/CN2013/086211 2012-11-08 2013-10-30 Chip packaging structure and packaging method WO2014071814A1 (en)

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