WO2014030471A1 - Laminated substrate and manufacturing method therefor - Google Patents

Laminated substrate and manufacturing method therefor Download PDF

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Publication number
WO2014030471A1
WO2014030471A1 PCT/JP2013/069586 JP2013069586W WO2014030471A1 WO 2014030471 A1 WO2014030471 A1 WO 2014030471A1 JP 2013069586 W JP2013069586 W JP 2013069586W WO 2014030471 A1 WO2014030471 A1 WO 2014030471A1
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Prior art keywords
magnetic
layer
substrate
nonmagnetic
electrode
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PCT/JP2013/069586
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French (fr)
Japanese (ja)
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家田章弘
大坪喜人
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株式会社村田製作所
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Publication of WO2014030471A1 publication Critical patent/WO2014030471A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08Magnetic details
    • H05K2201/083Magnetic materials
    • H05K2201/086Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09227Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards

Definitions

  • the present invention relates to a multilayer substrate formed by laminating a plurality of ceramic green sheets.
  • the multilayer substrate shown in Patent Document 1 employs a technique of electrically connecting the top surface and the bottom surface by forming electrodes on the end surfaces.
  • an object of the present invention is to provide a laminated substrate that prevents the occurrence of cracks, and a method for manufacturing the same.
  • the multilayer substrate of the present invention includes a magnetic layer formed by stacking a plurality of magnetic substrates, and a nonmagnetic layer formed by stacking a plurality of nonmagnetic substrates and disposed in the outermost layer. .
  • a plurality of mounting electrodes formed on the front and back surfaces of the outermost layer of the multilayer substrate; and a plurality of mounting electrodes provided on the nonmagnetic material layer of the outermost layer and electrically connected to the plurality of mounting electrodes, respectively.
  • the mounting electrode is electrically connected to the end face electrode formed in the magnetic layer on the inner layer side through the via hole and the internal wiring.
  • the aspect in which the end surface electrode is not formed on both end surfaces of the nonmagnetic material layer on the front surface side and the back surface side is also possible.
  • the intermediate layer including the magnetic layer may include a nonmagnetic material.
  • the laminated substrate includes a non-magnetic substrate manufacturing process and a magnetic substrate manufacturing process, respectively, and then, the plurality of non-magnetic substrates are arranged in an outermost layer, and the plurality of non-magnetic substrates and It is manufactured by laminating a plurality of magnetic substrates to obtain a laminated substrate and firing the laminated substrate.
  • Non-magnetic substrate manufacturing process (1) Step of preparing a plurality of non-magnetic substrate ceramic green sheets (2) Step of forming a plurality of mounting electrodes on the front and back surfaces of the non-magnetic substrate disposed in the outermost layer (3) On the inner layer side The method includes a step of providing a plurality of via holes in a plurality of nonmagnetic substrates to be arranged.
  • the magnetic substrate manufacturing process (1) Step of preparing ceramic green sheets of a plurality of magnetic substrates (2) Step of providing end face electrodes on end surfaces of the plurality of magnetic substrates (3) Forming internal wiring in a part of the magnetic substrates It consists of a process.
  • the internal wiring is formed so as to electrically connect the via hole and the end face electrode, and at least a part of the mounting electrode is It is electrically connected to the end face electrode through a via hole and the internal wiring.
  • the end face electrode is not formed on the nonmagnetic layer disposed on at least one of the front and back surfaces of the nonmagnetic layer.
  • FIG. 1 is a diagram schematically showing a longitudinal cross-sectional structure of a DC-DC converter module provided with the multilayer substrate of the present invention.
  • the laminated substrate is composed of a laminated body in which a plurality of ceramic green sheets are laminated.
  • the laminated substrate includes a nonmagnetic ferrite layer 11, a magnetic ferrite layer 12, a nonmagnetic ferrite layer 13, a magnetic ferrite layer 14, in order from the front surface (upper surface) side to the back surface (lower surface) side of the outermost layer.
  • a nonmagnetic ferrite layer 15 is disposed.
  • FIG. 2A is a plan view of the uppermost surface (first layer) in the component-mounted state of the DC-DC converter module
  • FIG. 2B is a plan view of the uppermost surface when the mounted components are omitted. is there
  • FIG. 2C is a plan view of a nonmagnetic substrate disposed in the lower layer (second layer).
  • 2D is a plan view of the uppermost surface of the magnetic ferrite layer 12
  • FIG. 2E is a plan view of a magnetic substrate on which the conductor pattern 31 is formed in the magnetic ferrite layer 12. As shown in FIG. is there.
  • a plurality of component mounting electrodes are formed on the uppermost surface in the stacking direction of the stacked substrate.
  • an electrode 21A connected to the input terminal 55 of the control IC 51, an electrode 21B connected to the ground terminal 56 of the control IC 51, an electrode 21C connected to the output terminal 57 of the control IC 51, And electrode 21D connected to the terminal of output side capacitor 52 is shown.
  • various electrodes are formed for connection to the land electrode on the mounting substrate side on which the DC-DC converter is mounted.
  • an input electrode 25 and an output electrode 26 are shown.
  • a via hole is formed in each substrate of the non-magnetic ferrite layer 11 including the second layer.
  • the via hole is formed by opening a through hole in each non-magnetic ceramic green sheet and filling the through hole with a conductive paste.
  • a via hole 41 is formed in the lower part of the component mounting electrode 21A
  • a via hole 42 is formed in the lower part of the electrode 21B
  • a lower part of the electrode 21C is formed.
  • a via hole 43 is formed, and a via hole 44 is formed below the electrode 21D.
  • an internal wiring is formed on the uppermost surface of the magnetic ferrite layer 12.
  • an internal wiring 71 is formed below the via hole 41
  • an internal wiring 77 is formed below the via hole 42
  • an internal wiring 74 is formed below the via hole 44.
  • the electrode 21A is electrically connected to the internal wiring 71 through the via hole 41
  • the electrode 21B is electrically connected to the internal wiring 77 through the via hole 42
  • the electrode 21D is connected to the internal wiring 71 through the via hole 44. It is electrically connected to the internal wiring 74.
  • the internal wiring 72 and the internal wiring 73 are also formed on the top surface of the nonmagnetic ferrite layer 15.
  • the internal wiring 72 and the internal wiring 73 are electrically connected to the input electrode 25 and the output electrode 26 through via holes formed in the nonmagnetic ferrite layer 15, respectively.
  • the end surfaces of the magnetic ferrite layer 12, the non-magnetic ferrite layer 13, and the magnetic ferrite layer 14 of the laminated substrate are end-through.
  • a hole 75, an end surface through hole 76, an end surface through hole 95, and an end surface through hole 96 are formed.
  • the end face through hole 75 electrically connects the internal wiring 71 and the internal wiring 72.
  • the electrode 21A is electrically connected to the input electrode 25.
  • the end surface through hole 76 electrically connects the internal wiring 73 and the internal wiring 74.
  • the electrode 21 ⁇ / b> D is electrically connected to the output electrode 26.
  • the end face through hole 95 and the end face through hole 96 connect various electrodes on the uppermost surface (for example, the electrode 21B for mounting components) to ground electrodes (not shown) on the lowermost surface.
  • a conductor pattern 31 which is an internal wiring is formed on a part of the ceramic green sheets arranged on the inner layer side of the multilayer substrate.
  • the conductor pattern 31 is wired in a spiral manner with the magnetic ferrite layer 12, the nonmagnetic ferrite layer 13, and the magnetic ferrite layer 14 sandwiched between them by via connection via holes.
  • a coil conductor is formed, the laminated substrate functions as an inductor, and functions as a DC-DC converter module by mounting electronic components such as the control IC 51 and various capacitors.
  • the conductor pattern 31 functioning as an inductor is connected to the output terminal 57 of the control IC 51.
  • the output side of the conductor pattern 31 is connected to the output side capacitor 52, and the output side of the output side capacitor 52 and the conductor pattern 31 is various types such as the electrode 21D, the internal wiring 74, the end face through hole 76, and the internal wiring 73. It is connected to the output electrode 26 through wiring.
  • the non-magnetic ferrite layer 13 as an intermediate layer functions magnetically to be equivalent to the case where a gap exists between the magnetic ferrite layer 12 and the magnetic ferrite layer 14, and DC superimposition as an inductor is performed. Although it improves the characteristics, it is not an essential element in the present invention.
  • the outermost nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 have a function of covering the upper surface side and the lower surface side of the magnetic ferrite layer 12 and the magnetic ferrite layer 14, respectively. Further, by sandwiching the magnetic ferrite layer 12 and the magnetic ferrite layer 14 having a relatively high heat shrinkage rate between the nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 having a relatively low heat shrinkage rate, It is provided to improve the strength by compressing the entire element by firing.
  • the multilayer substrate of the present embodiment includes an outermost nonmagnetic ferrite layer 11 and a nonmagnetic ferrite layer as shown in FIGS. 1, 2A, 2B, and 2C. No end face through-hole is formed in 15.
  • Each mounting electrode formed in the outermost layer is connected to the magnetic ferrite layer 12 and the magnetic ferrite layer via via holes provided in the nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 of the outermost layer.
  • 14 is electrically connected to the internal wiring arranged on the boundary surface with 14 and connected to the end face electrode through the internal wiring.
  • the length of the end surface electrode in the stacking direction can be reduced as compared with the case where the end surface electrodes are formed on all the layers of the stacked substrate. Therefore, compared to the case where the end face electrodes are formed on all the layers of the multilayer substrate, the stress (due to the difference in the linear expansion coefficient between the electrode and the ceramic) generated during cooling after firing can be reduced, and cracks can be reduced. Occurrence can be prevented.
  • the end face electrode is not formed on both the outermost nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15, but at least on either side. Any mode may be used as long as it is not formed in the arranged nonmagnetic ferrite layer.
  • the end face electrode may not be formed in the nonmagnetic ferrite layer 13 as the intermediate layer.
  • internal wiring is formed on the uppermost surface and the lowermost surface of the nonmagnetic ferrite layer 13, and the internal wiring is electrically connected through a via hole.
  • the laminated substrate is subjected to a nonmagnetic substrate manufacturing process and a magnetic substrate manufacturing process, respectively, and then a plurality of nonmagnetic substrates are arranged in the outermost layer, and the plurality of nonmagnetic substrates and a plurality of magnetic substrates are arranged. It is manufactured by performing a step of obtaining a laminated substrate by laminating body substrates and a step of firing the laminated substrate.
  • FIG. 3 is a diagram showing a non-magnetic substrate manufacturing process.
  • a plurality of ceramic green sheets (mother sheets) of a non-magnetic substrate are prepared.
  • FIG. 3B various electrodes are formed on the non-magnetic substrate arranged in the outermost layer, and as shown in FIG. 3C, the non-magnetic substance arranged on the inner layer side.
  • a hole is formed in the body substrate by a punch or the like at a position corresponding to the lower portion of the electrode.
  • FIG. 3D a via hole is formed by filling a hole formed in the step of FIG. 3C with a conductive material such as silver.
  • FIG. 4 is a diagram showing a magnetic substrate manufacturing process.
  • a plurality of ceramic green sheets (mother sheets) of a magnetic substrate are prepared.
  • a rectangular hole is opened with a punch or the like at a position to be an end face of each laminated substrate after singulation, and a conductive material is filled as shown in FIG. 4 (C). .
  • the magnetic substrate disposed on the inner layer side of the laminated substrate and the nonmagnetic substrate disposed on the nonmagnetic ferrite layer 13 as an intermediate layer include A conductor pattern to be a coil conductor is formed.
  • the nonmagnetic substrate is disposed in the outermost layer, and a plurality of nonmagnetic substrates and a plurality of magnetic substrates are stacked to obtain a mother stacked body.
  • FIG. 5 shows a perspective view of the non-magnetic layer and the magnetic layer of the mother laminate obtained in this way.
  • 5A shows the surface of the outermost nonmagnetic layer
  • FIG. 5B shows the surface of the magnetic layer at the interface between the magnetic layer and the nonmagnetic layer
  • FIG. 5C shows the magnetic layer.
  • the layer in which the conductor pattern used as the coil conductor inside a layer is formed is shown.
  • punching or the like is performed in a direction (orthogonal direction) different from the rectangular hole shown in FIG. 4B that was previously opened in the magnetic layer from the nonmagnetic layer on the surface. Open a more rectangular hole with.
  • the shape of the hole opened in the step of FIG. 4B and the shape of the hole opened in the step of FIG. 5A are not limited to a rectangle, and may be any shape such as an ellipse or a circle.
  • the nonmagnetic substrate disposed in the nonmagnetic ferrite layer 13 as the intermediate layer has an end face electrode similar to the steps shown in FIGS. 4B, 4C, and 4D. It is formed.
  • the mother laminate is fired and then later broken to obtain the laminated substrate of the present invention.

Abstract

Provided is a laminated substrate such that cracking due to shear stress between a blade and ceramic material during a punching process for forming end-face electrodes or due to stress attributable to a difference in linear expansion coefficient between the end-face electrodes and the ceramic material is prevented. No end-face electrode is formed on a non-magnetic ferrite layer (11) and a non-magnetic ferrite layer (15) on the outermost layers. Mounting electrodes formed on the outermost layers are electrically connected to as far as the internal wiring at a boundary surface between a magnetic ferrite layer (12) and a magnetic ferrite layer (14) by means of via holes provided inside the non-magnetic ferrite layer (11) and non-magnetic ferrite layer (15) on the outermost layers, and are then connected to the end-face electrodes through the internal wiring. Consequently, only the outermost non-magnetic ferrite layers are connected by means of the via holes, and the magnetic ferrite layers are connected through the end-face electrodes instead of the via holes.

Description

積層基板およびその製造方法Multilayer substrate and manufacturing method thereof
 この発明は、複数のセラミックグリーンシートを積層してなる積層基板に関するものである。 The present invention relates to a multilayer substrate formed by laminating a plurality of ceramic green sheets.
 従来、磁性体材料からなるセラミックグリーンシートに導体パターンを印刷し、積層してなる積層基板が知られている(例えば特許文献1を参照)。 Conventionally, there has been known a multilayer substrate obtained by printing a conductor pattern on a ceramic green sheet made of a magnetic material and laminating (see, for example, Patent Document 1).
 特許文献1に示した積層基板は、端面に電極を形成することで、天面と底面を電気的に接続する手法が採用されている。 The multilayer substrate shown in Patent Document 1 employs a technique of electrically connecting the top surface and the bottom surface by forming electrodes on the end surfaces.
特開平11-345713号公報Japanese Patent Laid-Open No. 11-345713
 しかしながら、端面に電極を形成するために、焼成前にパンチャー等でスルーホールを開ける場合、積層基板の厚みが厚くなるにつれて、パンチャーの刃とセラミックグリーンシートとの間のずり応力(剪断応力)が増してしまい、クラックを生じさせる可能性がある。また、電極とセラミックグリーンシートは、線膨張係数が異なるため、積層基板の厚みによっては、焼成後の冷却時に生じる応力により、クラックが発生する可能性がある。 However, when forming a through-hole with a puncher or the like before firing to form an electrode on the end face, as the thickness of the laminated substrate increases, the shear stress (shear stress) between the puncher blade and the ceramic green sheet increases. It may increase and cause cracks. Moreover, since the electrode and the ceramic green sheet have different linear expansion coefficients, cracks may occur due to the stress generated during cooling after firing depending on the thickness of the laminated substrate.
 そこで、この発明は、上記クラックの発生を防止する積層基板、およびその製造方法を提供することを目的とする。 Therefore, an object of the present invention is to provide a laminated substrate that prevents the occurrence of cracks, and a method for manufacturing the same.
 本発明の積層基板は、複数の磁性体基板が積層されてなる磁性体層と、複数の非磁性体基板が積層されてなり、最外層に配置される非磁性体層と、を備えている。そして、該積層基板の最外層の表面および裏面に形成された複数の実装用電極と、前記最外層の非磁性体層に設けられ、前記複数の実装用電極にそれぞれ電気的に接続された複数のビアホールと、該積層基板の端面に設けられた端面電極と、前記複数のビアホールと、前記端面電極と、を電気的に接続する内部配線と、をさらに備え、前記端面電極は、前記非磁性体層のうち、前記表面または裏面の少なくともいずれかの側に配置された非磁性体層には形成されていないことを特徴とする。 The multilayer substrate of the present invention includes a magnetic layer formed by stacking a plurality of magnetic substrates, and a nonmagnetic layer formed by stacking a plurality of nonmagnetic substrates and disposed in the outermost layer. . A plurality of mounting electrodes formed on the front and back surfaces of the outermost layer of the multilayer substrate; and a plurality of mounting electrodes provided on the nonmagnetic material layer of the outermost layer and electrically connected to the plurality of mounting electrodes, respectively. Via holes, end face electrodes provided on end faces of the multilayer substrate, and internal wirings that electrically connect the plurality of via holes and the end face electrodes, wherein the end face electrodes are formed of the nonmagnetic material. It is not formed in the nonmagnetic body layer arrange | positioned at least in any one side of the said surface or a back surface among body layers.
 このように、本発明の積層基板は、表面側または裏面側の非磁性体層のうち、少なくともいずれかの非磁性体層には、端面電極を形成しない。この場合、実装用電極は、ビアホールおよび内部配線を介して内層側の磁性体層に形成された端面電極に電気的に接続される。これにより、積層基板の全ての層に端面電極を形成する場合に比べて、当該端面電極の積層方向の長さを低減することができる。したがって、積層基板の全ての層に端面電極を形成する場合に比べ、スルーホールを開ける必要のあるシートの層数を減らすことができるので、スルーホール形成時に刃とセラミックグリーンシートとの間のずり応力(剪断応力)を低減することができる。また、焼成後の冷却時に生じる応力を低減させることができ、クラックの発生を防止することができる。 As described above, in the multilayer substrate of the present invention, no end face electrode is formed on at least one of the nonmagnetic layers on the front side or the back side. In this case, the mounting electrode is electrically connected to the end face electrode formed in the magnetic layer on the inner layer side through the via hole and the internal wiring. Thereby, compared with the case where an end surface electrode is formed in all the layers of a multilayer substrate, the length of the end surface electrode in the stacking direction can be reduced. Therefore, compared to the case where the end face electrodes are formed on all the layers of the multilayer substrate, the number of sheet layers that need to be formed with through holes can be reduced, so that the shear between the blade and the ceramic green sheet during the formation of the through holes can be reduced. Stress (shear stress) can be reduced. Moreover, the stress which arises at the time of cooling after baking can be reduced and generation | occurrence | production of a crack can be prevented.
 なお、端面電極は、表面側および裏面側の非磁性体層の両方の端面に形成されていない態様も可能である。 In addition, the aspect in which the end surface electrode is not formed on both end surfaces of the nonmagnetic material layer on the front surface side and the back surface side is also possible.
 また、磁性体層を含む中間層に非磁性体材料が含まれている態様としてもよい。 Further, the intermediate layer including the magnetic layer may include a nonmagnetic material.
 上記積層基板は、非磁性体基板製造工程と、磁性体基板製造工程と、をそれぞれ行い、その後、前記複数の非磁性体基板を最外層に配置して、当該複数の非磁性体基板および前記複数の磁性体基板を積層して積層基板を得る工程と、前記積層基板を焼成する工程と、を行うことにより製造される。 The laminated substrate includes a non-magnetic substrate manufacturing process and a magnetic substrate manufacturing process, respectively, and then, the plurality of non-magnetic substrates are arranged in an outermost layer, and the plurality of non-magnetic substrates and It is manufactured by laminating a plurality of magnetic substrates to obtain a laminated substrate and firing the laminated substrate.
 非磁性体基板製造工程は、
 (1)複数の非磁性体基板のセラミックグリーンシートを用意する工程
 (2)最外層に配置される非磁性体基板の表面および裏面に複数の実装用電極を形成する工程
 (3)内層側に配置される複数の非磁性体基板に複数のビアホールを設ける工程
 からなる。
Non-magnetic substrate manufacturing process
(1) Step of preparing a plurality of non-magnetic substrate ceramic green sheets (2) Step of forming a plurality of mounting electrodes on the front and back surfaces of the non-magnetic substrate disposed in the outermost layer (3) On the inner layer side The method includes a step of providing a plurality of via holes in a plurality of nonmagnetic substrates to be arranged.
 また、磁性体基板製造工程は、
 (1)複数の磁性体基板のセラミックグリーンシートを用意する工程
 (2)前記複数の磁性体基板の端面に端面電極を設ける工程
 (3)前記磁性体基板のうち一部に内部配線を形成する工程
 からなる。
The magnetic substrate manufacturing process
(1) Step of preparing ceramic green sheets of a plurality of magnetic substrates (2) Step of providing end face electrodes on end surfaces of the plurality of magnetic substrates (3) Forming internal wiring in a part of the magnetic substrates It consists of a process.
 そして、本発明の積層基板の製造方法では、上記各工程において、前記内部配線は、前記ビアホールおよび前記端面電極を電気的に接続するように形成され、前記実装用電極の少なくとも一部は、前記ビアホール、および前記内部配線を介して、前記端面電極に電気的に接続される。これにより、端面電極は、非磁性体層のうち、表面または裏面の少なくともいずれかの側に配置された非磁性体層には形成されていない状態となる。 In the multilayer substrate manufacturing method of the present invention, in each of the above steps, the internal wiring is formed so as to electrically connect the via hole and the end face electrode, and at least a part of the mounting electrode is It is electrically connected to the end face electrode through a via hole and the internal wiring. As a result, the end face electrode is not formed on the nonmagnetic layer disposed on at least one of the front and back surfaces of the nonmagnetic layer.
 この発明によれば、端面電極形成時において、パンチャーの刃とセラミックグリーンシートとの間のずり応力(剪断応力)によりクラックが発生すること、また端面電極とセラミックとの線膨張係数の差に起因して生じる応力によりクラックが発生することを防止することができる。 According to the present invention, when the end face electrode is formed, cracks are generated due to shear stress (shear stress) between the puncher blade and the ceramic green sheet, and also due to the difference in coefficient of linear expansion between the end face electrode and the ceramic. Thus, it is possible to prevent cracks from being generated due to the stress generated.
DC-DCコンバータの縦断面図である。It is a longitudinal cross-sectional view of a DC-DC converter. DC-DCコンバータの平面図である。It is a top view of a DC-DC converter. 非磁性体基板製造工程を示す図である。It is a figure which shows a nonmagnetic board | substrate manufacturing process. 磁性体基板製造工程を示す図である。It is a figure which shows a magnetic substrate manufacturing process. マザー積層体の非磁性体層及び磁性体層の透視図である。It is a perspective view of the nonmagnetic material layer and magnetic material layer of a mother laminated body.
 図1は、本発明の積層基板を備えたDC-DCコンバータモジュールの縦断面構造を模式的に表した図である。 FIG. 1 is a diagram schematically showing a longitudinal cross-sectional structure of a DC-DC converter module provided with the multilayer substrate of the present invention.
 積層基板は、複数のセラミックグリーンシートを積層した積層体からなる。積層基板は、最外層のうち表面(上面)側から裏面(下面)側に向かって順に、非磁性体フェライト層11、磁性体フェライト層12、非磁性体フェライト層13、磁性体フェライト層14、および非磁性体フェライト層15が配置されている。 The laminated substrate is composed of a laminated body in which a plurality of ceramic green sheets are laminated. The laminated substrate includes a nonmagnetic ferrite layer 11, a magnetic ferrite layer 12, a nonmagnetic ferrite layer 13, a magnetic ferrite layer 14, in order from the front surface (upper surface) side to the back surface (lower surface) side of the outermost layer. In addition, a nonmagnetic ferrite layer 15 is disposed.
 図2(A)は、DC-DCコンバータモジュールの部品搭載状態における最上面(第1層目)の平面図であり、図2(B)は搭載部品を省略した場合の最上面の平面図である。図2(C)は、その下層(第2層目)に配置された非磁性体基板の平面図である。図2(D)は、磁性体フェライト層12の最上面の平面図であり、図2(E)は、磁性体フェライト層12のうち、導体パターン31が形成された磁性体基板の平面図である。 FIG. 2A is a plan view of the uppermost surface (first layer) in the component-mounted state of the DC-DC converter module, and FIG. 2B is a plan view of the uppermost surface when the mounted components are omitted. is there. FIG. 2C is a plan view of a nonmagnetic substrate disposed in the lower layer (second layer). 2D is a plan view of the uppermost surface of the magnetic ferrite layer 12, and FIG. 2E is a plan view of a magnetic substrate on which the conductor pattern 31 is formed in the magnetic ferrite layer 12. As shown in FIG. is there.
 図1および図2(B)に示すように、積層基板の積層方向の最上面には、複数の部品実装用の電極が形成されている。図1および図2(B)においては、制御IC51の入力端子55と接続される電極21A、制御IC51のグランド端子56と接続される電極21B、制御IC51の出力端子57と接続される電極21C、および出力側コンデンサ52の端子に接続される電極21Dを示す。 As shown in FIGS. 1 and 2B, a plurality of component mounting electrodes are formed on the uppermost surface in the stacking direction of the stacked substrate. In FIG. 1 and FIG. 2B, an electrode 21A connected to the input terminal 55 of the control IC 51, an electrode 21B connected to the ground terminal 56 of the control IC 51, an electrode 21C connected to the output terminal 57 of the control IC 51, And electrode 21D connected to the terminal of output side capacitor 52 is shown.
 積層基板の積層方向の最下面には、当該DC-DCコンバータが実装される、実装基板側のランド電極等と接続されるための各種電極が形成されている。図1においては、入力電極25および出力電極26を示す。 On the bottom surface in the stacking direction of the multilayer substrate, various electrodes are formed for connection to the land electrode on the mounting substrate side on which the DC-DC converter is mounted. In FIG. 1, an input electrode 25 and an output electrode 26 are shown.
 第2層目を含む非磁性体フェライト層11の各基板には、ビアホールが形成されている。ビアホールは、各非磁性体セラミックグリーンシートに貫通孔を開け、当該貫通孔に導電性ペーストを埋めることにより形成される。例えば、図1および図2(C)に示すように、部品実装用の電極21Aの下部には、ビアホール41が形成され、電極21Bの下部には、ビアホール42が形成され、電極21Cの下部には、ビアホール43が形成され、電極21Dの下部には、ビアホール44が形成されている。 A via hole is formed in each substrate of the non-magnetic ferrite layer 11 including the second layer. The via hole is formed by opening a through hole in each non-magnetic ceramic green sheet and filling the through hole with a conductive paste. For example, as shown in FIGS. 1 and 2C, a via hole 41 is formed in the lower part of the component mounting electrode 21A, a via hole 42 is formed in the lower part of the electrode 21B, and a lower part of the electrode 21C. A via hole 43 is formed, and a via hole 44 is formed below the electrode 21D.
 図1および図2(D)に示すように、磁性体フェライト層12の最上面には、内部配線が形成されている。例えば、ビアホール41の下部には、内部配線71が形成され、ビアホール42の下部には、内部配線77が形成され、ビアホール44の下部には、内部配線74が形成されている。これにより、電極21Aは、ビアホール41を介して内部配線71に電気的に接続され、電極21Bは、ビアホール42を介して内部配線77と電気的に接続され、電極21Dは、ビアホール44を介して内部配線74と電気的に接続される。 As shown in FIG. 1 and FIG. 2 (D), an internal wiring is formed on the uppermost surface of the magnetic ferrite layer 12. For example, an internal wiring 71 is formed below the via hole 41, an internal wiring 77 is formed below the via hole 42, and an internal wiring 74 is formed below the via hole 44. Thus, the electrode 21A is electrically connected to the internal wiring 71 through the via hole 41, the electrode 21B is electrically connected to the internal wiring 77 through the via hole 42, and the electrode 21D is connected to the internal wiring 71 through the via hole 44. It is electrically connected to the internal wiring 74.
 また、図1に示すように、非磁性体フェライト層15の最上面にも、内部配線72および内部配線73が形成されている。内部配線72および内部配線73は、それぞれ非磁性体フェライト層15に形成されたビアホールを介して入力電極25および出力電極26に電気的に接続されている。 Further, as shown in FIG. 1, the internal wiring 72 and the internal wiring 73 are also formed on the top surface of the nonmagnetic ferrite layer 15. The internal wiring 72 and the internal wiring 73 are electrically connected to the input electrode 25 and the output electrode 26 through via holes formed in the nonmagnetic ferrite layer 15, respectively.
 図1、図2(D)および図2(E)に示すように、積層基板のうち、磁性体フェライト層12、非磁性体フェライト層13、および磁性体フェライト層14の端面には、端面スルーホール75、端面スルーホール76、端面スルーホール95、および端面スルーホール96が形成されている。 As shown in FIGS. 1, 2D, and 2E, the end surfaces of the magnetic ferrite layer 12, the non-magnetic ferrite layer 13, and the magnetic ferrite layer 14 of the laminated substrate are end-through. A hole 75, an end surface through hole 76, an end surface through hole 95, and an end surface through hole 96 are formed.
 端面スルーホール75は、内部配線71と内部配線72とを電気的に接続する。これにより、電極21Aは、入力電極25と電気的に接続される。端面スルーホール76は、内部配線73と内部配線74とを電気的に接続する。これにより、電極21Dは、出力電極26と電気的に接続される。端面スルーホール95および端面スルーホール96は、最上面の各種電極(例えば部品搭載用の電極21B)を最下面のグランド用電極(不図示)に接続する。 The end face through hole 75 electrically connects the internal wiring 71 and the internal wiring 72. Thus, the electrode 21A is electrically connected to the input electrode 25. The end surface through hole 76 electrically connects the internal wiring 73 and the internal wiring 74. Thereby, the electrode 21 </ b> D is electrically connected to the output electrode 26. The end face through hole 95 and the end face through hole 96 connect various electrodes on the uppermost surface (for example, the electrode 21B for mounting components) to ground electrodes (not shown) on the lowermost surface.
 また、図1および図2(E)に示すように、積層基板の内層側に配置された一部のセラミックグリーンシート上には、内部配線である導体パターン31が形成されている。導体パターン31は、ビアホールにより層間接続されることにより、磁性体フェライト層12、非磁性体フェライト層13、および磁性体フェライト層14を挟んで螺旋状に配線されることになる。これによりコイル導体が形成され、積層基板がインダクタとして機能し、制御IC51や各種コンデンサ等の電子部品を搭載することにより、DC-DCコンバータモジュールとして機能する。 Further, as shown in FIG. 1 and FIG. 2 (E), a conductor pattern 31 which is an internal wiring is formed on a part of the ceramic green sheets arranged on the inner layer side of the multilayer substrate. The conductor pattern 31 is wired in a spiral manner with the magnetic ferrite layer 12, the nonmagnetic ferrite layer 13, and the magnetic ferrite layer 14 sandwiched between them by via connection via holes. Thus, a coil conductor is formed, the laminated substrate functions as an inductor, and functions as a DC-DC converter module by mounting electronic components such as the control IC 51 and various capacitors.
 例えば、降圧型のDC-DCコンバータである場合、制御IC51の出力端子57には、インダクタとして機能する導体パターン31が接続される。そして、導体パターン31の出力側は、出力側コンデンサ52に接続され、出力側コンデンサ52および導体パターン31の出力側は、電極21D、内部配線74、端面スルーホール76、および内部配線73等の各種配線を介して出力電極26に接続される。 For example, in the case of a step-down DC-DC converter, the conductor pattern 31 functioning as an inductor is connected to the output terminal 57 of the control IC 51. The output side of the conductor pattern 31 is connected to the output side capacitor 52, and the output side of the output side capacitor 52 and the conductor pattern 31 is various types such as the electrode 21D, the internal wiring 74, the end face through hole 76, and the internal wiring 73. It is connected to the output electrode 26 through wiring.
 なお、中間層である非磁性体フェライト層13は、磁気的には磁性体フェライト層12および磁性体フェライト層14間に空隙が存在する場合と等価であるように機能し、インダクタとしての直流重畳特性を向上させるものであるが、本発明において必須の要素ではない。 The non-magnetic ferrite layer 13 as an intermediate layer functions magnetically to be equivalent to the case where a gap exists between the magnetic ferrite layer 12 and the magnetic ferrite layer 14, and DC superimposition as an inductor is performed. Although it improves the characteristics, it is not an essential element in the present invention.
 最外層の非磁性体フェライト層11および非磁性体フェライト層15は、磁性体フェライト層12および磁性体フェライト層14の上面側および下面側をそれぞれ被覆する機能を有する。また、相対的に熱収縮率の高い磁性体フェライト層12および磁性体フェライト層14を、相対的に熱収縮率の低い非磁性体フェライト層11および非磁性体フェライト層15で挟みこむことで、焼成により素子全体を圧縮して強度を向上させるために設けられている。 The outermost nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 have a function of covering the upper surface side and the lower surface side of the magnetic ferrite layer 12 and the magnetic ferrite layer 14, respectively. Further, by sandwiching the magnetic ferrite layer 12 and the magnetic ferrite layer 14 having a relatively high heat shrinkage rate between the nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 having a relatively low heat shrinkage rate, It is provided to improve the strength by compressing the entire element by firing.
 そして、本実施形態の積層基板は、図1、図2(A)、図2(B)および図2(C)に示すように、最外層の非磁性体フェライト層11および非磁性体フェライト層15に端面スルーホールが形成されていない。 The multilayer substrate of the present embodiment includes an outermost nonmagnetic ferrite layer 11 and a nonmagnetic ferrite layer as shown in FIGS. 1, 2A, 2B, and 2C. No end face through-hole is formed in 15.
 最外層に形成された各実装用電極は、この最外層の非磁性体フェライト層11および非磁性体フェライト層15の内部に設けられたビアホールを介して、磁性体フェライト層12および磁性体フェライト層14との境界面に配置された内部配線まで電気的に接続され、当該内部配線を介して端面電極に接続される。これにより、最外層の非磁性体層についてのみビアホールで接続し、磁性体層については、ビアホールではなく、端面電極を介して接続する。非磁性体層についてはビアホールを設けたとしても寄生インダクタンスが大きくなることはない。この場合、積層基板の全ての層に端面電極を形成する場合に比べて、当該端面電極の積層方向の長さを低減することができる。したがって、積層基板の全ての層に端面電極を形成する場合に比べ、焼成後の冷却時に生じる応力(電極とセラミックとの線膨張係数の差に起因するもの)を低減させることができ、クラックの発生を防止することができる。 Each mounting electrode formed in the outermost layer is connected to the magnetic ferrite layer 12 and the magnetic ferrite layer via via holes provided in the nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15 of the outermost layer. 14 is electrically connected to the internal wiring arranged on the boundary surface with 14 and connected to the end face electrode through the internal wiring. Thereby, only the outermost nonmagnetic layer is connected by the via hole, and the magnetic layer is connected not by the via hole but through the end face electrode. For the nonmagnetic layer, even if a via hole is provided, the parasitic inductance does not increase. In this case, the length of the end surface electrode in the stacking direction can be reduced as compared with the case where the end surface electrodes are formed on all the layers of the stacked substrate. Therefore, compared to the case where the end face electrodes are formed on all the layers of the multilayer substrate, the stress (due to the difference in the linear expansion coefficient between the electrode and the ceramic) generated during cooling after firing can be reduced, and cracks can be reduced. Occurrence can be prevented.
 なお、図1に示した積層基板においては、最外層の非磁性体フェライト層11および非磁性体フェライト層15の両方に端面電極が形成されていない態様を示したが、少なくともいずれかの側に配置された非磁性体フェライト層に形成されていない態様であればよい。 In the multilayer substrate shown in FIG. 1, the end face electrode is not formed on both the outermost nonmagnetic ferrite layer 11 and the nonmagnetic ferrite layer 15, but at least on either side. Any mode may be used as long as it is not formed in the arranged nonmagnetic ferrite layer.
 また、中間層である非磁性体フェライト層13においても、端面電極を形成しない態様としてもよい。この場合、非磁性体フェライト層13の最上面および最下面に内部配線を形成し、当該内部配線をビアホールで電気的に接続する。 Also, the end face electrode may not be formed in the nonmagnetic ferrite layer 13 as the intermediate layer. In this case, internal wiring is formed on the uppermost surface and the lowermost surface of the nonmagnetic ferrite layer 13, and the internal wiring is electrically connected through a via hole.
 次に、上記積層基板の製造方法について説明する。積層基板は、非磁性体基板製造工程と、磁性体基板製造工程と、をそれぞれ行い、その後、複数の非磁性体基板を最外層に配置して、当該複数の非磁性体基板および複数の磁性体基板を積層して積層基板を得る工程と、積層基板を焼成する工程と、を行うことにより製造される。 Next, a method for manufacturing the laminated substrate will be described. The laminated substrate is subjected to a nonmagnetic substrate manufacturing process and a magnetic substrate manufacturing process, respectively, and then a plurality of nonmagnetic substrates are arranged in the outermost layer, and the plurality of nonmagnetic substrates and a plurality of magnetic substrates are arranged. It is manufactured by performing a step of obtaining a laminated substrate by laminating body substrates and a step of firing the laminated substrate.
 図3は、非磁性体基板製造工程を示す図である。まず、図3(A)に示すように、非磁性体基板のセラミックグリーンシート(マザーシート)を複数、用意する。 FIG. 3 is a diagram showing a non-magnetic substrate manufacturing process. First, as shown in FIG. 3A, a plurality of ceramic green sheets (mother sheets) of a non-magnetic substrate are prepared.
 次に、図3(B)に示すように、最外層に配置される非磁性体基板には、各種電極を形成し、図3(C)に示すように、内層側に配置される非磁性体基板には、当該電極の下部に相当する位置にパンチ等で孔を形成する。最後に、図3(D)に示すように、図3(C)の工程で形成した孔に、銀等の導電性材料を埋めることで、ビアホールを形成する。 Next, as shown in FIG. 3B, various electrodes are formed on the non-magnetic substrate arranged in the outermost layer, and as shown in FIG. 3C, the non-magnetic substance arranged on the inner layer side. A hole is formed in the body substrate by a punch or the like at a position corresponding to the lower portion of the electrode. Finally, as shown in FIG. 3D, a via hole is formed by filling a hole formed in the step of FIG. 3C with a conductive material such as silver.
 一方、図4は、磁性体基板製造工程を示す図である。まず、図4(A)に示すように、磁性体基板のセラミックグリーンシート(マザーシート)を複数、用意する。そして、図4(B)に示すように、個片化後に各積層基板の端面となる位置にパンチ等で矩形状の孔を開け、図4(C)に示すように、導電性材料を埋める。 On the other hand, FIG. 4 is a diagram showing a magnetic substrate manufacturing process. First, as shown in FIG. 4A, a plurality of ceramic green sheets (mother sheets) of a magnetic substrate are prepared. Then, as shown in FIG. 4 (B), a rectangular hole is opened with a punch or the like at a position to be an end face of each laminated substrate after singulation, and a conductive material is filled as shown in FIG. 4 (C). .
 そして、図4(D)に示すように、磁性体フェライト層12の最上面に配置される磁性体基板には、内部配線を形成する。また、非磁性体フェライト層15の最上面に配置される非磁性体基板にも、内部配線が形成される。 Then, as shown in FIG. 4D, internal wiring is formed on the magnetic substrate disposed on the uppermost surface of the magnetic ferrite layer 12. Internal wiring is also formed on the nonmagnetic substrate disposed on the top surface of the nonmagnetic ferrite layer 15.
 一方、図4(E)に示すように、積層基板の内層側に配置される磁性体基板、および中間層である非磁性体フェライト層13に配置される非磁性体基板の一部には、コイル導体となる導体パターンを形成する。 On the other hand, as shown in FIG. 4E, the magnetic substrate disposed on the inner layer side of the laminated substrate and the nonmagnetic substrate disposed on the nonmagnetic ferrite layer 13 as an intermediate layer include A conductor pattern to be a coil conductor is formed.
その後、非磁性体基板を最外層に配置して、複数の非磁性体基板および複数の磁性体基板を積層してマザー積層体を得る。 Thereafter, the nonmagnetic substrate is disposed in the outermost layer, and a plurality of nonmagnetic substrates and a plurality of magnetic substrates are stacked to obtain a mother stacked body.
こうして得られたマザー積層体の非磁性体層及び磁性体層の透視図を図5に示す。図5(A)は最外層の非磁性体層の表面を、図5(B)は磁性体層と非磁性体層の境界面における磁性体層の表面を、図5(C)は磁性体層内部のコイル導体となる導体パターンが形成されている層を示している。図5(A)に示すように、表面の非磁性体層から、磁性体層において先に開けた図4(B)に示した矩形状の孔とは異なる方向(直交する方向)にパンチ等でさらに矩形状の孔を開ける。図4(B)の工程で開ける孔の形状、および図5(A)の工程で開ける孔の形状は、矩形に限らず、楕円や円形等、どのような形状であってもよい。 FIG. 5 shows a perspective view of the non-magnetic layer and the magnetic layer of the mother laminate obtained in this way. 5A shows the surface of the outermost nonmagnetic layer, FIG. 5B shows the surface of the magnetic layer at the interface between the magnetic layer and the nonmagnetic layer, and FIG. 5C shows the magnetic layer. The layer in which the conductor pattern used as the coil conductor inside a layer is formed is shown. As shown in FIG. 5A, punching or the like is performed in a direction (orthogonal direction) different from the rectangular hole shown in FIG. 4B that was previously opened in the magnetic layer from the nonmagnetic layer on the surface. Open a more rectangular hole with. The shape of the hole opened in the step of FIG. 4B and the shape of the hole opened in the step of FIG. 5A are not limited to a rectangle, and may be any shape such as an ellipse or a circle.
 これにより、図5(A)の工程で開けた矩形状の孔がスルーホールとなり、図4(B)の工程で開けた矩形状の孔(導電性材料が埋められたもの)が端面電極となる。 Thereby, the rectangular hole opened in the process of FIG. 5A becomes a through hole, and the rectangular hole opened in the process of FIG. 4B (filled with the conductive material) becomes the end face electrode. Become.
 なお、中間層である非磁性体フェライト層13に配置される非磁性体基板は、図4(B)、図4(C)および図4(D)に示した工程と同様に、端面電極が形成される。 The nonmagnetic substrate disposed in the nonmagnetic ferrite layer 13 as the intermediate layer has an end face electrode similar to the steps shown in FIGS. 4B, 4C, and 4D. It is formed.
 そして、このマザー積層体を焼成して、後にブレイクすることで、本発明の積層基板が得られる。 Then, the mother laminate is fired and then later broken to obtain the laminated substrate of the present invention.
11,13,15…非磁性体フェライト層
12,14…磁性体フェライト層
21A,21B,21C,21D…電極
25…入力電極
26…出力電極
31…導体パターン
41,42,43,44…ビアホール
51…IC
52…出力側コンデンサ
55…入力端子
56…グランド端子
57…出力端子
71,72,73,74,77…内部配線
75,76,95,96…端面スルーホール
11, 13, 15 ... non-magnetic ferrite layers 12, 14 ... magnetic ferrite layers 21 A, 21 B, 21 C, 21 D ... electrodes 25 ... input electrodes 26 ... output electrodes 31 ... conductor patterns 41, 42, 43, 44 ... via holes 51 ... IC
52 ... Output-side capacitor 55 ... Input terminal 56 ... Ground terminal 57 ... Output terminals 71, 72, 73, 74, 77 ... Internal wiring 75, 76, 95, 96 ... End face through hole

Claims (5)

  1.  複数の磁性体基板が積層されてなる磁性体層と、
     複数の非磁性体基板が積層されてなり、最外層に配置される非磁性体層と、
     を備えた積層基板であって、
     該積層基板の最外層の表面および裏面に形成された複数の実装用電極と、
     前記最外層の非磁性体層に設けられ、前記複数の実装用電極にそれぞれ電気的に接続された複数のビアホールと、
     該積層基板の端面に設けられた端面電極と、
     前記複数のビアホールと、前記端面電極と、を電気的に接続する内部配線と、
     をさらに備え、
     前記端面電極は、前記非磁性体層のうち、前記表面または裏面の少なくともいずれかの側に配置された非磁性体層には形成されていないことを特徴とする積層基板。
    A magnetic layer formed by laminating a plurality of magnetic substrates;
    A plurality of non-magnetic substrates are laminated, and a non-magnetic layer disposed in the outermost layer;
    A laminated substrate comprising:
    A plurality of mounting electrodes formed on the front and back surfaces of the outermost layer of the multilayer substrate;
    A plurality of via holes provided in the outermost nonmagnetic layer and electrically connected to the plurality of mounting electrodes,
    An end face electrode provided on the end face of the laminated substrate;
    An internal wiring for electrically connecting the plurality of via holes and the end face electrode;
    Further comprising
    The laminated substrate, wherein the end face electrode is not formed on a nonmagnetic layer disposed on at least one of the front and back surfaces of the nonmagnetic layer.
  2.  前記端面電極は、表面側および裏面側の前記非磁性体層の両方の端面に形成されていないことを特徴とする請求項1に記載の積層基板。 2. The laminated substrate according to claim 1, wherein the end face electrode is not formed on both end faces of the nonmagnetic layer on the front side and the back side.
  3.  前記磁性体層を含む中間層に、非磁性体材料が含まれていることを特徴とする請求項1または請求項2に記載の積層基板。 The multilayer substrate according to claim 1 or 2, wherein the intermediate layer including the magnetic layer contains a non-magnetic material.
  4.  複数の非磁性体基板のセラミックグリーンシートを用意する工程、最外層に配置される非磁性体基板の表面および裏面に複数の実装用電極を形成する工程、および内層側に配置される複数の非磁性体基板に複数のビアホールを設ける工程、からなる非磁性体基板製造工程と、
     複数の磁性体基板のセラミックグリーンシートを用意する工程、前記複数の磁性体基板の端面に端面電極を設ける工程、および前記磁性体基板のうち一部に内部配線を形成する工程、からなる磁性体基板製造工程と、
     をそれぞれ行い、その後、
     前記複数の非磁性体基板を最外層に配置して、当該複数の非磁性体基板および前記複数の磁性体基板を積層して積層基板を得る工程と、
     前記積層基板を焼成する工程と、
     を行う積層基板の製造方法であって、
     前記内部配線は、前記ビアホールおよび前記端面電極を電気的に接続するように形成され、
     前記実装用電極の少なくとも一部は、前記ビアホール、および前記内部配線を介して、前記端面電極に電気的に接続されていることを特徴とする積層基板の製造方法。
    Preparing a plurality of non-magnetic substrate ceramic green sheets, forming a plurality of mounting electrodes on the front and back surfaces of the non-magnetic substrate disposed in the outermost layer, and a plurality of non-magnetic substrates disposed on the inner layer side Providing a plurality of via holes in the magnetic substrate, and a non-magnetic substrate manufacturing process comprising:
    A magnetic body comprising a step of preparing ceramic green sheets of a plurality of magnetic substrates, a step of providing end face electrodes on end surfaces of the plurality of magnetic substrates, and a step of forming internal wiring in a part of the magnetic substrates. Substrate manufacturing process;
    Each, then
    Arranging the plurality of non-magnetic substrates in an outermost layer and stacking the plurality of non-magnetic substrates and the plurality of magnetic substrates to obtain a laminated substrate;
    Firing the laminated substrate;
    A method for manufacturing a multilayer substrate, comprising:
    The internal wiring is formed so as to electrically connect the via hole and the end face electrode,
    At least a part of the mounting electrode is electrically connected to the end face electrode through the via hole and the internal wiring.
  5.  前記非磁性体基板製造工程は、
     内層側に配置される非磁性体基板の製造工程を含み、
     当該内層側に配置される非磁性体基板は、端面に端面電極を設ける工程が含まれていることを特徴とする請求項4に記載の積層基板の製造方法。
    The non-magnetic substrate manufacturing process includes:
    Including a manufacturing process of a non-magnetic substrate disposed on the inner layer side,
    The method for manufacturing a laminated substrate according to claim 4, wherein the nonmagnetic substrate disposed on the inner layer side includes a step of providing an end face electrode on the end face.
PCT/JP2013/069586 2012-08-21 2013-07-19 Laminated substrate and manufacturing method therefor WO2014030471A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018088219A1 (en) * 2016-11-11 2018-05-17 株式会社村田製作所 Ferrite substrate module

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005044886A (en) * 2003-07-24 2005-02-17 Murata Mfg Co Ltd Method for manufacturing stacked ceramic electronic component
JP2012089818A (en) * 2010-09-24 2012-05-10 Murata Mfg Co Ltd Laminate type ceramic electronic component manufacturing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005044886A (en) * 2003-07-24 2005-02-17 Murata Mfg Co Ltd Method for manufacturing stacked ceramic electronic component
JP2012089818A (en) * 2010-09-24 2012-05-10 Murata Mfg Co Ltd Laminate type ceramic electronic component manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018088219A1 (en) * 2016-11-11 2018-05-17 株式会社村田製作所 Ferrite substrate module
JPWO2018088219A1 (en) * 2016-11-11 2019-04-18 株式会社村田製作所 Board module

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