WO2014012285A1 - 彩色滤光阵列基板及其制造方法 - Google Patents

彩色滤光阵列基板及其制造方法 Download PDF

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Publication number
WO2014012285A1
WO2014012285A1 PCT/CN2012/080007 CN2012080007W WO2014012285A1 WO 2014012285 A1 WO2014012285 A1 WO 2014012285A1 CN 2012080007 W CN2012080007 W CN 2012080007W WO 2014012285 A1 WO2014012285 A1 WO 2014012285A1
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Prior art keywords
layer
color filter
transparent substrate
thin film
film transistor
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PCT/CN2012/080007
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English (en)
French (fr)
Inventor
赵小虎
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to DE112012006725.8T priority Critical patent/DE112012006725B4/de
Priority to US13/698,255 priority patent/US9153751B2/en
Publication of WO2014012285A1 publication Critical patent/WO2014012285A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate

Definitions

  • the present invention relates to a liquid crystal display panel and a method of fabricating the same, and more particularly to a color filter array substrate and a method of fabricating the same.
  • LCD monitors have become widely used in a wide range of electronic devices such as mobile phones, personal digital assistants (PDAs), digital cameras, computer screens or laptop screens. Rate display with color screen.
  • a conventional liquid crystal display panel is composed of a color filter and a thin film transistor matrix substrate (thin a film transistor array substrate, a TFT array substrate, and a liquid crystal layer disposed between the two substrates Crystal Layer).
  • a liquid crystal display panel has a poor resolution and a low aperture ratio of a pixel, and it is easy to have a misalignment when the color filter substrate is bonded to the thin film transistor matrix substrate.
  • a color filter layer array in which a color filter layer is directly integrated on a thin film transistor matrix substrate has been proposed (Color Filter on Array,
  • the COA substrate is formed by stacking a COA substrate with another counter substrate not having a color filter layer, and filling liquid crystal molecules between the substrates to form a liquid crystal display panel. Since the color filter layer is formed directly on the thin film transistor array substrate, no alignment error occurs. Moreover, such a liquid crystal display panel can have a better resolution and a higher aperture ratio of its pixels.
  • the process of the COA substrate produced today is to complete a thin film transistor matrix on a substrate on a substrate; then sequentially forming a color filter, a transparent conductive layer and an alignment film on the substrate to form the COA substrate. Then, a liquid crystal is disposed on the COA substrate, and the counter substrate is bonded to the COA substrate by using a sealant disposed around the first substrate to form a liquid crystal panel.
  • the thickness of the color filter is about ten times the thickness of the drain of the thin film transistor, and the height difference between the two causes the tilt angle of the sidewall of the opening to approach 90 degrees. It is not conducive to the deposition of the transparent conductive layer in the opening, and the liquid crystal display panel may be at risk of electrostatic discharge (Electro Static Discharge, ESD).
  • ESD Electro Static Discharge
  • the present invention provides a method for fabricating a color filter array substrate, comprising the steps of: providing a transparent substrate; etching the transparent substrate to form a first recess; depositing a color filter layer on the transparent substrate, And etching the color filter layer to form a color filter unit in the first recess, then forming a pixel electrode on the color filter unit; and forming a thin film transistor on the transparent substrate Above, the thin film transistor is connected to the pixel electrode.
  • the transparent substrate comprises a substrate and an insulating layer
  • the etching the transparent substrate to form a first recess is specifically: etching the insulating layer to form the first recess.
  • the step of forming the thin film transistor includes: forming a first metal layer on the transparent substrate, and etching the first metal layer to form a gate of the thin film transistor; depositing a An insulating layer on the transparent substrate and the gate; an active layer and an ohmic contact layer are deposited on the insulating layer; and the active layer and the ohmic contact layer are etched to form the active layer a channel of the thin film transistor; depositing a second metal layer on the ohmic contact layer and the insulating layer, and etching the second metal layer to form a source of the thin film transistor on the ohmic contact layer a drain and a drain connected to the pixel electrode; and a protective layer deposited on the source, the drain, the pixel electrode, and the insulating layer.
  • the step of forming the thin film transistor includes: forming a first metal layer on the transparent substrate, and etching the first metal layer to form a gate of the thin film transistor; depositing a An insulating layer on the transparent substrate and the gate; on the insulating layer, an active layer, an ohmic contact layer and a second metal layer are sequentially deposited; etching the second metal layer and the ohmic layer Contacting the layer such that the active layer serves as a channel of the thin film transistor while forming a source and a drain of the thin film transistor on the ohmic contact layer, the drain connecting the pixel electrode; A protective layer is deposited on the source, the drain, the pixel electrode, and the insulating layer.
  • the manufacturing method further includes: in the step of etching the transparent substrate, simultaneously etching the transparent substrate to form a second recess, wherein the second recess is located on the transparent substrate the edge of.
  • the present invention further provides a method for fabricating a color filter array substrate, comprising the steps of: providing a transparent substrate; etching the transparent substrate to form a first recess; and depositing a color filter layer on the transparent substrate And etching the color filter layer to form the color filter unit in the first recess; depositing a spacer layer on the color filter layer; depositing the transparent conductive layer on the spacer layer And etching the transparent conductive layer to form the pixel electrode over the color filter unit; and forming a thin film transistor over the transparent substrate such that the thin film transistor is connected to the pixel electrode.
  • the transparent substrate comprises a substrate and an insulating layer
  • the etching the transparent substrate to form a first recess is specifically: etching the insulating layer to form the first recess.
  • the step of forming the thin film transistor includes: forming a first metal layer on the transparent substrate, and etching the first metal layer to form a gate of the thin film transistor; depositing a An insulating layer on the transparent substrate and the gate; an active layer and an ohmic contact layer are deposited on the insulating layer; and the active layer and the ohmic contact layer are etched to form the active layer a channel of the thin film transistor; depositing a second metal layer on the ohmic contact layer and the insulating layer, and etching the second metal layer to form a source of the thin film transistor on the ohmic contact layer a drain and a drain connected to the pixel electrode; and a protective layer deposited on the source, the drain, the pixel electrode, and the insulating layer.
  • the manufacturing method further includes: in the step of etching the transparent substrate, simultaneously etching the transparent substrate to form a second recess, wherein the second recess is located on the transparent substrate the edge of.
  • the step of forming the thin film transistor includes: depositing an active layer and an ohmic contact layer on the insulating layer; etching the active layer and the ohmic contact layer to form the active a layer as a channel of the thin film transistor; depositing a second metal layer on the ohmic contact layer and the insulating layer, and etching the second metal layer to form the thin film transistor on the ohmic contact layer a source and a drain, the drain is connected to the pixel electrode; and a protective layer is deposited on the source, the drain, the pixel electrode and the insulating layer.
  • the step of forming the thin film transistor includes: depositing an active layer, an ohmic contact layer and a second metal layer on the insulating layer, and etching the active layer, the ohmic contact layer, and a second metal layer to form a channel, a source and a drain of the thin film transistor, the drain connected to the pixel electrode; and a deposition on the source, the drain, the pixel electrode and the insulating layer The protective layer.
  • the invention further provides a color filter array substrate, comprising: a transparent substrate, a first recess; a thin film transistor disposed on the transparent substrate, comprising a gate, a drain and a source a color filter unit is disposed on the first recess; and a pixel electrode is disposed on the color filter unit and coupled to a drain of the thin film transistor.
  • the transparent substrate comprises a substrate and an insulating layer, and the first recess is formed by etching the insulating layer.
  • the color filter array substrate further comprises a spacer layer disposed between the color filter unit and the pixel electrode.
  • the color filter array substrate further comprises a second recess disposed at an edge of the transparent substrate.
  • the color filter array substrate and the method of fabricating the same according to the present invention etch a first recess on the substrate, and form a color filter unit on the first recess, and form a pixel electrode on the color filter unit. Since the color filter unit is formed on the first recess and the pixel electrode is formed on the color filter unit, it is not necessary to form an opening on the protective layer as the drain of the connection thin film transistor and the pixel electrode. use. Therefore, the present invention can omit an etching process for forming openings in the protective layer.
  • the color filter array substrate of the present invention additionally etches a second recess on the transparent substrate, and the second recess is formed around the substrate.
  • the second groove can accommodate excess sealant or alignment film material to prevent the sealant and the alignment film from overlapping and affect the yield of the liquid crystal display panel.
  • FIG. 1 is a schematic view of a liquid crystal display panel according to an embodiment of the present invention.
  • Figure 2 is a cross-sectional view showing a first embodiment of the liquid crystal display panel of Figure 1.
  • 3 to 8 are schematic views showing the manufacturing process of the color filter array substrate shown in FIG. 2.
  • Figure 9 is a cross-sectional view showing a second embodiment of the liquid crystal display panel of Figure 1.
  • 10 to 16 are schematic views showing the manufacturing process of the color filter array substrate shown in FIG. 9.
  • 17 to 20 are schematic views showing another manufacturing process of the color filter array substrate shown in FIG.
  • Figure 21 is a cross-sectional view showing a third embodiment of the liquid crystal display panel of Figure 1.
  • Figure 22 is a cross-sectional view showing a fourth embodiment of the liquid crystal display panel of Figure 1.
  • FIG. 1 is a schematic diagram of a liquid crystal display panel 100 according to an embodiment of the present invention.
  • the liquid crystal display panel 100 includes a plurality of pixel units 101, a plurality of scanning lines SL, and a plurality of data lines DL.
  • Each pixel unit 101 includes a thin film transistor 114 and a pixel electrode 118.
  • Each of the thin film transistors 114 is electrically connected to a pixel electrode 118, a scan line SL, and a data line DL.
  • FIG. 2 is a cross-sectional view showing a first embodiment of the liquid crystal display panel 100 of FIG. 1.
  • the liquid crystal display panel 100 includes a color filter array substrate 110, a liquid crystal layer 150, and a pair of substrates 160.
  • the liquid crystal layer 150 is located between the color filter array substrate 110 and the opposite substrate 160.
  • FIG. 2 only shows the cross-sectional area corresponding to one pixel unit 101.
  • the color filter array substrate 110 includes a transparent substrate 112, a thin film transistor 114, a color filter unit 116, and a pixel electrode 118.
  • the transparent substrate 112 defines a first recess 121, and the color filter unit 116 is disposed in the first recess 121 for converting the light generated by the backlight (not shown) and incident on the color filter unit 116 into a preset.
  • the light of the color includes a red filter unit, a blue filter unit, and a green filter unit for respectively making the passing light into red light, blue light, and green light.
  • the thin film transistor 114 is disposed on the transparent substrate 112 and includes a gate 131, a source 132, and a drain 133.
  • the gate 131 of the thin film transistor 114 is coupled to the scan line SL, and the source 132 is coupled to the data line DL.
  • the pixel electrode 118 is located on the color filter unit 116 and coupled to the drain 133 of the thin film transistor 114.
  • the opposite substrate 160 includes a black array layer (Black A matrix layer 162 and a conductive layer 164.
  • a black array layer 162 is disposed over the thin film transistor 114 to block light.
  • the conductive layer 164 is electrically connected to a common voltage terminal (common Voltage terminal) for receiving a fixed voltage. The direction of rotation of the liquid crystal of the liquid crystal layer 150 is controlled in accordance with the level of the data signal and the fixed voltage received by the conductive layer 164.
  • the color filter array substrate 110 further includes an alignment film 115 and an adhesive 117.
  • the alignment film 115 is used to adjust the alignment direction of the liquid crystal of the liquid crystal layer 150.
  • the liquid crystal layer 150 is formed on the color filter array substrate 110 having the alignment film 115, and then the sealant 117 is applied around the color filter array substrate 110.
  • the color filter array substrate 110 and the opposite substrate 160 are bonded by the sealant 117.
  • the alignment film 115 is a film formed by diffusion of polyimide (PI) droplets, the expanded alignment film material may overflow.
  • PI polyimide
  • the color filter array substrate 110 further includes a second recess 122 disposed at an edge of the transparent substrate 112.
  • the second recess 122 can be used to contain spilled alignment film material or excess sealant to avoid spillage of the alignment film material or excess sealant overlap.
  • FIG. 3-8 is a schematic diagram of a manufacturing process of the color filter array substrate 110 shown in FIG.
  • a transparent substrate 112 is first provided.
  • the transparent substrate 112 is etched by a first mask (not shown) to form a first recess 121 and a second recess 122.
  • the second groove 122 is located at an edge of the transparent substrate 112.
  • a color filter layer is sequentially deposited on the transparent substrate 112, and the color filter layer is etched by a second mask (not shown) to form a color filter in the first recess 121.
  • the light unit 116 then forms a pixel electrode 118 over the color filter unit 116.
  • a first metal layer is formed on the transparent substrate 112, and the first metal layer is etched by a third mask (not shown) to form a scan line SL and a gate 131 of the thin film transistor 114.
  • the scan line SL and the gate 131 belong to the same metal layer.
  • an insulating layer (insulating The layer 134 is on the transparent substrate 112 and the scan lines SL and the gate electrodes 131.
  • an active layer 135 and an ohmic contact layer (n+) are deposited.
  • a second metal layer is deposited on the ohmic contact layer 136 and the insulating layer 134, and the second metal layer is etched in a fifth mask (not shown) to form a data line DL and is in ohms.
  • a source 132 and a drain 133 of the thin film transistor 114 are formed on the contact layer 136.
  • the drain electrode 133 is connected to the pixel electrode 118.
  • the data line DL and the source 132 and the drain 133 belong to the same metal layer.
  • a protective layer (passivation) is deposited on the ohmic contact layer 136, the source 132, the drain 133, and the pixel electrode 118.
  • Layer) 141 is for avoiding direct contact of the liquid crystal layer 150 (see FIG. 2) with the thin film transistor 114. So far, the thin film transistor 114 has been formed over the transparent substrate 112 such that the thin film transistor 114 is connected to the pixel electrode 118. Finally, a droplet of polyimide is dropped. The diffused polyimide droplets form the alignment film 115.
  • the insulating layer 134, the active layer 135, the ohmic contact layer 136, and the second metal layer may be sequentially deposited first, and then the second mask is etched second.
  • the metal layer, the ohmic contact layer 136, and the active layer 135 form a channel for the source 132, the drain 133, and the thin film transistor 114.
  • a protective layer 141 and an alignment film 115 are formed on the ohmic contact layer 136, the source 132, the drain 133, and the pixel electrode 118.
  • FIG. 9 is a cross-sectional view showing a second embodiment of the liquid crystal display panel 100 of FIG. 1.
  • the color filter array substrate 210 of the present embodiment includes a spacer layer 117 disposed between the color filter unit 116 and the pixel electrode 118 for separating the color filter unit 116 and Pixel electrode 118.
  • FIG. 10 to FIG. 10 and FIG. 10 to FIG. 16 are schematic diagrams showing the manufacturing process of the color filter array substrate 210 shown in FIG.
  • a transparent substrate 112 is first provided.
  • the transparent substrate 112 is etched by a first mask (not shown) to form a first recess 121 and a second recess 122.
  • the second groove 122 is located at an edge of the transparent substrate 112.
  • a color filter layer is deposited on the transparent substrate 112 , and the color filter layer is etched by a second mask (not shown) to form a color filter unit in the first recess 121 . 116.
  • a spacer layer 117 is deposited on the color filter unit 116. Then, a transparent conductive layer is deposited on the spacer layer 117, and the spacer layer 117 and the transparent conductive layer are etched by a third mask (not shown) to form a pixel electrode 118 above the color filter unit 116. The spacer layer 117 is located between the color filter unit 116 and the pixel electrode 118.
  • a first metal layer is formed on the transparent substrate 112, and the first metal layer is etched by a fourth mask (not shown) to form a scan line SL and a gate 131 of the thin film transistor 114.
  • the scan line SL and the gate 131 belong to the same metal layer.
  • an insulating layer 134 is deposited on the transparent substrate 112 and the scan lines SL and the gate electrodes 131.
  • An active layer 135 and an ohmic contact layer 136 are then deposited on the insulating layer 134, and the active layer 135 and the ohmic contact layer 136 are etched using a fifth mask (not shown) to define the channel of the thin film transistor 114.
  • a second metal layer is deposited on the ohmic contact layer 136 and the insulating layer 134, and the second metal layer is etched in a sixth mask (not shown) to form a data line DL and is in ohms.
  • a source 132 and a drain 133 of the thin film transistor 114 are formed on the contact layer 136, and a drain 133 is connected to the pixel electrode 118.
  • the data line DL and the source 132 and the drain 133 belong to the same metal layer.
  • a protective layer (passivation) is deposited on the ohmic contact layer 136, the source 132, the drain 133, the pixel electrode 118, and the insulating layer 134.
  • Layer) 141 is used to isolate the liquid crystal layer 150 (see FIG. 9) from direct contact with the thin film transistor 114. So far, the thin film transistor 114 has been formed over the transparent substrate 112 such that the thin film transistor 114 is connected to the pixel electrode 118. Finally, a droplet of polyimide is dropped. The diffused polyimide droplets form the alignment film 115.
  • the insulating layer 134, the active layer 135, the ohmic contact layer 136, and the second metal layer may be sequentially deposited first, and then the second mask is etched second.
  • the metal layer, the ohmic contact layer 136, and the active layer 135 form a channel for the source 132, the drain 133, and the thin film transistor 114.
  • a protective layer 141 and an alignment film 115 are formed on the ohmic contact layer 136, the source 132, the drain 133, and the pixel electrode 118.
  • FIG. 17 to FIG. 20 are schematic diagrams of another manufacturing process of the color filter array substrate 210 illustrated in FIG. 9 .
  • forming a first metal layer on the transparent substrate 112 and using the third A mask etches the first metal layer to form a scan line SL and a gate 131 of the thin film transistor 114.
  • the scan line SL and the gate 131 belong to the same metal layer.
  • an insulating layer is deposited on the color filter unit 116, the scan line SL, and the gate 131 to form a spacer layer 117 and an insulating layer 134.
  • a transparent conductive layer is deposited, and the transparent conductive layer is formed by a fourth mask (not shown) to form a pixel electrode 118 above the color filter unit 116.
  • the spacer layer 117 is located between the color filter unit 116 and the pixel electrode 118.
  • an active layer 135 and an ohmic contact layer 136 are deposited on the insulating layer 134, and the active layer 135 and the ohmic contact layer 136 are etched by a fifth mask (not shown) to define a thin film transistor. 114 channels.
  • the insulating layer 134, the active layer 135, the ohmic contact layer 136, and the second metal layer may be sequentially deposited first, and then the second mask is etched second.
  • the metal layer, the ohmic contact layer 136, and the active layer 135 form a channel for the source 132, the drain 133, and the thin film transistor 114.
  • a protective layer 141 and an alignment film 115 are formed on the ohmic contact layer 136, the source 132, the drain 133, and the pixel electrode 118.
  • FIG. 21 is a cross-sectional view showing a third embodiment of the liquid crystal display panel 100 of FIG. 1.
  • the transparent substrate of the color filter array substrate 310 of the present embodiment includes a substrate 3121 and an insulating layer 3122.
  • the first recess 121 and the second recess 122 are formed on the insulating layer 3122.
  • the method for fabricating the color filter array substrate 310 of the present embodiment differs from the method for fabricating the color filter array substrate 110 of FIG. 2 in that the insulating layer 3122 is etched by a first mask (not shown) to form The manufacturing process of the first recess 121 and the second recess 122 is the same as that of the color filter array substrate 110 of FIG. 2, and details are not described herein.
  • FIG. 22 is a cross-sectional view showing a fourth embodiment of the liquid crystal display panel 100 of FIG. 1.
  • the transparent substrate of the color filter array substrate 410 of the present embodiment includes a substrate 3121 and an insulating layer 3122 .
  • the first recess 121 and the second recess 122 are formed on the insulating layer 3122.
  • the method for fabricating the color filter array substrate 410 of the present embodiment differs from the method for fabricating the color filter array substrate 210 of FIG. 9 in that the insulating layer 3122 is etched by a first photomask (not shown). The first groove 121 and the second groove 122 are formed. The subsequent fabrication process is the same as that of the color filter array substrate 110 of FIG. 9 and will not be described herein.
  • the color filter array substrate 110/210/310/410 of the present invention etches the first recess 121 on the transparent substrate 112 or the insulating layer 3122 on the substrate 3121, and forms the color filter unit 116 in the first recess 121.
  • Upper, and the pixel electrode 118 is formed on the color filter unit 116. Since the color filter unit 116 is formed on the first recess 121 and the pixel electrode 118 is formed on the color filter unit 116, it is not necessary to form an opening on the protective layer as the drain of the connection thin film transistor and the pixel electrode. 118 used. Therefore, the present invention can omit an etching process for forming openings in the protective layer.
  • the liquid crystal display panel 100 of the present invention additionally etches a second recess 122 on the transparent substrate 112, and the second recess 122 is formed around the substrate 112.
  • the second recess 122 can receive excess sealant or alignment film material to prevent the sealant 117 and the alignment film 115 from overlapping to affect the yield of the liquid crystal display panel 100.
  • the present invention is only described by the liquid crystal panel 100 shown in FIG. 1, and the color filter array substrate 110/210/310/410 is also applied to a white organic electroluminescent device (White).
  • White Organic Light Emtting Diode, WOLED

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Description

彩色滤光阵列基板及其制造方法 技术领域
本发明涉及液晶显示面板及其制造方法，尤其涉及一种彩色滤光阵列基板及其制造方法。
 背景技术
功能先进的显示器渐成为现今消费电子产品的重要特色，其中液晶显示器已经逐渐成为各种电子设备如移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕所广泛应用具有高分辨率彩色屏幕的显示器。
传统的液晶显示面板是由一彩色滤光基板(color filter)、一薄膜晶体管矩阵基板(thin film transistor array substrate, TFT array substrate)以及一配置于此两基板间的液晶层(liquid crystal layer)所构成。然而，此种液晶显示面板的分辨率(resolution)较差、像素(pixel)的开口率较低，且彩色滤光基板与薄膜晶体管矩阵基板接合时容易有对位误差(misalignment)。
近年来，更提出了将彩色滤光层直接整合于薄膜晶体管矩阵基板上的彩色滤光层阵列(Color Filter on Array, COA)基板，将COA基板与另一不具备彩色滤光层的对向基板组立，并于两基板间填入液晶分子，以形成液晶显示面板。由于彩色滤光层是直接形成于薄膜晶体管阵列基板上，因此不会产生对位误差。而且，此种液晶显示面板可具有较佳的分辨率且其像素的开口率也较高。
 技术问题
现今制作的COA基板的工艺流程是先在基板上完成薄膜晶体管矩阵于一基板上；接着依序形成彩色滤光片、透明导电层和配向膜于该基板上以形成该COA基板。然后，将液晶设置在该COA基板上，并将利用该第一基板周围设置的封胶将该对向基板与该COA基板黏合以形成液晶面板。
为了是薄膜晶体管的漏极与该透明导电层导通，需要在覆盖该漏极上的保护层中蚀刻出一开孔，该透明导电层覆盖该开孔，使得该透明导电层在该开孔的位置接触该漏极。然而，为保证液晶面板的显示效果，彩色滤光片的厚度大约是薄膜晶体管的漏极的厚度的十倍，两者的高度差会使得该开孔的侧壁的倾斜角度趋近90度，不利于该透明导电层沉积在该开孔，也使液晶显示面板可能存在静电放电的风险(Electro Static Discharge，ESD)。
 技术解决方案
本发明提供一种彩色滤光阵列基板的制造方法，其包括下列步骤：提供一透明基板；蚀刻所述透明基板以形成一第一凹槽；沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层，以在所述第一凹槽中形成一彩色滤光单元，然后在所述彩色滤光单元之上形成一像素电极；以及形成一薄膜晶体管于所述透明基板之上，使得所述薄膜晶体管连接所述像素电极。
根据本发明的实施例，所述透明基板包括基底及绝缘层，所述蚀刻所述透明基板一形成一第一凹槽具体为：蚀刻所述绝缘层形成所述第一凹槽。
根据本发明的实施例，形成所述薄膜晶体管的步骤包含：形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；沉积一绝缘层在所述透明基板以及所述栅极上；在所述绝缘层上，沉积一主动层以及一欧姆接触层；蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
根据本发明的实施例，形成所述薄膜晶体管的步骤包含：形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；沉积一绝缘层在所述透明基板以及所述栅极上；在所述绝缘层上，依序沉积一主动层、一欧姆接触层以及一第二金属层；蚀刻所述第二金属层以及所述欧姆接触层，以使所述主动层作为所述薄膜晶体管的通道，同时在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
根据本发明的实施例，所述制造方法另包含：在蚀刻所述透明基板的步骤中，同时蚀刻所述透明基板以形成一第二凹槽，其中所述第二凹槽位于所述透明基板的边缘。
本发明另提供一种彩色滤光阵列基板的制造方法，其包括下列步骤：提供一透明基板；蚀刻所述透明基板以形成一第一凹槽；沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层以在所述第一凹槽中形成所述彩色滤光单元；沉积一间隔层于所述彩色滤光层上；沉积所述透明导电层于所述间隔层上，并蚀刻所述透明导电层，以在所述彩色滤光单元的上方形成所述像素电极；以及形成一薄膜晶体管于所述透明基板之上，使得所述薄膜晶体管连接所述像素电极。
根据本发明的实施例，所述透明基板包括基底及绝缘层，所述蚀刻所述透明基板一形成一第一凹槽具体为：蚀刻所述绝缘层形成所述第一凹槽。
根据本发明的实施例，形成所述薄膜晶体管的步骤包含：形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；沉积一绝缘层在所述透明基板以及所述栅极上；在所述绝缘层上，沉积一主动层以及一欧姆接触层；蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
根据本发明的实施例，所述制造方法另包含：在蚀刻所述透明基板的步骤中，同时蚀刻所述透明基板以形成一第二凹槽，其中所述第二凹槽位于所述透明基板的边缘。
根据本发明的实施例，在沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层以在所述第一凹槽中形成所述彩色滤光单元的步骤以及沉积一间隔层于所述彩色滤光层上的步骤之间，另包含：形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；及沉积一绝缘层在所述彩色滤光单元以及所述栅极上。
根据本发明的实施例，形成所述薄膜晶体管的步骤包含：在所述绝缘层上，沉积一主动层以及一欧姆接触层；蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
根据本发明的实施例，形成所述薄膜晶体管的步骤包含：在所述绝缘层上，沉积一主动层、一欧姆接触层及一第二金属层，并蚀刻所述主动层、欧姆接触层及第二金属层，以形成所述薄膜晶体管的通道、源极与漏极，所述漏极连接所述像素电极；以及在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
本发明又提供一种彩色滤光阵列基板，包含：一透明基板，开设一第一凹槽；一薄膜晶体管，设置于所述透明基板上，其包含一栅极、一漏极和一源极；一彩色滤光单元，位于所述第一凹槽上；以及一像素电极，位于所述彩色滤光单元上，耦接至所述薄膜晶体管的漏极。
根据本发明的实施例，所述透明基板包括基底及绝缘层，所述第一凹槽为蚀刻所述绝缘层而形成。
根据本发明的实施例，所述彩色滤光阵列基板另包含一间隔层，设置于所述彩色滤光单元和所述像素电极之间。
根据本发明的实施例，所述彩色滤光阵列基板另包含一第二凹槽，设置于所述透明基板的边缘。
 有益效果
本发明的彩色滤光阵列基板及其制造方法在基板上蚀刻一第一凹槽，并将彩色滤光单元形成于该第一凹槽上，并将像素电极形成在该彩色滤光单元上。由于彩色滤光单元是形成在该第一凹槽上而且该像素电极是形成在该彩色滤光单元上，所以不需要在保护层上形成开孔以作为连接薄膜晶体管的漏极以及像素电极之用。因此本发明可以省去在保护层上形成开孔的蚀刻制程。此外，因为像素电极是位在彩色滤光单元的上方，所以也不存在作为像素电极的透明导电层不易沉积在保护层的开孔的问题，因此可以避免完成后的液晶显示面板可能存在静电放电的风险。此外，本发明的彩色滤光阵列基板另外在透明基板上蚀刻一第二凹槽，该第二凹槽形成于该基板的周围。该第二凹槽可以收容多余的封胶或是配向膜材料，避免封胶和配向膜重叠而影响液晶显示面板的良率。
 附图说明
图1是本发明一实施例的液晶显示面板的示意图。
图2是图1的液晶显示面板的第一实施例的剖面图。
图3~8为图2所示彩色滤光阵列基板的制作过程示意图。
图9是图1的液晶显示面板的第二实施例的剖面图。
图10~16为图9所示彩色滤光阵列基板的制作过程示意图。
图17至图20为图9所述的所示彩色滤光阵列基板的另一制作过程示意图。
图21是图1的液晶显示面板的第三实施例的剖面图。
图22是图1的液晶显示面板的第四实施例的剖面图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「顶」、「底」、「水平」、「垂直」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参阅图1，图1是本发明一实施例的液晶显示面板100的示意图。液晶显示面板100包括多个像素单元101、多条扫描线SL以及多条数据线DL。每一像素单元101包含一薄膜晶体管114及一像素电极118。每一薄膜晶体管114电性连接至一像素电极118、一扫描线SL和一数据线DL。
请参阅图2，图2是图1的液晶显示面板100的第一实施例的剖面图。液晶显示面板100包含一彩色滤光阵列基板110、一液晶层150及一对向基板160，液晶层150位于彩色滤光阵列基板110与对向基板160之间。为简化说明，图2仅绘示一个像素单元101所对应的剖面区域。彩色滤光阵列基板110包含一透明基板112、一薄膜晶体管114、一彩色滤光单元116以及一像素电极118。透明基板112开设第一凹槽121，而彩色滤光单元116设置于第一凹槽121中，用来将背光源(图未示)产生并射入彩色滤光单元116的光线转换成一预设颜色的光线。举例来说，彩色滤光单元116包括红色滤光单元、蓝色滤光单元以及绿色滤光单元，分别用来使通过的光线成为红光、蓝光与绿光。薄膜晶体管114设置于透明基板112上，其包含一栅极131、一源极132和一漏极133。薄膜晶体管114的栅极131耦接至扫描线SL，源极132则耦接至数据线DL。像素电极118位于彩色滤光单元116上，并耦接至薄膜晶体管114的漏极133。当扫描线SL传来的扫描脉冲传送至栅极131时，会导通源极132和漏极133，使得数据线DL传来的数据信号会经过源极132和漏极133而传送至像素电极118。对向基板160包含一黑色阵列层(Black matrix layer)162以及一导电层164。黑色阵列层162设置在薄膜晶体管114的上方，用来阻挡光线。导电层164电性连接到一共电压端(common voltage terminal)，用来接收一固定电压。液晶层150的液晶的转动方向就是依据该数据信号的电平以及导电层164所接收的该固定电压所控制。
彩色滤光阵列基板110另包含一配向膜115和一封胶117。配向膜115用来调整液晶层150的液晶的排列方向。当彩色滤光阵列基板110形成配向膜115之后，会将液晶层150形成在具有配向膜115的彩色滤光阵列基板110上，然后在彩色滤光阵列基板110的四周涂上封胶117。接着利用封胶117将彩色滤光阵列基板110和对向基板160黏合。由于配向膜115是聚酰亚胺(polyimide，PI)液滴扩散后形成的薄膜，所以扩张的配向膜材料有可能会溢出。同样地，封胶117也有可能在彩色滤光阵列基板110和对向基板160黏合时，因为挤压而与配向膜115重叠。因此在本实施例中，彩色滤光阵列基板110另包含一第二凹槽122，设置于透明基板112的边缘。第二凹槽122可以用来收容溢出的配向膜材料或是多余的封胶，用以避免溢出的配向膜材料或是多余的封胶重叠。
请参阅图3~8，图3~8为图2所示彩色滤光阵列基板110的制作过程示意图。
请先参阅图3，首先提供一透明基板112。利用一第一掩膜(图未示)蚀刻透明基板112以形成一第一凹槽121以及一第二凹槽122。第二凹槽122位于透明基板112的边缘。
请参阅图4，接着依序沉积彩色滤光层于透明基板112上，并以第二掩膜(图未示)蚀刻所述彩色滤光层，以在第一凹槽121中形成一彩色滤光单元116，然后在彩色滤光单元116之上形成像素电极118。
请参阅图5，形成一第一金属层于透明基板112上，并利用第三掩膜(图未示)蚀刻所述第一金属层，以形成扫描线SL和薄膜晶体管114的栅极131。扫描线SL与栅极131是属于同一金属层。
请参阅图6，沉积一绝缘层(insulating layer)134于透明基板112以及扫描线SL和栅极131上。接着，在绝缘层134上，沉积一主动层(active layer)135以及一欧姆接触层(n+ layer)136，并利用一第四掩膜(图未示)蚀刻主动层135以及欧姆接触层136，以形成薄膜晶体管114的通道。
请参阅图7，在欧姆接触层136以及绝缘层134上沉积一第二金属层，并以第五掩膜(图未示)蚀刻所述第二金属层，以形成数据线DL，并于欧姆接触层136上形成薄膜晶体管114的源极132与漏极133。漏极133是连接像素电极118。数据线DL与源极132和漏极133是属于同一金属层。
请参阅图8，在欧姆接触层136、源极132、漏极133及像素电极118上沉积一保护层(passivation layer)141。保护层141是用来避免液晶层150(请参见图2)与薄膜晶体管114直接接触。至此，薄膜晶体管114已形成透明基板112之上，使得薄膜晶体管114连接像素电极118。最后，滴上聚酰亚胺液滴。扩散的聚酰亚胺液滴形成配向膜115。本领域的技术人员应可理解其后步骤，故不另赘述于此。
当然，在上述制作过程中，在完成图5所示的制程后，也可以首先依次沉积绝缘层134、主动层135、欧姆接触层136及第二金属层，然后由第四掩膜蚀刻第二金属层、欧姆接触层136及主动层135，以形成源极132、漏极133及薄膜晶体管114的通道。最后，在欧姆接触层136、源极132、漏极133及像素电极118上形成保护层141和配向膜115。
请参阅图9，图9是图1的液晶显示面板100的第二实施例的剖面图。不同于图2的彩色滤光阵列基板110，本实施例的彩色滤光阵列基板210包含设置于彩色滤光单元116和像素电极118之间的间隔层117，用来分隔彩色滤光单元116和像素电极118。
请参阅图10~16，图10~16为图9所示彩色滤光阵列基板210的制作过程示意图。
请先参阅图10，首先提供一透明基板112。利用一第一掩膜(图未示)蚀刻透明基板112以形成一第一凹槽121以及一第二凹槽122。第二凹槽122位于透明基板112的边缘。
请参阅图11，接着沉积彩色滤光层于透明基板112上，并以第二掩膜(图未示)蚀刻所述彩色滤光层，以在第一凹槽121中形成一彩色滤光单元116。
请参阅图12，沉积一间隔层117于彩色滤光单元116上。接着沉积一透明导电层于间隔层117上，并以第三掩膜(图未示)蚀刻间隔层117和所述透明导电层，以在彩色滤光单元116的上方形成一像素电极118。间隔层117是位于彩色滤光单元116和像素电极118之间。
请参阅图13，形成一第一金属层于透明基板112上，并利用第四掩膜(图未示)蚀刻所述第一金属层，以形成扫描线SL和薄膜晶体管114的栅极131。扫描线SL与栅极131是属于同一金属层。
请参阅图14，沉积一绝缘层134于透明基板112以及扫描线SL和栅极131上。然后在绝缘层134上沉积一主动层135以及一欧姆接触层136，并利用一第五掩膜(图未示)蚀刻主动层135以及欧姆接触层136，以定义出薄膜晶体管114的通道。
请参阅图15，于欧姆接触层136以及绝缘层134上沉积一第二金属层，并以第六掩膜(图未示)蚀刻所述第二金属层，以形成数据线DL，并于欧姆接触层136上形成薄膜晶体管114的源极132与漏极133，漏极133是连接像素电极118。数据线DL与源极132和漏极133是属于同一金属层。
请参阅图16，于欧姆接触层136、源极132、漏极133、像素电极118以及绝缘层134上沉积一保护层(passivation layer)141。保护层141是用来隔离液晶层150(请参见图9)与薄膜晶体管114直接接触。至此，薄膜晶体管114已形成透明基板112之上，使得薄膜晶体管114连接像素电极118。最后，滴上聚酰亚胺液滴。扩散的聚酰亚胺液滴形成配向膜115。本领域的技术人员应可理解其后步骤，故不另赘述于此。
当然，在上述制作过程中，在完成图5所示的制程后，也可以首先依次沉积绝缘层134、主动层135、欧姆接触层136及第二金属层，然后由第四掩膜蚀刻第二金属层、欧姆接触层136及主动层135，以形成源极132、漏极133及薄膜晶体管114的通道。最后，在欧姆接触层136、源极132、漏极133及像素电极118上形成保护层141和配向膜115。
请参阅图17至图20，其为图9所述的所示彩色滤光阵列基板210的另一制作过程示意图。
请参阅图17，在第一凹槽121及第二凹槽122，并在第一凹槽121内形成彩色滤光单元116后，形成一第一金属层于透明基板112上，并利用第三掩膜(图未示)蚀刻所述第一金属层，以形成扫描线SL和薄膜晶体管114的栅极131。扫描线SL与栅极131是属于同一金属层。
请参阅图18，在彩色滤光单元116、扫描线SL及栅极131上沉积绝缘层，从而形成间隔层117及绝缘层134。
请参阅图19，沉积一透明导电层，并以第四掩膜(图未示)所述透明导电层，以在彩色滤光单元116的上方形成一像素电极118。间隔层117是位于彩色滤光单元116和像素电极118之间。
请参阅图20，然后在绝缘层134上沉积一主动层135以及一欧姆接触层136，并利用一第五掩膜(图未示)蚀刻主动层135以及欧姆接触层136，以定义出薄膜晶体管114的通道。
该制作过程的后续制程与图15至图16所述的制作过程相同。
当然，在上述制作过程中，在完成图5所示的制程后，也可以首先依次沉积绝缘层134、主动层135、欧姆接触层136及第二金属层，然后由第四掩膜蚀刻第二金属层、欧姆接触层136及主动层135，以形成源极132、漏极133及薄膜晶体管114的通道。最后，在欧姆接触层136、源极132、漏极133及像素电极118上形成保护层141和配向膜115。
请参阅图21，图21是图1的液晶显示面板100的第三实施例的剖面图。不同于图2的彩色滤光阵列基板110，本实施例的彩色滤光阵列基板310的透明基板包含基底3121以及绝缘层3122。第一凹槽121以及第二凹槽122是形成于绝缘层3122上。
本实施例的彩色滤光阵列基板310的制作方法与图2的彩色滤光阵列基板110的制作方法的差别在于：利用第一掩膜（图未示）对所述绝缘层3122进行蚀刻，形成所述第一凹槽121和第二凹槽122，随后的制作过程与图2的彩色滤光阵列基板110的制作方法相同，在此不作赘述。
请参阅图22，图22是图1的液晶显示面板100的第四实施例的剖面图。不同于图9的彩色滤光阵列基板210，本实施例的彩色滤光阵列基板410的透明基板包含基底3121以及绝缘层3122。第一凹槽121以及第二凹槽122是形成于绝缘层3122上。
本实施例的彩色滤光阵列基板410的制作方法与图9的彩色滤光阵列基板210的制作方法的差别在于：利用第一光掩膜（图未示）对所述绝缘层3122进行蚀刻，形成所述第一凹槽121和第二凹槽122。随后的制作过程与图9的彩色滤光阵列基板110的制作方法相同，在此不作赘述。
本发明的彩色滤光阵列基板110/210/310/410在透明基板112或是基底3121上的绝缘层3122上蚀刻第一凹槽121，并将彩色滤光单元116形成于第一凹槽121上，并将像素电极118形成在彩色滤光单元116上。由于彩色滤光单元116是形成在第一凹槽121上而且像素电极118是形成在彩色滤光单元116上，所以不需要在保护层上形成开孔以作为连接薄膜晶体管的漏极以及像素电极118之用。因此本发明可以省去在保护层上形成开孔的蚀刻制程。此外，因为像素电极118是位在彩色滤光单元116的上方，所以也不存在作为像素电极118的透明导电层不易沉积在保护层的开孔的问题，因此可以避免完成后的液晶显示面板100可能存在静电放电的风险。此外，本发明的液晶显示面板100另外在透明基板112上蚀刻一第二凹槽122，第二凹槽122形成于基板112的周围。第二凹槽122可以收容多余的封胶或是配向膜材料，避免封胶117和配向膜115重叠而影响液晶显示面板100的良率。
当然，本发明仅以图1所示的液晶面板100说明，所述彩色滤光阵列基板110/210/310/410也应用于白光有机电致发光器件（White Organic Light Emtting Diode，WOLED）的显示面板中。
综上所述，虽然本发明已以较佳实施例揭示如上，但该较佳实施例并非用以限制本发明，该领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
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  1. 一种彩色滤光阵列基板的制造方法，其包括下列步骤：
    提供一透明基板；
    蚀刻所述透明基板以形成一第一凹槽；
    沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层，以在所述第一凹槽中形成一彩色滤光单元，然后在所述彩色滤光单元之上形成一像素电极；以及
    形成一薄膜晶体管于所述透明基板之上，使得所述薄膜晶体管连接所述像素电极。
  2. 根据权利要求1所述的制造方法，其中所述透明基板包括基底及绝缘层，所述蚀刻所述透明基板一形成一第一凹槽具体为：蚀刻所述绝缘层形成所述第一凹槽。
  3. 根据权利要求1所述的制造方法，其中形成所述薄膜晶体管的步骤包含：
    形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；
    沉积一绝缘层在所述透明基板以及所述栅极上；
    在所述绝缘层上，沉积一主动层以及一欧姆接触层；
    蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；
    在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及
    在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
  4. 根据权利要求1所述的制造方法，其中形成所述薄膜晶体管的步骤包含：
    形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；
    沉积一绝缘层在所述透明基板以及所述栅极上；
    在所述绝缘层上，依序沉积一主动层、一欧姆接触层以及一第二金属层；
    蚀刻所述第二金属层以及所述欧姆接触层，以使所述主动层作为所述薄膜晶体管的通道，同时在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；
    在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
  5. 根据权利要求1所述的制造方法，其中所述制造方法另包含：在蚀刻所述透明基板的步骤中，同时蚀刻所述透明基板以形成一第二凹槽，其中所述第二凹槽位于所述透明基板的边缘。
  6. 一种彩色滤光阵列基板的制造方法，其包括下列步骤：
    提供一透明基板；
    蚀刻所述透明基板以形成一第一凹槽；
    沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层以在所述第一凹槽中形成所述彩色滤光单元；
    沉积一间隔层于所述彩色滤光层上；
    沉积所述透明导电层于所述间隔层上，并蚀刻所述透明导电层，以在所述彩色滤光单元的上方形成所述像素电极；以及
    形成一薄膜晶体管于所述透明基板之上，使得所述薄膜晶体管连接所述像素电极。
  7. 根据权利要求6所述的制造方法，其中所述透明基板包括基底及绝缘层，所述蚀刻所述透明基板一形成一第一凹槽具体为：蚀刻所述绝缘层形成所述第一凹槽。
  8. 根据权利要求6所述的制造方法，其中形成所述薄膜晶体管的步骤包含：
    形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；
    沉积一绝缘层在所述透明基板以及所述栅极上；
    在所述绝缘层上，沉积一主动层以及一欧姆接触层；
    蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；
    在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及
    在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
  9. 根据权利要求6所述的制造方法，其中所述制造方法另包含：在蚀刻所述透明基板的步骤中，同时蚀刻所述透明基板以形成一第二凹槽，其中所述第二凹槽位于所述透明基板的边缘。
  10. 根据权利要求6所述的制造方法，其中在沉积一彩色滤光层于所述透明基板上，并蚀刻所述彩色滤光层以在所述第一凹槽中形成所述彩色滤光单元的步骤以及沉积一间隔层于所述彩色滤光层上的步骤之间，另包含：
    形成一第一金属层于所述透明基板上，并蚀刻所述第一金属层，以形成所述薄膜晶体管的栅极；及
    沉积一绝缘层在所述彩色滤光单元以及所述栅极上。
  11. 根据权利要求10所述的制造方法，其中形成所述薄膜晶体管的步骤包含：
    在所述绝缘层上，沉积一主动层以及一欧姆接触层；
    蚀刻所述主动层以及所述欧姆接触层，以形成所述主动层作为所述薄膜晶体管的通道；
    在所述欧姆接触层以及所述绝缘层上沉积一第二金属层，并蚀刻所述第二金属层，以在所述欧姆接触层上形成所述薄膜晶体管的源极与漏极，所述漏极连接所述像素电极；以及
    在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
  12. 根据权利要求10所述的制造方法，其中形成所述薄膜晶体管的步骤包含：
    在所述绝缘层上，沉积一主动层、一欧姆接触层及一第二金属层，并蚀刻所述主动层、欧姆接触层及第二金属层，以形成所述薄膜晶体管的通道、源极与漏极，所述漏极连接所述像素电极；以及
    在所述源极、漏极、像素电极以及所述绝缘层上沉积一保护层。
  13. 一种彩色滤光阵列基板，包含：
    一透明基板，开设一第一凹槽；
    一薄膜晶体管，设置于所述透明基板上，其包含一栅极、一漏极和一源极；
    一彩色滤光单元，位于所述第一凹槽上；以及
    一像素电极，位于所述彩色滤光单元上，耦接至所述薄膜晶体管的漏极。
  14. 根据权利要求12所述的彩色滤光阵列基板，其中所述透明基板包括基底及绝缘层，所述第一凹槽为蚀刻所述绝缘层而形成。
  15. 根据权利要求12所述的彩色滤光阵列基板，其中所述彩色滤光阵列基板另包含一间隔层，设置于所述彩色滤光单元和所述像素电极之间。
  16. 根据权利要求12所述的彩色滤光阵列基板，其中所述彩色滤光阵列基板另包含一第二凹槽，设置于所述透明基板的边缘。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113947997A (zh) * 2020-07-15 2022-01-18 四川龙华光电薄膜股份有限公司 显示面板及卷轴式显示装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104319277B (zh) * 2014-10-15 2017-02-08 深圳市华星光电技术有限公司 一种coa基板及其制作方法
CN104460093A (zh) * 2014-12-31 2015-03-25 深圳市华星光电技术有限公司 薄膜晶体管阵列基板及其制造方法、显示装置
CN107463036B (zh) * 2017-08-04 2020-04-07 深圳市华星光电半导体显示技术有限公司 阵列基板及显示装置
CN113065445B (zh) * 2021-03-26 2023-04-18 深圳市汇顶科技股份有限公司 指纹识别装置和电子设备
WO2022198681A1 (zh) 2021-03-26 2022-09-29 深圳市汇顶科技股份有限公司 指纹识别装置和电子设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002333616A (ja) * 2001-05-10 2002-11-22 Matsushita Electric Ind Co Ltd アクティブマトリクス型液晶表示装置、その断線救済方法及びそれを用いた画像表示応用装置
CN1506721A (zh) * 2002-12-09 2004-06-23 Lg.������Lcd���޹�˾ 液晶显示器件的阵列基板及其制造方法
CN1716061A (zh) * 2004-06-30 2006-01-04 Lg.菲利浦Lcd株式会社 液晶显示器件及其制造方法
US20080068536A1 (en) * 2006-09-18 2008-03-20 Samsung Electronics Co., Ltd. Thin film transistor substrate, method of manufacturing the same, and liquid crystal display panel having the same
CN100412664C (zh) * 2004-03-30 2008-08-20 乐金显示有限公司 液晶显示器及其制造方法
CN101546084A (zh) * 2008-03-25 2009-09-30 株式会社东芝 显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08146214A (ja) * 1994-09-19 1996-06-07 Canon Inc カラーフィルタの製造方法、カラーフィルタ、液晶パネル、および同液晶パネルを備えた情報処理装置
JP2003177232A (ja) * 2001-10-02 2003-06-27 Seiko Epson Corp カラーフィルタ及びその製造方法及び表示装置並びに電子機器
JP4077182B2 (ja) * 2001-10-11 2008-04-16 株式会社日立製作所 液晶表示装置
TW559896B (en) * 2002-12-17 2003-11-01 Ind Tech Res Inst Method of forming TFT and forming TFT on color filter
KR101192122B1 (ko) * 2005-06-29 2012-10-16 엘지디스플레이 주식회사 컬러필터 어레이 기판 및 그 제조 방법
JP2007127739A (ja) * 2005-11-02 2007-05-24 Sony Corp 表示装置および表示装置の製造方法
KR20090083197A (ko) * 2008-01-29 2009-08-03 삼성전자주식회사 컬러필터기판의 제조 방법

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002333616A (ja) * 2001-05-10 2002-11-22 Matsushita Electric Ind Co Ltd アクティブマトリクス型液晶表示装置、その断線救済方法及びそれを用いた画像表示応用装置
CN1506721A (zh) * 2002-12-09 2004-06-23 Lg.������Lcd���޹�˾ 液晶显示器件的阵列基板及其制造方法
CN100412664C (zh) * 2004-03-30 2008-08-20 乐金显示有限公司 液晶显示器及其制造方法
CN1716061A (zh) * 2004-06-30 2006-01-04 Lg.菲利浦Lcd株式会社 液晶显示器件及其制造方法
US20080068536A1 (en) * 2006-09-18 2008-03-20 Samsung Electronics Co., Ltd. Thin film transistor substrate, method of manufacturing the same, and liquid crystal display panel having the same
CN101546084A (zh) * 2008-03-25 2009-09-30 株式会社东芝 显示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113947997A (zh) * 2020-07-15 2022-01-18 四川龙华光电薄膜股份有限公司 显示面板及卷轴式显示装置

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