WO2013177208A1 - Overlay targets with orthogonal underlayer dummyfill - Google Patents

Overlay targets with orthogonal underlayer dummyfill Download PDF

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Publication number
WO2013177208A1
WO2013177208A1 PCT/US2013/042089 US2013042089W WO2013177208A1 WO 2013177208 A1 WO2013177208 A1 WO 2013177208A1 US 2013042089 W US2013042089 W US 2013042089W WO 2013177208 A1 WO2013177208 A1 WO 2013177208A1
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WO
WIPO (PCT)
Prior art keywords
overlay
pattern elements
target
dummyfill
inactive
Prior art date
Application number
PCT/US2013/042089
Other languages
English (en)
French (fr)
Inventor
Nuriel Amir
Guy Cohen
Vladimir Levinski
Michael Adel
Original Assignee
Kla-Tencor Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kla-Tencor Corporation filed Critical Kla-Tencor Corporation
Priority to CN201380003145.0A priority Critical patent/CN103814429A/zh
Priority to SG2014008841A priority patent/SG2014008841A/en
Priority to KR1020217020062A priority patent/KR102473825B1/ko
Priority to KR1020147016173A priority patent/KR102272361B1/ko
Priority to JP2015514130A priority patent/JP6339067B2/ja
Publication of WO2013177208A1 publication Critical patent/WO2013177208A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70633Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70681Metrology strategies
    • G03F7/70683Mark designs
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/42Alignment or registration features, e.g. alignment marks on the mask substrates

Definitions

  • the present disclosure generally relates to the field of overlay targets for overlay metrology and more particularly to designing and using overlay targets with orthogonal underlayer dummyfill,
  • Overlay metrology is a known technique for determining misalignments or overlay error between patterned device layers, typically by analyzing an overlay "target” or “mark” disposed proximate to one or more device layers of interest. For example, overlay measurements may be performed via test patterns (i.e. one or more overlay target structures) printed together with various patterned device layers on a wafer.
  • An overlay metrology system may include an imaging tool configured to collect image frames that are analyzed by a processing unit to determine a relative displacement or misalignment of the pattern elements making up device and target layers,
  • one or more patterned layers of dummy fill may be disposed upon a substrate to achieve spatial attributes or physical characteristics required under design rules for certain semiconductor manufacturing or testing equipment.
  • pattern elements forming target structures or layers of the metrology target may be constructed from features nominally smaller than a selected segmentation or sub- pattern to improve process compatibility.
  • Some deficiencies In the current state of the art include; dishing within or in the vicinity of the target due to chemical mechanical polishing, etch bias in the vicinity of the target due to incompatible pattern density, subsequent parasitic capacitance in a manufactured device due to design rule violation in the target, lithographic incompatibility of the target resulting in metrology bias in the overlay measurement, and increase in metrology footprint on a reticle and wafer to excessiv target size.
  • the present disclosure is directed to overlay target design including orthogonal underlayer dummyfiJI to cure one or more deficiencies in the current state of the art.
  • the present disclosure is directed to an overiay target including one or more segmented overiay pattern elements forming at least one overiay target structure.
  • the overlay target further includes one or more inactive pattern elements forming at least one dummyfill target structure.
  • Each of the one or more inactive pattern elements may include dummyfili segmented along an axis orthogonal to a segmentation axis of at least one proximately disposed overlay pattern element.
  • each of the target structures or layers may be formed from a separate process layer successively disposed upon a substrate, such as a silicon wafer.
  • the disclosure is directed to an overlay metrology system for performing an overlay measurement on the substrate.
  • the system may included a sample stage configured to support a substrate with an overlay target disposed upon the substrate, the overlay target including one or more segmented overlay pattern elements forming at least one overlay target structure, the overlay target further including one or more inactive pattern elements forming at least one dummyfill target structure, each of the one or more inactive pattern elements including dummyfill segmented along an axis orthogonal to a segmentation axis of at least one proximately disposed overlay pattern element
  • the system may further include at least one illumination soyrce configured to illuminate the overlay target and at least one detector configured to receiv illumination reflected, scattered, or radiated from th overlay target.
  • At least on computing system communicatively coupled to the detector may be configured to determine a misalignment between at least two layers disposed upon the substrate utilizing information (e.g. one or more image frames or contrast data) associated with the illumination reflected, scattered, or radiated from the overlay target in some embodiments, the overlay and dummyfill target structures are twofold o fourfold rotationally symmetric to allow for certain manufacturing or metrology advantages.
  • information e.g. one or more image frames or contrast data
  • the overlay and dummyfill target structures are twofold o fourfold rotationally symmetric to allow for certain manufacturing or metrology advantages.
  • twofold or fourfold rotational symmetry is not required by all applications, such as those employing scatterometry overlay (SCOL) or diffraction based overlay (DBO) metrology targets,
  • the disclosure is directed to a method of performing overlay metrology upon the substrate including at least the following steps: illuminating an overla target disposed upon the substrate, the overlay target including one or more segmented overlay pattern elements forming at least one overlay target structure, the overlay target further including one or more inactive pattern elements forming at least one dummyfill target structure, each of the one or more inactive pattern elements including dummyfill segmented along an axis orthogonal to a segmentation axis of at least one proximately disposed overlay pattern element; detecting illumination reflected, scattered, or radiated from the overlay target; and determining a misalignment between at least two layers disposed upon the substrate utilizing information associated with the detected illumination.
  • FIG. 1A illustrates an overlay target, in accordance with an embodiment of this disclosure
  • FIG. 1 B illustrates a portion of the overiay target wherein a segmentation axis of a dummyfili pattern element is orthogonal to a segmentation axis of an overlay pattern element, in accordance with an embodiment of this disclosure
  • FIG. 2A Illustrates a two/fourfold symmetric overiay target, in accordance with an embodiment of this disclosure
  • FIG. 2B illustrates a dummyfill target structure and an overia target structure of the two/fourfold symmetric overlay target, In accordance with an embodiment of this disclosure
  • FIG. 3A illustrates a two/fourfoid symmetric overiay target, in accordance with an embodiment of this disclosure
  • FIG. 3B illustrates a dummyfiil target structure and an overlay target structure of the two/fourfold symmetric overiay target, In accordance with an embodiment of this disclosure
  • FIG. 4A illustrates a two/fourfoid symmetric overlay target, in accordance with an embodiment of this disclosure
  • FIG. 4B illustrates a dummyfiil target structure and an overiay target structure of the two/fourfold symmetric overlay target wherein each of the target structures includes a plurality of pattern elements, in accordance with an embodiment of this disclosure
  • FIG, 5A illustrates a twofold symmetric overiay target wherein a first portion of overlay pattern elements is printed over dummyfiil according to first exposure, in accordance with an embodiment of this disclosure
  • FIG, SB illustrates the twofold symmetric overlay target wherein a second portion of overlay pattern elements is printed over dummyfill according to a second exposure, in accordance with an embodiment of this disclosure
  • FIG. 6 illustrates an overlay target, in accordanc with an embodiment of this disclosure
  • FIG. ? is a block diagram illustrating an overiay metrology system, in accordance with an embodiment of this disclosure.
  • FIG. 8 is a flow diagram illustrating a method of performing overlay metrology, in accordance with an embodiment of this disclosure.
  • FIGS. 1A throygh 8 generally illustrate the design and use of an overlay with orthogonal underlayer dummyfiil in accordance with various embodiments of this disclosure.
  • US Patent Application Serial No. 13/186,144 at least in part, describes orthogonal alignment of dummyfiil with an overlay target structure disposed below or ove the dummyfiil.
  • US Patent Application Serial No. 12/465,640 describes metrology targets at least partially including dummyfiil, referred to therein as "dummy field.”
  • US Patent Applications Serial No. 13/186,144 and Serial No. 12/455,640 are incorporated by reference, as If entirely set forth herein.
  • FIG. 1A illustrates an overlay metrology target 100 in accordance with an embodiment of this disclosure.
  • the overlay target 100 may include a plurality of target structures.
  • the target structures are manufactured from a separate process layers and successively disposed upon a substrate, such as a silicon wafer.
  • the target 100 may include one or more of inactiv pattern elements 1G2a-102d essentially consisting of segmented dummyfill.
  • the inactive pattern elements 102a-102d may form at least a first "dummyfilP target structure.
  • the target 100 may further include one or more overla pattern elements 104a-104d formed from overlay features known to the art, such as those described or referenced in US Patent Applications Serial No. 13/186,144 and/or Serial Mo. 12/455,840,
  • the overlay pattern elements 104a-104d may form at least a second "overlay" target structure disposed proximate to the dummyfill target structure, For example, the overlay target structure may be subsequently disposed upon the substrate over the dummyfill target structure.
  • the dummyfill target structure may b referred to as a "dummyfill underlayer.”
  • the dummyfill 102a- 102d and/or overlay pattern elements 104a-104d may be segmented according to manufacturing/testing design rules or according to a selected range or selected deviation from design rules. As illustrated by FIG.
  • each dummyfill pattern element 102 may be segmented along a first "dummyfill" segmentation axis 106 that is orthogonal to a second "overlay" segmentation axis 108 corresponding to at least one segmented overlay pattern element 104 disposed above or below the dummyfill pattern element 102. Further, in some embodiments at least a first set of one or more dummyfill pattern elements 102a, 102c is segmented in a direction orthogonal to a segmentation direction of a second set of one or more dummyfill pattern elements 102b, 102d.
  • the segmented dummyfill pattern elements 102 may include dummyfill disposed upon empt regions reserved for pattern elements, such as device or overlay pattern elements, subsequently disposed according to one or more successive process layers of the substrate.
  • the dummyfill pattern elements 102 may further include inner edges (e,g, one or more rectangular apertures) enabling location estimation of at least one overlay or dummyfili pattern element making up a portion of the overlay target 100.
  • each target structure 201 and 203 is twofold or fourfold rotationally symmetric such that the resulting target structure 200 formed from the disposition of the overlay target structure 203 over the dummyfili target structure 201 is correspondingly twofold or fourfold rotationally symmetric, in some embodiments, for example, the target 200 is fourfold rotationally symmetric.
  • each of the dummyfili pattern elements 202a- 202d may include single-axis segmentation dummyfili forming a twofold rotationally symmetric sub-pattern.
  • the dummyfili sub-patterns 202a ⁇ 202d are segmented along a selected axis wherein the size and spacing of the dummyfili segments along the segmentation axis are selected according to spatial or physical characteristics of overlay pattern elements 204a-204d printed over the dummyfili pattern elements 202a -202d.
  • the dummyfili segmentation may be selected according to feature size, spacing, and/or segmentation of the subsequentl printed overlay pattern elements 204a-204d in order to avoid contamination of a metrology signal associated with overlay features disposed upon the substrate orthogonal to th dummyfili segments.
  • pitch and/or feature size of dummyfili segmentation is substantially larger than minimum design rules for an exposure tool, such as a lithographic exposure tool, on which the dummyfili sub-patterns are to be exposed (i,e, printed or disposed upon a surface of the substrate).
  • the oversized segmentation may advantageously reduce pullback (e.g. asymmetric pullback) of line ends.
  • an overlay metrology target 300 ma include single-axis segmented dummyfil pattern elements 302a-302d with proximately disposed overlay pattern elements 304a-304d, whereb th boundaries of the subsequently overlaid sub-patterns are completely within boundaries formed by the dummyfill sub- patterns.
  • FIG, 3B further illustrates a dummyfill target structure 301 formed from the dummyfill pattern elements 302a-302d and an overlay target structure 303 formed from the overlay pattern elements 304a-304d.
  • a selected distance between the boundaries of the dummyfill sub-patterns and the overlaid sub-patterns is greater than a predetermined optical exclusion zone. The distance between the boundaries ma be greater than the predetermined optical exclusion zone only along an axis parallel or an axis perpendicular to the dummyfill segmentation axis, or in both the parallel and perpendicular directions.
  • a twofold/fourfold rotationally symmetric overlay target 400 may include a plurality of overlay and dummyfill sub-patterns in each quadrant.
  • each quadrant of the overlay target 400 may include six dummyfill pattern elements 402a-402d forming a dummyfill target structure 401.
  • Each quadrant may further include five overlay pattern elements 404a-404d forming an overlay target structure 403 disposed on top of the dummyfill target structure 401.
  • a twofold rotationally symmetric overlay target may b similarly designed with a plurality of overlay and dummyfill sub-patterns in each of the to and bottom or left and right halves,
  • portions of the dummyfill or overlay sub-patterns are separately printed upon the substrate In two or more side-by-side exposures.
  • overiay pattern elements 504a and 504b are printed over a dummyfiH underlayer 502a and 502b according to a first expos re ⁇ see FIG. 5A) and a second exposure ⁇ see FIG, 58).
  • the segmented dummyfiH sub-patterns may be printed in separate exposures where there is no exclusion zone between the overlay sub-patterns.
  • the dummyfiH segmentation may be identical for each of the dummyfHI sub-patterns and aligned according to a lithographic overlay tolerance.
  • the overiay target may further include subsequently overlaid segmented dummyfiH sub-patterns with identical segmentatton and in alignment within th Nthographic overlay tolerance.
  • the overlay target 200 may further include overlay sub-patterns 204a-204d and/or dummyfiH sub- patterns 202a-202d having internal edges (i.e. including a rectangular opening or "window") which may foe measured to estimate the location of at least one pattern element defining an overiay or dummyfiH sub-pattern.
  • overlay sub-patterns 204a-204d and/or dummyfiH sub- patterns 202a-202d having internal edges (i.e. including a rectangular opening or "window") which may foe measured to estimate the location of at least one pattern element defining an overiay or dummyfiH sub-pattern.
  • the overlay target 200 may include an arrangement enabling sub-pattern location estimation In a direction parallel and/or perpendicular to a segmentation axis of each overlay or dummyfiH pattern element in some embodiments, the sub-pattern location estimation may be performed onl in a direction perpendicular to dummyfiH segmentation lines to avoid enhanced scanner aberration sensitivity at an edg location, particularly as a function of scanner focus.
  • the sub-pattern location estimation may be performed only in a direction parallel to dummyfiH segmentation lines to avoid design rule violations, po2ij
  • Certain embodiments of the overlay target may be advantageous for specific metrology or process compatibilit requirements, in one embodiment, for example, a fourfold rotationaily symmetric overlay target may include a plurality of layers ⁇ e.g. four layers).
  • Each quadrant of the overlay target may include two segmented dummyftll sub-patterns enabling measurement of overlay along a first axis orthogonal to the dummyfill segmentation.
  • Each quadrant may further includ two segmented overlay sub- patterns subsequently disposed over the dummyfill pattern elements.
  • the overlaid sub-patterns may be arranged to enable measurement of overlay along a second axis orthogonal to the first axis (i.e. axis of measurement for the dummyflii sub-patterns).
  • the overlaid sub-patterns may be arranged to enable measurement of overlay along a second axis parallel to the first axis,
  • each quadrant of a (two layer) fourfold rotationaily symmetric overla target may include a single-axis segmented dummyfill sub-pattern substantially filling the respective quadrant with the exception of an opening ⁇ or window) having internal edges.
  • the inner edges of the opening may be measured for sub-pattern location estimation in a direction parallel to the dummyfill segmentation
  • the target may further include a segmented overlay sub-pattern subsequently disposed over the dummyfill sub-pattern.
  • the overlay sub-pattern may be segmented in accordance with manufacturing design rules. Additionally, edges of the overlay sub-pattern may be measured for sub-pattern location estimation in a direction parallel to the dummyfill segmentation axis.
  • a twofold rotationaily symmetric (four layer) overlay target comprising may include four segmented dummyfill sub-patterns (two in an X direction and two in a Y direction). Each of the dummyfill sub-patterns may b arranged to enable measurement of overlay along a respective measurement axis.
  • the overlay target may furthe include twelve segmented overlay sub-patterns (six in an X direction and six in a Y direction). Each of the overlay sub-patterns subsequently printed over the dummyfill sub-patterns may be arranged to further enable measurement of overlay along a respective measurement axis,
  • segmentation is based upon feature size of device or overlay layers in excess of minimum design rules, thereby increasing the process window of a sub-pattern to be greater than that of the resulting device. Further, the segmentation may b relatively small in comparison to the geometry of the sub-pattern itself. According to various embodiments, a segmented single-axis dummyfill underiayer may cover at least 50% of a process layer to improve metrology performance and process compatibility.
  • FIG. S an overlay metrology target 600 is neither twofold nor fourfold rotationally symmetric as a whole.
  • various portions of the overlay target 600 such individual sub-patterns or groupings of two or more sub-patterns, may be at least twofold symmetric.
  • the overlay target 600 may include a first plurality of overlay pattern elements 602a ⁇ 602d forming a first overlay target structure and a second plurality of overlay pattern elements 604a ⁇ 604d forming a second overla target structure, both target structures successively formed over a dummyfili under layer including orthogonally aligned inactive pattern elements 6Q6a-6Q6d.
  • the dummyfili segmentation i.e. spacing and pitch
  • X first
  • second Y Y
  • the target 600 allows for overlay measurement in a first direction according to a first target structure or layer defined by the first plurality of overlay pattern elements 602a-602d. Further, overlay may be measured in at least a second direction according to a second target structure or layer defined by the second plurality of overlay pattern elements 604a-604d.
  • layers and type e.g. device, dummyfili, or overlay layers
  • FIG. 7 is a block diagram illustrating an overlay metrology system 700 in accordance with an embodiment of this disclosure.
  • the overlay metrology system 700 may include an optical metrology system, such as the systems described or referenced in US Patent Application Serial No, 13/186,144.
  • the system 700 may include at least one illumination source 702 configured to illuminate an overlay metrology target 704 disposed upon a substrate 706, where the overlay target 704 includes a target in accordance with the foregoing embodiments.
  • the substrate 706 may be supported by a sample stage 70S, which may include at least one linear or rotating actuator for translating or rotating the substrate to a selected position.
  • the system may include at least one beam splitter 712 configured to direct illumination emanating from the illumination source 702 along at least a first (object) path to th overlay target 704 and second (reference) path delineated by reference optics 716, such as a reference mirror, illumination reflected, scattered, or radiated from the surface of the substrate 706 including the overlay target 704 may be collected via an objective lens 714 and directed along a collection path to at least one detector 710, At least one computing system 718 in communication with the detector 710 may be configured to collect imaging data associated with the illumination received from the surface of the substrate 706.
  • the computing system 710 may be configured to determine an overlay error or spatial misalignment between at least two layers formed on the substrat 706 utilizing information ⁇ e.g. image frames or contrast data) associated with the imaging data collected for the overlay target 704,
  • the computing system 718 may include, but is not limited to, a personal computing system, mainframe computing system, workstation, image computer, parallel processor, or any other device known in the art.
  • the computing system 718 may include at least one single-core or multiple-core processor configured to execute program instructions 722 from at least one carrier medium 720.
  • FIG. 8 generally illustrates a method 800 of performing overlay metrology in accordance with the overlay metrology system 700. It is recognized, however, that one or more steps of method 800 may be executed via systems or devices varying from the foregoing embodiments of system 700 without departing from the essence of the present disclosure.
  • the method 800 may include at least the following steps.
  • the overlay metrology target 704 disposed upon the substrate 706 is illuminated.
  • illumination reflected, scattered, or radiated by the target is collected via collection optics, such as the objective ierss 714 and directed to at least one imaging detector 710, such as a TDi camera.
  • the imaging data is processed to determine a misalignment between at feast two layers disposed upon the substrate.
  • the imaging data may be processed according to any overlay metrology algorithm known to the art.
  • a spatial comparison between pattern elements forming the target structure and/or patterns formed from device features may be performed to determin a relative displacement (i.e. overlay error).
  • a location of at least one dummyfill pattern element is determined via measurement in a first direction and a location of at least one overlay pattern element subsequentl disposed upon the substrate 706 is determined via measurement in a second direction (e.g. along an axis orthogonal to the first direction). Further, edge locations of overlay or dummyfill sub-patterns segmented both parallel and perpendicular to the direction of measurement may be measured in order to determine a bias of measurement due resulting from the direction of the segmentation.
  • a carrier medium may include a transmission medium such as a wire, cable, or wireless transmission link.
  • the carrier medium may also include a storage medium such as a read-only memory, a random access memory, a magnetic or optical disk, or a magnetic tape,
  • AH of the methods described herein may include storing results of on or mor steps of th method embodiments in a storage medium.
  • the results may Include any of the results described herein and may foe stored in any manner known in the art.
  • the storage medium may include any storage medium described herein or any other suitable storage medium known in the art.
  • the results can be accessed in the storage medium and used b any of th method or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc.
  • the results may be stored "permanently,” “semi-permanently,” temporarily, or for some period of time.
  • the storage medium may be random access memory (RAM), and the results may not necessarily persist indefinitely in the storage medium.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Physical Vapour Deposition (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
PCT/US2013/042089 2012-05-22 2013-05-21 Overlay targets with orthogonal underlayer dummyfill WO2013177208A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201380003145.0A CN103814429A (zh) 2012-05-22 2013-05-21 具有正交底层虚拟填充的叠盖目标
SG2014008841A SG2014008841A (en) 2012-05-22 2013-05-21 Overlay targets with orthogonal underlayer dummyfill
KR1020217020062A KR102473825B1 (ko) 2012-05-22 2013-05-21 직교 하지층 더미필을 갖는 오버레이 타겟
KR1020147016173A KR102272361B1 (ko) 2012-05-22 2013-05-21 직교 하지층 더미필을 갖는 오버레이 타겟
JP2015514130A JP6339067B2 (ja) 2012-05-22 2013-05-21 直交下層ダミーフィルを有するオーバレイターゲット

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261650269P 2012-05-22 2012-05-22
US61/650,269 2012-05-22

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KR (2) KR102272361B1 (ko)
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US10677588B2 (en) * 2018-04-09 2020-06-09 Kla-Tencor Corporation Localized telecentricity and focus optimization for overlay metrology
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KR102566129B1 (ko) * 2022-01-20 2023-08-16 (주) 오로스테크놀로지 모아레 패턴을 형성하는 오버레이 마크, 이를 이용한 오버레이 측정방법, 및 반도체 소자의 제조방법

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