WO2013175795A1 - Varistor and method of manufacturing same - Google Patents

Varistor and method of manufacturing same Download PDF

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Publication number
WO2013175795A1
WO2013175795A1 PCT/JP2013/003274 JP2013003274W WO2013175795A1 WO 2013175795 A1 WO2013175795 A1 WO 2013175795A1 JP 2013003274 W JP2013003274 W JP 2013003274W WO 2013175795 A1 WO2013175795 A1 WO 2013175795A1
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Prior art keywords
varistor
layer
insulating layer
pair
sheet
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PCT/JP2013/003274
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French (fr)
Japanese (ja)
Inventor
清水 基尋
富岡 聡志
吉田 則隆
一郎 亀山
奥田 和弘
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パナソニック株式会社
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Publication of WO2013175795A1 publication Critical patent/WO2013175795A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/1006Thick film varistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/30Apparatus or processes specially adapted for manufacturing resistors adapted for baking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/102Varistor boundary, e.g. surface layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/105Varistor cores
    • H01C7/108Metal oxide
    • H01C7/112ZnO type

Definitions

  • the present invention relates to a varistor suitable for protecting an electronic device from static electricity and a manufacturing method thereof, and more particularly to a varistor functioning as a substrate for mounting an LED (light emitting diode) or a semiconductor.
  • LEDs are being studied for application in many products such as general lighting fixtures, backlights for televisions, strobe light sources for cameras, and the like, and demand is expected to increase in the future. In the future, LEDs are required to have higher brightness and higher output, and at the same time, LED packages are required to further improve heat dissipation.
  • This LED package includes a ceramic substrate made of low-temperature fired glass ceramics (LTCC) and a varistor portion that is simultaneously fired integrally with the ceramic substrate (for example, Patent Document 1).
  • LTCC low-temperature fired glass ceramics
  • the present invention is a varistor excellent in heat dissipation characteristics and a method for manufacturing the same.
  • the varistor of the present invention includes a varistor layer, a pair of internal electrodes, a pair of external electrodes, and a first insulating layer.
  • the varistor layer is mainly composed of zinc oxide, and has a first surface and a second surface opposite to the first surface.
  • the internal electrode is provided inside the varistor layer.
  • the external electrodes are respectively connected to the internal electrodes and provided outside the varistor layer.
  • the first insulating layer is provided on the first surface of the varistor layer and contains garnite as a main component. Thus, it is excellent in heat dissipation by making garnite as a main component at least as the first insulating layer on one surface of the varistor layer.
  • FIG. 1 is a schematic cross-sectional view of a varistor in an embodiment of the present invention.
  • FIG. 2A is a schematic cross-sectional view showing the procedure for manufacturing the varistor in the embodiment of the present invention.
  • FIG. 2B is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2A.
  • FIG. 2C is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2B.
  • FIG. 2D is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2C.
  • FIG. 3 is a characteristic diagram showing the X-ray diffraction measurement result of the first insulating layer in the varistor shown in FIG.
  • FIG. 4 is a graph showing the line distribution of the bismuth element concentration and the manganese element concentration of the first insulating layer and the second varistor layer of the varistor in the present invention.
  • FIG. 1 is a sectional view of the varistor 8.
  • a ceramic substrate in which a varistor function is incorporated in a substrate for mounting an LED such as a semiconductor will be described as an example.
  • the varistor 8 includes a varistor layer 2, a pair of internal electrodes 14, a pair of external electrodes such as a terminal electrode 7 and a main surface electrode 6, and the first insulating layer 1.
  • the varistor layer 2 contains zinc oxide as a main component, and has a first surface 2C and a second surface 2D opposite to the first surface 2C.
  • the internal electrode 14 is provided inside the varistor layer 2.
  • the terminal electrode 7 is connected to the internal electrode 14 and provided outside the varistor layer 2.
  • the first insulating layer 1 is provided on the first surface 2C of the varistor layer 2 and contains garnite as a main component.
  • the first insulating layer 1 has a first surface 1A in contact with the first surface 2C of the varistor layer 2, and a second surface 1B opposite to the first surface 1A.
  • the “main component” in the first insulating layer 1 means that the occupation ratio is 70% by weight or more, and the “main component” in the varistor layer 2 means that the occupation ratio is 80% by weight or more. .
  • the main components of LTCC used in conventional varistors are alumina and a glass component having low thermal conductivity.
  • the thermal conductivity of LTCC is about 2 to 3 W / m ⁇ K.
  • the thermal conductivity of garnite, which is the main component of the first insulating layer 1 is 18 W / m ⁇ K.
  • the varistor layer 2 includes a first varistor layer 2A and a second varistor layer 2B.
  • the first varistor layer 2 ⁇ / b> A is a portion that is sandwiched between the internal electrodes 14 and has a varistor function
  • the second varistor layers 2 ⁇ / b> B are disposed on both surfaces of the first varistor layer 2 ⁇ / b> A via the internal electrodes 14.
  • the second varistor layer 2B is a first varistor layer 2A formed by diffusion of other elements when the varistor layer 2 is integrally fired with a layer made of another material, as will be described later. Inhibits composition change.
  • the first insulating layer 1 is provided on the first surface 2C, which is one of the main surfaces of the varistor layer 2, and the second insulating layer 3 is provided on the second surface 2D, which is the other main surface. That is, the first insulating layer 1 and the second insulating layer 3 sandwich the varistor layer 2. At least a pair of internal electrodes 14 are provided inside the varistor layer 2.
  • Each of the internal electrodes 14 is connected to one of the main surface electrodes 6 disposed on the upper surface of the second insulating layer 3 via a via electrode 5 penetrating the first insulating layer 1, the varistor layer 2, and the second insulating layer 3.
  • the terminal electrode 7 disposed on the lower surface of the first insulating layer 1 is electrically connected.
  • a semiconductor device such as an LED is mounted on the upper surface of the main surface electrode 6, and the terminal electrode 7 functions as an electrode for mounting the varistor 8 on the main substrate.
  • the main surface electrode 6 may be provided on the lower surface of the first insulating layer 1 and the terminal electrode 7 may be provided on the upper surface of the second insulating layer 3, which are not particularly limited.
  • the varistor layer 2 comprises zinc oxide at 80 wt% or more, bismuth oxide as an accessory component at 0.5 wt% or more and 2.1 wt% or less, manganese oxide at 0.4 wt% or more, 0.5 wt% or less, It is formed by mixing and baking antimony oxide in an amount of 1.0 wt% or more and 1.6 wt% or less and cobalt oxide in an amount of 1.0 wt% or more and 1.4 wt% or less.
  • antimony oxide in an amount of 1.0 wt% or more and 1.6 wt% or less
  • cobalt oxide in an amount of 1.0 wt% or more and 1.4 wt% or less.
  • the main component of the first insulating layer 1 can be garnite.
  • the garnite of the first insulating layer 1 has a much higher thermal conductivity than the conventional LTCC, and is advantageous in terms of higher brightness and higher output required for LED lighting and the like in the future.
  • the second insulating layer 3 is preferably composed of, for example, a baked substrate (hereinafter, rigid substrate) mainly composed of alumina.
  • the second insulating layer 3 is preferably configured in the same manner as the first insulating layer 1. That is, the main component of the second insulating layer 3 is preferably garnite. These effects will be described later.
  • a method for manufacturing the varistor 8 will be described with reference to FIGS. 2A to 2D.
  • a hole for forming the via electrode 5 is formed by laser in a rigid substrate 23 mainly composed of alumina to be the second insulating layer 3, and a via electrode paste ( Hereinafter, paste 24 is filled.
  • the varistor sheet 12 slurry is applied by a doctor blade method onto a film of polyethylene terephthalate (PET) or the like and dried to produce the varistor sheet 12.
  • PET polyethylene terephthalate
  • the internal electrode paste 13 is screen-printed on a predetermined number of varistor sheets 12.
  • a hole for forming the via electrode 5 is formed in the varistor sheet 12 by a mechanical puncher method, and the paste 24 is filled in the hole by screen printing. Thereafter, as shown in FIG.
  • the varistor sheet 12 is laminated on the upper surface of the rigid substrate 23 so as to have a predetermined laminated structure. At that time, the paste 24 filled in the rigid substrate 23 and the paste 24 filled in each varistor sheet 12 are arranged so as to be connected.
  • an aluminum oxide powder, a binder resin, a plasticizer, and a solvent are blended and mixed and dispersed to prepare a slurry for the first ceramic sheet 11.
  • the main component of the first ceramic sheet 11 is aluminum oxide, and the blending amount thereof is 80% by weight or more with respect to the total amount of the first ceramic sheet 11.
  • the first ceramic sheet 11 is produced by applying a slurry for the first ceramic sheet 11 on the PET film by a doctor blade method and drying it.
  • a hole for forming the via electrode 5 is formed in the first ceramic sheet 11 by a mechanical puncher method, and a paste 24 is filled in the hole by screen printing.
  • the first ceramic sheets 11 are laminated on the upper surface of the varistor sheet 12 in the laminate shown in FIG. 2B to produce the laminate shown in FIG. 2C.
  • the paste 24 filled in the varistor sheet 12 and the paste 24 filled in the first ceramic sheet 11 are arranged so as to be connected. That is, in this laminated body, the first ceramic sheet 11 is provided on the first surface of the varistor sheet 12, and the rigid substrate 23 is provided on the second surface opposite to the first surface of the varistor sheet 12.
  • the adhesiveness between sheets improves by laminating
  • a terminal electrode paste (hereinafter referred to as paste) 16 is applied to the upper surface of the first ceramic sheet 11 so as to be connected to the end of the paste 24. Further, a main surface electrode paste (hereinafter referred to as paste) 15 is applied to the lower surface of the rigid substrate 23.
  • the pastes 15 and 16 can be applied by screen printing. Note that the pastes 15 and 16 may be applied in advance when the sheet is manufactured before the laminate shown in FIG. 2C is formed.
  • the laminate shown in FIG. 2D is heated to a temperature of about 400 ° C. to 600 ° C. to remove the binder, and then fired at a temperature of 950 ° C. or higher and 1050 ° C. or lower. That is, the laminate of the rigid substrate 23, the varistor sheet 12, the internal electrode paste 13, and the first ceramic sheet 11 is integrally fired at a predetermined temperature. Thereby, as shown in FIG. 1, the 2nd insulating layer 3, the varistor layer 2, a pair of internal electrode 14, and the 1st insulating layer 1 are formed. At that time, the zinc element of zinc oxide contained in the varistor sheet 12 diffuses into the first ceramic sheet 11 and reacts with the aluminum element of aluminum oxide contained in the first ceramic sheet 11 to produce garnite. As a result, the first insulating layer 1 contains garnite as a main component.
  • seat 12 which has a zinc oxide as a main component are integrally baked, a garnite produces
  • the insulating layer 1 can be formed.
  • a further excellent varistor 8 can be produced.
  • terminal electrode 7 and the main surface electrode 6 can also be formed by the plating method after baking the laminated body shown to FIG. 2D.
  • the second insulating layer 3 As described above, by forming the second insulating layer 3 using the rigid substrate 23, it is possible to suppress the shrinkage in the planar direction that occurs when the first ceramic sheet 11 and the varistor sheet 12 are integrally fired. . Therefore, the dimensional accuracy of the varistor 8 can be improved.
  • the varistor sheet 12 is sandwiched between the sheet and the first ceramic sheet 11.
  • the 2nd insulating layer 3 which contains garnite as a main component like the 1st insulating layer 1 can be formed.
  • contraction behavior at the time of baking of the 1st insulating layer 1 and the 2nd insulating layer 3 will be shown. Can be suppressed, which is preferable.
  • the heat conductivity on both surfaces of the varistor layer 2 improves, it is preferable.
  • a plurality of sheets formed in the same manner as the first ceramic sheet 11 are laminated to produce the configuration shown in FIG. 2A. Good.
  • the subcomponent is for causing the varistor layer 2 to function as a varistor and has the following effects.
  • the melting point of bismuth oxide contained in the varistor sheet 12 is about 830 ° C., and if it is a eutectic composition with manganese oxide, a liquid phase is formed at a lower temperature of about 790 ° C. Therefore, when firing at about 1000 ° C., a liquid phase is formed and diffused to the first ceramic sheet 11 that becomes the first insulating layer 1. Due to this diffusion, zinc oxide in the varistor sheet 12 diffuses into the first ceramic sheet 11.
  • seat 11 react, and a garnite is formed. Also, the sinterability of the first insulating layer 1 itself is improved. Thus, the coexistence of manganese oxide and bismuth oxide is preferable because liquid phase formation is promoted and garnite formation is likely to proceed.
  • the first ceramic sheet 11 preferably contains niobium oxide.
  • the first insulating layer 1 preferably contains niobium.
  • the niobium oxide in the first ceramic sheet 11 has an effect of attracting the bismuth element diffused from the varistor sheet 12. Therefore, it indirectly contributes to garnite formation.
  • the total weight of the solid content of the varistor sheet 12 is 100% by weight, 88.4% by weight of the main component zinc oxide, 5.2% by weight of bismuth oxide as subcomponents, and 1.0% of manganese oxide. % By weight, 1.6% by weight of antimony oxide, and 1.9% by weight of cobalt oxide. Furthermore, a binder resin, a plasticizer, and a solvent are mixed and dispersed to prepare a slurry for the varistor sheet 12. This slurry is molded and dried to produce a varistor sheet 12.
  • the ceramic component of the first ceramic sheet 11 is 100% by weight, aluminum oxide is 90.0% by weight, manganese oxide is 2.0% by weight, bismuth oxide is 6.0% by weight, and niobium oxide is 2%. Each is blended at a ratio of 0.0% by weight. Further, a binder resin, a plasticizer, and a solvent are mixed and dispersed to prepare a slurry for the first ceramic sheet 11. The slurry is molded and dried to produce the first ceramic sheet 11.
  • a rigid substrate 23 which is an aluminum oxide substrate, is used, and a varistor sheet 12 and a first ceramic sheet 11 are laminated to produce a laminate shown in FIG. 2C.
  • the thickness of the varistor sheet 12 is 25 ⁇ m
  • the thickness of one of the first ceramic sheets 11 is 40 ⁇ m
  • the thickness of the rigid substrate 23 is 180 ⁇ m.
  • six varistor sheets 12 and one first ceramic sheet 11 are laminated.
  • the breakdown of the six varistor sheets 12 includes two sheets for forming the first varistor layer 2A, two sheets for forming the second varistor layer 2B on the first varistor layer 2A, and the first varistor layer. Two sheets for forming the second varistor layer 2B under 2A.
  • the paste 24 for producing the pair of internal electrodes 14 provided in the varistor sheet 12, the first ceramic sheet 11, and the rigid substrate 23 contains an Ag—Pd alloy in which Ag is 80% and Pd is 20%.
  • pastes 15 and 16 are applied to the laminate, and then the laminate is subjected to binder removal treatment at 600 ° C. for 2 hours, and then fired at 1000 ° C. for 2 hours. In this way, the varistor 8 is manufactured.
  • the vertical and horizontal dimensions of the varistor 8 after firing are 2.0 mm ⁇ 2.0 mm, the thickness of the first insulating layer 1 is 40 ⁇ m, the thickness of the first varistor layer 2A in the varistor layer 2 is 50 ⁇ m, and the second varistor layer 2B The thickness is 50 ⁇ m.
  • FIG. 3 shows the result of X-ray diffraction measurement in the first insulating layer 1.
  • the detection peak is almost garnite (black circle), and other peaks that are thought to be a complex oxide of niobium and bismuth (white circle) are detected.
  • the peak contained in the first insulating layer 1 cannot be detected because the manganese is amorphous with bismuth or the like.
  • the garnite content in the first insulating layer 1 is 100% by weight of the entire first insulating layer 1. 85% by weight.
  • EDS analysis the surface voltage of the entire visual field is analyzed with an acceleration voltage of 30 kV and an observation magnification of 5000 times.
  • the main component of the first ceramic sheet 11 that is the starting material of the first insulating layer 1 is aluminum oxide.
  • the sintering temperature of aluminum oxide is about 1500 ° C.
  • the laminate shown in FIG. 2D is sintered at a temperature of 950 ° C. or higher and 1050 ° C. or lower. Therefore, aluminum oxide does not contribute to the sintering of the first insulating layer 1. Therefore, the mechanical strength of the first insulating layer 1 depends on the amount of garnite produced.
  • the proportion of garnite contained in the first insulating layer 1 depends on the total amount of aluminum oxide contained in the first ceramic sheet 11. Therefore, it is preferable that this aluminum oxide reacts with zinc contained in the second varistor layer 2B and exists as garnite as much as possible.
  • the garnite content is 85% by weight, and if it is about this level, the mechanical strength as the varistor 8 is ensured. Moreover, it has been confirmed that there is no problem even at 80% by weight.
  • the aluminum element is preferably present in the first insulating layer 1 as garnite instead of aluminum oxide.
  • the sinterability of the first insulating layer 1 in the varistor 8 and the elution degree of the first insulating layer 1 by the plating solution when the terminal electrode 7 and the main surface electrode 6 are formed by a plating method are examined. Sinterability and elution degree depend on the thickness of the first insulating layer 1. Therefore, the thickness of the first varistor layer 2A is fixed to 50 ⁇ m, the thickness of the second varistor layer 2B is fixed to 50 ⁇ m, the thickness of the first insulating layer 1 is changed, and the sinterability and the elution degree are measured.
  • the manufacturing method of the varistor 8 is the same as that of the varistor 8 described above.
  • “thickness” means a dimension in a direction perpendicular to the first surface 2 ⁇ / b> C of the varistor layer 2.
  • the varistor 8 having a different thickness of the first insulating layer 1 is sufficiently dried to measure the dry weight, and the dried varistor 8 is defoamed in water. After that, the water content is measured. Then, the difference between the moisture content and the dry weight is calculated as the water absorption rate. Since the water absorption is contrary to the sinterability, it can be determined that the sinterability is high if the water absorption is small.
  • the varistor 8 In order to measure the elution degree of the first insulating layer 1, the varistor 8 after measuring the water absorption rate is immersed in the plating solution for 30 minutes, then washed and dried to measure the weight. Then, the weight loss rate before and after immersion of the plating solution is calculated. The weight loss rate determined in this way is used as an index of elution degree. (Table 1) shows the measurement results.
  • the water absorption rate of a ceramic that has been sufficiently sintered and densified is 0.1% or less. If the water absorption is 0.1% or less, there is no moisture penetration into the interior, and the varistor 8 can be used with sufficiently high reliability. On the other hand, when the water absorption rate exceeds 0.1%, the reliability in a high-temperature and high-humidity environment is a concern. On the other hand, even if the water absorption after firing is 0.1% or less, if the degree of elution into the plating solution, that is, the weight loss rate of the first insulating layer 1 is high, the strength of the first insulating layer 1 decreases during plating. The reliability of the varistor 8 is a concern.
  • the high-reliability varistor 8 can be manufactured.
  • bismuth oxide and manganese oxide contained in the varistor sheet 12 to be the second varistor layer 2B form a liquid phase in the firing process and contribute to densification of the varistor layer 2.
  • the liquid phase diffuses and moves to the first ceramic sheet 11 which becomes the first insulating layer 1 in a state containing the zinc component, and contributes to densification of the first insulating layer 1.
  • the liquid phase diffusing from the varistor sheet 12 to the first ceramic sheet 11 reaches the surface of the first insulating layer 1 in the firing process. do not do. For this reason, it is presumed that the surface layer of the first insulating layer 1 is not sufficiently densified and voids are formed and moisture enters.
  • the thickness of the first insulating layer 1 is less than 25 ⁇ m, the liquid phase that diffuses from the varistor sheet 12 to the first ceramic sheet 11 becomes excessive during the firing process. Therefore, an extreme liquid phase float occurs on the surface of the first insulating layer 1. As a result, this liquid phase is eluted into the plating solution, and the weight loss rate in the first insulating layer 1 is considered to increase.
  • the thickness of the first insulating layer 1 in the direction perpendicular to the first surface 2C of the varistor layer 2 is preferably 25 ⁇ m or more and 65 ⁇ m or less.
  • the lower limit of the thickness of the first insulating layer 1 is a value when the main surface electrode 6 and the terminal electrode 7 are formed by plating. Therefore, when these electrodes are formed by paste printing, the lower limit of the thickness of the first insulating layer 1 may not be this value.
  • the sinterability of the first insulating layer 1 can be evaluated by the concentration distribution of the bismuth element and the manganese element.
  • the bismuth element and the manganese element are uniformly distributed in the first insulating layer 1 so as to have a constant concentration.
  • the concentration of the bismuth element and manganese element on the second surface 1B of the first insulating layer 1 is such that the concentration of bismuth element and manganese element on the first surface 1A of the first insulating layer 1 It is preferable that it is more than the concentration.
  • the liquid phase component contained in the varistor sheet 12 to be the varistor layer 2 crosses the interface between the varistor sheet 12 and the first ceramic sheet 11 and sufficiently reaches the entire first ceramic sheet 11 to ensure sufficient sinterability. Is done. Moreover, garnite is sufficiently formed by zinc diffusion from the varistor sheet 12. As a result, the concentration distribution of bismuth element and manganese element as described above is obtained.
  • FIG. 4 shows the result of line analysis of the line 4-4 in FIG. 1 by wavelength dispersive X-ray spectroscopy (WDS analysis).
  • the analysis target is the sample G in (Table 1).
  • FIG. 4 shows the concentration distribution of bismuth element and manganese element in the first insulating layer 1 and the second varistor layer 2B.
  • the acceleration voltage is 15 kV.
  • the first surface 2C of the varistor layer 2 and the first surface 1A of the first insulating layer 1 are in contact with each other.
  • the first surface 1A (the first surface 1A (the second surface 1B) having a distance of 50 ⁇ m is opposed to and in contact with the first surface 2C of the varistor layer 2 in the first insulating layer 1).
  • Position the concentration of the bismuth element and the manganese element on the second surface 1B is equal to or higher than that on the first surface 1A. Therefore, it can be seen that sufficient sinterability is ensured and garnite is formed in the entire first insulating layer 1.
  • the varistor described above is a ceramic substrate with a built-in varistor function, but the present invention is not limited to this.
  • a chip-type laminated varistor can be applied as a configuration in which the first insulating layer 1 mainly composed of garnite is provided on one surface or both surfaces of the varistor layer 2. That is, the second insulating layer 3 is not necessarily provided. In this case, the main surface electrode 6 may not be provided. That is, the external electrode is an electrode for electrically connecting the varistor 8 to an external substrate or electronic device.
  • a stacked body may be manufactured without the rigid substrate 23 in FIGS. 2A to 2D.
  • the configuration of the external electrode is not limited to the terminal electrode 7 or the main surface electrode 6.
  • the internal electrode 14 may be extended to the side surface of the varistor layer 2 to be partially exposed from the varistor layer 2, and the external electrode may be formed on the exposed portion by plating or the like. In this case, the via electrode 5 is not necessary.
  • the varistor according to the present invention is useful in a semiconductor device or the like, especially in a ceramic substrate or a chip-type multilayer varistor with a built-in varistor of an LED whose brightness and output are increasing.

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  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
  • Thermistors And Varistors (AREA)

Abstract

A varistor has a varistor layer, a pair of internal electrodes, a pair of external electrodes, and a first insulation layer. The varistor layer has zinc oxide as the main component and has a first surface and a second surface opposite the first surface. The internal electrodes are provided within the varistor layer. The external electrodes are respectively connected to the internal electrodes and are provided outside the varistor layer. The first insulation layer is provided on the first surface of the varistor layer and has Gahnite as the main component.

Description

バリスタおよびその製造方法Varistor and manufacturing method thereof
 本発明は電子機器を静電気から保護するのに適したバリスタおよびその製造方法に関し、特に、LED(発光ダイオード)や半導体を搭載するための、基板として機能するバリスタに関する。 The present invention relates to a varistor suitable for protecting an electronic device from static electricity and a manufacturing method thereof, and more particularly to a varistor functioning as a substrate for mounting an LED (light emitting diode) or a semiconductor.
 近年、電子機器の小型化、低消費電力化の急速な進展に伴い、電子機器の回路を構成する各種電子部品の耐電圧は低下してきている。そのため、電子機器の導通部に静電気パルスなどが入ると、各種電子部品、特に半導体デバイスが破壊されやすくなっている。 In recent years, with the rapid progress of miniaturization and low power consumption of electronic devices, the withstand voltage of various electronic components constituting the circuit of electronic devices has been reduced. For this reason, when an electrostatic pulse or the like enters a conduction portion of an electronic device, various electronic components, particularly semiconductor devices, are easily destroyed.
 このような半導体デバイスとして、主としてLEDが挙げられる。LEDは、一般照明器具、テレビなどのバックライト、カメラのストロボ光源等、多くの製品での適用が検討されており、今後も需要が増加していくものと予想される。今後、LEDには高輝度化、高出力化が求められ、同時にLEDパッケージとしては放熱性をさらに向上させることが求められる。 Such semiconductor devices mainly include LEDs. LEDs are being studied for application in many products such as general lighting fixtures, backlights for televisions, strobe light sources for cameras, and the like, and demand is expected to increase in the future. In the future, LEDs are required to have higher brightness and higher output, and at the same time, LED packages are required to further improve heat dissipation.
 このようなLEDパッケージとして、バリスタ部を内蔵し、静電気対策の機能を付与されたモジュールが知られている。このLEDパッケージは、低温焼成ガラスセラミックス(LTCC:Low-temperatureco-fire ceramics)で構成されたセラミック基板と、このセラミック基板と一体に同時焼成されたバリスタ部とを有する(例えば、特許文献1)。 As such an LED package, a module having a built-in varistor part and provided with a function for preventing static electricity is known. This LED package includes a ceramic substrate made of low-temperature fired glass ceramics (LTCC) and a varistor portion that is simultaneously fired integrally with the ceramic substrate (for example, Patent Document 1).
国際公開第2006/106717号International Publication No. 2006/106717
 本発明は放熱特性に優れたバリスタとその製造方法である。本発明のバリスタは、バリスタ層と、一対の内部電極と、一対の外部電極と、第1絶縁層とを有する。バリスタ層は酸化亜鉛を主成分とし、第1面と、この第1面の反対側の第2面とを有する。内部電極はバリスタ層の内部に設けられている。外部電極は内部電極にそれぞれ接続され、バリスタ層の外に設けられている。第1絶縁層はバリスタ層の第1面に設けられ、ガーナイトを主成分とする。このようにバリスタ層の一方の面に少なくとも第1絶縁層としてガーナイトを主たる構成要素とすることにより放熱性に優れる。 The present invention is a varistor excellent in heat dissipation characteristics and a method for manufacturing the same. The varistor of the present invention includes a varistor layer, a pair of internal electrodes, a pair of external electrodes, and a first insulating layer. The varistor layer is mainly composed of zinc oxide, and has a first surface and a second surface opposite to the first surface. The internal electrode is provided inside the varistor layer. The external electrodes are respectively connected to the internal electrodes and provided outside the varistor layer. The first insulating layer is provided on the first surface of the varistor layer and contains garnite as a main component. Thus, it is excellent in heat dissipation by making garnite as a main component at least as the first insulating layer on one surface of the varistor layer.
図1は本発明の実施の形態におけるバリスタの模式断面図である。FIG. 1 is a schematic cross-sectional view of a varistor in an embodiment of the present invention. 図2Aは本発明の実施の形態におけるバリスタの製造手順を示す断面模式図である。FIG. 2A is a schematic cross-sectional view showing the procedure for manufacturing the varistor in the embodiment of the present invention. 図2Bは図2Aに続く製造手順を示す断面模式図である。FIG. 2B is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2A. 図2Cは図2Bに続く製造手順を示す断面模式図である。FIG. 2C is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2B. 図2Dは図2Cに続く製造手順を示す断面模式図である。FIG. 2D is a schematic cross-sectional view showing the manufacturing procedure following FIG. 2C. 図3は図1に示すバリスタにおける第1絶縁層のX線回折測定結果を示す特性図である。FIG. 3 is a characteristic diagram showing the X-ray diffraction measurement result of the first insulating layer in the varistor shown in FIG. 図4は本発明におけるバリスタの第1絶縁層と第2バリスタ層のビスマス元素濃度およびマンガン元素濃度のライン分布を示すグラフである。FIG. 4 is a graph showing the line distribution of the bismuth element concentration and the manganese element concentration of the first insulating layer and the second varistor layer of the varistor in the present invention.
 本発明の実施の形態の説明に先立ち、従来の構成における課題を簡単に説明する。一般にガラス成分の熱伝導率は低い。そのため、従来の構成では、LEDの作動時に発生する熱を十分に放熱することができない。この熱はLEDの作動、さらにはバリスタ特性にも影響を及ぼし、結果としてLEDの信頼性が低下する。 Prior to the description of the embodiment of the present invention, problems in the conventional configuration will be briefly described. Generally, the thermal conductivity of the glass component is low. For this reason, the conventional configuration cannot sufficiently dissipate the heat generated during the operation of the LED. This heat affects the operation of the LED and also the varistor characteristics, and as a result, the reliability of the LED decreases.
 以下、本発明の実施の形態によるバリスタ8について説明する。図1はバリスタ8の断面図である。以下、本実施の形態におけるバリスタ8として、半導体等のLEDを実装するための基板にバリスタ機能が内蔵されたセラミック基板を例に説明する。 Hereinafter, the varistor 8 according to the embodiment of the present invention will be described. FIG. 1 is a sectional view of the varistor 8. Hereinafter, as the varistor 8 in the present embodiment, a ceramic substrate in which a varistor function is incorporated in a substrate for mounting an LED such as a semiconductor will be described as an example.
 バリスタ8は、バリスタ層2と、一対の内部電極14と、一対の外部電極である端子電極7や主面電極6と、第1絶縁層1とを有する。バリスタ層2は酸化亜鉛を主成分とし、第1面2Cと、第1面2Cの反対側の第2面2Dとを有する。内部電極14はバリスタ層2の内部に設けられている。端子電極7は内部電極14にそれぞれ接続され、バリスタ層2の外に設けられている。第1絶縁層1はバリスタ層2の第1面2Cに設けられ、ガーナイトを主成分とする。すなわち、第1絶縁層1は、バリスタ層2の第1面2Cに接する第1面1Aと、第1面1Aの反対側の第2面1Bとを有する。なお第1絶縁層1における「主成分」とは占有率が70重量%以上であることを意味し、バリスタ層2における「主成分」とは占有率が80重量%以上であることを意味する。 The varistor 8 includes a varistor layer 2, a pair of internal electrodes 14, a pair of external electrodes such as a terminal electrode 7 and a main surface electrode 6, and the first insulating layer 1. The varistor layer 2 contains zinc oxide as a main component, and has a first surface 2C and a second surface 2D opposite to the first surface 2C. The internal electrode 14 is provided inside the varistor layer 2. The terminal electrode 7 is connected to the internal electrode 14 and provided outside the varistor layer 2. The first insulating layer 1 is provided on the first surface 2C of the varistor layer 2 and contains garnite as a main component. That is, the first insulating layer 1 has a first surface 1A in contact with the first surface 2C of the varistor layer 2, and a second surface 1B opposite to the first surface 1A. The “main component” in the first insulating layer 1 means that the occupation ratio is 70% by weight or more, and the “main component” in the varistor layer 2 means that the occupation ratio is 80% by weight or more. .
 一般に、従来のバリスタに用いられているLTCCの主成分は、アルミナと熱伝導率の低いガラス成分である。LTCCの熱伝導率は2~3W/m・K程度である。一方、第1絶縁層1の主成分であるガーナイトの熱伝導率は18W/m・Kである。このようにLTCCよりも格段に熱伝導率が高いガーナイトを主成分として含む第1絶縁層1を有することにより、バリスタ8は従来のバリスタよりも放熱性に優れ、信頼性が高い。 Generally, the main components of LTCC used in conventional varistors are alumina and a glass component having low thermal conductivity. The thermal conductivity of LTCC is about 2 to 3 W / m · K. On the other hand, the thermal conductivity of garnite, which is the main component of the first insulating layer 1, is 18 W / m · K. Thus, by having the 1st insulating layer 1 which contains garnite whose thermal conductivity is remarkably higher than LTCC as a main component, the varistor 8 is more excellent in heat dissipation and reliability than the conventional varistor.
 次に、バリスタ8の構成についてさらに説明する。図1に示すように、バリスタ層2は、第1バリスタ層2Aと第2バリスタ層2Bとで構成されている。第1バリスタ層2Aは内部電極14に挟まれバリスタ機能を奏する部分であり、内部電極14を介して第1バリスタ層2Aの両面に第2バリスタ層2Bが配置されている。第2バリスタ層2Bは、第1バリスタ層2Aを保護するのに加えて、後述するように、バリスタ層2を他材料からなる層と一体焼成した際に他元素の拡散による第1バリスタ層2Aの組成変化を抑制する。 Next, the configuration of the varistor 8 will be further described. As shown in FIG. 1, the varistor layer 2 includes a first varistor layer 2A and a second varistor layer 2B. The first varistor layer 2 </ b> A is a portion that is sandwiched between the internal electrodes 14 and has a varistor function, and the second varistor layers 2 </ b> B are disposed on both surfaces of the first varistor layer 2 </ b> A via the internal electrodes 14. In addition to protecting the first varistor layer 2A, the second varistor layer 2B is a first varistor layer 2A formed by diffusion of other elements when the varistor layer 2 is integrally fired with a layer made of another material, as will be described later. Inhibits composition change.
 バリスタ層2の主面の一方である第1面2Cには第1絶縁層1が設けられ、もう一方である第2面2Dには第2絶縁層3が設けられている。すなわち、第1絶縁層1と第2絶縁層3はバリスタ層2を挟み込んでいる。バリスタ層2の内部には少なくとも一対の内部電極14が設けられている。 The first insulating layer 1 is provided on the first surface 2C, which is one of the main surfaces of the varistor layer 2, and the second insulating layer 3 is provided on the second surface 2D, which is the other main surface. That is, the first insulating layer 1 and the second insulating layer 3 sandwich the varistor layer 2. At least a pair of internal electrodes 14 are provided inside the varistor layer 2.
 内部電極14はそれぞれ、第1絶縁層1とバリスタ層2と第2絶縁層3とを貫通するビア電極5を介して、第2絶縁層3の上面に配置された主面電極6の一方と、第1絶縁層1の下面に配置された端子電極7の一方と導通されている。主面電極6の上面にはLED等の半導体デバイスが実装され、端子電極7はバリスタ8をメイン基板に実装するための電極として機能する。なお、第1絶縁層1の下面に主面電極6、第2絶縁層3の上面に端子電極7を設けてもよく、特に限定されるものではない。 Each of the internal electrodes 14 is connected to one of the main surface electrodes 6 disposed on the upper surface of the second insulating layer 3 via a via electrode 5 penetrating the first insulating layer 1, the varistor layer 2, and the second insulating layer 3. The terminal electrode 7 disposed on the lower surface of the first insulating layer 1 is electrically connected. A semiconductor device such as an LED is mounted on the upper surface of the main surface electrode 6, and the terminal electrode 7 functions as an electrode for mounting the varistor 8 on the main substrate. The main surface electrode 6 may be provided on the lower surface of the first insulating layer 1 and the terminal electrode 7 may be provided on the upper surface of the second insulating layer 3, which are not particularly limited.
 バリスタ層2は、酸化亜鉛を80重量%以上、副成分として酸化ビスマスを0.5重量%以上、2.1重量%以下、酸化マンガンを0.4重量%以上、0.5重量%以下、酸化アンチモンを1.0重量%以上、1.6重量%以下、酸化コバルトを1.0重量%以上、1.4重量%以下を混合し焼成して形成されている。この材料組成により優れたバリスタ特性を発揮することができるとともに、第1絶縁層1の主成分をガーナイトにすることができる。具体的には、第1絶縁層1のガーナイトは従来のLTCCよりも格段に熱伝導性が高く、今後LED照明等に求められる高輝度化、高出力化に対して有利な構成である。 The varistor layer 2 comprises zinc oxide at 80 wt% or more, bismuth oxide as an accessory component at 0.5 wt% or more and 2.1 wt% or less, manganese oxide at 0.4 wt% or more, 0.5 wt% or less, It is formed by mixing and baking antimony oxide in an amount of 1.0 wt% or more and 1.6 wt% or less and cobalt oxide in an amount of 1.0 wt% or more and 1.4 wt% or less. With this material composition, excellent varistor characteristics can be exhibited, and the main component of the first insulating layer 1 can be garnite. Specifically, the garnite of the first insulating layer 1 has a much higher thermal conductivity than the conventional LTCC, and is advantageous in terms of higher brightness and higher output required for LED lighting and the like in the future.
 第2絶縁層3は、例えばアルミナを主成分とする焼成済みの基板(以下、リジット基板)で構成することが好ましい。あるいは、第2絶縁層3を、第1絶縁層1と同様に構成することも好ましい。すなわち、第2絶縁層3の主成分はガーナイトであることが好ましい。これらの効果については後述する。 The second insulating layer 3 is preferably composed of, for example, a baked substrate (hereinafter, rigid substrate) mainly composed of alumina. Alternatively, the second insulating layer 3 is preferably configured in the same manner as the first insulating layer 1. That is, the main component of the second insulating layer 3 is preferably garnite. These effects will be described later.
 次に、バリスタ8の製造方法について図2Aから図2Dを参照しながら説明する。まず、図2Aに示すように、第2絶縁層3となるアルミナを主成分とするリジッド基板23にレーザーにてビア電極5を形成するための孔を形成し、この孔にビア電極用ペースト(以下、ペースト)24を充填する。 Next, a method for manufacturing the varistor 8 will be described with reference to FIGS. 2A to 2D. First, as shown in FIG. 2A, a hole for forming the via electrode 5 is formed by laser in a rigid substrate 23 mainly composed of alumina to be the second insulating layer 3, and a via electrode paste ( Hereinafter, paste 24 is filled.
 次に、酸化亜鉛、酸化ビスマス、酸化マンガンおよび酸化アンチモン、さらにバインダ樹脂、可塑剤、および溶剤を配合した後に、混合分散してバリスタシート12用のスラリーを作製する。次いで、ドクターブレード法によって、ポリエチレンテレフタレート(PET)等のフィルム上に上記バリスタシート12用のスラリーを塗布、乾燥してバリスタシート12を作製する。その際、バリスタシート12の所定枚数に内部電極用ペースト13をスクリーン印刷しておく。バリスタシート12にはビア電極5を形成するための孔をメカニカルパンチャー法にて形成してこの孔にペースト24をスクリーン印刷により充填する。その後、図2Bに示すように、リジッド基板23の上面にバリスタシート12を所定の積層構造となるよう積層する。その際、リジッド基板23に充填されたペースト24と、各バリスタシート12に充填されたペースト24とが繋がるように配置する。 Next, zinc oxide, bismuth oxide, manganese oxide and antimony oxide, a binder resin, a plasticizer, and a solvent are blended, and then mixed and dispersed to prepare a slurry for the varistor sheet 12. Next, the varistor sheet 12 slurry is applied by a doctor blade method onto a film of polyethylene terephthalate (PET) or the like and dried to produce the varistor sheet 12. At that time, the internal electrode paste 13 is screen-printed on a predetermined number of varistor sheets 12. A hole for forming the via electrode 5 is formed in the varistor sheet 12 by a mechanical puncher method, and the paste 24 is filled in the hole by screen printing. Thereafter, as shown in FIG. 2B, the varistor sheet 12 is laminated on the upper surface of the rigid substrate 23 so as to have a predetermined laminated structure. At that time, the paste 24 filled in the rigid substrate 23 and the paste 24 filled in each varistor sheet 12 are arranged so as to be connected.
 次に、酸化アルミニウム粉末と、バインダ樹脂、可塑剤、および溶剤とを配合し、混合分散して第1セラミックシート11用のスラリーを作製する。第1セラミックシート11の主成分は酸化アルミニウムであり、その配合量は第1セラミックシート11の総量に対して80重量%以上とする。次いで、ドクターブレード法によって、PETフィルム上に第1セラミックシート11用のスラリーを塗布、乾燥して第1セラミックシート11を作製する。またバリスタシート12と同様に、第1セラミックシート11にはビア電極5を形成するための孔をメカニカルパンチャー法にて形成し、この孔にペースト24をスクリーン印刷により充填する。その後、図2Bに示す積層体におけるバリスタシート12の上面に、第1セラミックシート11を所定枚数積層して、図2Cに示す積層体を作製する。その際、バリスタシート12に充填されたペースト24と第1セラミックシート11に充填されたペースト24とが繋がるように配置する。すなわち、この積層体において、第1セラミックシート11はバリスタシート12の第1面に設けられ、リジッド基板23はバリスタシート12の第1面の反対側の第2面に設けられている。なお、第1セラミックシート11とバリスタシート12とを加熱しながら積層することにより、シート間の密着性が向上するため好ましい。 Next, an aluminum oxide powder, a binder resin, a plasticizer, and a solvent are blended and mixed and dispersed to prepare a slurry for the first ceramic sheet 11. The main component of the first ceramic sheet 11 is aluminum oxide, and the blending amount thereof is 80% by weight or more with respect to the total amount of the first ceramic sheet 11. Next, the first ceramic sheet 11 is produced by applying a slurry for the first ceramic sheet 11 on the PET film by a doctor blade method and drying it. Similarly to the varistor sheet 12, a hole for forming the via electrode 5 is formed in the first ceramic sheet 11 by a mechanical puncher method, and a paste 24 is filled in the hole by screen printing. Thereafter, a predetermined number of the first ceramic sheets 11 are laminated on the upper surface of the varistor sheet 12 in the laminate shown in FIG. 2B to produce the laminate shown in FIG. 2C. At that time, the paste 24 filled in the varistor sheet 12 and the paste 24 filled in the first ceramic sheet 11 are arranged so as to be connected. That is, in this laminated body, the first ceramic sheet 11 is provided on the first surface of the varistor sheet 12, and the rigid substrate 23 is provided on the second surface opposite to the first surface of the varistor sheet 12. In addition, since the adhesiveness between sheets improves by laminating | stacking the 1st ceramic sheet | seat 11 and the varistor sheet | seat 12, it is preferable.
 次に、図2Dに示すように、ペースト24の端部と接続するように、第1セラミックシート11の上面に端子電極用ペースト(以下、ペースト)16を塗布する。また、リジッド基板23の下面に主面電極用ペースト(以下、ペースト)15を塗布する。ペースト15、16はスクリーン印刷法にて塗布することができる。なおペースト15、16は図2Cに示す積層体を形成する前のシート作製時に予め塗布しておいてもよい。 Next, as shown in FIG. 2D, a terminal electrode paste (hereinafter referred to as paste) 16 is applied to the upper surface of the first ceramic sheet 11 so as to be connected to the end of the paste 24. Further, a main surface electrode paste (hereinafter referred to as paste) 15 is applied to the lower surface of the rigid substrate 23. The pastes 15 and 16 can be applied by screen printing. Note that the pastes 15 and 16 may be applied in advance when the sheet is manufactured before the laminate shown in FIG. 2C is formed.
 次いで、図2Dに示す積層体を400℃~600℃程度の温度に昇温して脱バインダした後、950℃以上、1050℃以下の温度で焼成する。すなわち、リジッド基板23と、バリスタシート12と、内部電極用ペースト13と、第1セラミックシート11との積層体を所定の温度で一体焼成する。これにより、図1に示すように、第2絶縁層3と、バリスタ層2と、一対の内部電極14と、第1絶縁層1とが形成される。その際、バリスタシート12に含まれる酸化亜鉛の亜鉛元素が第1セラミックシート11に拡散して、第1セラミックシート11に含まれる酸化アルミニウムのアルミニウム元素と反応して、ガーナイトが生成する。その結果、第1絶縁層1は主成分としてガーナイトを含む。 Next, the laminate shown in FIG. 2D is heated to a temperature of about 400 ° C. to 600 ° C. to remove the binder, and then fired at a temperature of 950 ° C. or higher and 1050 ° C. or lower. That is, the laminate of the rigid substrate 23, the varistor sheet 12, the internal electrode paste 13, and the first ceramic sheet 11 is integrally fired at a predetermined temperature. Thereby, as shown in FIG. 1, the 2nd insulating layer 3, the varistor layer 2, a pair of internal electrode 14, and the 1st insulating layer 1 are formed. At that time, the zinc element of zinc oxide contained in the varistor sheet 12 diffuses into the first ceramic sheet 11 and reacts with the aluminum element of aluminum oxide contained in the first ceramic sheet 11 to produce garnite. As a result, the first insulating layer 1 contains garnite as a main component.
 このように、酸化アルミニウム粉末を主成分とする第1セラミックシート11と、酸化亜鉛を主成分とするバリスタシート12とを一体に焼成することで、ガーナイトが生成し、熱伝導率の高い第1絶縁層1を形成することができる。加えて上述したように第2絶縁層3を設けることで、さらに優れたバリスタ8を作製することができる。 Thus, the 1st ceramic sheet | seat 11 which has an aluminum oxide powder as a main component, and the varistor sheet | seat 12 which has a zinc oxide as a main component are integrally baked, a garnite produces | generates and 1st with high heat conductivity. The insulating layer 1 can be formed. In addition, by providing the second insulating layer 3 as described above, a further excellent varistor 8 can be produced.
 なお、端子電極7、主面電極6は、図2Dに示す積層体の焼成後にめっき法で形成することもできる。 In addition, the terminal electrode 7 and the main surface electrode 6 can also be formed by the plating method after baking the laminated body shown to FIG. 2D.
 以上のように、リジッド基板23を用いて第2絶縁層3を形成することにより、第1セラミックシート11およびバリスタシート12と一体同時焼成する際に発生する平面方向の収縮を抑制することができる。そのため、バリスタ8の寸法精度を向上することができる。 As described above, by forming the second insulating layer 3 using the rigid substrate 23, it is possible to suppress the shrinkage in the planar direction that occurs when the first ceramic sheet 11 and the varistor sheet 12 are integrally fired. . Therefore, the dimensional accuracy of the varistor 8 can be improved.
 また、第1セラミックシート11と同様に、酸化アルミニウム粉末とバインダ樹脂、可塑剤および溶剤とで構成されたシートを作製し、このシートと、第1セラミックシート11とでバリスタシート12を挟み込んだ構成で、一体同時焼成してもよい。これにより、第1絶縁層1と同様に主成分とてガーナイトを含む第2絶縁層3を形成することができる。このように、第1絶縁層1と第2絶縁層3とが、供にガーナイトを主成分として含むと、第1絶縁層1と第2絶縁層3との焼成時の収縮挙動の違いによる反りを抑制することができるため好ましい。またバリスタ層2の両面での熱伝導性が向上するため好ましい。なお、この場合には、例えば、リジッド基板23を用いる代わりに、第1セラミックシート11と同様に形成したシートを複数枚積層して、図2Aに示す構成を作製し、以下、同様にすればよい。 Similarly to the first ceramic sheet 11, a sheet composed of an aluminum oxide powder and a binder resin, a plasticizer and a solvent is produced, and the varistor sheet 12 is sandwiched between the sheet and the first ceramic sheet 11. Thus, it may be integrally fired simultaneously. Thereby, the 2nd insulating layer 3 which contains garnite as a main component like the 1st insulating layer 1 can be formed. Thus, when the 1st insulating layer 1 and the 2nd insulating layer 3 contain garnite as a main component, the curvature by the difference in the shrinkage | contraction behavior at the time of baking of the 1st insulating layer 1 and the 2nd insulating layer 3 will be shown. Can be suppressed, which is preferable. Moreover, since the heat conductivity on both surfaces of the varistor layer 2 improves, it is preferable. In this case, for example, instead of using the rigid substrate 23, a plurality of sheets formed in the same manner as the first ceramic sheet 11 are laminated to produce the configuration shown in FIG. 2A. Good.
 次にバリスタ層2を形成するためのバリスタシート12における副成分について具体的に説明する。上記副成分はバリスタ層2をバリスタとして機能させるためのものであるとともに、以下の効果を有する。バリスタシート12に含有されている酸化ビスマスの融点は約830℃であり、酸化マンガンとの共晶組成であればさらに低温の790℃程度で液相を形成する。したがって、1000℃程度の焼成時には液相を形成して第1絶縁層1となる第1セラミックシート11へ拡散する。この拡散によって、バリスタシート12における酸化亜鉛が第1セラミックシート11に拡散する。そして、第1セラミックシート11の酸化アルミニウムと酸化亜鉛とが反応してガーナイトが形成される。また、第1絶縁層1自体の焼結性も向上する。このように、酸化マンガンと酸化ビスマスが共存することで液相形成が促進され、ガーナイトの形成が進行しやすいため好ましい。 Next, the subcomponents in the varistor sheet 12 for forming the varistor layer 2 will be specifically described. The subcomponent is for causing the varistor layer 2 to function as a varistor and has the following effects. The melting point of bismuth oxide contained in the varistor sheet 12 is about 830 ° C., and if it is a eutectic composition with manganese oxide, a liquid phase is formed at a lower temperature of about 790 ° C. Therefore, when firing at about 1000 ° C., a liquid phase is formed and diffused to the first ceramic sheet 11 that becomes the first insulating layer 1. Due to this diffusion, zinc oxide in the varistor sheet 12 diffuses into the first ceramic sheet 11. And the aluminum oxide and zinc oxide of the 1st ceramic sheet | seat 11 react, and a garnite is formed. Also, the sinterability of the first insulating layer 1 itself is improved. Thus, the coexistence of manganese oxide and bismuth oxide is preferable because liquid phase formation is promoted and garnite formation is likely to proceed.
 また、第1セラミックシート11には酸化ニオブが含まれることが好ましい。結果として、第1絶縁層1にはニオブが含まれることが好ましい。第1セラミックシート11の酸化ニオブはバリスタシート12から拡散するビスマス元素を引き付ける効果がある。そのため、間接的にガーナイト形成に寄与する。 The first ceramic sheet 11 preferably contains niobium oxide. As a result, the first insulating layer 1 preferably contains niobium. The niobium oxide in the first ceramic sheet 11 has an effect of attracting the bismuth element diffused from the varistor sheet 12. Therefore, it indirectly contributes to garnite formation.
 以下、具体的な例を用いて、本実施の形態による効果を説明する。 Hereinafter, the effects of the present embodiment will be described using specific examples.
 まず、バリスタシート12の固形分の全重量を100重量%としたときに、主成分の酸化亜鉛を88.4重量%、副成分として酸化ビスマスを5.2重量%、酸化マンガンを1.0重量%、酸化アンチモンを1.6重量%、酸化コバルトを1.9重量%の割合でそれぞれ配合する。さらにバインダ樹脂、可塑剤、および溶剤を混合分散してバリスタシート12用のスラリーを調製する。このスラリーを成型して乾燥し、バリスタシート12を作製する。 First, when the total weight of the solid content of the varistor sheet 12 is 100% by weight, 88.4% by weight of the main component zinc oxide, 5.2% by weight of bismuth oxide as subcomponents, and 1.0% of manganese oxide. % By weight, 1.6% by weight of antimony oxide, and 1.9% by weight of cobalt oxide. Furthermore, a binder resin, a plasticizer, and a solvent are mixed and dispersed to prepare a slurry for the varistor sheet 12. This slurry is molded and dried to produce a varistor sheet 12.
 同様に第1セラミックシート11のセラミック成分を100重量%としたときに、酸化アルミニウムを90.0重量%、酸化マンガンを2.0重量%、酸化ビスマスを6.0重量%、酸化ニオブを2.0重量%の割合でそれぞれ配合する。さらにバインダ樹脂、可塑剤、および溶剤を混合分散して第1セラミックシート11用のスラリーを作製する。このスラリーを成型して乾燥し、第1セラミックシート11を作製する。 Similarly, when the ceramic component of the first ceramic sheet 11 is 100% by weight, aluminum oxide is 90.0% by weight, manganese oxide is 2.0% by weight, bismuth oxide is 6.0% by weight, and niobium oxide is 2%. Each is blended at a ratio of 0.0% by weight. Further, a binder resin, a plasticizer, and a solvent are mixed and dispersed to prepare a slurry for the first ceramic sheet 11. The slurry is molded and dried to produce the first ceramic sheet 11.
 第2絶縁層3としては、酸化アルミニウム基板であるリジッド基板23を用い、バリスタシート12、第1セラミックシート11を積層し、図2Cに示す積層体を作製する。なお、バリスタシート12の厚さは25μm、第1セラミックシート11の1枚の厚さは40μm、リジッド基板23の厚さは180μmである。積層体を形成するために、バリスタシート12を6枚、第1セラミックシート11を1枚積層する。6枚のバリスタシート12の内訳は、第1バリスタ層2Aを形成するための2枚と、第1バリスタ層2Aの上に第2バリスタ層2Bを形成するための2枚と、第1バリスタ層2Aの下に第2バリスタ層2Bを形成するための2枚である。 As the second insulating layer 3, a rigid substrate 23, which is an aluminum oxide substrate, is used, and a varistor sheet 12 and a first ceramic sheet 11 are laminated to produce a laminate shown in FIG. 2C. The thickness of the varistor sheet 12 is 25 μm, the thickness of one of the first ceramic sheets 11 is 40 μm, and the thickness of the rigid substrate 23 is 180 μm. In order to form a laminated body, six varistor sheets 12 and one first ceramic sheet 11 are laminated. The breakdown of the six varistor sheets 12 includes two sheets for forming the first varistor layer 2A, two sheets for forming the second varistor layer 2B on the first varistor layer 2A, and the first varistor layer. Two sheets for forming the second varistor layer 2B under 2A.
 バリスタシート12、第1セラミックシート11、リジッド基板23内に設ける一対の内部電極14を作製するためのペースト24は、Agが80%、Pdが20%のAg-Pd合金を含んでいる。 The paste 24 for producing the pair of internal electrodes 14 provided in the varistor sheet 12, the first ceramic sheet 11, and the rigid substrate 23 contains an Ag—Pd alloy in which Ag is 80% and Pd is 20%.
 次に、図2Dに示すように、この積層体にペースト15、16を塗布し、次いで、積層体を600℃、2時間で脱バインダ処理し、その後1000℃にて2時間、焼成する。このようにしてバリスタ8を作製する。 Next, as shown in FIG. 2D, pastes 15 and 16 are applied to the laminate, and then the laminate is subjected to binder removal treatment at 600 ° C. for 2 hours, and then fired at 1000 ° C. for 2 hours. In this way, the varistor 8 is manufactured.
 焼成後のバリスタ8の縦横の寸法は2.0mm×2.0mmであり、第1絶縁層1の厚みは40μm、バリスタ層2における第1バリスタ層2Aの厚みは50μm、第2バリスタ層2Bの厚みは50μmである。 The vertical and horizontal dimensions of the varistor 8 after firing are 2.0 mm × 2.0 mm, the thickness of the first insulating layer 1 is 40 μm, the thickness of the first varistor layer 2A in the varistor layer 2 is 50 μm, and the second varistor layer 2B The thickness is 50 μm.
 図3に第1絶縁層1におけるX線回折測定結果を示す。検出ピークはほぼガーナイト(黒丸)となっており、その他にニオブとビスマスの複合酸化物(白丸)と思われるピークが検出されている。なお、第1絶縁層1に含まれるマンガンはビスマス等と非晶質を形成していることによりピークが検出できないものと推測される。 FIG. 3 shows the result of X-ray diffraction measurement in the first insulating layer 1. The detection peak is almost garnite (black circle), and other peaks that are thought to be a complex oxide of niobium and bismuth (white circle) are detected. In addition, it is estimated that the peak contained in the first insulating layer 1 cannot be detected because the manganese is amorphous with bismuth or the like.
 また、第1絶縁層1の表面におけるエネルギー分散型X線分析(EDS分析)を行った結果、第1絶縁層1におけるガーナイトの含有率は第1絶縁層1の全体を100重量%とした場合に85重量%である。なおEDS分析では、加速電圧を30kV、観察倍率を5000倍とし、全視野の面分析を実施している。 In addition, as a result of performing energy dispersive X-ray analysis (EDS analysis) on the surface of the first insulating layer 1, the garnite content in the first insulating layer 1 is 100% by weight of the entire first insulating layer 1. 85% by weight. In the EDS analysis, the surface voltage of the entire visual field is analyzed with an acceleration voltage of 30 kV and an observation magnification of 5000 times.
 第1絶縁層1の出発材料である第1セラミックシート11の主成分は酸化アルミニウムである。酸化アルミニウムの焼結温度は1500℃程度である。しかしながら、前述のように図2Dに示す積層体は950℃以上、1050℃以下の温度で焼結される。そのため、酸化アルミニウムは第1絶縁層1の焼結に寄与しない。したがって、第1絶縁層1の機械的強度はガーナイトの生成量に依存する。 The main component of the first ceramic sheet 11 that is the starting material of the first insulating layer 1 is aluminum oxide. The sintering temperature of aluminum oxide is about 1500 ° C. However, as described above, the laminate shown in FIG. 2D is sintered at a temperature of 950 ° C. or higher and 1050 ° C. or lower. Therefore, aluminum oxide does not contribute to the sintering of the first insulating layer 1. Therefore, the mechanical strength of the first insulating layer 1 depends on the amount of garnite produced.
 第1絶縁層1に含まれるガーナイトの割合は、第1セラミックシート11に含まれる酸化アルミニウムの総量に依存する。したがって、この酸化アルミニウムが第2バリスタ層2Bに含まれる亜鉛と反応し、可能な限りガーナイトとして存在することが好ましい。上記の例ではガーナイトの含有率は85重量%であり、この程度であればバリスタ8としての機械的強度は確保される。また80重量%でも問題ないことを確認している。しかしながら理想的には、アルミニウム元素は第1絶縁層1中で酸化アルミニウムではなく、ガーナイトとして存在することが好ましい。 The proportion of garnite contained in the first insulating layer 1 depends on the total amount of aluminum oxide contained in the first ceramic sheet 11. Therefore, it is preferable that this aluminum oxide reacts with zinc contained in the second varistor layer 2B and exists as garnite as much as possible. In the above example, the garnite content is 85% by weight, and if it is about this level, the mechanical strength as the varistor 8 is ensured. Moreover, it has been confirmed that there is no problem even at 80% by weight. Ideally, however, the aluminum element is preferably present in the first insulating layer 1 as garnite instead of aluminum oxide.
 次に、バリスタ8における第1絶縁層1の焼結性と、端子電極7および主面電極6をめっき法で形成した際のめっき液による第1絶縁層1の溶出度について検討している。焼結性および溶出度は第1絶縁層1の厚みに依存する。そのため、第1バリスタ層2Aの厚みを50μm、第2バリスタ層2Bの厚みを50μmと固定し、第1絶縁層1の厚みを変えて、焼結性と溶出度を測定している。なお、バリスタ8の製造方法は上述のバリスタ8と同様である。ここで、「厚み」とは、バリスタ層2の第1面2Cに垂直な方向における寸法を意味する。 Next, the sinterability of the first insulating layer 1 in the varistor 8 and the elution degree of the first insulating layer 1 by the plating solution when the terminal electrode 7 and the main surface electrode 6 are formed by a plating method are examined. Sinterability and elution degree depend on the thickness of the first insulating layer 1. Therefore, the thickness of the first varistor layer 2A is fixed to 50 μm, the thickness of the second varistor layer 2B is fixed to 50 μm, the thickness of the first insulating layer 1 is changed, and the sinterability and the elution degree are measured. The manufacturing method of the varistor 8 is the same as that of the varistor 8 described above. Here, “thickness” means a dimension in a direction perpendicular to the first surface 2 </ b> C of the varistor layer 2.
 第1絶縁層1の焼結性を測定するためには、第1絶縁層1の厚みが異なるバリスタ8を十分に乾燥して乾燥重量を測定し、乾燥後のバリスタ8を水中で脱泡処理した後の含水重量を測定する。そして、含水重量と乾燥重量との差を吸水率として算出する。吸水率は焼結性と相反するため、吸水率が小さいと焼結性が高いと判断できる。 In order to measure the sinterability of the first insulating layer 1, the varistor 8 having a different thickness of the first insulating layer 1 is sufficiently dried to measure the dry weight, and the dried varistor 8 is defoamed in water. After that, the water content is measured. Then, the difference between the moisture content and the dry weight is calculated as the water absorption rate. Since the water absorption is contrary to the sinterability, it can be determined that the sinterability is high if the water absorption is small.
 第1絶縁層1の溶出度を測定するためには、吸水率測定後のバリスタ8をメッキ液に30分浸漬し、その後、洗浄、乾燥して重量を測定する。そして、メッキ液浸漬前後の減量率を算出する。このようにして求めた減量率を溶出度の指標とする。(表1)に測定結果を示す。 In order to measure the elution degree of the first insulating layer 1, the varistor 8 after measuring the water absorption rate is immersed in the plating solution for 30 minutes, then washed and dried to measure the weight. Then, the weight loss rate before and after immersion of the plating solution is calculated. The weight loss rate determined in this way is used as an index of elution degree. (Table 1) shows the measurement results.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 一般的に、十分に焼結し緻密化したセラミックスの吸水率は0.1%以下である。吸水率が0.1%以下であれば内部への水分侵入は無く、十分に信頼性の高いバリスタ8として使用することができる。一方、吸水率が0.1%を超える場合、高温高湿環境下での信頼性が危惧される。一方、焼成後の吸水率が0.1%以下であっても、メッキ液への溶出度、すなわち第1絶縁層1の減量率が高ければ、メッキ時に第1絶縁層1の強度が低下し、バリスタ8の信頼性が危惧される。 Generally, the water absorption rate of a ceramic that has been sufficiently sintered and densified is 0.1% or less. If the water absorption is 0.1% or less, there is no moisture penetration into the interior, and the varistor 8 can be used with sufficiently high reliability. On the other hand, when the water absorption rate exceeds 0.1%, the reliability in a high-temperature and high-humidity environment is a concern. On the other hand, even if the water absorption after firing is 0.1% or less, if the degree of elution into the plating solution, that is, the weight loss rate of the first insulating layer 1 is high, the strength of the first insulating layer 1 decreases during plating. The reliability of the varistor 8 is a concern.
 (表1)の試料B~試料Kに示すように、第1絶縁層1の厚みが25μm以上、65μm以下であれば第1絶縁層1における吸水率が0.1%以下でかつ、低い減量率を示し、高信頼性のバリスタ8を作製することができる。 As shown in Sample B to Sample K in Table 1, if the thickness of the first insulating layer 1 is 25 μm or more and 65 μm or less, the water absorption rate in the first insulating layer 1 is 0.1% or less and low weight loss The high-reliability varistor 8 can be manufactured.
 前述のように、第2バリスタ層2Bとなるバリスタシート12に含まれている酸化ビスマスおよび酸化マンガンは、焼成過程で液相を形成し、バリスタ層2の緻密化に寄与する。また、その液相が亜鉛成分を含んだ状態で第1絶縁層1となる第1セラミックシート11へと拡散移動して第1絶縁層1の緻密化にも寄与する。 As described above, bismuth oxide and manganese oxide contained in the varistor sheet 12 to be the second varistor layer 2B form a liquid phase in the firing process and contribute to densification of the varistor layer 2. In addition, the liquid phase diffuses and moves to the first ceramic sheet 11 which becomes the first insulating layer 1 in a state containing the zinc component, and contributes to densification of the first insulating layer 1.
 しかしながら、試料Lのように第1絶縁層1の厚みが65μmよりも厚い場合、バリスタシート12から第1セラミックシート11へと拡散する液相が、焼成過程で第1絶縁層1の表面まで達しない。そのため、第1絶縁層1の表層が十分に緻密化せず空隙が形成され水分が浸入するものと推測される。 However, when the thickness of the first insulating layer 1 is larger than 65 μm like the sample L, the liquid phase diffusing from the varistor sheet 12 to the first ceramic sheet 11 reaches the surface of the first insulating layer 1 in the firing process. do not do. For this reason, it is presumed that the surface layer of the first insulating layer 1 is not sufficiently densified and voids are formed and moisture enters.
 一方、第1絶縁層1の厚みが25μmよりも薄い場合、焼成過程でバリスタシート12から第1セラミックシート11へと拡散する液相が過多となる。そのため、第1絶縁層1の表面に極端な液相浮きを生じる。その結果、メッキ液へこの液相が溶出して、第1絶縁層1における減量率が大きくなるものと考えられる。以上のように、バリスタ層2の第1面2Cに垂直な方向における第1絶縁層1の厚みは25μm以上、65μm以下であることが好ましい。なお、上述のように、第1絶縁層1の厚みの下限はメッキにより主面電極6や端子電極7を形成する場合の値である。したがってこれらの電極をペースト印刷により形成する場合、第1絶縁層1の厚みの下限はこの値でなくてもよい。 On the other hand, when the thickness of the first insulating layer 1 is less than 25 μm, the liquid phase that diffuses from the varistor sheet 12 to the first ceramic sheet 11 becomes excessive during the firing process. Therefore, an extreme liquid phase float occurs on the surface of the first insulating layer 1. As a result, this liquid phase is eluted into the plating solution, and the weight loss rate in the first insulating layer 1 is considered to increase. As described above, the thickness of the first insulating layer 1 in the direction perpendicular to the first surface 2C of the varistor layer 2 is preferably 25 μm or more and 65 μm or less. As described above, the lower limit of the thickness of the first insulating layer 1 is a value when the main surface electrode 6 and the terminal electrode 7 are formed by plating. Therefore, when these electrodes are formed by paste printing, the lower limit of the thickness of the first insulating layer 1 may not be this value.
 また、上述したように、第1絶縁層1の焼結性はビスマス元素およびマンガン元素の濃度分布によって評価することができる。第1絶縁層1においては、ビスマス元素およびマンガン元素が一定の濃度となるよう、第1絶縁層1に均一に分布されていることが好ましい。 As described above, the sinterability of the first insulating layer 1 can be evaluated by the concentration distribution of the bismuth element and the manganese element. In the first insulating layer 1, it is preferable that the bismuth element and the manganese element are uniformly distributed in the first insulating layer 1 so as to have a constant concentration.
 また、十分な焼結性を得るためには、第1絶縁層1の第2面1Bにおけるビスマス元素およびマンガン元素の濃度が、第1絶縁層1の第1面1Aにおけるビスマス元素およびマンガン元素の濃度以上であることが好ましい。 In order to obtain sufficient sinterability, the concentration of the bismuth element and manganese element on the second surface 1B of the first insulating layer 1 is such that the concentration of bismuth element and manganese element on the first surface 1A of the first insulating layer 1 It is preferable that it is more than the concentration.
 バリスタ層2となるバリスタシート12に含まれる液相成分が、バリスタシート12と第1セラミックシート11との界面を越え、十分に第1セラミックシート11全体に行き渡ることで十分な焼結性が確保される。また、バリスタシート12からの亜鉛拡散によってガーナイトが十分に形成される。その結果、上述のようなビスマス元素およびマンガン元素の濃度分布となる。 The liquid phase component contained in the varistor sheet 12 to be the varistor layer 2 crosses the interface between the varistor sheet 12 and the first ceramic sheet 11 and sufficiently reaches the entire first ceramic sheet 11 to ensure sufficient sinterability. Is done. Moreover, garnite is sufficiently formed by zinc diffusion from the varistor sheet 12. As a result, the concentration distribution of bismuth element and manganese element as described above is obtained.
 図4は、図1における4-4線を波長分散型X線分光分析(WDS分析)によりライン分析した結果である。分析対象は、(表1)における試料Gである。図4は、第1絶縁層1と第2バリスタ層2Bのビスマス元素およびマンガン元素の濃度分布を示している。なおWDS分析において加速電圧は15kVである。 FIG. 4 shows the result of line analysis of the line 4-4 in FIG. 1 by wavelength dispersive X-ray spectroscopy (WDS analysis). The analysis target is the sample G in (Table 1). FIG. 4 shows the concentration distribution of bismuth element and manganese element in the first insulating layer 1 and the second varistor layer 2B. In the WDS analysis, the acceleration voltage is 15 kV.
 バリスタ層2の第1面2Cと第1絶縁層1の第1面1Aとは接している。図4において、第1絶縁層1の表面(第2面1B)からの距離が50μmの位置が、第1絶縁層1における、バリスタ層2の第1面2Cと対向し接する第1面1A(接面)の位置である。図4から明らかなように、第2面1Bにおけるビスマス元素およびマンガン元素の濃度は、第1面1Aに比べ同等以上になっている。そのため、十分な焼結性が確保されているとともに、ガーナイトが第1絶縁層1全体に形成されていることがわかる。 The first surface 2C of the varistor layer 2 and the first surface 1A of the first insulating layer 1 are in contact with each other. In FIG. 4, the first surface 1A (the first surface 1A (the second surface 1B) having a distance of 50 μm is opposed to and in contact with the first surface 2C of the varistor layer 2 in the first insulating layer 1). Position). As is apparent from FIG. 4, the concentration of the bismuth element and the manganese element on the second surface 1B is equal to or higher than that on the first surface 1A. Therefore, it can be seen that sufficient sinterability is ensured and garnite is formed in the entire first insulating layer 1.
 なお、以上説明した、バリスタは、バリスタ機能が内蔵されたセラミック基板であるが、本発明はこれに限定されるものではない。例えばチップ型の積層バリスタとして、バリスタ層2の一方の面もしくは両面にガーナイト主成分とする第1絶縁層1を設けた構成として応用することも可能である。すなわち、第2絶縁層3は必ずしも設けなくてもよい。またこの場合、主面電極6は設けなくてもよい。すなわち、外部電極とは、バリスタ8を外部の基板または電子機器と電気的に接続させるための電極である。第2絶縁層3を設けない場合、図2A~図2Dにおいて、リジッド基板23がない状態で積層体を作製すればよい。 The varistor described above is a ceramic substrate with a built-in varistor function, but the present invention is not limited to this. For example, a chip-type laminated varistor can be applied as a configuration in which the first insulating layer 1 mainly composed of garnite is provided on one surface or both surfaces of the varistor layer 2. That is, the second insulating layer 3 is not necessarily provided. In this case, the main surface electrode 6 may not be provided. That is, the external electrode is an electrode for electrically connecting the varistor 8 to an external substrate or electronic device. When the second insulating layer 3 is not provided, a stacked body may be manufactured without the rigid substrate 23 in FIGS. 2A to 2D.
 また、外部電極の構成も端子電極7や主面電極6に限定されない。内部電極14をバリスタ層2の側面まで延ばして部分的にバリスタ層2から露出させ、この露出した部分にめっきなどによって外部電極を形成してもよい。この場合、ビア電極5は必要ない。 Further, the configuration of the external electrode is not limited to the terminal electrode 7 or the main surface electrode 6. The internal electrode 14 may be extended to the side surface of the varistor layer 2 to be partially exposed from the varistor layer 2, and the external electrode may be formed on the exposed portion by plating or the like. In this case, the via electrode 5 is not necessary.
 本発明にかかるバリスタは半導体デバイス等、特に高輝度化、高出力化が進むLEDのバリスタ内蔵セラミック基板またはチップ型積層バリスタにおいて有用である。 The varistor according to the present invention is useful in a semiconductor device or the like, especially in a ceramic substrate or a chip-type multilayer varistor with a built-in varistor of an LED whose brightness and output are increasing.
1  第1絶縁層
1A  第1面
1B  第2面
2  バリスタ層
2A  第1バリスタ層
2B  第2バリスタ層
2C  第1面
2D  第2面
3  第2絶縁層
5  ビア電極
6  主面電極
7  端子電極
8  バリスタ
11  第1セラミックシート
12  バリスタシート
13  内部電極用ペースト
14  内部電極
15  主面電極用ペースト(ペースト)
16  端子電極用ペースト(ペースト)
23  リジッド基板
24  ビア電極用ペースト(ペースト)
DESCRIPTION OF SYMBOLS 1 1st insulating layer 1A 1st surface 1B 2nd surface 2 Varistor layer 2A 1st varistor layer 2B 2nd varistor layer 2C 1st surface 2D 2nd surface 3 2nd insulating layer 5 Via electrode 6 Main surface electrode 7 Terminal electrode 8 Varistor 11 First ceramic sheet 12 Varistor sheet 13 Internal electrode paste 14 Internal electrode 15 Main surface electrode paste (paste)
16 Terminal electrode paste (paste)
23 Rigid Substrate 24 Via Electrode Paste

Claims (10)

  1. 酸化亜鉛を主成分とし、第1面と前記第1面の反対側の第2面とを有するバリスタ層と、
    前記バリスタ層の内部に設けられた一対の内部電極と、
    前記一対の内部電極にそれぞれ接続され、前記バリスタ層の外に設けられた一対の外部電極と、
    前記バリスタ層の前記第1面に設けられ、ガーナイトを主成分とする第1絶縁層と、を備えた、
    バリスタ。
    A varistor layer mainly composed of zinc oxide and having a first surface and a second surface opposite to the first surface;
    A pair of internal electrodes provided inside the varistor layer;
    A pair of external electrodes respectively connected to the pair of internal electrodes and provided outside the varistor layer;
    A first insulating layer provided on the first surface of the varistor layer and mainly composed of garnite;
    Barista.
  2. 前記バリスタ層と前記第1絶縁層とは構成元素としてビスマスとマンガンとを含み、
    前記バリスタ層は、
    前記一対の内部電極間に配置された第1バリスタ層と、
    前記一対の内部電極の一方と前記第1絶縁層との間に配置された第2バリスタ層と、を有し、
    前記バリスタ層の前記第1面に垂直な方向における前記第1絶縁層の厚みは25μm以上、65μm以下である、
    請求項1記載のバリスタ。
    The varistor layer and the first insulating layer include bismuth and manganese as constituent elements,
    The varistor layer is
    A first varistor layer disposed between the pair of internal electrodes;
    A second varistor layer disposed between one of the pair of internal electrodes and the first insulating layer;
    The thickness of the first insulating layer in the direction perpendicular to the first surface of the varistor layer is 25 μm or more and 65 μm or less.
    The varistor according to claim 1.
  3. 前記バリスタ層と前記第1絶縁層とは構成元素としてビスマスとマンガンとを含み、
    前記第1絶縁層は前記バリスタ層と接する第1面と、前記第1面の反対側の第2面とを有し、
    前記第1絶縁層の前記第2面におけるビスマス元素およびマンガン元素の濃度は、それぞれ、前記第1絶縁層の前記第1面におけるビスマス元素およびマンガン元素の濃度以上である、
    請求項1記載のバリスタ。
    The varistor layer and the first insulating layer include bismuth and manganese as constituent elements,
    The first insulating layer has a first surface in contact with the varistor layer, and a second surface opposite to the first surface;
    The concentration of the bismuth element and the manganese element on the second surface of the first insulating layer is equal to or higher than the concentration of the bismuth element and the manganese element on the first surface of the first insulating layer, respectively.
    The varistor according to claim 1.
  4. 前記バリスタ層の前記第2面に設けられた第2絶縁層をさらに備えた、
    請求項1記載のバリスタ。
    A second insulating layer provided on the second surface of the varistor layer;
    The varistor according to claim 1.
  5. 前記第2絶縁層の主成分はガーナイトである、
    請求項4記載のバリスタ。
    The main component of the second insulating layer is garnite.
    The varistor according to claim 4.
  6. 前記第2絶縁層の主成分はアルミナである、
    請求項4記載のバリスタ。
    The main component of the second insulating layer is alumina.
    The varistor according to claim 4.
  7. 前記第1絶縁層にはニオブが含まれる、
    請求項1記載のバリスタ。
    The first insulating layer includes niobium,
    The varistor according to claim 1.
  8. 酸化亜鉛を主成分とするバリスタシートと、
    前記バリスタシートの内部に設けられた一対の内部電極ペーストと、前記バリスタシートの第1面に設けられ酸化アルミニウムを主成分とする第1セラミックシートとの積層体を所定の温度で一体焼成することで、
    酸化亜鉛を主成分とし、第1面と前記第1面の反対側の第2面とを有するバリスタ層と、
    前記バリスタ層の内部に設けられた一対の内部電極と、
    前記バリスタ層の前記第1面に設けられ、ガーナイトを主成分とする第1絶縁層とを形成するステップと、
    前記一対の内部電極にそれぞれ接続され、前記バリスタ層の外に設けられた一対の外部電極を形成するステップと、を備え、
    前記第1絶縁層の主成分であるガーナイトは、前記酸化亜鉛に含まれる亜鉛と、前記酸化アルミニウムに含まれるアルミニウムとが反応して生成する、
    バリスタの製造方法。
    A varistor sheet mainly composed of zinc oxide;
    A laminated body of a pair of internal electrode paste provided inside the varistor sheet and a first ceramic sheet mainly composed of aluminum oxide provided on the first surface of the varistor sheet is integrally fired at a predetermined temperature. so,
    A varistor layer mainly composed of zinc oxide and having a first surface and a second surface opposite to the first surface;
    A pair of internal electrodes provided inside the varistor layer;
    Forming a first insulating layer provided on the first surface of the varistor layer and containing garnite as a main component;
    Forming a pair of external electrodes respectively connected to the pair of internal electrodes and provided outside the varistor layer,
    The garnite, which is the main component of the first insulating layer, is generated by a reaction between zinc contained in the zinc oxide and aluminum contained in the aluminum oxide.
    A method for manufacturing a varistor.
  9. 酸化亜鉛を主成分とするバリスタシートと、前記バリスタシートの内部に設けられた一対の内部電極ペーストと、前記バリスタシートの第1面に設けられ酸化アルミニウムを主成分とする第1セラミックシートと、前記バリスタシートの前記第1面の反対側の第2面に設けられ酸化アルミニウムを主成分とする第1セラミックシートとの積層体を所定の温度で一体焼成することで、
    酸化亜鉛を主成分とし、第1面と前記第1面の反対側の第2面とを有するバリスタ層と、
    前記バリスタ層の内部に設けられた一対の内部電極と、
    前記バリスタ層の前記第1面に設けられ、ガーナイトを主成分とする第1絶縁層と、
    前記バリスタ層の前記第2面に設けられ、ガーナイトを主成分とする第2絶縁層とを形成するステップと、
    前記一対の内部電極にそれぞれ接続され、前記バリスタ層の外に設けられた一対の外部電極を形成するステップと、を備え、
    前記第1絶縁層、前記第2絶縁層の主成分であるガーナイトは、前記酸化亜鉛に含まれる亜鉛と、前記酸化アルミニウムに含まれるアルミニウムとが反応して生成する、
    バリスタの製造方法。
    A varistor sheet mainly composed of zinc oxide; a pair of internal electrode pastes provided inside the varistor sheet; a first ceramic sheet mainly composed of aluminum oxide provided on the first surface of the varistor sheet; By integrally firing a laminated body with a first ceramic sheet mainly composed of aluminum oxide provided on a second surface opposite to the first surface of the varistor sheet at a predetermined temperature,
    A varistor layer mainly composed of zinc oxide and having a first surface and a second surface opposite to the first surface;
    A pair of internal electrodes provided inside the varistor layer;
    A first insulating layer provided on the first surface of the varistor layer, the main component being garnite;
    Forming a second insulating layer provided on the second surface of the varistor layer and containing garnite as a main component;
    Forming a pair of external electrodes respectively connected to the pair of internal electrodes and provided outside the varistor layer,
    The garnite which is the main component of the first insulating layer and the second insulating layer is generated by a reaction between zinc contained in the zinc oxide and aluminum contained in the aluminum oxide.
    A method for manufacturing a varistor.
  10. 酸化亜鉛を主成分とするバリスタシートと、
    前記バリスタシートの内部に設けられた一対の内部電極ペーストと、前記バリスタシートの第1面に設けられ酸化アルミニウムを主成分とする第1セラミックシートと、
    前記バリスタシートの前記第1面の反対側の第2面に設けられたアルミナ基板との積層体を所定の温度で一体焼成することで、
    酸化亜鉛を主成分とし、第1面と前記第1面の反対側の第2面とを有するバリスタ層と、前記バリスタ層の内部に設けられた一対の内部電極と、
    前記バリスタ層の前記第1面に設けられ、ガーナイトを主成分とする第1絶縁層と、
    前記バリスタ層の前記第2面に設けられたアルミナ基板で構成された第2絶縁層とを形成するステップと、
    前記一対の内部電極にそれぞれ接続され、前記バリスタ層の外に設けられた一対の外部電極を形成するステップと、を備え、
    前記第1絶縁層の主成分であるガーナイトは、前記酸化亜鉛に含まれる亜鉛と、前記酸化アルミニウムに含まれるアルミニウムとが反応して生成する、
    バリスタの製造方法。
    A varistor sheet mainly composed of zinc oxide;
    A pair of internal electrode paste provided inside the varistor sheet; a first ceramic sheet mainly composed of aluminum oxide provided on a first surface of the varistor sheet;
    By integrally firing the laminate with the alumina substrate provided on the second surface opposite to the first surface of the varistor sheet at a predetermined temperature,
    A varistor layer mainly composed of zinc oxide and having a first surface and a second surface opposite to the first surface; a pair of internal electrodes provided inside the varistor layer;
    A first insulating layer provided on the first surface of the varistor layer, the main component being garnite;
    Forming a second insulating layer composed of an alumina substrate provided on the second surface of the varistor layer;
    Forming a pair of external electrodes respectively connected to the pair of internal electrodes and provided outside the varistor layer,
    The garnite, which is the main component of the first insulating layer, is generated by a reaction between zinc contained in the zinc oxide and aluminum contained in the aluminum oxide.
    A method for manufacturing a varistor.
PCT/JP2013/003274 2012-05-25 2013-05-23 Varistor and method of manufacturing same WO2013175795A1 (en)

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