WO2013174125A1 - 单板通讯方法、系统和单板 - Google Patents

单板通讯方法、系统和单板 Download PDF

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Publication number
WO2013174125A1
WO2013174125A1 PCT/CN2012/086276 CN2012086276W WO2013174125A1 WO 2013174125 A1 WO2013174125 A1 WO 2013174125A1 CN 2012086276 W CN2012086276 W CN 2012086276W WO 2013174125 A1 WO2013174125 A1 WO 2013174125A1
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WO
WIPO (PCT)
Prior art keywords
slave device
address
board
slave
single board
Prior art date
Application number
PCT/CN2012/086276
Other languages
English (en)
French (fr)
Inventor
曹发银
魏庆环
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP12848769.1A priority Critical patent/EP2688258B1/en
Publication of WO2013174125A1 publication Critical patent/WO2013174125A1/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Definitions

  • the present invention relates to communications technologies, and in particular, to a single board communication method, system, and board. Background technique
  • I 2C Inter-Integrated Circui t
  • I 2C is a master-slave form of bus.
  • Each slave device connected to the bus can be set and recognized by the host through a unique address.
  • the host can act as a master transmitter or a host receiver.
  • the boards can be divided into smart boards and non-smart boards.
  • the controllers in the boards can manage their own electronic tags through the I2C bus.
  • the boards cannot manage their own.
  • Electronic tags whose electronic tags require smart boards within the system, are managed via the I2C bus.
  • the address of the EEPROM is usually 7 bits, of which 4 bits are fixed device addresses and 3 bits are device chip select enable addresses. Different boards can be connected in different slots on the backplane. If multiple non-smart boards are connected, a smart board is required to manage its electronic tags.
  • FIG. 1 is a schematic view showing the connection between the backplane and the boards in the prior art. As shown in Figure 1, different non-intelligent boards are inserted into different slots in the board, according to the slots fixed in the backplane before leaving the factory.
  • the device address selection enable addresses A0, A1, and A2 of the EEPR0M in different types of non-smart boards are pre-configured to address the corresponding slot by using the DIP switch.
  • the administrator needs to manually control the DIP switch to set the device chip select enable address of the EEPR0M, and the automatic identification and allocation of the device chip select enable address cannot be realized.
  • the embodiment of the invention provides a board communication method, a system, and a board, which can automatically identify and allocate a device chip selection enable address of the board.
  • a first aspect of the present invention provides a board, including: a memory, a board in-position detecting circuit, and a chip select enabling circuit; wherein:
  • the board in-position detecting circuit is configured to connect the master device to the master device through the bit signal line when the card is inserted into any slave slot of the backplane, so that the master device passes the in-position Obtaining an in-position signal of the board, the in-position signal is used to indicate that the board is in an online state; and an address signal corresponding to the slot of the slave device;
  • the memory is configured to configure an apparatus chip select enable address of the board according to the address signal corresponding to the slot of the slave device acquired by the chip select enable circuit, and communicate with the master device by using a communication bus. .
  • Another aspect of the present invention provides another board, including: a detection module, an address acquisition module, and a communication module, where:
  • the detecting module is configured to acquire an in-position signal of the slave device by using an in-position signal line of the slave device in the slave slot of the backplane, where the in-position signal is used to indicate the slave device Online
  • the address obtaining module is configured to obtain, by using an in-position signal line of the slave device, a device chip select enable address corresponding to the slave device in an online state;
  • the communication module is configured to communicate with the slave device according to the device chip select enable address through a communication bus connected to the memory of the slave device.
  • a further aspect of the embodiments of the present invention provides a single-board communication system, including a backplane, a master device, and a plurality of slave devices, wherein the master device is inserted into a slot of the master device on the backplane, Multiple slave devices are respectively inserted into multiple slave device slots on the backplane;
  • the master device is configured to acquire, by the in-position signal lines of the slave devices, the in-position signals of the slave devices, where the in-position signal is used to indicate that the slave device is in an online state; and when the slave devices are in an online state Obtaining, by the in-position signal lines of the slave devices, the device chip select enable addresses corresponding to the online slave devices in the online state; and the communication bus connected to the memory of each online slave device, according to the Each device of the online slave device selects an enable address and communicates with each of the online slave devices;
  • the slave device When the slave device is inserted into the slave device slot of the backplane, is connected to the master device by a bit signal line, so that the master device acquires the slave device by using the in-position signal line. Bit signal.
  • a further aspect of the embodiments of the present invention provides a board communication method, including:
  • the address signal corresponding to the slot inserted from the device is obtained through the address signal line;
  • the device chip select enable address is configured according to the address signal, and communicates with the master device through a communication bus.
  • a further aspect of the embodiments of the present invention provides a board communication method, including:
  • the in-position signals of the slave devices are respectively acquired by the in-position signal lines, where the in-position signals are used to indicate the online state of the board; the device chip selects an enable address;
  • the technical effect of the embodiment of the present invention is that the master device acquires the in-position signal of the slave device through the bit signal line, and the chip select enable circuit of the slave device obtains the address signal corresponding to the slot of the slave device through the address signal line, and the slave device
  • the memory is configured according to the address signal to configure the device chip select enable address of the slave device, thereby realizing automatic identification and allocation of the device chip select enable address of the slave device, without requiring management personnel to participate, thereby improving the convenience of device maintenance and installation.
  • FIG. 1 is a schematic view showing the connection between a backboard and each single board in the prior art
  • Embodiment 1 of a single board according to the present invention
  • Embodiment 2 of a single board according to the present invention is a schematic structural diagram of Embodiment 2 of a single board according to the present invention.
  • Embodiment 4 is a schematic structural diagram of Embodiment 1 of a single board communication system according to the present invention.
  • Embodiment 2 of a single board communication system according to the present invention
  • Embodiment 6 is a flowchart of Embodiment 1 of a method for communicating a single board according to the present invention
  • FIG. 7 is a flowchart of Embodiment 2 of a method for communicating a single board according to the present invention. detailed description
  • Embodiment 1 of a board according to the present invention is a schematic structural diagram of Embodiment 1 of a board according to the present invention.
  • this embodiment provides a board, which is specifically a slave device that is plugged into the backboard, where The device can for example be a non-smart board.
  • the backplane may be configured with a plurality of slot slots for the board, and may include a slot of the master device and multiple slots of the slave device, where the slot of the master device is used for docking.
  • the master device of the smart board the slave device slot is used to plug in a slave device such as a non-smart board.
  • the board provided in this embodiment may be specifically inserted into any slot of the slave device on the backplane.
  • the board may specifically include the memory 11, the board in-position detecting circuit 12, and the chip select enabling circuit 13.
  • the chip select enable circuit 13 is connected to the memory 11.
  • the memory 11 is connected to the master device via a communication bus, and the board in-position detecting circuit 12 is connected to the master device through the bit signal line.
  • the memory 11 in this embodiment may specifically use an EEPROM, but is not limited to an EEPROM.
  • the board in-position detecting circuit 12 is used in When the board is inserted into the slave slot, the master device is connected to the master device through the bit signal line, so that the master device obtains the in-position signal of the board through the in-position signal line, and the master device obtains the in-position signal line through the in-position signal line.
  • the in-position signal of the board is used to identify the current online status of the board. If the board is online, the master device can detect whether the board is online. If the master device does not detect the in-position signal through an in-position signal line, it indicates that the slave device is not connected to the slave device card slot connected to the bit signal line, or the plugged slave device is not currently online. If the master device detects the in-position signal through an in-position signal line, it indicates that the in-position signal is valid. If the slave device is connected to the slave device card slot connected to the bit signal line, the slave device can be automatically identified. The chip select address of the device.
  • the chip select enable circuit 13 is configured to obtain an address signal corresponding to the slot of the device through the address signal line when the board is in the online state (that is, the in-position signal of the board is valid).
  • each slave of the backplane An address signal and an in-position signal corresponding to the slot of each slave device are set in the slot of the device, that is, the slot number of each slot of the slave device is bound to the address signal corresponding to the slot in the hardware design process.
  • the chip select enable circuit 13 on the board can be connected to the backplane through the address signal line, thereby passing the address.
  • the signal line directly obtains the address signal corresponding to the slot of the slave device bound to the slot number.
  • the memory 11 is configured to acquire an address signal corresponding to the slave slot from the chip select enable circuit 12, and automatically configure the device chip select enable address of the board according to the address signal.
  • the output of the chip select enable circuit 13 is connected to the address input end of the memory 11, and the device chip select enable address of the board is configured by the address signal acquired by the chip select enable circuit 13, that is, the single
  • the device chip select enable address of the board is configured to the address corresponding to the slave slot to which it is inserted.
  • the board can communicate with the master device through the device chip select enable address, and specifically communicate with the master device through the communication bus.
  • the communication bus in this embodiment may specifically be an I 2 C bus connecting the master device and the slave device.
  • the board provided in this embodiment may further include a current limiting device 14, and the current limiting device 14 is disposed between the chip select enabling circuit 12 and the memory 11 for performing current limiting processing on the memory 11.
  • the current limiting device 14 can be specifically a large resistor, or an anti-overcurrent chip, or an interface driver.
  • the current limiting device 14 is configured to prevent a large current generated in the circuit when the board is hot swapped. Damage and impact on the memory 11.
  • the present embodiment provides a single board that is inserted into any slot of the slave device on the backplane, and the master device passes the board in-position detection circuit in the board connected to the in-position signal line. Acquiring the in-position signal of the board, when the in-position signal of the slave device is valid, the chip select enable circuit passes the address signal The line obtains the address signal corresponding to the slot of the device, and configures the device chip select enable address of the board according to the address signal. This implements automatic identification and allocation of the device chip select enable address of the board, without the need for management personnel to participate. Improve the convenience of equipment maintenance and installation.
  • FIG. 3 is a schematic structural diagram of Embodiment 2 of a board according to the present invention.
  • this embodiment provides a board, which is specifically a main device that is plugged into the backboard, where the main device is It can be, for example, a smart board.
  • the backplane may be configured with a plurality of slot slots for the board, and may include a slot of the master device and multiple slots of the slave device, where the slot of the master device is used for docking.
  • the master device of the smart board, the slave device slot is used to plug in a slave device such as a non-smart board.
  • the board in the embodiment is specifically inserted into the slot of the main device on the backplane, and the board may specifically include the detecting module 21, the address obtaining module 22, and the communication module 23.
  • the detecting module 21 is configured to separately acquire the in-position signals of the slave devices through the respective in-position signal lines.
  • the slave devices plugged into the backplane are respectively connected to the master device through the bit signal lines, and the detecting module 21 detects whether the slave devices are online through the in-position signal lines.
  • the address obtaining module 22 is configured to respectively obtain, by each in-position signal line, a device chip selection enable address corresponding to each online slave device in an online state.
  • the address obtaining module 22 can obtain the device chip selection corresponding to the slot where the slave device is located by connecting the in-position signal line of the slave device.
  • the enable address that is, the device chip select enable address of the slave device.
  • the communication module 23 is configured to communicate with each of the online slave devices via a communication bus connected to the memory of the online slave device and according to each of the device chip select enable addresses. After obtaining the device chip select enable address of each online slave device, the master device can communicate with the online slave device through the communication module 23 therein, specifically by connecting the communication bus between the master device and the slave device. Communication.
  • the embodiment provides a board in which the board is inserted into the slot of the master device on the backplane, and the detecting module in the controller of the board obtains the in-position signal of the slave device through the in-position signal line.
  • the address obtaining module further obtains the device chip selection enable address of each online slave device by using the bit signal line, thereby realizing automatic identification and allocation of the device chip select enable address of the board. Increased facility maintenance and installation convenience without the need for management involvement.
  • Embodiment 1 of a single-board communication system is a schematic structural diagram of Embodiment 1 of a single-board communication system according to the present invention.
  • this embodiment provides a single-board communication system, and the single-board communication system may specifically include a backplane 3, a main device 2, and Multiple slaves 1 (only one is shown).
  • a slot for inserting a card may be disposed on the backplane 3, and specifically includes a master slot 31 and a plurality of slave slots 32, wherein the primary device The slot 31 is used to plug in the master 2, and the slave slot 32 is used to dock the slave 1.
  • the main device 2 is plugged into the main device slot 31 on the backplane 3, and one of the slave devices 1 is plugged into any one of the slave slots 32 on the backplane 3.
  • the backplane 3 is provided with an address signal corresponding to each slave device slot 32, that is, a corresponding device chip select enable address is set for each slave device slot 32 on the backplane 3, in this embodiment.
  • Each slave slot 32 corresponds to a fixed device chip select enable address, and no matter which slave device is inserted into the slave slot 32, its address is automatically configured as the device chip select enable address.
  • the master device 2 in this embodiment may be specifically the board shown in FIG. 3, that is, the master device 2 in this embodiment specifically includes a detecting module 21, an address obtaining module, and a channel block 23. Wherein, the detection is used to acquire the in-position signals of the respective slave devices 1 through the respective in-position signal lines. Address acquisition ⁇ 22 is used to pass the in-position
  • the 23 is configured to communicate with each of the online slave devices according to each of the device chip select enable addresses by using a communication bus connected to the slave device.
  • the slave device 1 in this embodiment may specifically include the board shown in FIG. 2, that is, the slave device in this embodiment may specifically include the memory 11, the board in-position detecting circuit 12, and the chip select enabling circuit 13.
  • the chip select enable circuit 13 is connected to the memory 11, and the board in-position detecting circuit 12 is connected to the main device 2 through the bit signal line.
  • the board in-position detecting circuit 12 is configured to connect to the master device 2 through the bit signal line when the slave device 1 is inserted into the slave device slot 32, so that the detecting module 211 in the master device 2 passes the in-position signal line.
  • the in-position signal of the slave device 1 is obtained.
  • the chip select enable circuit 13 is configured to acquire an address signal corresponding to the slave slot 32 through the address signal line when the in-position signal of the board is valid.
  • the memory 11 is configured to configure the device chip select enable address of the slave device 1 according to the address signal corresponding to the slave device slot 32 acquired by the chip select enable circuit 13, and communicate with the master device 2 through the communication bus.
  • the slave device may further include: a current limiting device 14, and the current limiting device 14 is disposed between the chip select enable circuit 12 and the memory 11 for performing current limiting processing on the memory 11.
  • This embodiment provides a single-board communication system, where the single-board communication system includes a backplane, a master device, and a slave device.
  • the master device acquires the in-position signal of the slave device through the in-position signal line, when the slave device is in place.
  • the chip select enable circuit in the slave device obtains the address signal corresponding to the slot of the slave device through the address signal line, and the memory in the slave device configures the device chip select enable address of the slave device according to the address signal, thereby realizing Automatic identification and assignment of the device's device chip enable address eliminates the need for management personnel to participate, improving the convenience of equipment maintenance and installation.
  • FIG. 5 is a schematic structural diagram of Embodiment 2 of a single-board communication system according to the present invention.
  • this embodiment provides a specific single-board communication system, and the main device in the single-board communication system may be specifically a smart board.
  • the plurality of slave devices may be specifically a non-smart board 1, a non-smart board 2, ... a non-smart board 7.
  • the memory in the slave device specifically uses the EEPROM, and the current limiting device is specifically an interface driver.
  • the controller in the master device is specifically a controller in the figure, and the Vss and Vcc connected to the in-position signal line in the slave device in the figure.
  • the communication bus in the figure is connected to the serial data line (Serial Data Line; SDA) and the serial clock (SCL) of the controller in the smart board, respectively, and the non-intelligent SDA and SCL in board 1, SDA and SCL in non-smart board 2, SDA and SCL in non-smart board 7.
  • SDA Serial Data Line
  • SCL serial clock
  • the address signals corresponding to the slots of the non-smart boards are inserted, that is, "Vss, Vss, x", ... " ⁇ , ⁇ , ⁇ " in the figure.
  • Vss can represent binary "0”
  • x can represent binary "1”
  • the address signal corresponding to the slot in which the non-smart board 1 is inserted is composed of "0", "0", "1”
  • the device chip select enable address corresponding to the address signal is "001".
  • the device chip select enable address of the non-smart board 1 can be automatically configured as "001”
  • the non-smart board 2 or the like is to be
  • the device chip select enable address is automatically configured to "001” regardless of the type of the non-smart board that is docked in the slot.
  • the smart board can detect whether the non-intelligent board inserted in each slot in the backplane is online through the in-situ signal lines such as SLOT0-ONLINE, SLOTl-ONLINE, ⁇ SLOT7-ONLINE, etc.
  • the in-position signal of the non-smart board obtained by the signal line to identify whether the non-smart board is currently online. For example, when the smart board acquires the in-position signal to 1 through SLOT1-ONLINE, it indicates that the non-smart board 1 is currently online.
  • the smart board can then communicate with the online non-smart board via the I 2 C bus.
  • non-smart boards can be intermixed in different slots of the backplane without having to specify fixed slots for each non-smart board, and this embodiment can also have multiple identical non-smart The boards are inserted into different slots, and the smart boards are not recognized because the types of the non-smart boards are the same.
  • This embodiment solves the problem of automatic allocation of the electronic tag address of the non-smart board, and the scheme is simplified. Single and reliable.
  • FIG. 6 is a flowchart of Embodiment 1 of a method for communicating a board according to the present invention. As shown in FIG. 6 , this embodiment provides a method for communication of a board. This embodiment describes a technical solution of the present invention from a side of a device.
  • the board communication method provided in this embodiment may specifically include the following steps:
  • Step 601 After the slave device is inserted into a slave device slot on the backplane, when the in-position signal of the slave device is valid, the address signal corresponding to the slot in which the slave device is connected is obtained through the address signal line.
  • the main device is plugged into the main device slot of the backplane, and the slave device is plugged into any one of the slave slots of the backplane.
  • the master device detects whether the slave device is online through polling, and obtains the online signal of the slave device through the in-position signal line.
  • the slave device in this embodiment is connected to the master device via the bit signal line, and the in-position signal line detects whether the slave device is online. As shown in FIG.
  • the slave device is a non-smart board 1, which is connected to the smart board through the bit signal line SLOT1_ONLINE, and the smart board acquires the in-position signal of the non-smart board 1 through SLOT1_ONLINE to judge the non-smart board. 1 is in place.
  • the slave device obtains an address signal corresponding to the slot that is inserted by the slave device through the address signal line, where, in this embodiment, each slave device slot of the backplane The corresponding address signals are set on the slave device.
  • the slave device can be connected to the backplane through the address signal line, thereby obtaining the corresponding slot of the slave device through the address signal line.
  • Address signal Continuing to refer to Figure 5 above, the non-smart board 1 is connected to the backplane through the address signal line to obtain the address signal "Vss, Vss, x" corresponding to the slot of the slave device inserted.
  • Step 602 Configure its own device chip select enable address according to the address signal, and communicate with the master device through a communication bus.
  • the slave device configures its own device chip select enable address according to the address signal, that is, the slave device specifically configures the address corresponding to the address signal as its own device chip select enable address.
  • the address signal "Vss, Vss, x" corresponding to the slot of the slave device inserted by the non-smart board 1 is input to the address of the EEPROM through the interface driver in the non-smart board 1.
  • the signals "0" and "0"”1" are respectively input to the address input terminals A2, A1, and AO of the EEPROM, and the device chip selection enable address configuration of the non-smart board 1 is performed.
  • the device chip select enable address is configured as "001", which is the address corresponding to the slot 1 of the device.
  • the device chip selectable address is bound to the slot number, regardless of which slot is inserted in the slot.
  • the device's device chip select enable address is automatically configured as the address corresponding to the slot.
  • the automatic identification and allocation of the device chip selection enable address of the slave device is realized.
  • the slave device can communicate with the master device, and specifically can communicate with the master device through the communication bus.
  • the communication bus in this embodiment may be specifically an I 2 C bus connecting the master device and the slave device.
  • the embodiment provides a method for the communication of the board.
  • the master device obtains the in-position signal of the board through the in-position detection circuit of the board in the board connected to the in-position signal line, when the slave device is in the When the bit signal is valid, the slave device obtains the address signal corresponding to the slot of the device through the address signal line, configures the device chip select enable address of the slave device according to the address signal, and implements automatic selection of the device chip enable address for the slave device. Identification and distribution, without the need for management personnel, improves the convenience of equipment maintenance and installation.
  • FIG. 7 is a flowchart of a second embodiment of a method for communicating a board according to the present invention. As shown in FIG. 7, the embodiment provides a method for communicating a single board. This embodiment describes the technical solution of the present invention from the side of the main device.
  • the board communication method provided in this embodiment may specifically include the following steps:
  • Step 701 Acquire in-situ signals of each slave device through each in-position signal line.
  • the backplane may be configured with a plurality of slot slots for the board, and may include a slot of the master device and multiple slots of the slave device, where the slot of the master device is used for docking.
  • the master device of the smart board the slave device slot is used to plug in a slave device such as a non-smart board.
  • the master device acquires the in-position signals of the slave devices through the in-position signal lines connected to the slave devices.
  • each slave device plugged into the backplane is respectively connected to the master device through the in-position signal line, and the master device detects whether each slave device is online through the in-position signal line connected to each slave device.
  • Step 702 Select an enable address by selecting a device slice corresponding to each online slave device in the online state from each of the in-position signal lines.
  • the master device selects the device chip enable address corresponding to each online slave device in the online state through each in-position signal line.
  • the device selects an enable address of the slave device of the slave device, and the online slave device is obtained by the in-position signal line connected to the slave device.
  • the device chip selection enable address corresponding to the device, and the acquired device chip select enable address is the device chip select enable address corresponding to the slave device slot inserted by the slave device, so that the slave device can be inserted into the backplane. Any slave slot, and automatically assign the device chip select enable address corresponding to the slave slot to the slave.
  • Step 703 Communicate with each of the online slave devices according to each of the device chip select enable addresses by using a communication bus connected to the memory of the slave device. This step is to communicate with each of the online slave devices through a communication bus connected to the memory of the online slave device and according to each device chip select enable address. After the device chip select enable address is assigned to each online slave device, the master device can communicate with the online slave device, and specifically can communicate between the master device and the slave device through a communication bus.
  • the embodiment provides a method for the communication of the board.
  • the master device obtains the in-position signal of the board through the in-position detection circuit of the board in the board connected to the in-position signal line, and selects the chip in the device.
  • the energy circuit obtains the address signal corresponding to the slot of the slave device through the address signal line, and the memory of the slave device configures the device chip select enable address of the slave device according to the address signal, thereby realizing automatic selection of the device chip select enable address of the slave device. Identification and distribution, without the need for management personnel, improves the convenience of equipment maintenance and installation.
  • the aforementioned program can be stored in a computer readable storage medium.
  • the program when executed, performs the steps including the foregoing method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

Abstract

本发明实施例提供一种单板通讯方法、系统和单板，单板插接在背板上的任意一个从设备槽位中，单板包括存储器、单板在位检测电路和片选使能电路；其中：单板在位检测电路用于在所述单板插入从设备槽位中时，通过在位信号线与主设备相连，以使所述主设备通过所述在位信号线获取所述单板的在位信号；片选使能电路用于当单板的在位信号有效时通过地址信号线获取从设备槽位对应的地址信号；存储器用于根据片选使能电路获取的从设备槽位对应的地址信号，配置单板的设备片选使能地址，并通过通讯总线与所述主设备进行通讯。本发明实施例还提供了另一种单板、单板通讯系统和方法。本发明实施例实现了对从设备的设备片选使能地址的自动识别和分配。

Description

单板通讯方法、 系统和单板 本申请要求于 2012 年 5 月 25 日提交中国专利局， 申请号为 201210165487. X, 发明名称为 "单板通讯方法、 系统和单板" 的中国专利申请 的优先权， 其全部内容通过引用结合在本申请中。
技术领域
本发明涉及通信技术， 尤其涉及一种单板通讯方法、 系统和单板。 背景技术
在通讯领域中，为了对通信产品中的单板或模块进行管理、跟踪以及维修， 需要定义一组数据来表示单板或模块的生产、制造等相关的必要信息，通常将 这组数据称作 "电子标签"， 其釆用存储器作为载体。 电可擦写可编程只读存 储器 ( Electr ica l ly Erasable Programmable Read-Only Memory; 以下简称： EEPROM )作为一种掉电后数据不丟失的存储芯片， 可以支持内置集成电路 ( Inter-Integrated Circui t ; 以下简称： I 2C )通讯， 基于其操作方便、 价 格合理等优势， 被大量地使用。 I 2C是一种主从形式的总线， 每个连接到总线 的从器件都可以通过唯一的地址被主机设定和识别 ,主机可以作为主机发送器 或主机接收器。 其中， 单板可以分为智能板和非智能板； 对于智能板来说， 单 板内的控制器通过 I2C总线可以管理自己的电子标签； 而对于非智能板来说， 单板无法管理自身的电子标签，其电子标签需要系统内的智能板通过 I2C总线 来管理。 EEPROM的地址通常为 7位， 其中 4位为固定的设备地址， 3位为设备 片选使能地址。 背板上可以在不同槽位连接不同的单板， 如果连接多种非智能 板， 需要一个智能板对其电子标签进行管理， 而非智能板的 EEPROM均具有相 同的 4位固定的设备地址。 因此， 为了识别不同的非智能板的电子标签， 需要 为每个非智能板分配不同的 3位设备片选使能地址。 图 1为现有技术中背板与各单板的连接示意图，如图 1所示， 不同的非智 能板插入单板中的不同槽位， 根据背板出厂前固定好的槽位（Γ槽位 7对应的 不同地址， 通过拨码开关将不同类型的非智能板中 EEPR0M的设备片选使能地 址 A0、 Al、 A2预先配置为对应槽位的地址。
然而， 现有技术中需要管理人员手动控制拨码开关来设置 EEPR0M的设备 片选使能地址， 无法实现设备片选使能地址的自动识别和分配。
发明内容
本发明实施例提供一种单板通讯方法、 系统和单板， 实现自动识别和分配 单板的设备片选使能地址。
本发明实施例的第一个方面是提供一种单板， 包括： 存储器、 单板在位检 测电路和片选使能电路； 其中：
所述单板在位检测电路用于在所述单板插入背板上的任意一个从设备槽 位中时，通过在位信号线与主设备相连， 以使所述主设备通过所述在位信号线 获取所述单板的在位信号， 所述在位信号用于指示所述单板处于在线状态； 所述从设备槽位对应的地址信号；
所述存储器用于根据所述片选使能电路获取的所述从设备槽位对应的地 址信号， 配置所述单板的设备片选使能地址， 并通过通讯总线与所述主设备进 行通讯。
本发明实施例的另一个方面是提供另一种单板， 包括： 检测模块、 地址获 取模块和通讯模块， 其中：
所述检测模块用于通过插接于背板上的从设备槽位中的从设备的在位信 号线， 获取所述从设备的在位信号， 所述在位信号用于指示所述从设备处于在 线状态；
所述地址获取模块用于通过所述从设备的在位信号线获取处于在线状态 的从设备对应的设备片选使能地址；
所述通讯模块用于通过与所述从设备的存储器相连的通讯总线，根据所述 设备片选使能地址与所述从设备进行通讯。 本发明实施例的又一个方面是提供一种单板通讯系统， 包括背板、主设备 和多个从设备， 所述主设备插接在所述背板上的主设备槽位中， 所述多个从设 备分别插接在所述背板上的多个从设备槽位中；
所述主设备用于通过各从设备的在位信号线分别获取所述各从设备的在 位信号， 所述在位信号用于指示从设备处于在线状态； 当所述各从设备处于在 线状态时，通过所述各从设备的在位信号线分别获取处于在线状态的各在线从 设备对应的设备片选使能地址；通过与所述各在线从设备的存储器相连的通讯 总线，根据所述各在线从设备对应的设备片选使能地址， 分别与所述各在线从 设备进行通讯；
所述从设备在插入所述背板的从设备槽位中时，通过在位信号线与所述主 设备相连， 以使所述主设备通过所述在位信号线获取所述从设备的在位信号。
本发明实施例的又一个方面是提供一种单板通讯方法， 包括：
在从设备插入背板上的一个从设备插槽后 ,通过所述地址信号线获取从设 备所插接的槽位对应的地址信号；
根据所述地址信号配置自身的设备片选使能地址，并通过通讯总线与所述 主设备进行通讯。
本发明实施例的又一个方面是提供一种单板通讯方法， 包括：
通过各在位信号线分别获取各从设备的在位信号，所述在位信号用于指示 所述单板的在线状态； 设备片选使能地址；
通过与所述从设备中存储器相连的通讯总线，根据各所述设备片选使能地 址分别与所述各在线从设备进行通讯。
本发明实施例的技术效果是：主设备通过在位信号线获取从设备的在位信 号， 从设备中的片选使能电路通过地址信号线获取从设备槽位对应的地址信 号，从设备中的存储器根据该地址信号配置从设备的设备片选使能地址， 实现 了对从设备的设备片选使能地址的自动识别和分配， 无需管理人员参与，提高 了设备维护和安装的便利性。 附图说明 为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施 例或现有技术描述中所需要使用的附图作一简单地介绍， 显而易见地， 下面描 述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出 创造性劳动性的前提下， 还可以根据这些附图获得其他的附图。
图 1为现有技术中背板与各单板的连接示意图；
图 2为本发明单板实施例一的结构示意图；
图 3为本发明单板实施例二的结构示意图；
图 4为本发明单板通讯系统实施例一的结构示意图；
图 5为本发明单板通讯系统实施例二的结构示意图；
图 6为本发明单板通讯方法实施例一的流程图；
图 7为本发明单板通讯方法实施例二的流程图。 具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚， 下面将结合本发明 实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然， 所描述的实施例是本发明一部分实施例， 而不是全部的实施例。基于本发明中 的实施例 ,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其 他实施例， 都属于本发明保护的范围。
图 2为本发明单板实施例一的结构示意图，如图 2所示， 本实施例提供了一 种单板， 该单板具体为插接在背板上的一个从设备， 此处的从设备可以例如为 非智能板。 在本实施例中， 背板上可以设置有多个用于插接单板的槽位， 具体 可以包括一个主设备槽位和多个从设备槽位， 其中， 主设备槽位用于插接例如 智能板的主设备，从设备槽位用于插接例如非智能板的从设备。 本实施例提供 的单板可以具体插接在背板上的任意一个从设备槽位中 ,该单板可以具体包括 存储器 11、 单板在位检测电路 12和片选使能电路 13。 其中， 片选使能电路 13 与存储器 11相连，存储器 11通过通讯总线与主设备相连， 单板在位检测电路 12 通过在位信号线与主设备相连。 具体地， 本实施例中的存储器 11可以具体釆用 EEPROM, 但并不限于 EEPROM。在本实施例中， 单板在位检测电路 12用于在 单板插入从设备槽位中时，通过在位信号线与主设备相连， 以使主设备通过所 述在位信号线获取所述单板的在位信号 ,主设备通过该在位信号线获取单板的 在位信号， 该在位信号用于标识该单板当前的在线状态， 即单板是否在线， 则 主设备可以检测到该单板是否在线。若主设备未通过某条在位信号线检测到在 位信号， 则表明该在位信号线相连的从设备卡槽中未插接从设备， 或者插接的 从设备当前不在线。若主设备通过某条在位信号线检测到在位信号， 则表明在 位信号有效， 该在位信号线相连的从设备卡槽中插接有从设备且从设备在线 , 则可以自动识别从设备的片选地址。片选使能电路 13用于当单板处于在线状态 (即单板的在位信号有效） 时通过地址信号线获取从设备槽位对应的地址信 号，在本实施例中， 背板的各从设备槽位上设置有各从设备槽位对应的地址信 号和在位信号，即在硬件设计过程中便将各从设备槽位的槽位号与该槽位对应 的地址信号进行绑定， 当单板插入到某个从设备槽位时， 识别到该单板的在位 信号有效，则单板上的片选使能电路 13便可以通过地址信号线与背板连接在一 起 ,从而通过地址信号线直接获取到与该槽位号绑定的该从设备槽位对应的地 址信号。存储器 11用于从片选使能电路 12获取从设备槽位对应的地址信号， 并 根据该地址信号自动配置该单板的设备片选使能地址。在本实施例中， 片选使 能电路 13的输出端与存储器 11的地址输入端相连，通过片选使能电路 13获取的 地址信号来配置单板的设备片选使能地址，即将该单板的设备片选使能地址配 置为其所插入的从设备插槽对应的地址。 完成地址配置之后， 该单板便可以通 过该设备片选使能地址与主设备进行通讯，具体可以通过通讯总线与主设备进 行通讯。 其中， 本实施例中的通讯总线可以具体为连接主设备与从设备的 I2C 总线。
进一步地， 本实施例提供的单板还可以包括限流器件 14, 限流器件 14设置 在片选使能电路 12与存储器 11之间， 用于对存储器 11进行限流处理。该限流器 件 14可以具体为一个大电阻，也可以为一个防过流芯片， 也可以为一个接口驱 动器，该限流器件 14用于防止对单板进行带电插拔时电路中产生的大电流对存 储器 11造成的损坏和影响。
本实施例提供了一种单板， 该单板插接在背板上的任意一个从设备槽位 中， 主设备通过与在位信号线相连的该单板中的单板在位检测电路， 获取该单 板的在位信号， 当所述从设备的在位信号有效时， 片选使能电路通过地址信号 线获取从设备槽位对应的地址信号，并根据该地址信号配置单板的设备片选使 能地址， 实现了对单板的设备片选使能地址的自动识别和分配， 无需管理人员 参与， 提高了设备维护和安装的便利性。
图 3为本发明单板实施例二的结构示意图，如图 3所示， 本实施例提供了一 种单板， 该单板具体为插接在背板上的主设备， 此处的主设备可以例如为智能 板。 在本实施例中， 背板上可以设置有多个用于插接单板的槽位， 具体可以包 括一个主设备槽位和多个从设备槽位， 其中， 主设备槽位用于插接例如智能板 的主设备，从设备槽位用于插接例如非智能板的从设备。 本实施例中的单板具 体插接在背板上的主设备槽位中， 该单板可以具体包括检测模块 21、地址获取 模块 22和通讯模块 23。其中，检测模块 21用于通过各在位信号线分别获取各从 设备的在位信号。在本实施例中， 插接在背板上的各从设备通过在位信号线分 别与主设备相连，检测模块 21通过这些在位信号线检测各从设备是否在线。地 址获取模块 22用于通过各在位信号线分别获取处于在线状态的各在线从设备 对应的设备片选使能地址。在本实施例中， 当主设备中的检测模块 21检测到某 个从设备在线时，地址获取模块 22通过连接该从设备的在位信号线可以获取到 该从设备所在槽位对应的设备片选使能地址， 即该从设备的设备片选使能地 址。通讯模块 23用于通过与所述在线从设备中存储器相连的通讯总线， 并根据 各所述设备片选使能地址分别与所述各在线从设备进行通讯。当获取到各在线 从设备的设备片选使能地址后，主设备可以通过其中的通讯模块 23与在线从设 备进行通讯 ,具体可以通过连接主设备和从设备的通讯总线来进行二者之间的 通讯。
本实施例提供了一种单板， 该单板插接在背板上的主设备槽位中， 该单板 中控制器中的检测模块通过在位信号线获取从设备的在位信号，以获取处于在 线状态的各在线从设备，地址获取模块通过在位信号线进一步获取各在线从设 备的设备片选使能地址， 实现了对单板的设备片选使能地址的自动识别和分 配， 无需管理人员参与， 提高了设备维护和安装的便利性。
图 4为本发明单板通讯系统实施例一的结构示意图， 如图 4所示， 本实施例 提供了一种单板通讯系统， 该单板通讯系统可以具体包括背板 3、主设备 2和多 个从设备 1 (图中仅示出一个）。 其中， 在背板 3上可以设置有多个用于插接单 板的槽位， 具体可以包括一个主设备槽位 31和多个从设备槽位 32, 其中， 主设 备槽位 31用于插接主设备 2, 从设备槽位 32用于插接从设备 1。 在本实施例中， 主设备 2插接在背板 3上的主设备槽位 31中，其中一个从设备 1插接在背板 3上的 任意一个从设备槽位 32中。 本实施例中的背板 3上设置有各从设备槽位 32对应 的地址信号，即在背板 3上为每个从设备槽位 32设置对应的设备片选使能地址， 本实施例中的每个从设备槽位 32对应一个固定的设备片选使能地址，无论哪个 从设备插入到该从设备槽位 32中， 均自动将其地址配置为该设备片选使能地 址。
本实施例中的主设备 2可以具体为上述图 3所示的单板，即本实施例中的主设备 2 具体包括检测模块 21、 地址获取^ ½2和通 莫块 23。 其中， 检测才 ^21用于通过 各在位信号线分别获取各从设备 1的在位信号。地址获取 ^^22用于通过所述各在位
23用于通过与所 线从设备中 诸器相连的通讯总线， 根据各所述设备片选使能 地址分别与所述各在线从设备进行通讯。
本实施例中的从设备 1可以具体包括上述图 2所示的单板，即本实施例中的 从设备可以具体包括存储器 11、单板在位检测电路 12和片选使能电路 13。其中， 片选使能电路 13与存储器 11相连，单板在位检测电路 12通过在位信号线与主设 备 2相连。单板在位检测电路 12用于在从设备 1插入从设备槽位 32中时，通过在 位信号线与主设备 2相连， 以使主设备 2中的检测模块 211通过所述在位信号线 获取该从设备 1的在位信号。 片选使能电路 13用于当所述单板的在位信号有效 时通过地址信号线获取从设备槽位 32对应的地址信号。存储器 11用于根据片选 使能电路 13获取的从设备槽位 32对应的地址信号， 配置该从设备 1的设备片选 使能地址， 并通过通讯总线与主设备 2进行通讯。 进一步地， 该从设备还可以 包括： 限流器件 14, 限流器件 14设置在片选使能电路 12与存储器 11之间， 用于 对存储器 11进行限流处理。
本实施例提供了一种单板通讯系统， 该单板通讯系统包括背板、主设备和 从设备， 主设备通过在位信号线获取从设备的在位信号， 当所述从设备的在位 信号有效时，从设备中的片选使能电路通过地址信号线获取从设备槽位对应的 地址信号， 从设备中的存储器根据该地址信号配置从设备的设备片选使能地 址， 实现了对从设备的设备片选使能地址的自动识别和分配， 无需管理人员参 与， 提高了设备维护和安装的便利性。 图 5为本发明单板通讯系统实施例二的结构示意图， 如图 5所示， 本实施例 提供了一种具体的单板通讯系统，该单板通讯系统中的主设备可以具体为智能 板， 多个从设备可以具体为非智能板 1、 非智能板 2、 …非智能板 7。 本实施例 中从设备中的存储器具体釆用 EEPROM, 限流器件具体为接口驱动器，主设备 中的控制器具体为图中的 controller, 图中从设备中与在位信号线相连的 Vss、 Vcc以及与其连接的上拉电阻和下拉电阻组成单板在位检测电路， 片选使能电 路 具 体 釆 用 下 拉 电 阻 来 实 现 。 图 中 的 SLOT0— ONLINE 、 SLOTl— ONLINE, •••SLOT?— ONLINE为在位信号线， 分别连接到智能板的 Vss 以及非智能板 1、 非智能板 2、 …非智能板 7的 Vss、 背板的 Vcc。 图中的通讯总 线， 即 I2C总线， 分别连接智能板中 controller的串行数据线（Serial Data Line; 以下简称： SDA )和串行时钟（Serial Clock; 以下简称： SCL ) , 以及非智能 板 1中的 SDA和 SCL、非智能板 2中的 SDA和 SCL、…非智能板 7中的 SDA和 SCL。 在背板中设置插接各非智能板的槽位对应的地址信号， 即图中的 "Vss,Vss,x" 、 … "χ,χ,χ" 。 其中， Vss可以代表二进制 "0" , x可以代表二 进制 "1" , 则图中非智能板 1插接的槽位对应的地址信号由 " 0" 、 "0" 、 "1" 组成， 则该地址信号对应的设备片选使能地址为 "001 " 。 从图中可以看出， 当非智能板 1插接到该槽位中后，可以自动将非智能板 1的设备片选使能地址配 置为 "001 " , 而若将非智能板 2等其他非智能板插接到该槽位上， 也会自动将 其设备片选使能地址配置为 "001" ， 而与插接在槽位上的非智能板的类型无 关。
在 本 实 施 例 中 ， 智 能 板 可 以 通 过 SLOT0— ONLINE 、 SLOTl— ONLINE、 · · · SLOT7— ONLINE等在位信号线分别检测背板中各槽位上 插接的非智能板是否在线，通过在位信号线获取到的非智能板的在位信号来识 别非智能板当前是否在线。 例如， 当智能板通过 SLOTl— ONLINE获取到在位 信号为 1时， 表明非智能板 1当前在线。 然后， 智能板通过 I2C总线便可以与在 线的非智能板进行通讯。
在本实施例中， 不同类型的非智能板可以混插在背板的不同槽位内， 而不 必为各非智能板指定固定的槽位，且本实施例也可以将多个相同的非智能板分 别插入不同的槽位中，而不会因非智能板的类型相同而造成智能板无法识别的 现象。本实施例解决了非智能板的电子标签地址的自动分配问题， 方案实现简 单且可靠。
图 6为本发明单板通讯方法实施例一的流程图，如图 6所示， 本实施例提供 了一种单板通讯方法， 本实施例从从设备一侧对本发明的技术方案进行说明， 本实施例提供的单板通讯方法可以具体包括如下步骤：
步骤 601 , 在从设备插入背板上的一个从设备插槽后， 当所述从设备的在 位信号有效时， 通过地址信号线获取从设备所插接的槽位对应的地址信号。
在本实施例中， 主设备插接在背板的主设备插槽中，从设备插接在背板的 任意一个从设备插槽中。 当系统插框上电后， 主设备通过轮询的方式检测从设 备是否在线， 具体通过在位信号线获取从设备的在线信号。本实施例中的从设 备通过在位信号线与主设备相连， 通过该在位信号线检测该从设备是否在线。 如上图 5所示， 假设从设备为非智能板 1 , 其通过在位信号线 SLOT1— ONLINE 与智能板相连， 智能板通过 SLOT1— ONLINE获取非智能板 1的在位信号， 以判 断非智能板 1是否在位。
本步骤为当所述从设备的在位信号有效时，从设备通过地址信号线获取自 身所插接的槽位对应的地址信号， 其中， 在本实施例中， 背板的各从设备槽位 上设置有各自对应的地址信号， 当从设备插入到某个从设备槽位时，从设备便 可以通过地址信号线与背板连接在一起，从而通过地址信号线获取该从设备槽 位对应的地址信号。继续参照上图 5, 非智能板 1通过地址信号线与背板连接在 一起， 从而获取到其所插入的从设备槽位对应的地址信号 "Vss,Vss,x" 。
步骤 602, 根据所述地址信号配置自身的设备片选使能地址， 并通过通讯 总线与所述主设备进行通讯。
在获取到从设备对应的地址信号后，从设备根据该地址信号配置自身的设 备片选使能地址，即从设备具体将该地址信号对应的地址配置为自身的设备片 选使能地址。如上图 5所示， 非智能板 1获取到的其所插入的从设备槽位对应的 地址信号 "Vss,Vss,x" , 该地址信号通过非智能板 1中的接口驱动器输入到 EEPROM的地址输入端 A2、 Al、 AO中， 即将信号 "0" 、 "0" "1" 分别输 入到 EEPROM的地址输入端 A2、 Al、 AO中， 则将非智能板 1的设备片选使能 地址配置为 "001" 。 该设备片选使能地址配置为 "001" 即为从设备槽位 1对 应的地址， 本实施例通过将设备片选使能地址与槽位号绑定在一起， 不管槽位 中插入哪个从设备， 其设备片选使能地址均自动配置为该槽位对应的地址，从 而实现了对从设备的设备片选使能地址的自动识别和分配。 完成地址配置之 后， 该从设备便可以与主设备进行通讯， 具体可以通过通讯总线与主设备进行 通讯。 其中， 本实施例中的通讯总线可以具体为连接主设备与从设备的 I2C总 线。
本实施例提供了一种单板通讯方法，主设备通过与在位信号线相连的该单 板中的单板在位检测电路， 获取该单板的在位信号， 当所述从设备的在位信号 有效时，从设备通过地址信号线获取从设备槽位对应的地址信号，根据该地址 信号配置从设备的设备片选使能地址，实现了对从设备的设备片选使能地址的 自动识别和分配， 无需管理人员参与， 提高了设备维护和安装的便利性。
图 7为本发明单板通讯方法实施例二的流程图，如图 7所示， 本实施例提供 了一种单板通讯方法， 本实施例从主设备一侧对本发明的技术方案进行说明 , 本实施例提供的单板通讯方法可以具体包括如下步骤：
步骤 701 , 通过各在位信号线分别获取各从设备的在位信号。
在本实施例中， 背板上可以设置有多个用于插接单板的槽位， 具体可以包 括一个主设备槽位和多个从设备槽位， 其中， 主设备槽位用于插接例如智能板 的主设备，从设备槽位用于插接例如非智能板的从设备。 本步骤为主设备通过 与从设备相连的在位信号线获取各从设备的在位信号。在本实施例中，插接在 背板上的各从设备通过在位信号线分别与主设备相连 ,主设备通过与各从设备 相连的在位信号线分别检测各从设备是否在线。
步骤 702, 通过与所述各在位信号线分别获取处于在线状态的各在线从设 备对应的设备片选使能地址。
本步骤为主设备通过各在位信号线分别获取处于在线状态的各在线从设 备对应的设备片选使能地址。在本实施例中， 当主设备检测到某个从设备在线 时， 进一步获取该从设备的设备片选使能地址， 具体可以通过与从设备相连的 在位信号线获取该处于在线状态的在线从设备对应的设备片选使能地址，获取 的设备片选使能地址为该从设备插入的从设备插槽所对应的设备片选使能地 址，从而可以实现将从设备插入到背板上的任意一个从设备插槽， 并为该从设 备自动分配该从设备插槽对应的设备片选使能地址。
步骤 703 , 通过与所述从设备中存储器相连的通讯总线， 根据各所述设备 片选使能地址分别与所述各在线从设备进行通讯。 本步骤为通过与在线从设备中存储器相连的通讯总线，并根据各设备片选 使能地址分别与所述各在线从设备进行通讯。当为各在线从设备分配设备片选 使能地址后， 主设备可以与在线从设备进行通讯， 具体可以通过连接主设备和 从设备的通讯总线来进行二者之间的通讯。
本实施例提供了一种单板通讯方法，主设备通过与在位信号线相连的该单 板中的单板在位检测电路， 获取该单板的在位信号，从设备中的片选使能电路 通过地址信号线获取从设备槽位对应的地址信号，从设备中的存储器根据该地 址信号配置从设备的设备片选使能地址，实现了对从设备的设备片选使能地址 的自动识别和分配， 无需管理人员参与， 提高了设备维护和安装的便利性。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤 可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取 存储介质中。 该程序在执行时， 执行包括上述各方法实施例的步骤； 而前述的 存储介质包括： ROM, RAM,磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是： 以上各实施例仅用以说明本发明的技术方案， 而非对其 限制； 尽管参照前述各实施例对本发明进行了详细的说明， 本领域的普通技术 人员应当理解： 其依然可以对前述各实施例所记载的技术方案进行修改， 或者 对其中部分或者全部技术特征进行等同替换； 而这些修改或者替换， 并不使相 应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims

权 利 要 求
1、 一种单板， 其特征在于， 包括： 存储器、 单板在位检测电路和片选使 能电路； 其中：
所述单板在位检测电路用于在所述单板插入背板上的任意一个从设备槽 位中时，通过在位信号线与主设备相连， 以使所述主设备通过所述在位信号线 获取所述单板的在位信号， 所述在位信号用于指示所述单板的在线状态； 所述从设备槽位对应的地址信号；
所述存储器用于根据所述片选使能电路获取的所述从设备槽位对应的地 址信号， 配置所述单板的设备片选使能地址， 并通过通讯总线与所述主设备进 行通讯。
2、 根据权利要求 1所述的单板， 其特征在于， 还包括限流器件， 所述限 流器件设置在所述片选使能电路与所述存储器之间，用于对所述存储器进行限 流处理。
3、 根据权利要求 1或 2所述的单板， 其特征在于， 所述存储器为电可擦 写可编程只读存储器 EEPROM, 所述通讯总线为内置集成电路 I2C总线。
4、 一种单板， 其特征在于， 所述单板包括： 检测模块、 地址获取模块和 通讯模块， 其中：
所述检测模块用于通过插接于背板上的从设备槽位中的从设备的在位信 号线， 获取所述从设备的在位信号， 所述在位信号用于指示所述从设备处于在 线状态；
所述地址获取模块用于通过所述从设备的在位信号线获取处于在线状态 的从设备对应的设备片选使能地址；
所述通讯模块用于通过与所述从设备的存储器相连的通讯总线，根据所述 设备片选使能地址与所述从设备进行通讯。
5、 根据权利要求 4所述的单板， 其特征在于， 所述存储器为电可擦写可 编程只读存储器 EEPROM, 所述通讯总线为内置集成电路 I2C总线。
6、 一种单板通讯系统， 其特征在于， 包括背板、 主设备和多个从设备， 所述主设备插接在所述背板上的主设备槽位中，所述多个从设备分别插接在所 述背板上的多个从设备槽位中；
所述主设备用于通过各从设备的在位信号线分别获取所述各从设备的在 位信号， 所述在位信号用于指示从设备的在线状态； 当所述各从设备处于在线 状态时，通过所述各从设备的在位信号线分别获取处于在线状态的各在线从设 备对应的设备片选使能地址；通过与所述各在线从设备的存储器相连的通讯总 线，根据所述各在线从设备对应的设备片选使能地址， 分别与所述各在线从设 备进行通讯；
所述从设备在插入所述背板的从设备槽位中时，通过在位信号线与所述主 设备相连， 以使所述主设备通过所述在位信号线获取所述从设备的在位信号。
7、 根据权利要求 6所述的系统， 其特征在于， 所述从设备的存储器为电 可擦写可编程只读存储器 EEPROM, 所述通讯总线为内置集成电路 I2C总线。
8、 一种单板通讯方法， 其特征在于， 包括：
在从设备插入背板上的一个从设备插槽后，通过所述地址信号线获取从设 备所插接的槽位对应的地址信号；
根据所述地址信号配置自身的设备片选使能地址，并通过通讯总线与所述 主设备进行通讯。
9、 一种单板通讯方法， 其特征在于， 包括：
通过各在位信号线分别获取各从设备的在位信号，所述在位信号用于指示 所述单板的在线状态； 设备片选使能地址；
通过与所述从设备中存储器相连的通讯总线，根据各所述设备片选使能地 址分别与所述各在线从设备进行通讯。
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