WO2013140122A1 - Forming silicon dioxide on silicon carbide - Google Patents

Forming silicon dioxide on silicon carbide Download PDF

Info

Publication number
WO2013140122A1
WO2013140122A1 PCT/GB2013/050140 GB2013050140W WO2013140122A1 WO 2013140122 A1 WO2013140122 A1 WO 2013140122A1 GB 2013050140 W GB2013050140 W GB 2013050140W WO 2013140122 A1 WO2013140122 A1 WO 2013140122A1
Authority
WO
WIPO (PCT)
Prior art keywords
gaseous mixture
oxygen
silicon carbide
substrate
silicon dioxide
Prior art date
Application number
PCT/GB2013/050140
Other languages
French (fr)
Inventor
Peter Ward
Original Assignee
Anvil Semiconductors Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anvil Semiconductors Limited filed Critical Anvil Semiconductors Limited
Publication of WO2013140122A1 publication Critical patent/WO2013140122A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048Making electrodes
    • H01L21/049Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection

Definitions

  • the present invention relates to forming silicon dioxide (Si0 2 ) on silicon carbide (SiC) semiconductor particularly, but not exclusively, forming silicon dioxide on 4- step hexagonal silicon carbide (4H-SiC) .
  • Silicon carbide is a promising material for future power electronics applications because it can sustain much higher voltages and currents than silicon, can operate at much higher temperature than silicon and has a thermal conductivity similar to copper.
  • Silicon carbide exists in several different crystal forms (or “polytypes") depending on the sequence in which bi-layers of silicon and carbon stack.
  • One of the most commonly-used polytypes of silicon carbide is four-step hexagonal stacking sequence silicon carbide (4H-SiC) .
  • the material can be used to fabricate metal-oxide-semiconductor field-effect transistors (MOSFETs) .
  • MOSFETs S. Potbhare et al., Materials Science Forum Vols. 645 to 648, pages 975-978 (2010) which describes the problem of high concentration of interface traps.
  • Current techniques yield poor-quality oxide layers, with high concentrations of traps at the SiC/Si0 2 interface, and metal-oxide-semiconductor (MOS) devices formed with such oxides suffer exhibit low values of minority carrier mobility (for the region next to the interface), typically no more than about 30 cmYV 1 . This is well short of the mobility for bulk SiC which can reach values well in excess of 500 cm V s .
  • US 2010 090227 A describes forming a gate oxide on a silicon carbide substrate comprising oxidizing the substrate with a gaseous mixture comprising oxygen at a temperature of at least about 1300 °C in a sealed silica ampoule.
  • a silicon carbide substrate is placed in the ampoule.
  • the ampoule is evacuated, back filled with 20% oxygen and 80% argon and sealed.
  • the pressure in the sealed ampoule is about 0.17 atm at room temperature. Using this process, it is still only possible to achieve an inversion layer mobility of 12 cmYV 1 . This indicates a poor-quality oxide.
  • the present invention seeks to provide a method of forming better quality layers of silicon dioxide on silicon carbide.
  • a silicon carbide substrate for example, silicon carbide epitaxial layer or silicon carbide wafer
  • the method comprising heating the silicon carbide substrate to a temperature between 1400 °C and the melting point of the silicon dioxide and supplying a gaseous mixture comprising between 25 and 35% oxygen.
  • the combination of high temperature and controlled oxygen content can help the growth of a high-quality, stoichiometric silicon dioxide layer on silicon carbide.
  • the high temperature can help to increase diffusion rates of oxygen and carbonaceous reaction products through the silicon dioxide and diffusion rates of excess silicon through silicon carbide, while the controlled amount of oxygen can help to restrict the rate at which oxygen is introduced to the reaction to one where silicon carbide can grow at a rate which balances with the diffusion rates of reaction products and hence grow stoichiometric silicon dioxide and thereby reduce formation of volatile partial oxides.
  • the method may further comprise, before heating the substrate and supplying a gaseous mixture, implanting ions into the substrate. Flux of point defects through silicon carbide from oxidation may assist in repairing damage arising from implantation.
  • Dopant ions may be implanted into the substrate at room temperature.
  • the dopant may comprise a p-type dopant, such as boron or aluminium.
  • the dopant may comprise an n-type dopant, such as phosphorous or nitrogen.
  • the dopants may be implanted at a dose of at least 1 x 10 12 crrT 2 .
  • the dopants may be implanted at a dose of no more than 1 x 10 16 crrT 2
  • the dopants may be implanted at a dose between 5 x 10 13 crrT 2 and 5 x 10 15 crrT 2 .
  • the method may comprise, before implanting ions into the substrate, depositing a screen layer on the substrate.
  • Implanting the ions into the substrate may be carried out through the screen layer.
  • the screen layer may be removed prior to heating the substrate and supplying a gaseous mixture, i.e. prior to growing the thermal oxide.
  • the screen layer may comprise silicon dioxide, for example, having a thickness of at least 10 nm and a thickness no more than 200 nm.
  • the screen layer may be deposited by a chemical vapour deposition (CVD) process, such as LPCVD.
  • CVD chemical vapour deposition
  • a semiconductor structure or device comprising a silicon carbide substrate and a layer of silicon dioxide overlying the silicon carbide substrate.
  • Mobility of minority carrier electrons in an inversion layer beneath the silicon dioxide layer may be at least 20 cmYV 1 .
  • the mobility may be at least 50 cmVs .
  • the mobility may be at least 100 cmYV 1 .
  • Density of defect traps just below the conduction band (usually measured at 0.2 eV below the conduction band) may be less or substantially less than l l O 12 cm "2 eV _1 . Density of defect traps may be less than 5 x l O n cm "2 eV _1 .
  • the device may be a MOSFET and/ or an IGBT.
  • apparatus comprising a reactor chamber, a heater for heating a substrate within the chamber; and a gas supply configured to supply a gaseous mixture.
  • the apparatus is configured to heat the substrate to a temperature between 1400 °C and the melting point of the silicon dioxide and to supply a gaseous mixture comprising between 25 and 35% oxygen.
  • the temperature may be no more than 1550 °C, no more than 1540 °C, no more than 1530 °C, no more than 1510 °C or no more than 1500 °C.
  • the temperature may be at least 1410 °C, at least 1420 °C, at least 1430 °C, at least 1440 °C, at least 1450 °C, at least 1460 °C, at least 1470 °C, at least 1480 °C, at least 1490 °C or at least 1500 °C.
  • the gaseous mixture may comprise at least 26% oxygen, at least 27% oxygen, at least 28% oxygen or at least 29% oxygen.
  • the gaseous mixture may comprise not more than 35% oxygen, no more than 34% oxygen, no more than 33% oxygen, no more than 32% oxygen or no more than 31% oxygen.
  • the gaseous mixture may comprise between 28% and 32% oxygen.
  • the gaseous mixture may comprise between about 30% oxygen. This can help to form a better quality oxide and/or a better quality interface.
  • the concentration of oxygen in the mixture may be fixed during oxide growth.
  • the concentration of oxygen may be controllably varied during oxide growth.
  • the gaseous mixture may comprise oxygen and an inert carrier gas, such as argon.
  • the gaseous mixture may be at a pressure between 0.01 and 1 atmosphere (atm) .
  • the gaseous mixture may be at a pressure between 1 and 10 atmospheres, for example, between 1 and 2 atmospheres.
  • the gaseous mixture may be at a pressure of about 1 atmosphere.
  • the gaseous mixture may be at a pressure of between 0.5 and 2 atmospheres.
  • the substrate may be heated in a reactor and the gaseous mixture may flow at a rate of at least 1.5 V standard litres per minute (slm), where V is the volume of the reactor.
  • the gaseous mixture may flow at a rate of no more than 3 V slm.
  • the gaseous mixture may flow at a rate of about 2 V slm. This can help to produce good uniformity.
  • the method may comprise heating up the silicon carbide substrate in substantially pure argon, i.e. without any oxygen gas.
  • the pure argon may flow through a reactor at a flow rate of about 1.5 V to 3 V slm, where V is the volume of the reactor.
  • the method may comprise, once the substrate has reached the temperature (i.e. when the substrate has reached the temperature or given time later while the substrate is still at the temperature), adding oxygen to the argon so as to provide the gaseous mixture (or argon and oxygen) . This can help to control the formation of the oxide.
  • the method may comprise supplying the gaseous mixture for no more than 60 minutes, no more than 30 minutes or no more than 20 minutes.
  • the method may comprise supplying the gaseous mixture for at least 1 minute, at least 2 minutes or at least 5 minutes.
  • a short oxidation time can help to form a better quality oxide and/or a better quality interface.
  • the method may comprise supplying the gaseous mixture for at least 60 minutes.
  • a thick oxide may be used in a bipolar junction transistor (BJT) .
  • the silicon carbide substrate may comprise 4-step hexagonal silicon carbide.
  • the method may further comprise, after growing a thermal oxide on the silicon carbide substrate, annealing the thermal oxide in an inert or oxidizing atmosphere (or "ambient"), for example at about 1100 °C.
  • the method may further comprise, after growing a thermal oxide on the silicon carbide substrate, holding the silicon carbide and substrate at the temperature (i.e. a temperature at which oxidation is carried out) in an inert ambient, such as argon gas. This can help allow oxidation products to move away from the interface between the thermal oxide and silicon nitride.
  • the inert atmosphere or ambient may be below atmospheric pressure.
  • Figure 1 illustrates a lattice structure of 4-step hexagonal silicon carbide
  • FIGS. 2a to 2d illustrate some of the process involved during oxidation of silicon carbide
  • Figure 3 is a process flow diagram of a method of forming silicon dioxide
  • Figure 4 illustrates a layer of SiO z on silicon carbide
  • Figure 5 is a schematic diagram of apparatus for forming silicon dioxide and in which part of a heater is shown cut away to show a wafer carrier more clearly;
  • Figure 6 shows plots of capacitance against gate bias for samples comprising silicon dioxide grown on silicon carbide at 1500 °C at atmospheric pressure in 30 minutes with oxygen concentrations of 15%, 25% and 35% oxygen and using argon as a dilutant;
  • Figure 7 shows plots of capacitance against gate bias for samples comprising silicon dioxide grown on silicon carbide at 1500 °C at atmospheric pressure in 30 minutes with oxygen concentrations of 10, 20, 30 and 40% and using argon as a dilutant;
  • Figure 8 shows a smoothed plot of density of interface states against trap energy below the conduction band edge for a sample grown at 30% oxygen at 1500 °C for 30 minutes;
  • Figure 9 schematically illustrates a metal-oxide-semiconductor field-effect transistor including a gate oxide grown on silicon carbide
  • Figure 10 are plots of proportion of silicon dioxide, amorphous silicon carbide and crystalline silicon carbide at a surface of a silicon carbide wafer for different doses of phosphorous implant and different annealing conditions;
  • Figure 1 1 are plots of proportion of silicon dioxide, amorphous silicon carbide and crystalline silicon carbide at a surface of a silicon carbide wafer for different doses of aluminium implant and different annealing conditions.
  • Silicon carbide is a wide-band semiconductor which exists in several polytypes, including 3-step cubic silicon carbide, 4-step hexagonal silicon carbide and 6-step hexagonal silicon carbide.
  • Figure 1 schematically shows the structure of 4-step hexagonal silicon carbide.
  • silicon carbide comprises atoms of silicon and carbon forming tetragonal structures and having an ABAC stacking sequence. This polytype can be most easily grown in the form of a substantial crystal and cut into wafers for device fabrication.
  • Silicon carbide can be thermally oxidized to form silicon dioxide, for example, using dry oxygen according the chemical reaction:
  • the process is carried out at about 1100 to 1200 °C. At this temperature excess silicon which is not required for the formation of silicon dioxide has a very slow interstitial diffusion rate through silicon carbide and a carbon-rich interface layer is also formed, as described, for example, in "Relationship between 4H- SiC/Si02 transition layer thickness and mobility" supra.
  • the process starts by oxygen binding to silicon atoms at an exposed surface of silicon carbide.
  • the process continues by oxygen 4 diffusing, at a rate R 02 , through the silicon dioxide 2 to an interface 5 between silicon dioxide 2 and underlying silicon carbide 1 where it reacts with silicon carbide, at a reaction rate R Sl c-o > to form silicon dioxide 2 and reaction products 6, such as carbon monoxide, which diffuse, at a rate R co , back through silicon dioxide.
  • Partial oxides 7, such as silicon monoxide can also form which are highly volatile and which can readily diffuse back through the silicon dioxide, at a rate R Sl0 , before a stable oxide, i.e. silicon dioxide, is formed.
  • the formation of volatile partial oxides can occur if the oxygen concentration is too low. However, during oxidation of silicon carbide, this can occur even at a high oxygen concentration because the reaction rate, R Sl _ 0 , is very low.
  • Silicon atoms 8 and carbon atoms 9 may also be generated at the interface 5 and diffuse through silicon carbide crystal 1.
  • the present invention is based, at least in part, on the insight that formation of volatile partial oxides may be contributing to the problem of poor quality oxide formation.
  • Other insights include appreciation of the fact that a failure to remove carbon from the growth interface may also be contributing to the problem, as well as the fact that excess silicon may result in excess silicon interstitials which, in silicon carbide, diffuse slowly, and which can provide trapping centres.
  • One or more of these factors may contribute to surface roughness and the formation of traps which result in low values of mobility.
  • a layer 13 of silicon dioxide can be deposited on the thermal dioxide 11 using chemical vapour deposition (CVD) in a manner which is known per se.
  • a 4H-SiC substrate 11 in the form of an n-type [0001] wafer is loaded into a reactor 14.
  • the wafer 11 may be one of a plurality of wafers held in a carrier 15, in this case, a cassette, made from silicon carbide.
  • the wafer(s) 11 may be cleaned prior to loading, for example, using a hydrofluoric acid (HF) dip.
  • the reactor 14 comprises an elongate, generally-cylindrical furnace tube 16 formed from silicon carbide having a narrow neck portion 17 which broadens into a wider body portion 18.
  • the wider body portion 18 has an open end 19 so as to allow loading and unloading of the carrier 15.
  • the reactor 14 includes a heater 20 arranged outside the furnace tube 16.
  • the heater 20 comprises a plurality of 'U'-shaped heating elements.
  • a front portion of the furnace tube 16 and a middle section of a front, central heating element 20 are omitted for clarity so as to show the carrier 15.
  • the heating elements 20 are arranged so that vertical rod portions 21 are angularly spaced around a central axis 22 to form a central space 23 in which the furnace tube 16 can sit.
  • the heating element 20 is made from molybdenum silicide (MoSi 2 ) and is designed for high-temperature (up to about 1800 °C) operation.
  • MoSi 2 molybdenum silicide
  • Temperature is monitored using pyrometers 24, 25, 26.
  • three pyrometers 24, 25, 26 are used.
  • a first pyrometer 24 is arranged to measure the temperature of the wafer 14
  • a second pyrometer 25 is arranged to measure the temperature of the heater winding 20
  • a third pyrometer 26 is arranged to measure the temperature of the furnace tube 16.
  • the furnace tube 16 can be fed with a gas mixture 28 comprising dry oxygen (0 2 ) gas 29 and an inert carrier gas 30, in this case, argon (Ar) gas. Nitrogen (N 2 ) is not used as the inert carrier gas (at least at high temperatures) since nitrogen gas is thought to react with silicon carbide and oxygen gas to form silicon oxynitride. Valves 31, 32 control the mixture of oxygen and carrier gases 29, 30.
  • the gas mixture 28 has a flow rate of about 5 slm (standard litres per minute) .
  • the furnace tube 16 can also be fed with nitrogen gas 33, via a valve 34, for purging the furnace tube 16 when in standby mode.
  • the furnace tube 16 (or at least an active volume which holds the wafer(s) 16) has a volume of about 1 litre (11) .
  • the furnace tube 16 and heater 20 are shrouded by insulation 35.
  • the mixture 28 contains a controlled amount of oxygen which may be between about 25 and about 35%, preferably around 30%, by volume of oxygen at atmospheric pressure (about 101 kPa) .
  • a controlled amount of oxygen which may be between about 25 and about 35%, preferably around 30%, by volume of oxygen at atmospheric pressure (about 101 kPa) .
  • the oxygen flow rate and the inert carrier gas flow rate are 500 seem and 1500 seem respectively and to achieve 35% oxygen, the oxygen flow rate and the inert carrier gas flow rate are 700 seem and 1300 seem respectively.
  • the volume of oxygen is controlled during growth. Lower pressures, down to about 0.1 atmospheres (about 10 kPa) or 0.01 atmospheres (about 1 kPa) can be used.
  • the wafer 11 is heated in pure argon to a target temperature of about 1550 °C at a pressure of about 1 atmosphere (about 101 kPa) (step SI) .
  • the target temperature is just below the melting point of amorphous silicon dioxide, which is about 1600 °C.
  • silicon dioxide is formed in a solid phase and does not pass into a liquid phase during or after formation.
  • a temperature between about 1400 °C and 1550 °C can be used.
  • step S2 oxygen is introduced into the argon gas, having a partial pressure of about 25 to 35 kPa (step S2) .
  • the resulting gas mixture contains about 25 to 35% oxygen.
  • the mixture thermally oxidizes silicon carbide to form stoichiometric silicon dioxide (Si0 2 ) 12.
  • the rate of growth can be of the order of magnitude of 10 nm hr -1 .
  • the oxygen content is chosen such that stoichiometric silicon dioxide is grown for a given temperature.
  • the SiO z layer 12 is annealed in an inert or oxidizing atmosphere at a temperature in a range of about 1100 °C to the temperature used for oxidation (step S3) .
  • a SiO z layer 12 having a thickness, t, of up to 200 nm can be grown.
  • a thicker layer 13 of silicon dioxide, for example, up to 100 nm or more, can be grown by chemical vapour deposition on top of the thermal oxide 12 (step S4) .
  • the process can be used to grow a thermal oxide on 4H-SiC having a substantially lower density of interface traps compared with, for example, the value of 10 12 cm “ 2 eY disclosed in "Effect of nitric oxide annealing on the interface trap density near the conduction band edge of 4H-SiC at the oxide/ (11 -20) 4H-SiC interface", S. Dhar et al., Applied Physics Letters, volume 84, number 9, page 1498 (2004) .
  • the density of interface traps may be less than 5 X 10 11 cm “2 eV , 2 X 10 11 cm “2 eV 4 or less than 1 X 10 11 cm "2 eV _1 .
  • Silicon dioxide is grown at atmospheric pressure on different samples each comprising low doped, n-type epitaxial 4H-SiC (not shown) having a doping density of about l Xl O 16 cm at different temperatures and different oxygen concentrations.
  • Table 1 shows the thickness of SiO z grown in 60 minutes at 1400 °C at different oxygen concentrations using argon (Ar) as a dilutant:
  • Table 2 shows the thickness of Si0 2 grown in 60 minutes at 1500 °C at different oxygen concentrations using argon (Ar) as a dilutant:
  • Table 3 shows the thickness of SiO z grown at 1500 °C in 20 minutes at different oxygen concentrations using argon (Ar) as a dilutant:
  • Table 4 shows the thickness of SiO z grown at 1500 °C for different growth times at 30% oxygen concentrations using argon (Ar) as a dilutant:
  • Table 5 shows the thickness of Si0 2 grown at 1500 °C in 30 minutes at different oxygen concentrations using argon (Ar) as a dilutant:
  • Tables 1 , 2 and 3 are measured using an ellipsometer. However, in Table 2, the thickness of the SiO z grown at 1500 °C and 8% oxygen is also measured by a mercury probe and yields the same result at the ellipsometer. The thicknesses in Tables 4 and 5 are calculated from enhancement capacitance.
  • the thickness of SiO z grown increases more slowly with increasing oxygen concentration than for oxygen concentrations below 35%. This supports the model that, for an oxygen concentration of 35% and above, the oxidation rate is limited by the rate of removal of oxidation products from the interface.
  • the oxidation rate is more sensitive to oxygen concentration since oxidation is limited by the availability of oxygen.
  • the interface quality between the silicon dioxide and silicon carbide is found to be poor. Without wishing to be bound by a particular theory, this thought to be due to the fact that carbon is more
  • the transition between the first and second oxide growth regimes is temperature dependent. Higher temperatures tend to promote diffusion and, thus, removal of oxidation products leading to a transition at a higher oxygen concentration.
  • C-V capacitance-voltage
  • the plot shows larger hysteresis.
  • a larger amount of hysteresis indicates a larger amount of charge storage in at the interface in traps.
  • the silicon dioxide layer grown at 35% oxygen concentration shows steeper fall off.
  • Figure 6 also shows that, on the one hand, the silicon dioxide layer grown at 25% oxygen concentration exhibits a low flat band voltage and, on the other hand, the silicon dioxide layers grown at 15 and 35 % oxygen concentrations exhibit higher flat band voltage.
  • FIG. 7 shows normalised capacitance-voltage (C-V) plots for oxide layers grown at 1500 °C in 30 minutes at 10, 20, 30 and 40% oxygen concentrations using argon (Ar) as the carrier gas.
  • the voltage polarity of the C-V plot is opposite of what would normally be expected for a measurement of n-type material
  • the plots show that the silicon dioxide layer grown at 10% oxygen concentration is clearly poorer, the silicon dioxide layers grown at 20% and 40% oxygen concentrations are similar whereas the silicon dioxide layer grown at 30% oxygen concentration exhibits the best result with the fastest fall off in capacitance with voltage indicating better interface state density.
  • the C-V data is analysed to extract densities of interface states (Dit) at 0.2 eV below the conduction band edge taken from plots (not shown) of densities of interface states fitted with a curve from the enhancement capacitance side of the plot.
  • Table 6 shows that the best result, i.e. lowest value of Dit, is for a silicon dioxide layer grown at 30%: Table 6
  • Figure 8 shows a smoothed plot of the density of interface states (Dit) with energy below the conduction band edge for a silicon dioxide layer grown at 1500 °C in 30 minutes at an oxygen concentration of 30 %.
  • the plot is derived from 1 kHz C— V measurement.
  • a curve fitting technique is used which combines a curve extending from the enhancement side of the plot (on the left-hand side of the plot) into the band gap and a curve extending from deep depletion side of the plot (on the right-hand side of the plot) .
  • the density of interface states is 3 X 10 n cm _2 V" at 0.2 eV below the conduction band edge.
  • the silicon dioxide later exhibits a dielectric strength of about 10 MVcrrT 1 which is close to the known limit dielectric strength. This suggests a good stoichiometry.
  • a process whereby silicon oxide is grown using oxygen having a concentration of between 25 and 35% oxygen (for example at a concentration tending towards 30% or at concentration at or around 30%) and at a temperature between 1400 °C and the melting point of silicon dioxide (for example, at a temperatures tending towards 1500 °C, at or around 1500 °C or higher than 1500 °C) using argon as a dilutant results in high-quality, stoichiometric silicon dioxide layer on silicon carbide.
  • the process can lead to one or more other advantages.
  • the effective doping density in the epitaxial silicon carbide is found to increase by about 3 times. Without wishing to be bound by theory, this is thought to arise as a result of flow of carbon interstitials away from the oxidizing interface thereby increasing the crystal quality of the epitaxial layer.
  • MOSFET metal-oxide-semiconductor
  • the process may also allow MOSFETs to be designed without the need to compensate for a lower maximum critical electric field, i.e. to be designed assuming that the maximum critical electric field is closer to the 4H-SiC unipolar limit and so allow performance to be improved and/or reducing the size of the device.
  • the process may circumvent the need for a post-oxidation anneal in nitric oxide (NO), nitrous oxide (N 2 0) or phosphorous oxychloride (POCl 3 ) .
  • a post-oxidation anneal tends to reduce threshold voltage of a MOSFET.
  • a wafer 11 and oxide layer(s) 12, 13 can be processed (step S5) to form silicon carbide semiconductor devices, for example, diodes, MOSFETs or insulated gate bipolar transistors (IGBTs), having high values of mobility, e.g. at least 20 cmYV 1 .
  • silicon carbide semiconductor devices for example, diodes, MOSFETs or insulated gate bipolar transistors (IGBTs), having high values of mobility, e.g. at least 20 cmYV 1 .
  • the device 41 comprises a highly-doped, n-type 4-step hexagonal single crystal silicon carbide substrate 42, which provides a drain and supports an epitaxial layer 43 of lightly-doped, n-type 4-step hexagonal silicon carbide which provides a drift region.
  • P-type wells 34 at the surface 45 of the epitaxial layer 43 provide body regions.
  • NT- type wells 46 within the p-type wells 44 provide contact regions.
  • a channel 47 is formed beneath a gate 48 which is separated using a gate oxide 49 grown using the process hereinbefore described.
  • the silicon oxide is grown using oxygen having a concentration of between 25 and 35% oxygen (for example 30% or tending towards to 30%) and at a temperature between 1400 °C and the melting point of silicon dioxide (for example at a temperatures tending towards 1500 °C, at or around 1500 °C or higher) using argon as a dilutant.
  • the wafer is heated in substantially pure argon, i.e. without oxygen.
  • thermal silicon dioxide on silicon carbide can improve recovery of damage resulting from implanting dopants into the wafer prior to growing the silicon dioxide.
  • a set of experiments are conducted based on implanting and annealing
  • 100 mm-diameter wafers of4H-SiC (not shown) are used. 50 nm of LPCVD Si0 2 is deposited on each wafer to provide a screen oxide.
  • Phosphorous (P) is implanted into a whole wafer (not shown) at room temperature with a dose of 5 x l 0 13 cm “2 and an energy of 300 keV.
  • the implant has a projected range, R p , of about 230 nm and a standard deviation (or "straggle"), sd, of about 45 nm (such that (R p - 3sd) is about 95nm) and results in disorder of about 8% at the surface of the wafer.
  • Phosphorous is implanted in a central region of wafer (not shown) at room temperature, the region having a diameter of 1.0 inch (25.4 mm) with a dose of 5 x l 0 15 cm "2 and energy of 300 keV.
  • the implant results in 100% disorder at the surface of the wafer.
  • Aluminium (Al) is implanted into a whole wafer (not shown) at room temperature with a dose of 5 x l 0 13 cm “2 and at an energy of 240keV.
  • the implant has a projected range, R p , of about 270nm and a standard deviation, sd, of about 64nm (such that R p - 3sd is about 80nm) resulting in disorder of about 6% at the surface of the wafer.
  • Aluminium is implanted in a central region of wafer (not shown) at room
  • the region having a diameter of 1.0 inch (25.4 mm) with a dose of 5 x l 0 15 cm “2 and an energy of 240 keV.
  • the implant results in 100% disorder at the surface of the wafer.
  • oxidizing anneal and annealing in the absence of any oxidising atmosphere (herein referred to as an “inert” anneal) using the same wafer, 0.5 ⁇ of LPCVD silicon dioxide is deposited on both sides of each wafers and then approximately half of the wafer is dipped in hydrofluoric (HF) acid to reveal the surface.
  • HF hydrofluoric
  • annealing is carried out at 1500 °C for 60 minutes in a gaseous mixture comprising 25% oxygen using nitrogen as a dilutant and then 60 minutes in pure nitrogen.
  • the samples are analysed using Rutherford backscattering (RBS) after the implant and again after annealing in four areas or "zones" namely front centre, front annulus, back centre and back annulus resulting from two different implant conditions and two different two anneal conditions.
  • RBS Rutherford backscattering
  • the results of the RBS analysis are processed by software to produce a depth profile of a surface oxide, a highly damaged region (if it exists) and a re-grown crystalline region (if it exists) .
  • post annealing data shows that damage from both high- and low-dose implants is repaired to at least some degree by annealing.
  • the experiment shows that a phosphorous implant can be performed at room temperature and can be successfully annealed at 1500 °C.
  • the implant need not be annealed at high temperature (e.g. > 1600 °C) and does not require a carbon cap to protect the SiC surface.
  • post annealing data shows that for a high-dose implant and an inert anneal, the highly-damaged region has a similar in thickness (about 300nm) to that predicted by SUSPRE simulation for 100% damage.
  • the depth of the highly- damaged region is reduced and there are hints of annealing at the surface. Thus suggests that point defects may be helpful in recovering the damage.
  • Figure 8 also shows that for a low-dose implant, crystal damage is completely repaired for an inert anneal and for an oxidizing anneal.
  • the experiment shows that small amounts of damage (e.g. 6% disorder) caused by a phosphorous implant performed at room temperature can be recovered by annealing at 1500 °C under a thin oxide to preserve the surface. Furthermore, repair of a fully amorphous implant can be assisted by an oxidizing anneal.
  • damage e.g. 6% disorder
  • the oxidation processes described hereinbefore, for example with reference to Figure 3 may modified by implanting dopants (n-type or p-type) into a silicon carbide substrate through a (temporary) silicon oxide layer (e.g. one deposited by LPCVD) which is removed before growing a thermal silicon oxide layer.
  • dopants n-type or p-type
  • a silicon carbide substrate through a (temporary) silicon oxide layer (e.g. one deposited by LPCVD) which is removed before growing a thermal silicon oxide layer.
  • the process may be used to grow silicon dioxide on other polytypes of silicon carbide, for example 3C-SiC and 6H-SiC.
  • the process may be used to silicon dioxide on faces other than (0001) silicon face, for example, the (000-1) carbon face or the (11 -20) face or £ a'-face.
  • Silicon dioxide can be grown at different pressures, e.g. between 0.01 atmosphere and 1 atmosphere. Silicon dioxide can be grown at higher pressures, i.e. more than 1 atmosphere, for example between about 1 and about 2 atmospheres or between about 2 and about 10 atmospheres.
  • the gas mixture can have lower or higher flow rates than 2 slm, for example between about 1 and 10 slm.
  • the reactor can have other configurations and may be formed from other un- reactive materials.
  • the heater may have other configurations and be formed from other materials.
  • the anneal temperature may be higher, for example, up to about 1300 °C.
  • the post-oxidation anneal can be carried out in, for example an atmosphere comprising nitric oxide, for example as described in "Effect of nitric oxide annealing on the interface trap density near the conduction band edge of 4H— SiC at the oxide/(l 1 -20) 4H— SiC interface" supra., or other suitable atmosphere.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Forming silicon dioxide on a silicon carbide A method of forming silicon dioxide on a silicon carbide substrate is disclosed. The method comprises heating the silicon carbide substrate to a temperature between 400 °C and the melting point of silicon dioxide and supplying a gaseous mixture comprising between about 25 and 35% oxygen.

Description

Forming silicon dioxide on silicon carbide
Field of the Invention
The present invention relates to forming silicon dioxide (Si02) on silicon carbide (SiC) semiconductor particularly, but not exclusively, forming silicon dioxide on 4- step hexagonal silicon carbide (4H-SiC) .
Background
Silicon carbide is a promising material for future power electronics applications because it can sustain much higher voltages and currents than silicon, can operate at much higher temperature than silicon and has a thermal conductivity similar to copper.
Silicon carbide exists in several different crystal forms (or "polytypes") depending on the sequence in which bi-layers of silicon and carbon stack.
One of the most commonly-used polytypes of silicon carbide is four-step hexagonal stacking sequence silicon carbide (4H-SiC) . The material can be used to fabricate metal-oxide-semiconductor field-effect transistors (MOSFETs) .
Current techniques for growing silicon dioxide on 4H-SiC is based on thermal oxidation using nitrogen monoxide (NO), nitrous oxide (N20), dry oxygen (02) or wet oxygen from a water bubbler or hydrogen torch. Reference is made to
"Inversion layer electron transport in 4H-SiC metal-oxide-semiconductor field- effect transistors", V. Tilak, Physica Status Solidi A, volume 206, number 10, pages 2391 to 2402 (2009) which gives a general overview of current techniques,
"Relationship between 4H-SiC/Si02 transition layer thickness and mobility", T. L. Biggerstaff et al., Applied Physics Letters, volume 95, page 032108 (2009) which explains the relationship between interface layer and mobility and "Effect of Band- edge Interface Traps and Transition Region Mobility Transport in 4H-SiC
MOSFETs", S. Potbhare et al., Materials Science Forum Vols. 645 to 648, pages 975-978 (2010) which describes the problem of high concentration of interface traps. Current techniques yield poor-quality oxide layers, with high concentrations of traps at the SiC/Si02 interface, and metal-oxide-semiconductor (MOS) devices formed with such oxides suffer exhibit low values of minority carrier mobility (for the region next to the interface), typically no more than about 30 cmYV1. This is well short of the mobility for bulk SiC which can reach values well in excess of 500 cm V s .
US 2010 090227 A describes forming a gate oxide on a silicon carbide substrate comprising oxidizing the substrate with a gaseous mixture comprising oxygen at a temperature of at least about 1300 °C in a sealed silica ampoule. A silicon carbide substrate is placed in the ampoule. The ampoule is evacuated, back filled with 20% oxygen and 80% argon and sealed. The pressure in the sealed ampoule is about 0.17 atm at room temperature. Using this process, it is still only possible to achieve an inversion layer mobility of 12 cmYV1. This indicates a poor-quality oxide.
Summary
The present invention seeks to provide a method of forming better quality layers of silicon dioxide on silicon carbide. According to a first aspect of the present invention there is provided method of forming silicon dioxide on a silicon carbide substrate (for example, silicon carbide epitaxial layer or silicon carbide wafer), the method comprising heating the silicon carbide substrate to a temperature between 1400 °C and the melting point of the silicon dioxide and supplying a gaseous mixture comprising between 25 and 35% oxygen.
The combination of high temperature and controlled oxygen content can help the growth of a high-quality, stoichiometric silicon dioxide layer on silicon carbide. The high temperature can help to increase diffusion rates of oxygen and carbonaceous reaction products through the silicon dioxide and diffusion rates of excess silicon through silicon carbide, while the controlled amount of oxygen can help to restrict the rate at which oxygen is introduced to the reaction to one where silicon carbide can grow at a rate which balances with the diffusion rates of reaction products and hence grow stoichiometric silicon dioxide and thereby reduce formation of volatile partial oxides.
The method may further comprise, before heating the substrate and supplying a gaseous mixture, implanting ions into the substrate. Flux of point defects through silicon carbide from oxidation may assist in repairing damage arising from implantation.
Dopant ions may be implanted into the substrate at room temperature. The dopant may comprise a p-type dopant, such as boron or aluminium. The dopant may comprise an n-type dopant, such as phosphorous or nitrogen. The dopants may be implanted at a dose of at least 1 x 1012 crrT2. The dopants may be implanted at a dose of no more than 1 x 1016 crrT2 The dopants may be implanted at a dose between 5 x 1013 crrT2 and 5 x 1015 crrT2. The method may comprise, before implanting ions into the substrate, depositing a screen layer on the substrate. Implanting the ions into the substrate may be carried out through the screen layer. The screen layer may be removed prior to heating the substrate and supplying a gaseous mixture, i.e. prior to growing the thermal oxide. The screen layer may comprise silicon dioxide, for example, having a thickness of at least 10 nm and a thickness no more than 200 nm. The screen layer may be deposited by a chemical vapour deposition (CVD) process, such as LPCVD.
According to a second aspect of the present invention there is provided a semiconductor structure or device comprising a silicon carbide substrate and a layer of silicon dioxide overlying the silicon carbide substrate. Mobility of minority carrier electrons in an inversion layer beneath the silicon dioxide layer may be at least 20 cmYV1. The mobility may be at least 50 cmVs . The mobility may be at least 100 cmYV1. Density of defect traps just below the conduction band (usually measured at 0.2 eV below the conduction band) may be less or substantially less than l l O12 cm"2eV_1. Density of defect traps may be less than 5 x l On cm"2eV_1.
The device may be a MOSFET and/ or an IGBT. According to a third aspect of the present invention there is provided apparatus comprising a reactor chamber, a heater for heating a substrate within the chamber; and a gas supply configured to supply a gaseous mixture. The apparatus is configured to heat the substrate to a temperature between 1400 °C and the melting point of the silicon dioxide and to supply a gaseous mixture comprising between 25 and 35% oxygen.
The temperature may be no more than 1550 °C, no more than 1540 °C, no more than 1530 °C, no more than 1510 °C or no more than 1500 °C. The temperature may be at least 1410 °C, at least 1420 °C, at least 1430 °C, at least 1440 °C, at least 1450 °C, at least 1460 °C, at least 1470 °C, at least 1480 °C, at least 1490 °C or at least 1500 °C. The gaseous mixture may comprise at least 26% oxygen, at least 27% oxygen, at least 28% oxygen or at least 29% oxygen. The gaseous mixture may comprise not more than 35% oxygen, no more than 34% oxygen, no more than 33% oxygen, no more than 32% oxygen or no more than 31% oxygen.
The gaseous mixture may comprise between 28% and 32% oxygen. The gaseous mixture may comprise between about 30% oxygen. This can help to form a better quality oxide and/or a better quality interface. The gaseous mixture may comprise no more than more than P%, Q %, R%, S%, U% or V% oxygen, where P= P = 0.14 T -175, Q = 0.14 T - 176, R = 0.14 T - 177, S = 0.14 T - 178, U = 0.14 T - 179 and V = 0.14 T - 180 respectively.
The concentration of oxygen in the mixture may be fixed during oxide growth. The concentration of oxygen may be controllably varied during oxide growth.
The gaseous mixture may comprise oxygen and an inert carrier gas, such as argon. The gaseous mixture may be at a pressure between 0.01 and 1 atmosphere (atm) . The gaseous mixture may be at a pressure between 1 and 10 atmospheres, for example, between 1 and 2 atmospheres. The gaseous mixture may be at a pressure of about 1 atmosphere. The gaseous mixture may be at a pressure of between 0.5 and 2 atmospheres.
The substrate may be heated in a reactor and the gaseous mixture may flow at a rate of at least 1.5 V standard litres per minute (slm), where V is the volume of the reactor. The gaseous mixture may flow at a rate of no more than 3 V slm. The gaseous mixture may flow at a rate of about 2 V slm. This can help to produce good uniformity. The method may comprise heating up the silicon carbide substrate in substantially pure argon, i.e. without any oxygen gas. The pure argon may flow through a reactor at a flow rate of about 1.5 V to 3 V slm, where V is the volume of the reactor. The method may comprise, once the substrate has reached the temperature (i.e. when the substrate has reached the temperature or given time later while the substrate is still at the temperature), adding oxygen to the argon so as to provide the gaseous mixture (or argon and oxygen) . This can help to control the formation of the oxide.
The method may comprise supplying the gaseous mixture for no more than 60 minutes, no more than 30 minutes or no more than 20 minutes. The method may comprise supplying the gaseous mixture for at least 1 minute, at least 2 minutes or at least 5 minutes. A short oxidation time can help to form a better quality oxide and/or a better quality interface.
The method may comprise supplying the gaseous mixture for at least 60 minutes. For example, a thick oxide may be used in a bipolar junction transistor (BJT) .
The silicon carbide substrate may comprise 4-step hexagonal silicon carbide.
The method may further comprise, after growing a thermal oxide on the silicon carbide substrate, annealing the thermal oxide in an inert or oxidizing atmosphere (or "ambient"), for example at about 1100 °C. The method may further comprise, after growing a thermal oxide on the silicon carbide substrate, holding the silicon carbide and substrate at the temperature (i.e. a temperature at which oxidation is carried out) in an inert ambient, such as argon gas. This can help allow oxidation products to move away from the interface between the thermal oxide and silicon nitride. The inert atmosphere or ambient may be below atmospheric pressure.
Brief Description of the Drawings
Certain embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
Figure 1 illustrates a lattice structure of 4-step hexagonal silicon carbide;
Figures 2a to 2d illustrate some of the process involved during oxidation of silicon carbide;
Figure 3 is a process flow diagram of a method of forming silicon dioxide;
Figure 4 illustrates a layer of SiOz on silicon carbide;
Figure 5 is a schematic diagram of apparatus for forming silicon dioxide and in which part of a heater is shown cut away to show a wafer carrier more clearly;
Figure 6 shows plots of capacitance against gate bias for samples comprising silicon dioxide grown on silicon carbide at 1500 °C at atmospheric pressure in 30 minutes with oxygen concentrations of 15%, 25% and 35% oxygen and using argon as a dilutant;
Figure 7 shows plots of capacitance against gate bias for samples comprising silicon dioxide grown on silicon carbide at 1500 °C at atmospheric pressure in 30 minutes with oxygen concentrations of 10, 20, 30 and 40% and using argon as a dilutant; Figure 8 shows a smoothed plot of density of interface states against trap energy below the conduction band edge for a sample grown at 30% oxygen at 1500 °C for 30 minutes;
Figure 9 schematically illustrates a metal-oxide-semiconductor field-effect transistor including a gate oxide grown on silicon carbide;
Figure 10 are plots of proportion of silicon dioxide, amorphous silicon carbide and crystalline silicon carbide at a surface of a silicon carbide wafer for different doses of phosphorous implant and different annealing conditions; and
Figure 1 1 are plots of proportion of silicon dioxide, amorphous silicon carbide and crystalline silicon carbide at a surface of a silicon carbide wafer for different doses of aluminium implant and different annealing conditions. Detailed Description of Certain Embodiments
Silicon carbide is a wide-band semiconductor which exists in several polytypes, including 3-step cubic silicon carbide, 4-step hexagonal silicon carbide and 6-step hexagonal silicon carbide. Figure 1 schematically shows the structure of 4-step hexagonal silicon carbide. As shown in Figure 1, silicon carbide comprises atoms of silicon and carbon forming tetragonal structures and having an ABAC stacking sequence. This polytype can be most easily grown in the form of a substantial crystal and cut into wafers for device fabrication.
Silicon carbide can be thermally oxidized to form silicon dioxide, for example, using dry oxygen according the chemical reaction:
Figure imgf000009_0001
Typically, the process is carried out at about 1100 to 1200 °C. At this temperature excess silicon which is not required for the formation of silicon dioxide has a very slow interstitial diffusion rate through silicon carbide and a carbon-rich interface layer is also formed, as described, for example, in "Relationship between 4H- SiC/Si02 transition layer thickness and mobility" supra.
Referring to Figures 2a to 2d, some of the processes involved in thermal oxidation of silicon carbide 1 to form silicon dioxide 2 using an oxygen-containing
atmosphere 3 are shown.
Not shown in Figures 2a to 2d, the process starts by oxygen binding to silicon atoms at an exposed surface of silicon carbide.
Once a thin layer of silicon dioxide 2 has been formed, the process continues by oxygen 4 diffusing, at a rate R02, through the silicon dioxide 2 to an interface 5 between silicon dioxide 2 and underlying silicon carbide 1 where it reacts with silicon carbide, at a reaction rate RSlc-o> to form silicon dioxide 2 and reaction products 6, such as carbon monoxide, which diffuse, at a rate Rco, back through silicon dioxide. Partial oxides 7, such as silicon monoxide, can also form which are highly volatile and which can readily diffuse back through the silicon dioxide, at a rate RSl0, before a stable oxide, i.e. silicon dioxide, is formed. During oxidation of silicon (Si), the formation of volatile partial oxides can occur if the oxygen concentration is too low. However, during oxidation of silicon carbide, this can occur even at a high oxygen concentration because the reaction rate, RSl_0, is very low.
Silicon atoms 8 and carbon atoms 9 may also be generated at the interface 5 and diffuse through silicon carbide crystal 1. The present invention is based, at least in part, on the insight that formation of volatile partial oxides may be contributing to the problem of poor quality oxide formation. Other insights include appreciation of the fact that a failure to remove carbon from the growth interface may also be contributing to the problem, as well as the fact that excess silicon may result in excess silicon interstitials which, in silicon carbide, diffuse slowly, and which can provide trapping centres. One or more of these factors may contribute to surface roughness and the formation of traps which result in low values of mobility.
Referring to Figures 3, 4 and 5, a method of forming, on a substrate 11 comprising four-step hexagonal-step silicon carbide (4H-SiC), a layer 12 of thermal silicon dioxide 11 in accordance with the present invention will now be described.
Optionally, a layer 13 of silicon dioxide can be deposited on the thermal dioxide 11 using chemical vapour deposition (CVD) in a manner which is known per se. A 4H-SiC substrate 11 in the form of an n-type [0001] wafer is loaded into a reactor 14. The wafer 11 may be one of a plurality of wafers held in a carrier 15, in this case, a cassette, made from silicon carbide. The wafer(s) 11 may be cleaned prior to loading, for example, using a hydrofluoric acid (HF) dip. The reactor 14 comprises an elongate, generally-cylindrical furnace tube 16 formed from silicon carbide having a narrow neck portion 17 which broadens into a wider body portion 18. The wider body portion 18 has an open end 19 so as to allow loading and unloading of the carrier 15. The reactor 14 includes a heater 20 arranged outside the furnace tube 16. The heater 20 comprises a plurality of 'U'-shaped heating elements. In Figure 5, a front portion of the furnace tube 16 and a middle section of a front, central heating element 20 are omitted for clarity so as to show the carrier 15. The heating elements 20 are arranged so that vertical rod portions 21 are angularly spaced around a central axis 22 to form a central space 23 in which the furnace tube 16 can sit. The heating element 20 is made from molybdenum silicide (MoSi2) and is designed for high-temperature (up to about 1800 °C) operation.
Temperature is monitored using pyrometers 24, 25, 26. In this example, three pyrometers 24, 25, 26 are used. A first pyrometer 24 is arranged to measure the temperature of the wafer 14, a second pyrometer 25 is arranged to measure the temperature of the heater winding 20 and a third pyrometer 26 is arranged to measure the temperature of the furnace tube 16.
The furnace tube 16 can be fed with a gas mixture 28 comprising dry oxygen (02) gas 29 and an inert carrier gas 30, in this case, argon (Ar) gas. Nitrogen (N2) is not used as the inert carrier gas (at least at high temperatures) since nitrogen gas is thought to react with silicon carbide and oxygen gas to form silicon oxynitride. Valves 31, 32 control the mixture of oxygen and carrier gases 29, 30. The gas mixture 28 has a flow rate of about 5 slm (standard litres per minute) . The furnace tube 16 can also be fed with nitrogen gas 33, via a valve 34, for purging the furnace tube 16 when in standby mode. The furnace tube 16 (or at least an active volume which holds the wafer(s) 16) has a volume of about 1 litre (11) .
The furnace tube 16 and heater 20 are shrouded by insulation 35.
The mixture 28 contains a controlled amount of oxygen which may be between about 25 and about 35%, preferably around 30%, by volume of oxygen at atmospheric pressure (about 101 kPa) . Thus, for a gas mixture flowing at 2 slm, to achieve 25% oxygen, the oxygen flow rate and the inert carrier gas flow rate are 500 seem and 1500 seem respectively and to achieve 35% oxygen, the oxygen flow rate and the inert carrier gas flow rate are 700 seem and 1300 seem respectively. The volume of oxygen is controlled during growth. Lower pressures, down to about 0.1 atmospheres (about 10 kPa) or 0.01 atmospheres (about 1 kPa) can be used.
Alternatively, higher pressures, up to 2 atmospheres, 5 atmospheres or even 10 atmospheres can be used.
The wafer 11 is heated in pure argon to a target temperature of about 1550 °C at a pressure of about 1 atmosphere (about 101 kPa) (step SI) . The target temperature is just below the melting point of amorphous silicon dioxide, which is about 1600 °C. Thus, silicon dioxide is formed in a solid phase and does not pass into a liquid phase during or after formation. However, a temperature between about 1400 °C and 1550 °C can be used.
Once the wafer 11 is at the target temperature, oxygen is introduced into the argon gas, having a partial pressure of about 25 to 35 kPa (step S2) . Thus, the resulting gas mixture contains about 25 to 35% oxygen. The mixture thermally oxidizes silicon carbide to form stoichiometric silicon dioxide (Si02) 12. The rate of growth can be of the order of magnitude of 10 nm hr-1. The oxygen content is chosen such that stoichiometric silicon dioxide is grown for a given temperature.
The SiOz layer 12 is annealed in an inert or oxidizing atmosphere at a temperature in a range of about 1100 °C to the temperature used for oxidation (step S3) .
A SiOz layer 12 having a thickness, t, of up to 200 nm can be grown. A thicker layer 13 of silicon dioxide, for example, up to 100 nm or more, can be grown by chemical vapour deposition on top of the thermal oxide 12 (step S4) .
The process can be used to grow a thermal oxide on 4H-SiC having a substantially lower density of interface traps compared with, for example, the value of 1012 cm" 2eY disclosed in "Effect of nitric oxide annealing on the interface trap density near the conduction band edge of 4H-SiC at the oxide/ (11 -20) 4H-SiC interface", S. Dhar et al., Applied Physics Letters, volume 84, number 9, page 1498 (2004) . For example, the density of interface traps may be less than 5 X 1011 cm"2eV , 2 X 1011 cm"2eV4 or less than 1 X 1011 cm"2eV_1.
Silicon dioxide is grown at atmospheric pressure on different samples each comprising low doped, n-type epitaxial 4H-SiC (not shown) having a doping density of about l Xl O16 cm at different temperatures and different oxygen concentrations.
Table 1 below shows the thickness of SiOz grown in 60 minutes at 1400 °C at different oxygen concentrations using argon (Ar) as a dilutant:
Table 1
02 concentration Thickness
by volume (%) (nm)
100 140
50 94
25 70
12 57
8 38
0 0
Table 2 below shows the thickness of Si02 grown in 60 minutes at 1500 °C at different oxygen concentrations using argon (Ar) as a dilutant:
Table 2
02 concentration Thickness
by volume (%) (nm)
100 255
50 171
25 150
12 130
8 107
0 0 Table 3 below shows the thickness of SiOz grown at 1500 °C in 20 minutes at different oxygen concentrations using argon (Ar) as a dilutant:
Table 3
02 concentration Thickness by volume (%) (nm)
35 77
25 60
15 40
Table 4 below shows the thickness of SiOz grown at 1500 °C for different growth times at 30% oxygen concentrations using argon (Ar) as a dilutant:
Table 4
Growth time Thickness
(minutes) (nm)
10 67
20 80
30 110
Table 5 below shows the thickness of Si02 grown at 1500 °C in 30 minutes at different oxygen concentrations using argon (Ar) as a dilutant:
Table 5
02 concentration Thickness by volume (%) (nm)
10 87
20 93
30 120
40 120 The thicknesses in Tables 1 , 2 and 3 are measured using an ellipsometer. However, in Table 2, the thickness of the SiOz grown at 1500 °C and 8% oxygen is also measured by a mercury probe and yields the same result at the ellipsometer. The thicknesses in Tables 4 and 5 are calculated from enhancement capacitance.
For an oxygen concentration of about 35% and above (in a "first oxide growth regime"), the thickness of SiOz grown increases more slowly with increasing oxygen concentration than for oxygen concentrations below 35%. This supports the model that, for an oxygen concentration of 35% and above, the oxidation rate is limited by the rate of removal of oxidation products from the interface.
For an oxygen concentration of 35% and below (in a "second oxide growth regime"), the oxidation rate is more sensitive to oxygen concentration since oxidation is limited by the availability of oxygen.
For an oxygen concentration of about 20% and below and particularly for an oxygen concentration of 10% and below, the interface quality between the silicon dioxide and silicon carbide is found to be poor. Without wishing to be bound by a particular theory, this thought to be due to the fact that carbon is more
electronegative than silicon. Thus, carbon within silicon carbide tends to capture more or most of the available oxygen in preference to silicon.
The transition between the first and second oxide growth regimes is temperature dependent. Higher temperatures tend to promote diffusion and, thus, removal of oxidation products leading to a transition at a higher oxygen concentration.
Referring to Figure 6, capacitance-voltage (C-V) plots are shown for oxide layers grown at 1500 °C (in 20 minutes) at 15, 25 and 35% oxygen concentrations using argon (Ar) as the carrier gas. The voltage polarity of the C-V plot is the opposite of what would normally be expected for a measurement of n-type material. Polarity is reversed because an electrode (not shown) on the top of the wafer is grounded and the back of the wafer, through the prober chuck (not shown), is driven. This approach is used to minimise noise and stray capacitance. As shown in Figure 6, for silicon dioxide layers grown at 15% and 25% oxygen concentrations, the plots exhibit relatively small amounts of hysteresis. However, for the silicon dioxide layer grown at 35% oxygen concentration, the plot shows larger hysteresis. A larger amount of hysteresis indicates a larger amount of charge storage in at the interface in traps. Nevertheless, the silicon dioxide layer grown at 35% oxygen concentration shows steeper fall off.
Figure 6 also shows that, on the one hand, the silicon dioxide layer grown at 25% oxygen concentration exhibits a low flat band voltage and, on the other hand, the silicon dioxide layers grown at 15 and 35 % oxygen concentrations exhibit higher flat band voltage.
Figure 7 shows normalised capacitance-voltage (C-V) plots for oxide layers grown at 1500 °C in 30 minutes at 10, 20, 30 and 40% oxygen concentrations using argon (Ar) as the carrier gas. The voltage polarity of the C-V plot is opposite of what would normally be expected for a measurement of n-type material
As shown in Figure 7, the plots show that the silicon dioxide layer grown at 10% oxygen concentration is clearly poorer, the silicon dioxide layers grown at 20% and 40% oxygen concentrations are similar whereas the silicon dioxide layer grown at 30% oxygen concentration exhibits the best result with the fastest fall off in capacitance with voltage indicating better interface state density. Furthermore, the C-V data is analysed to extract densities of interface states (Dit) at 0.2 eV below the conduction band edge taken from plots (not shown) of densities of interface states fitted with a curve from the enhancement capacitance side of the plot. Table 6 below shows that the best result, i.e. lowest value of Dit, is for a silicon dioxide layer grown at 30%: Table 6
02 concentration Dit
by volume (%) (cm-2eV )
10 1.5X1012
20 1X1012
30 5X1011
40 2X1012
Figure 8 shows a smoothed plot of the density of interface states (Dit) with energy below the conduction band edge for a silicon dioxide layer grown at 1500 °C in 30 minutes at an oxygen concentration of 30 %. The plot is derived from 1 kHz C— V measurement.
In the plot shown in Figure 8, a curve fitting technique is used which combines a curve extending from the enhancement side of the plot (on the left-hand side of the plot) into the band gap and a curve extending from deep depletion side of the plot (on the right-hand side of the plot) .
As shown in Figure 8, the density of interface states is 3 X 10ncm_2V" at 0.2 eV below the conduction band edge.
The silicon dioxide later exhibits a dielectric strength of about 10 MVcrrT1 which is close to the known limit dielectric strength. This suggests a good stoichiometry. Thus, a process whereby silicon oxide is grown using oxygen having a concentration of between 25 and 35% oxygen (for example at a concentration tending towards 30% or at concentration at or around 30%) and at a temperature between 1400 °C and the melting point of silicon dioxide (for example, at a temperatures tending towards 1500 °C, at or around 1500 °C or higher than 1500 °C) using argon as a dilutant results in high-quality, stoichiometric silicon dioxide layer on silicon carbide.
The process can lead to one or more other advantages.
For example, after silicon dioxide is grown using 30% oxygen at 1500 °C in 30 minutes using argon as a dilutant, the effective doping density in the epitaxial silicon carbide is found to increase by about 3 times. Without wishing to be bound by theory, this is thought to arise as a result of flow of carbon interstitials away from the oxidizing interface thereby increasing the crystal quality of the epitaxial layer.
Thus, when fabricating a metal-oxide-semiconductor field effect transistor
(MOSFET), the oxidation process can be used to increase the effective body doping level.
Furthermore, the process may also allow MOSFETs to be designed without the need to compensate for a lower maximum critical electric field, i.e. to be designed assuming that the maximum critical electric field is closer to the 4H-SiC unipolar limit and so allow performance to be improved and/or reducing the size of the device.
Moreover, the process may circumvent the need for a post-oxidation anneal in nitric oxide (NO), nitrous oxide (N20) or phosphorous oxychloride (POCl3) . Such a post-oxidation anneal tends to reduce threshold voltage of a MOSFET.
Referring again to Figures 3 and 4, a wafer 11 and oxide layer(s) 12, 13 can be processed (step S5) to form silicon carbide semiconductor devices, for example, diodes, MOSFETs or insulated gate bipolar transistors (IGBTs), having high values of mobility, e.g. at least 20 cmYV1.
Referring to Figure 9, an example of a semiconductor device 41 in the form of a MOSFET is shown. The device 41 comprises a highly-doped, n-type 4-step hexagonal single crystal silicon carbide substrate 42, which provides a drain and supports an epitaxial layer 43 of lightly-doped, n-type 4-step hexagonal silicon carbide which provides a drift region.
P-type wells 34 at the surface 45 of the epitaxial layer 43 provide body regions. NT- type wells 46 within the p-type wells 44 provide contact regions. A channel 47 is formed beneath a gate 48 which is separated using a gate oxide 49 grown using the process hereinbefore described. The silicon oxide is grown using oxygen having a concentration of between 25 and 35% oxygen (for example 30% or tending towards to 30%) and at a temperature between 1400 °C and the melting point of silicon dioxide (for example at a temperatures tending towards 1500 °C, at or around 1500 °C or higher) using argon as a dilutant. Preferably, the wafer is heated in substantially pure argon, i.e. without oxygen.
The growth of thermal silicon dioxide on silicon carbide can improve recovery of damage resulting from implanting dopants into the wafer prior to growing the silicon dioxide. A set of experiments are conducted based on implanting and annealing
phosphorous (P) and aluminium (Al) in 4H-SiC wafers. The experiments are also numerically simulated using SUSPRE ion implantation calculator.
100 mm-diameter wafers of4H-SiC (not shown) are used. 50 nm of LPCVD Si02 is deposited on each wafer to provide a screen oxide.
The following ion-implantations are used:
Low-dose phosphorous implant
Phosphorous (P) is implanted into a whole wafer (not shown) at room temperature with a dose of 5 x l 013 cm"2 and an energy of 300 keV. The implant has a projected range, Rp, of about 230 nm and a standard deviation (or "straggle"), sd, of about 45 nm (such that (Rp- 3sd) is about 95nm) and results in disorder of about 8% at the surface of the wafer.
High-dose phosphorous implant
Phosphorous is implanted in a central region of wafer (not shown) at room temperature, the region having a diameter of 1.0 inch (25.4 mm) with a dose of 5 x l 015 cm"2 and energy of 300 keV. The implant results in 100% disorder at the surface of the wafer. Low-dose aluminium implant
Aluminium (Al) is implanted into a whole wafer (not shown) at room temperature with a dose of 5 x l 013 cm"2 and at an energy of 240keV. The implant has a projected range, Rp, of about 270nm and a standard deviation, sd, of about 64nm (such that Rp- 3sd is about 80nm) resulting in disorder of about 6% at the surface of the wafer.
High-dose aluminium implant
Aluminium is implanted in a central region of wafer (not shown) at room
temperature, the region having a diameter of 1.0 inch (25.4 mm) with a dose of 5 x l 015 cm"2 and an energy of 240 keV. The implant results in 100% disorder at the surface of the wafer.
To compare annealing in an oxidising atmosphere (herein referred to as an
"oxidizing" anneal) and annealing in the absence of any oxidising atmosphere (herein referred to as an "inert" anneal) using the same wafer, 0.5 μιτι of LPCVD silicon dioxide is deposited on both sides of each wafers and then approximately half of the wafer is dipped in hydrofluoric (HF) acid to reveal the surface. In this way, the uncovered area (i.e. the area which is free of the thick layer of silicon dioxide) can be oxidised in the oxidising atmosphere while the oxidation rate due to the oxidising atmosphere in the covered area is very low.
In this example, annealing is carried out at 1500 °C for 60 minutes in a gaseous mixture comprising 25% oxygen using nitrogen as a dilutant and then 60 minutes in pure nitrogen. The samples are analysed using Rutherford backscattering (RBS) after the implant and again after annealing in four areas or "zones" namely front centre, front annulus, back centre and back annulus resulting from two different implant conditions and two different two anneal conditions.
The results of the RBS analysis are processed by software to produce a depth profile of a surface oxide, a highly damaged region (if it exists) and a re-grown crystalline region (if it exists) .
The results of RBS analysis after annealing are shown in Figures 10 and 11.
Data (not shown) obtained after implantation, but before annealing shows that a high-dose implant (at 5x1015 cm ) amorphises crystalline silicon carbide, i.e.
converts crystalline silicon carbide into amorphous silicon carbide, and a low-dose implant (at 5x1013 cm ) causes significant damage.
Referring to Figure 10, post annealing data shows that damage from both high- and low-dose implants is repaired to at least some degree by annealing.
The experiment shows that a phosphorous implant can be performed at room temperature and can be successfully annealed at 1500 °C. Thus, not only can ion implantation be carried out at low temperature for SiC, but also the implant need not be annealed at high temperature (e.g. > 1600 °C) and does not require a carbon cap to protect the SiC surface.
Data (not shown) obtained after implantation, but before annealing shows that the high-dose aluminium implant has amorphised silicon carbide and that the low-dose aluminium implant has produced significant damage.
Referring to Figure 11, post annealing data shows that for a high-dose implant and an inert anneal, the highly-damaged region has a similar in thickness (about 300nm) to that predicted by SUSPRE simulation for 100% damage. However, for a high- dose implant and anneal in an oxidizing atmosphere, the depth of the highly- damaged region is reduced and there are hints of annealing at the surface. Thus suggests that point defects may be helpful in recovering the damage. Figure 8 also shows that for a low-dose implant, crystal damage is completely repaired for an inert anneal and for an oxidizing anneal.
The experiment shows that small amounts of damage (e.g. 6% disorder) caused by a phosphorous implant performed at room temperature can be recovered by annealing at 1500 °C under a thin oxide to preserve the surface. Furthermore, repair of a fully amorphous implant can be assisted by an oxidizing anneal.
Therefore, the oxidation processes described hereinbefore, for example with reference to Figure 3, may modified by implanting dopants (n-type or p-type) into a silicon carbide substrate through a (temporary) silicon oxide layer (e.g. one deposited by LPCVD) which is removed before growing a thermal silicon oxide layer.
It will be appreciated that many modifications may be made to the embodiment hereinbefore described.
The process may be used to grow silicon dioxide on other polytypes of silicon carbide, for example 3C-SiC and 6H-SiC. The process may be used to silicon dioxide on faces other than (0001) silicon face, for example, the (000-1) carbon face or the (11 -20) face or £a'-face.
Silicon dioxide can be grown at different pressures, e.g. between 0.01 atmosphere and 1 atmosphere. Silicon dioxide can be grown at higher pressures, i.e. more than 1 atmosphere, for example between about 1 and about 2 atmospheres or between about 2 and about 10 atmospheres.
Other carrier gases can be used, e.g. other noble gases. The gas mixture can have lower or higher flow rates than 2 slm, for example between about 1 and 10 slm. The reactor can have other configurations and may be formed from other un- reactive materials. The heater may have other configurations and be formed from other materials.
The anneal temperature may be higher, for example, up to about 1300 °C.
The post-oxidation anneal can be carried out in, for example an atmosphere comprising nitric oxide, for example as described in "Effect of nitric oxide annealing on the interface trap density near the conduction band edge of 4H— SiC at the oxide/(l 1 -20) 4H— SiC interface" supra., or other suitable atmosphere.

Claims

Claims
1. A method of forming silicon dioxide on a silicon carbide substrate, the method comprising:
heating the silicon carbide substrate to a temperature between
1400 °C and the melting point of the silicon dioxide; and
supplying a gaseous mixture comprising between 25 and 35% oxygen.
2. A method according to claim 1 , wherein the temperature is no more than 1550 °C.
3. A method according to any preceding claim, wherein the temperature is no more than 1500 °C.
4. A method according to any preceding claim, wherein the temperature is at least 1450 °C.
5. A method according to any preceding claim, wherein the temperature is at least 1500 °C.
6. A method according to any preceding claim, wherein the gaseous mixture comprises at least 26% oxygen.
7. A method according to any preceding claim, wherein the gaseous mixture comprises at least 27% oxygen.
8. A method according to any preceding claim, wherein the gaseous mixture comprises at least 28% oxygen.
9. A method according to any preceding claim, wherein the gaseous mixture comprises at least 29% oxygen.
10. A method according to any preceding claim, wherein the gaseous mixture comprises no more than 34% oxygen.
11. A method according to any preceding claim, wherein the gaseous mixture comprises no more than 33% oxygen.
12. A method according to any preceding claim, wherein the gaseous mixture comprises no more than 32% oxygen.
13. A method according to any preceding claim, wherein the gaseous mixture comprises no more than 31% oxygen.
14. A method according to any preceding claim, wherein the gaseous mixture comprises between 28 and 32% oxygen.
15. A method according to any preceding claim, wherein the gaseous mixture comprises between 29 and 31% oxygen.
16. A method according to any preceding claim, wherein the gaseous mixture comprises about 30% oxygen.
17. A method according to any preceding claim, wherein the gaseous mixture comprises no more than P % oxygen where P = 0.14 T — 175.
18. A method according to any preceding claim, wherein the gaseous mixture comprises about Q % oxygen where Q = 0.14 T — 180.
19. A method according to any preceding claim, wherein the gaseous mixture comprises oxygen gas and an inert carrier gas.
20. A method according to claim 19, wherein the inert carrier gas is argon.
21. A method according to any preceding claim, wherein the gaseous mixture is at a pressure between about 0.01 and about 1 atmosphere.
22. A method according to any preceding claim, wherein the gaseous mixture is at a pressure of about 1 atmosphere.
23. A method according to any preceding claim, wherein the substrate is heated in a reactor and the gaseous mixture flows at a rate of about 1.5 V to 3 V slm, where V is the volume of a reactor.
24. A method according to any preceding claim, comprising supplying the gaseous mixture for no more than 60 minutes.
25. A method according to any preceding claim, comprising supplying the gaseous mixture for no more than 30 minutes.
26. A method according to any preceding claim, further comprising:
before heating the substrate and supplying a gaseous mixture, implanting ions into the substrate.
27. A method according to claim 26, comprising implanting dopant ions into the silicon carbide substrate at room temperature.
28. A method according to claim 26 or 27, wherein the dopant comprises boron or aluminium.
29. A method according to claim 26, 27 or 28, wherein the dopant comprises phosphorous or nitrogen.
30. A method according to any one of claims 26 to 29, further comprising: before implanting ions into the substrate, depositing a screen layer on the substrate, wherein implanting the ions into the substrate is carried out through the screen layer.
31. A method according to claim 30, further comprising:
before heating the substrate and supplying a gaseous mixture, removing the screen layer.
32. A method according to claim 30 or 31, wherein the screen layer comprises silicon dioxide.
33. A method according to any preceding claim, comprising:
heating up the silicon carbide substrate in substantially pure argon.
34. A method according to claim 33, wherein pure argon flows through a reactor at a flow rate of about 1.5 V to 3 V slm, where V is the volume of the reactor.
35. A method according to claim 33 or 34, wherein once the substrate has reached the temperature, adding oxygen to the argon so as to provide the gaseous mixture.
36. A method according to any preceding claim, wherein the silicon carbide substrate comprises 4-step hexagonal silicon carbide.
37. A semiconductor structure or device comprising:
a silicon carbide substrate; and
a layer of silicon dioxide overlying the silicon carbide substrate;
wherein mobility of electrons beneath the silicon dioxide layer is at least 20 cmW 1 and/or density of defect traps may be less or substantially less than 1012 cm"2eV_1.
38. A device according to claim 37, which comprises a MOSFET.
39. A device according to claim 37 or 38, which comprises an IGBT.
40. Apparatus comprising:
a furnace; a heater for heating a substrate within the furnace; and
gas supply arrangement configured to supply a gaseous mixture to the furnace;
wherein the apparatus is configured to permit the substrate to be heated to a temperature between about 1400 °C and the melting point of the silicon dioxide and to supply a gaseous mixture comprising between 25 and 35% oxygen.
41. Apparatus according to claim 40, wherein the temperature is no more than 1550 °C.
42. Apparatus according to claim 40 or 41, wherein the temperature is at least 1450 °C.
43. Apparatus according to any one of claims 40 to 42, wherein the gaseous mixture is supplied at atmospheric pressure.
44. Apparatus according to any one of claims 40 to 43, wherein the gaseous mixture comprises oxygen and an inert carrier gas.
Apparatus according to claim 44, wherein the inert carrier gas is argon.
PCT/GB2013/050140 2012-03-20 2013-01-23 Forming silicon dioxide on silicon carbide WO2013140122A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1204826.0 2012-03-20
GB201204826A GB201204826D0 (en) 2012-03-20 2012-03-20 Forming silicon dioxide on silicon carbide

Publications (1)

Publication Number Publication Date
WO2013140122A1 true WO2013140122A1 (en) 2013-09-26

Family

ID=46052190

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2013/050140 WO2013140122A1 (en) 2012-03-20 2013-01-23 Forming silicon dioxide on silicon carbide

Country Status (2)

Country Link
GB (1) GB201204826D0 (en)
WO (1) WO2013140122A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113035709A (en) * 2021-03-01 2021-06-25 同辉电子科技股份有限公司 Method for improving interface characteristics of SiC device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031571A (en) * 2001-07-12 2003-01-31 Nissan Motor Co Ltd Method for forming oxidized film of silicon carbide semiconductor
US20100090227A1 (en) 2008-10-15 2010-04-15 General Electric Company Method for the formation of a gate oxide on a sic substrate and sic substrates and devices prepared thereby

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031571A (en) * 2001-07-12 2003-01-31 Nissan Motor Co Ltd Method for forming oxidized film of silicon carbide semiconductor
US20100090227A1 (en) 2008-10-15 2010-04-15 General Electric Company Method for the formation of a gate oxide on a sic substrate and sic substrates and devices prepared thereby

Non-Patent Citations (9)

* Cited by examiner, † Cited by third party
Title
CHAO-YANG LU ET AL: "Effect of process variations and ambient temperature on electron mobility at the SiO2/4H-SiC interface", IEEE TRANSACTIONS ON ELECTRON DEVICES, IEEE SERVICE CENTER, PISACATAWAY, NJ, US, vol. 50, no. 7, 1 July 2003 (2003-07-01), pages 1582 - 1588, XP011099247, ISSN: 0018-9383, DOI: 10.1109/TED.2003.814974 *
LÃ VLIE L ET AL: "Enhanced annealing of implantation-induced defects in 4H-SiC by thermal oxidation", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 98, no. 5, 3 February 2011 (2011-02-03), pages 52108 - 52108, XP012139352, ISSN: 0003-6951, DOI: 10.1063/1.3531755 *
LIPKIN L A SLATER D B PALMOUR J W: "Low interface state density oxides on P-Type SiC", MATERIALS SCIENCE FORUM, TRANS TECH PUBLICATIONS LTD- SWITZERLAND, CH, vol. 264-268, 1 January 1998 (1998-01-01), pages 853 - 856, XP002957366, ISSN: 0255-5476 *
MOCHIZUKI K ET AL: "Detailed Analysis and Precise Modeling of Multiple-Energy Al Implantations Through Layers Into 4H-SiC", IEEE TRANSACTIONS ON ELECTRON DEVICES, IEEE SERVICE CENTER, PISACATAWAY, NJ, US, vol. 55, no. 8, 1 August 2008 (2008-08-01), pages 1997 - 2003, XP011231864, ISSN: 0018-9383, DOI: 10.1109/TED.2008.926631 *
S. DHAR ET AL.: "Effect of nitric oxide annealing on the interface trap density near the conduction band edge of 4H-SiC at the oxide/(11-20) 4H-SiC interface", APPLIED PHYSICS LETTERS, vol. 84, no. 9, 2004, pages 1498
S. POTBHARE ET AL.: "Effect of Bandedge Interface Traps and Transition Region Mobility Transport in 4H-SiC MOSFETs", MATERIALS SCIENCE FORUM, vol. 645-648, 2010, pages 975 - 978
T. L. BIGGERSTAFF ET AL.: "Relationship between 4H-SiC/Si02 transition layer thickness and mobility", APPLIED PHYSICS LETTERS, vol. 95, 2009, pages 032108
V. TILAK: "Inversion layer electron transport in 4H-SiC metal-oxide-semiconductor field-effect transistors", PHYSICA STATUS SOLIDI A, vol. 206, no. 10, 2009, pages 2391 - 2402
ZHENG Z ET AL: "Oxidation of single-crystal silicon carbide. I. Experimental studies", JOURNAL OF THE ELECTROCHEMICAL SOCIETY USA, vol. 137, no. 3, March 1990 (1990-03-01), pages 854 - 858, XP002698556, ISSN: 0013-4651 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113035709A (en) * 2021-03-01 2021-06-25 同辉电子科技股份有限公司 Method for improving interface characteristics of SiC device
CN113035709B (en) * 2021-03-01 2022-11-08 同辉电子科技股份有限公司 Method for improving interface characteristics of SiC device

Also Published As

Publication number Publication date
GB201204826D0 (en) 2012-05-02

Similar Documents

Publication Publication Date Title
US9893153B2 (en) Semiconductor device and method of manufacturing the same
JP5306193B2 (en) Silicon carbide switching device including p-type channel and method of forming the same
JP6052911B2 (en) Formation of SiC MOSFET with high channel mobility by treating oxide interface with cesium ions
EP2348530B1 (en) Silicon carbide semiconductor device
US9755064B2 (en) Semiconductor device and method for manufacturing the same
JP4666200B2 (en) Method for manufacturing SiC semiconductor device
JP2006210818A (en) Semiconductor element and its manufacturing method
JP2005303010A (en) Silicon carbide element and its manufacturing method
EP2717318A1 (en) Silicon carbide semiconductor device and method for manufacturing same
JP2020047943A (en) Silicon carbide semiconductor device
JP2006066439A (en) Semiconductor device and its manufacturing method
EP3001459A2 (en) Semiconductor device and method of manufacturing the same
EP2062289A1 (en) Method for improving inversion layer mobility in a silicon carbide mosfet
JP2009149481A (en) Method for manufacturing semiconductor substrate
WO2015015672A1 (en) Silicon carbide semiconductor device and method for manufacturing same
US8217398B2 (en) Method for the formation of a gate oxide on a SiC substrate and SiC substrates and devices prepared thereby
TW201237968A (en) Production method for semiconductor device
KR101915916B1 (en) Silicon carbide semiconductor device and method for manufacturing same
JP4867333B2 (en) Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device
JP2012038919A (en) Method for manufacturing silicon carbide semiconductor device
JP2010067917A (en) Method of manufacturing semiconductor device, and semiconductor device
JP2017055098A (en) Manufacturing method for semiconductor device and semiconductor manufacturing device for use therein
JP2006339478A (en) Insulating-gate semiconductor device and its manufacturing method
US20220059658A1 (en) Silicon carbide epitaxial substrate and silicon carbide semiconductor device
WO2013140122A1 (en) Forming silicon dioxide on silicon carbide

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13711927

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13711927

Country of ref document: EP

Kind code of ref document: A1