WO2013069727A1 - Pâte conductrice et procédé de production d'électrode traversante - Google Patents

Pâte conductrice et procédé de production d'électrode traversante Download PDF

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Publication number
WO2013069727A1
WO2013069727A1 PCT/JP2012/078975 JP2012078975W WO2013069727A1 WO 2013069727 A1 WO2013069727 A1 WO 2013069727A1 JP 2012078975 W JP2012078975 W JP 2012078975W WO 2013069727 A1 WO2013069727 A1 WO 2013069727A1
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Prior art keywords
electrode
conductive paste
conductive
semiconductor substrate
type semiconductor
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PCT/JP2012/078975
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English (en)
Japanese (ja)
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義博 川口
真歩 小川
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株式会社村田製作所
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Publication of WO2013069727A1 publication Critical patent/WO2013069727A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20—Conductive material dispersed in non-conductive organic material
    • H01B1/22—Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a conductive paste and a method of manufacturing a through electrode, and more particularly, a conductive paste suitable for forming a through electrode of a solar cell having an MWT (Metal Wrap Through) structure, and the conductive paste is used.
  • the present invention relates to a method for manufacturing a through electrode.
  • Si-based solar cells using silicon which have abundant resources and can save resources and reduce costs, has been actively conducted.
  • FIG. 10 is a principal part sectional view schematically showing an example of a conventional solar cell
  • FIG. 11 is a principal part plan view thereof.
  • an antireflection film 102 and a light receiving surface electrode 103 are formed on one main surface of a semiconductor substrate 101 containing Si as a main component, and a back electrode 104 is formed on the other main surface of the semiconductor substrate 101. Is formed.
  • an n-type semiconductor layer 101b is formed on an upper surface of a p-type semiconductor layer 101a, and a back surface field (hereinafter referred to as “BSF”) 101c is formed on a lower surface of the p-type semiconductor layer 101a. Is formed. A pn junction is formed by the p-type semiconductor layer 101a and the n-type semiconductor layer 101b.
  • the light-receiving surface electrode 103 is mainly formed of conductive powder such as Ag, and is electrically connected to the bus bar electrode 105 connected to the interconnector and the bus bar electrode 105 as shown in FIG. And a large number of finger electrodes 106a, 106b... 106n.
  • this type of solar cell light from the sun is blocked by the light-receiving surface electrode 103 (the bus bar electrode 105 and the finger electrodes 106a, 106b,... 106n) provided on the surface of the semiconductor substrate 101.
  • the amount of light incident on the semiconductor substrate 101 is reduced, and it is difficult to obtain sufficient power generation efficiency.
  • the power generation efficiency may be further reduced. Therefore, this type of solar cell is required to improve the power generation efficiency by reducing the area of the light-receiving surface electrode as much as possible.
  • a semiconductor substrate 111 made of a Si-based material, an antireflection film 112 and a light receiving surface electrode (finger electrode) 113 formed on one main surface of the semiconductor substrate 111
  • the semiconductor substrate 111 includes a through electrode 114 formed from one main surface to the other main surface, and a back electrode 115 formed on the back surface of the semiconductor substrate 111.
  • the through electrode 114 includes a via portion 114 a that penetrates the semiconductor substrate 111 and a bus bar portion 114 b that is formed around the through hole of the semiconductor substrate 111.
  • the semiconductor substrate 111 includes a p-type semiconductor region 111a, an n-type semiconductor region 111b formed in the outer peripheral region of the p-type semiconductor region 111a so as to surround the p-type semiconductor region 111a, and a predetermined region on the lower surface of the semiconductor substrate 111. And a BSF region 111c formed on the substrate.
  • a separation groove 116 is formed at an appropriate position on the back surface of the semiconductor substrate 111, and the n-type semiconductor region 111 b and the bus bar portion 114 b are electrically insulated from the back electrode 115 by the separation groove 116.
  • the light-receiving surface electrode 113, the through electrode 114, and the back electrode 115 are all formed by sintering a conductive paste.
  • the through electrode 114 has 1 to 10 parts by weight of P 2 with respect to 100 parts by weight of the conductive powder.
  • a conductive paste containing O 5 glass frit (insulating material) is used.
  • an insulating layer made of a P 2 O 5 glass material is provided at the interface between the n-type impurity region 111b and the through electrode 114.
  • a layer (not shown) is formed.
  • the bus bar portion 114b of the light receiving surface electrode is formed on the back surface side of the semiconductor substrate 111, thereby increasing the light receiving area of sunlight and reducing the recombination loss of carriers on the light receiving surface side. As a result, power generation efficiency is improved.
  • Patent Document 2 provides a p-type Si substrate having a through hole between a front surface and a back surface and having an n layer formed on the entire surface and the surface of the through hole, and a conductive paste is provided in the through hole.
  • a method for manufacturing a Si solar cell having an MWT structure in which the substrate is filled, dried, and fired at a maximum temperature of 700 to 900 ° C.
  • the conductive paste contains at least one metal selected from the group consisting of Ag, Cu, and Ni and an organic vehicle, and further contains 11 to 33 wt% of SiO 2 , 0 as glass frit.
  • Lead-free glass having a softening point of 550 to 611 ° C., containing ⁇ 7 wt% Al 2 O 3 , 2 to 10 wt% B 2 O 3 , 40 to 73 wt% Bi 2 O 3 , and 53 to 57 wt% Containing leaded glass with a softening point of 571-636 ° C. containing 1% PbO, 25-29% by weight SiO 2 , 2-6% by weight Al 2 O 3 , 6-9% by weight B 2 O 3 Points are listed.
  • JP 2010-80578 A (Claims 1 to 6, FIG. 1) International Publication No. 2011/0881808 (Claims 1 and 8)
  • Patent Document 1 Although an insulating layer is formed at the interface between the semiconductor substrate 111 and the through electrode 114, a large amount of conductive powder dissolves in the glass during the firing process, and thus dissolves in a large amount in the glass.
  • the deposited conductive material is deposited on the side of the semiconductor substrate 111, thereby destroying the insulating property and possibly destroying the pn junction.
  • the n-type semiconductor region 111b is formed in the outer peripheral region of the p-type semiconductor region 111a so as to surround the p-type semiconductor region 111a.
  • the n-type semiconductor region 111b is in contact with the through electrode 114.
  • the thickness of the side surface portion 111b ′ is formed thinner than the thickness of the main surface portion 111b ′′ of the p-type semiconductor region 111a. Therefore, an insulating layer is formed at the interface between the n-type semiconductor region 111b and the through electrode 114.
  • the P 2 O 5 glass frit is usually inferior in chemical durability, and there is a risk of impairing reliability.
  • Patent Document 2 since the through electrode is formed using a conductive paste containing glass frit having a high softening point of 550 to 636 ° C., the fluidity of the glass is inferior, and the through electrode and the semiconductor are fired during firing. It is considered that it is difficult to ensure sufficient insulation because glass does not sufficiently flow to the interface with the substrate.
  • the solar cell having the MWT structure has a simple structure if the n-type semiconductor region can be formed only between the antireflection film and the p-type semiconductor region and the through electrode 114 and the p-type semiconductor region can be in contact with each other.
  • the separation groove (FIG. 12, reference numeral 116) is not required, and productivity can be improved.
  • the present invention has been made in view of such circumstances, and has a good insulating property between the semiconductor substrate and the through electrode, contributes to an improvement in power generation efficiency, and is excellent in solderability and mechanical strength. It aims at providing the manufacturing method of the electroconductive paste which can obtain a battery, and the penetration electrode using this electroconductive paste.
  • the inventors of the present invention conducted intensive studies to obtain a conductive paste suitable for forming a through electrode in a solar cell having an MWT structure. Since the softening point is low and the electrical conductivity is good, it has been found that the insulating property is good and the leakage current can be suppressed, whereby a conductive paste suitable for forming the through electrode can be obtained.
  • the V oxide glass material has a low softening point and good fluidity, so that insulation can be secured with a small amount of glass, and as a result, solderability is good. It was also found that a solar cell excellent in mechanical strength can be obtained.
  • the conductive paste according to the present invention is a conductive paste for forming an electrode of a solar cell, and includes a conductive powder, a glass component, and an organic paste.
  • the glass component is characterized by being formed of a V oxide-based material containing V oxide as a main component.
  • the V content in the glass component is preferably 70% by weight or more in terms of a weight ratio in terms of oxide.
  • the content of the glass component is preferably 5 to 15% by weight.
  • glass materials that easily crystallize during heat treatment can further improve electrical conductivity, and after crystallization. It has also been found that since the fluidity is lowered, the glass material is less likely to float on the surface of the bus bar portion of the through electrode, and the solderability is improved.
  • the glass component is preferably crystallized by heat treatment.
  • the conductive paste of the present invention preferably contains a phosphoric acid compound.
  • the phosphoric acid compound may be Ag 4 P 2 O 5 , Ag 3 PO 4 , Zn 2 P 2 O 7 , Mn 2 PO 4 , and Zr 2 WO 4 (PO 4 ). It is preferable to include at least one selected from the group of 2 .
  • the conductive powder contained in the conductive paste of the present invention has a crystallite diameter of 70 nm or more.
  • the through electrode itself is not excessively shrunk, so that even if a large amount of glass is added to the through electrode, the semiconductor substrate does not crack and prevents deterioration of electrical characteristics. be able to.
  • the conductive powder preferably contains atomized powder produced by an atomizing method.
  • the conductive powder is preferably composed mainly of Ag.
  • the conductive paste according to any one of the above is filled into the through hole to form the through conductor, and then the baking treatment is performed.
  • a through electrode is formed on the substrate.
  • the conductive paste of the present invention a conductive oxide, a glass component, and an organic vehicle are contained, and the glass component is formed of a V oxide-based material containing a V oxide as a main component. Therefore, by using the conductive paste for forming the through electrode, the insulation between the semiconductor substrate and the through electrode can be improved, the power generation efficiency can be improved, and the solderability and mechanical strength are good. A solar cell having an MWT structure can be obtained.
  • the V oxide glass material has a low softening point and good fluidity, when used for forming a through electrode, the glass component flows between the through hole and the substrate in a short period of time. Then, an insulating layer is formed. Further, the V oxide-based glass material has better electrical conductivity than other glass materials, and even if the p-type semiconductor and the through electrode are in contact with each other, the n-type semiconductor is changed to the p-type through the through electrode. Leakage current leaking to the semiconductor can be suppressed.
  • the V oxide-based glass material has a low softening point and good electrical conductivity as compared with other glass materials, so that a through electrode having good insulation from the semiconductor substrate is formed.
  • the power generation efficiency of the solar cell can be improved.
  • the glass component easily flows at the interface with the substrate as described above, the content of the glass component can be reduced, and good solderability and mechanical strength can be ensured.
  • the conductive paste according to any one of the above is filled into the through hole to form the through conductor, and then the baking treatment is performed. Since the through electrode is formed on the substrate, it is possible to obtain a through electrode having good insulation and solderability and excellent mechanical strength.
  • FIG. 6 is a cross-sectional view schematically showing a sample manufactured in Example 2.
  • FIG. 6 is a diagram showing current-voltage characteristics of Example 2. Is a diagram showing the relationship between V 2 O 5 content of the glass component in the second embodiment and the differential resistance.
  • FIG. 4 is a SEM image of crystal grains in Example 3. It is principal part sectional drawing which shows an example of the conventional solar cell typically. It is a principal part top view of FIG. 2 is a cross-sectional view of a main part of a solar cell described in Patent Document 1.
  • FIG. 2 is a cross-sectional view of a main part of a solar cell described in Patent Document 1.
  • the conductive paste as one embodiment of the present invention contains a conductive powder, a glass component, and an organic vehicle, and the glass component is a V oxide-based material containing V oxide as a main component. It is formed with. As a result, it is possible to obtain a conductive paste suitable for forming a through electrode of a solar cell electrode, particularly a solar cell having an MWT structure.
  • a V oxide glass material mainly composed of V oxide typified by V 2 O 5 has a softening point as low as 300 to 450 ° C. and easily flows in a very short baking process. Therefore, when the conductive paste containing the V-oxide glass component is filled in the through-hole formed in the semiconductor substrate and baked, the glass component easily flows in the through-hole. An insulating layer is easily formed at the interface. As a result, the conductive material such as Ag is not deposited on the semiconductor substrate side, and the pn junction of the semiconductor substrate can be prevented from being broken.
  • the V oxide glass material is superior in electrical conductivity compared to other glass materials, and therefore, a leakage current leaking from the through electrode to the semiconductor substrate side can be effectively suppressed. That is, the electrical conductivity of a normal glass material is 10 ⁇ 12 S / cm or less, which is almost an insulator, whereas the electrical conductivity of a V oxide glass material is 10 ⁇ 2 to 10 ⁇ 7 S / cm. It is as high as cm and has electrical conductivity similar to that of a semiconductor.
  • the V oxide glass material has better electrical conductivity than other glass materials, when a through electrode is formed using a conductive paste containing the V oxide glass material. Even when the n-type semiconductor layer is formed on one main surface of the p-type semiconductor layer and the through electrode is in contact with the p-type semiconductor layer, the n-type semiconductor layer is connected to the through-electrode. Electrons that have flowed into the electrode material do not leak to the p-type semiconductor layer via the electrode material, but instead form an insulating layer made of a V oxide glass component formed between the electrode material and the p-type semiconductor layer. Via, it moves again to the electrode material side. Therefore, it is possible to prevent current from leaking from the through electrode to the p-type semiconductor layer, and it is possible to suppress the occurrence of leakage current.
  • conventional glass materials such as P 2 O 5 glass materials are almost insulators and are inferior in electrical conductivity. Therefore, when a weakly insulating portion occurs, electric field concentration occurs at a stretch and leakage current increases. .
  • the V oxide glass material has good electrical conductivity, it is possible to suppress the occurrence of electric field concentration, and thus it is possible to effectively reduce the leakage current, and to achieve a desired insulating property. Can be secured.
  • the V oxide glass material has a low softening point and good electrical conductivity compared to other glass materials, a through electrode having good insulation from the semiconductor substrate may be formed. It becomes possible, and it becomes possible to improve the power generation efficiency of a solar cell. Moreover, since the glass component easily flows at the interface with the substrate as described above, the content of the glass component can be reduced, and good solderability and mechanical strength can be ensured.
  • Such a V oxide glass component is not particularly limited as long as it contains V oxide as a main component, but V 2 O 5 —BaO—ZnO that is easily crystallized by heat treatment. It is preferable to use a glass component of a V 2 O 5 —Fe 2 O 3 —BaO system. That is, by crystallizing by heat treatment, the electrical conductivity becomes higher than that of the glass component in the amorphous state, and the leakage current can be more effectively suppressed. Further, by crystallizing by heat treatment, the fluidity of the glass component decreases after crystallization, so that the glass is less likely to float on the electrode surface of the through electrode, and solderability can be improved. In particular, a V oxide-based material containing 70% by weight or more in terms of a weight ratio in terms of an oxide can improve solderability and further suppress leakage current.
  • the content of the V oxide glass component in the conductive paste is not particularly limited, but from the viewpoint of ensuring solderability and mechanical strength while ensuring insulation, it is 5 to 15% by weight is preferred. That is, when the content of the V oxide glass component is less than 5% by weight, the mechanical strength may be lowered. In addition, the glass component flowing to the interface with the semiconductor substrate is reduced, and the probability that the conductive material and the semiconductor substrate are in direct contact with each other increases, which may cause a decrease in insulation. On the other hand, when the content of the V oxide glass component exceeds 15% by weight, the V oxide glass component flowing on the surface of the conductive material increases, the glass component floats on the surface of the through electrode, and solderability. There is a risk of lowering.
  • the content of the V oxide glass component in the conductive paste is preferably 5 to 15% by weight, thereby ensuring good insulation and good solderability and mechanical strength.
  • the conductive crystallite diameter and average particle diameter D 50 of the powder is not particularly limited, and it is preferably crystallite diameter using the above conductive powder 70 nm. That is, excessive shrinkage of the through electrode can be suppressed by using conductive powder having a crystallite diameter of 70 nm or more. In addition, by suppressing excessive shrinkage of the through electrode in this way, extremely high contact resistance can be exhibited with respect to both the p-type semiconductor layer and the n-type semiconductor layer of the semiconductor substrate, and further leakage current suppression is achieved. Is possible. In addition, by suppressing excessive shrinkage of the through electrode, the glass component can easily flow between the through electrode and the semiconductor substrate, so that the glass does not flow excessively on the electrode surface and good soldering is achieved. Property and mechanical strength can be ensured. In addition, even when a large amount of glass component is contained in the through electrode, it is possible to suppress the generation of cracks in the semiconductor substrate and to prevent the electrical characteristics from deteriorating.
  • the atomizing method is a method of spraying high-pressure water or the like onto a conductive material melted by heat treatment to form liquid droplets, and solidifying while dropping the conductive material, thereby forming a conductive powder.
  • a slurry containing a metal oxide is prepared by adding an alkali to an aqueous solution containing a metal salt, and a reducing agent is added to the slurry to reduce and precipitate the metal powder, thereby making it conductive.
  • a method for producing a powder is described in detail below.
  • a fine conductive powder is likely to be produced by the wet reduction method, it is preferably produced by the atomizing method from the viewpoint of more efficiently obtaining a conductive powder having a large crystallite diameter of 70 nm or more.
  • the conductive powder is not particularly limited as long as it has a desired conductivity, but usually Ag or an Ag alloy containing Ag as a main component is preferably used.
  • the content of the conductive powder is not particularly limited as long as it has an effect as an electrode, but it is usually preferably about 70 to 90% by weight, particularly preferably 75 to 85% by weight.
  • the conductive paste of the present invention preferably further contains a phosphoric acid compound. That is, by containing a phosphoric acid compound in the conductive paste, an insulating layer having a high phosphorus concentration can be formed on the surface of the conductive powder in the through electrode after firing. Therefore, the contact resistance between the through electrode and the semiconductor substrate can be further increased, and thereby better insulation can be obtained between the through electrode and the semiconductor substrate.
  • Such a phosphoric acid compound is not particularly limited.
  • Ag 4 P 2 O 5 , Ag 3 PO 4 , Zn 2 P 2 O 7 , Mn 2 PO 4 , and Zr 2 WO 4 ( PO 4 ) 2 or the like can be used.
  • the conductive paste is preferably weighed so that 70 to 90% by weight of the conductive powder, 5 to 15% by weight of the V 2 O 5 glass component, and the balance is an organic vehicle, and an appropriate amount as necessary.
  • These phosphoric acid compounds can be weighed and mixed, and can be easily manufactured by dispersing and kneading them using a three-roll mill or the like.
  • the organic vehicle is produced by preparing a binder resin and an organic solvent so that the volume ratio is, for example, 1 to 3: 7 to 9.
  • the binder resin is not particularly limited, and for example, ethyl cellulose resin, nitrocellulose resin, acrylic resin, alkyd resin, or a combination thereof can be used.
  • the organic solvent is not particularly limited, and ⁇ -terpineol, xylene, toluene, diethylene glycol monobutyl ether, diethylene glycol monobutyl ether acetate, diethylene glycol monoethyl ether, diethylene glycol monoethyl ether acetate, etc. alone or in combination thereof Can be used.
  • the conductive paste is formed of conductive powder, a V 2 O 5 glass material, and an organic vehicle.
  • the content of the organic vehicle is slightly reduced, and a small amount is used instead.
  • plasticizers such as di-2-ethylhexyl phthalate and dibutyl phthalate, or add rheology modifiers such as fatty acid amides and fatty acids, and more thixotropic agents, thickeners. Agents, dispersants and the like may be added as necessary.
  • the conductive paste mentioned above is filled into the said through-hole, a through-conductor is formed, and after that a baking process is performed and a through-electrode is formed in the said board
  • FIG. 1 is a cross-sectional view of an essential part showing an embodiment of a solar cell
  • FIG. 2 is a plan view of FIG.
  • an antireflection film 2 and a light receiving surface electrode 3 are formed on one main surface of a semiconductor substrate 1 containing Si as a main component, and a back electrode 4 is formed on the other main surface of the semiconductor substrate 1.
  • an n-type semiconductor layer 1b is formed on the upper surface of the p-type semiconductor layer 1a, and a BSF layer 1c is formed in a predetermined region on the lower surface of the p-type semiconductor layer 1a.
  • the n-type semiconductor layer 1a can be obtained, for example, by diffusing donor impurities on one main surface of the single-crystal or polycrystalline p-type semiconductor layer 1b.
  • the n-type semiconductor layer 1a has a high concentration on the upper surface of the p-type semiconductor layer 1a.
  • the manufacturing method is not particularly limited.
  • the BSF layer 1c is formed by Al forming the current collecting electrode 4a at the time of firing acting as an acceptor impurity and diffusing, and forming a p + layer on the opposing surface of the current collecting electrode 4a of the p-type semiconductor layer 1c. .
  • the through electrode 6 has a via portion 6 a penetrating through the semiconductor substrate 1 and a bus bar portion 6 b formed on the back surface of the semiconductor substrate 1 connected to the via portion 6 a.
  • the electric power generated in the semiconductor substrate 1 is collected by the light receiving surface electrode 3 (finger electrodes 5a to 5n), and taken out to the outside by the bus bar portion 6b through the via portion 6a of the through electrode 6.
  • the surface of the semiconductor substrate 1 is shown in a flat shape. However, in order to effectively confine sunlight to the semiconductor substrate 1, the surface is formed to have a micro uneven structure (texture). Yes.
  • the antireflection film 2 is formed of an insulating material such as silicon nitride (SiN x ), suppresses reflection of light to the light receiving surface of sunlight indicated by an arrow A, and allows sunlight to be quickly and efficiently applied to the semiconductor substrate 1. Lead.
  • the material constituting the antireflection film 2 is not limited to the above-described silicon nitride, and other insulating materials such as silicon oxide (SiO 2 ) and titanium oxide (TiO 2 ) may be used. In addition, two or more kinds of insulating materials may be used in combination. In addition, as long as it is crystalline Si, either single crystal Si or polycrystalline Si may be used.
  • the light receiving surface electrode 3 has a large number of finger electrodes 5 a, 5 b,... 5 n arranged in a comb-like shape, and the remaining area excluding the portion where the light receiving surface electrode 3 is provided.
  • the antireflection film 2 is formed.
  • the light-receiving surface electrode 3 is formed by applying a conductive paste prepared separately on the semiconductor substrate 1 by using screen printing or the like to produce a conductive film and baking it. That is, in the baking process for forming the light receiving surface electrode 3, the antireflection film 2 under the conductive film is decomposed and removed and fired through, whereby the light receiving surface electrode is formed on the semiconductor substrate 1 so as to penetrate the antireflection film 2. 3 is formed.
  • the electric power generated in the semiconductor substrate 1 is collected by the finger electrodes 5a to 5n, and the finger electrodes 5a to 5n are connected to the through electrode 6 as described above, and from the bus bar portion 6b of the through electrode 6 Electric power is taken out.
  • the back electrode 4 is made of a current collecting electrode 4a made of Al formed on the back surface of the semiconductor substrate 1, and Ag or the like formed on the back surface of the current collecting electrode 4a and electrically connected to the current collecting electrode 4a. It is comprised with the extraction electrode 4b. The electric power generated in the semiconductor substrate 1 is collected by the collecting electrode 4a, and the electric power is taken out by the extracting electrode 4b.
  • the said solar cell can be manufactured as follows.
  • 3 and 4 are manufacturing process diagrams showing one embodiment of a method for manufacturing a solar cell.
  • a p-type semiconductor substrate 1 made of monocrystalline or polycrystalline Si or the like and having a thickness of about 200 mm is prepared.
  • the semiconductor substrate 1 is obtained, for example, by cutting an ingot formed by melting and re-solidifying a semiconductor raw material such as Si in a crucible for each block and slicing it into a thin piece with a wire saw or the like.
  • an etching process is performed using an alkaline solution and / or an acidic solution, and a minute uneven structure (texture) is formed on the surface in order to effectively confine incident sunlight in the semiconductor substrate 1.
  • donor impurities are diffused on the surface of the semiconductor substrate 1 to form an n-type semiconductor layer 1b on the surface of the p-type semiconductor layer 1a.
  • a coating solution containing a donor impurity to be diffused is applied in a film shape by spin coating or the like to form a coating film, and heat treatment is performed to diffuse the donor impurity on the surface of the semiconductor substrate 1, An n-type semiconductor layer 1b having a thickness of 300 to 500 nm is formed. Thereby, the semiconductor substrate 1 forms a pn junction.
  • the donor impurity is not particularly limited as long as it can form the n-type semiconductor layer 1b having a high concentration of n + layer.
  • P is preferably used, and phosphorus oxychloride ( POCl 3 ) is preferably used.
  • Etching is then performed using an acidic solution to remove impurities such as donor impurities diffused on the edge and back surface of the semiconductor substrate 1 and phosphosilicate glass formed on the surface.
  • the film thickness of an insulating material such as silicon nitride (SiN x ) is 70 to 80 nm.
  • the antireflection film 2 is formed.
  • a predetermined position of the semiconductor substrate 1 is irradiated with laser light, and a large number of through holes 7 having an inner diameter of about 50 ⁇ m to 500 ⁇ m are formed as shown in FIG.
  • the formation method of the through hole 7 is not limited to the laser beam irradiation, and may be formed by any method such as a mechanical method using a drill or a chemical method using etching or the like. it can.
  • the through-hole 7 is formed by filling the above-described conductive paste of the present invention into the through-hole 7, and the conductive paste is applied around the through-hole 7.
  • the coating film 8b is formed.
  • an Al paste containing Al powder having an average particle diameter of 5 ⁇ m is prepared, and further an Ag paste containing Ag powder having an average particle diameter of 1.5 ⁇ m is prepared.
  • the Al paste is applied to the entire back surface of the semiconductor substrate 1, and the Ag paste is screen-printed and dried. As shown in FIG. 4 (f), from the Al film 9 and the Ag film 10 for the back electrode. A first conductive film (electrode pattern) 11 is formed.
  • the through conductor 8a has a firing profile such that Al is sintered at 500 ° C. and the maximum firing temperature is 760 ° C.
  • the coating film 8b and the first and second conductive films 11 and 12 are sintered.
  • the Al film 9 is melted and alloyed with the p-type semiconductor layer 1a to form an Al—Si layer (not shown), and Al diffuses as an acceptor impurity in the p-type semiconductor layer 1a.
  • a high-concentration p + layered BSF layer 1c is formed.
  • the finger electrodes 5a to 5n are fired through the antireflection film 2 and joined to the n-type semiconductor layer 1b.
  • the back electrode 4 which consists of the penetration electrode 6 which consists of the bus-bar part 6b, the current collection electrode 4a, and the extraction electrode 4b is produced, and a solar cell is formed by this.
  • the antireflection film 2 is formed on one main surface of the semiconductor substrate 1 and the through hole 7 is formed in the semiconductor substrate 1 on which the antireflection film 2 is formed. Since the through-hole 7 is filled with the paste to form the through-conductor 8a, and then the baking process is performed to form the through-electrode 6 on the semiconductor substrate 1, the insulating property at the interface between the through-electrode 6 and the semiconductor substrate 1 is good. Even if an interconnector or the like is soldered to the bus bar portion 6b of the through electrode 6, a solar cell having good solderability and good mechanical strength such as tensile strength can be manufactured.
  • the semiconductor substrate 1 has an n-type semiconductor layer 1b formed on one main surface of the p-type semiconductor layer 1a, and an antireflection film 2 is formed on the surface of the n-type semiconductor layer 1b.
  • a conductive paste is applied around the through hole 7 on the other main surface of the semiconductor substrate 1 to form a coating film 8b, and the first and second conductive films 11 are formed on both main surfaces of the semiconductor substrate 1. 12 is formed, and the through conductor 8a, the coating film 8b, and the first and second conductive films 11 and 12 are simultaneously fired by firing treatment, whereby a solar cell having a desired high power generation efficiency can be efficiently obtained.
  • the present invention is not limited to the above embodiment.
  • the conductive paste of the present invention is particularly useful because the structure and the manufacturing method can be simplified for a solar cell in which the through-hole 7 and the p-type semiconductor layer 1a are in contact with each other and a separation groove (see FIG. 8, reference numeral 116) is unnecessary.
  • the present invention can also be applied to a solar cell in which an n-type semiconductor layer is formed so as to surround a p-type semiconductor layer as in Patent Document 1 and a through electrode and a p-type semiconductor layer are not in contact with each other.
  • the conductive paste of the present invention is particularly suitable for forming a through electrode, but can also be used for forming an extraction electrode for a back electrode.
  • the semiconductor substrate 1 has the thin n-type semiconductor layer 1b formed on the p-type semiconductor layer 1a, but the thin p-type semiconductor layer is formed on the n-type semiconductor layer. Needless to say, the same can be applied to the case where it is applied.
  • the composition ratio of V 2 O 5 —BaO—ZnO of sample numbers A to C is as follows: V 2 O 5 : 76.6 wt%, BaO: 18.5 wt%, ZnO: 4.9 wt%
  • the composition ratio of V 2 O 5 —Fe 2 O 3 —BaO of sample number D is V 2 O 5 : 73.0 wt%, Fe 2 O 3 : 9.2 wt%, BaO: 17.6 wt% was blended.
  • the glass component contained in each sample was subjected to thermal analysis using a TG-DTA (thermogravimetric-differential thermal analyzer), and the softening point was measured. That is, 5 mg of a sample is accommodated in an alumina container, ⁇ alumina is used as a standard sample, and the measuring apparatus is heated at 20 ° C. per minute while supplying air into the measuring apparatus at a flow rate of 100 mL / min. It heated with the profile and the TG curve and the DTA curve were created from the weight change with respect to temperature. And the softening point of each glass material was measured from such TG curve and DTA curve.
  • TG-DTA thermogravimetric-differential thermal analyzer
  • Table 1 shows the paste composition, glass component type, softening point Ts, and crystallization temperature Tx of sample numbers A to G.
  • the conductive pastes A to D use a V 2 O 5 glass component mainly composed of V 2 O 5 and are conductive pastes within the scope of the present invention.
  • the conductive pastes E to G use glass components of a component system other than V 2 O 5 and are conductive pastes outside the scope of the present invention.
  • a semiconductor substrate 12a composed of a p-type Si-based semiconductor layer (hereinafter referred to as “p-Si layer”) and an n-type Si-based semiconductor layer (hereinafter referred to as “p-Si layer”) are formed on the surface of the p-Si layer 12a.
  • the semiconductor substrate 12b on which the “n-Si layer” is formed) is prepared, predetermined electrode patterns are formed on the surfaces of the semiconductor substrates 12a and 12b, and the contact resistance Rc is obtained by a TLM (Transmission Line Model) method. It was.
  • TLM Transmission Line Model
  • a semiconductor substrate 12a made of a single crystal p-Si layer having a width X of 127 mm, a length Y of 127 mm, and a thickness T of 0.2 mm was prepared. Further, POCl 3 is applied to the surface of the p-Si layer by using a spin coating method, and then heat treatment is performed to diffuse P on the surface of the p-Si layer, thereby providing an n-Si layer having a thickness of 400 ⁇ m. A semiconductor substrate 12b was produced.
  • etching is performed using an acidic solution, and formed on the surface of the P or p-Si layer diffused at the end or back surface of the p-Si layer. Removed phosphosilicate glass.
  • the distance L1 between the electrode 13a and the electrode 13b is 200 ⁇ m
  • the distance L2 between the electrode 13b and the electrode 13c is 400 ⁇ m
  • the distance L3 between the electrode 13c and the electrode 13d is 600 ⁇ m
  • the electrode 13d and the electrode 13e was 800 ⁇ m
  • the distance L5 between the electrodes 13e and 13f was 1000 ⁇ m
  • the electrode length Z was 30 mm.
  • each sample was placed in an oven set at a temperature of 150 ° C. to dry the electrodes 13a to 13f.
  • the contact resistance Rc was obtained for each of the samples Nos. 1 to 7 (1a to 7a, 1b to 7b) using the TLM method, and the insulating property was evaluated.
  • This TLM method is widely known as a method for evaluating the contact resistance of a thin film sample, and uses the transmission line theory to calculate the contact resistance Rc by regarding the electrode and the underlying semiconductor substrate as equivalent to a so-called transmission line circuit. . That is, Equation (1) is established among the length Z of the electrodes 13a to 13f, the sheet resistance R SH of the n-Si layer or the p-Si layer, the interelectrode distance L, and the interelectrode resistance R.
  • each resistance R at the interelectrode distance Ln was measured, and the contact resistance Rc was calculated for each of the samples Nos. 1 to 7, and the insulation was evaluated.
  • the sheet resistance R SH can be calculated from the slope of the straight line derived from the above equation (1) with L as the horizontal axis and R as the vertical axis. In this embodiment, the sheet resistance R SH is 30 ⁇ / cm. It was.
  • a single-crystal p-type Si-based semiconductor substrate having a horizontal X of 127 mm, a vertical Y of 127 mm, and a thickness T of 0.2 mm was separately prepared.
  • soldering iron whose tip temperature is set to 400 ° C.
  • Sn—Ag—Cu solder plating wire (SSA-TPS 0.16 ⁇ 2.0 manufactured by Hitachi Cable Finetech Co., Ltd.) is used as the electrode. After soldering, the solder plating wire was pulled at an angle of 45 ° to conduct a tensile test, and mechanical strength was evaluated.
  • Table 2 shows test results of conductive paste types of sample numbers 1 to 7 (1a to 7a, 1b to 7b, 1c to 7c), contact resistance Rc of n-Si layer and p-Si layer, and tensile strength, The overall evaluation is also shown.
  • the contact resistance Rc on the n-Si layer was determined to be 30 ⁇ or higher as a non-defective product
  • the contact resistance Rc on the p-Si layer was determined to be 10000 ⁇ or higher as a non-defective product.
  • the tensile strength 3N or more and the semiconductor substrate destroyed is judged as a non-defective product ( ⁇ ), and in other cases, that is, between the electrode and the semiconductor substrate is broken, or solder
  • ⁇ non-defective product
  • x solder
  • Sample No. 5 could not obtain a sufficient contact resistance Rc. This is probably because the softening point of the glass component contained in the conductive paste E is as high as 540 ° C., which is inferior in fluidity and inferior in electrical conductivity. Therefore, with the conductive paste E, sufficient insulation cannot be secured, and it is difficult to suppress the leakage current. Moreover, it was found that Sample No. 5 was inferior in tensile strength and inferior in solderability and mechanical strength.
  • Sample Nos. 6 and 7 also have the same softening point as 524 to 580 ° C. of the glass component contained in the conductive pastes F and G, which is inferior in fluidity and inferior in electrical conductivity, as in Sample No. 5. For this reason, the contact resistance Rc is also low, and it is difficult to ensure sufficient insulation. Moreover, it turned out that these sample numbers 6 and 7 are also inferior in tensile strength similarly to sample number 5, and inferior also in solderability and mechanical strength.
  • sample numbers 1 to 4 contain a V 2 O 5 glass material as a glass component, so the softening point Ts is as low as 310 to 430 ° C., and the glass component is crystallized by firing treatment (heat treatment). Therefore, the electrical conductivity was further improved, and the contact resistance Rc was as high as 40 ⁇ or more on the n-Si layer and 27000 ⁇ or more on the p-Si layer. Therefore, even when these conductive pastes A to D are used for forming a through electrode, leakage current leaking from the n-Si layer to the p-Si layer through the through electrode can be suppressed, and the power generation efficiency can be improved. it is conceivable that.
  • Sample Nos. 1 to 4 had good tensile strength and excellent solderability and mechanical strength. This is because, in all of the conductive pastes A to D, the glass component is crystallized by the baking treatment, so that the fluidity of the glass component is reduced after crystallization, and as a result, the glass can be prevented from floating on the electrode surface. It seems that it was because of
  • Example 1 spherical atomized Ag powder having an average particle size D 50 of 5 ⁇ m, an organic vehicle, and the like were prepared, and further glass components having the composition ratios shown in Table 3 were prepared.
  • Sample No. 11 has the same composition as the conductive pastes A to C used in Example 1
  • Sample No. 12 has the same composition as the conductive paste D used in Example 1.
  • the conductive paste is formed so that finger electrodes and bus bar electrodes are formed on one main surface of a p-type Si-based semiconductor substrate (hereinafter referred to as “p-Si substrate”) 15.
  • p-Si substrate p-type Si-based semiconductor substrate
  • the screen was printed and dried.
  • an Al paste was screen printed over the other main surface of the p-Si substrate 15 and dried.
  • firing is performed using a belt-type near-infrared furnace to form a surface electrode 16 on one main surface of the p-Si substrate 15, and the other of the p-Si substrate 15.
  • a back electrode 17 was formed on the main surface, thereby preparing samples Nos. 11 to 16.
  • IV curve a current-voltage curve
  • FIG. 7 is a diagram showing an example of an IV curve, in which the horizontal axis represents voltage V (V) and the vertical axis represents current I (A).
  • the curve in the first quadrant is a forward bias, that is, a current characteristic when a positive voltage is applied to the p-Si substrate 15, and indicates a current flowing from the p-Si substrate 15 to the surface electrode 16. .
  • the curve in the third quadrant is the reverse bias, that is, the current characteristic when a positive voltage is applied to the surface electrode 16, and shows the current flowing from the surface electrode 16 to the p-Si substrate 15.
  • the leakage current from the surface electrode 16 (through electrode) to the p-Si substrate 15 is smaller as the current from the surface electrode 16 to the p-Si substrate 15 is less likely to flow.
  • Table 3 shows the glass composition, differential resistance, and solderability of each sample Nos. 11 to 16.
  • Sample No. 14 has a V 2 O 5 content of 34.6% by weight in the glass component, and contains so much V 2 O 5 that it is said to be a main component. Therefore, the solderability was inferior, and the differential resistance was as small as 0.49 ⁇ .
  • Sample Nos. 11 to 13, 15, and 16 have a V 2 O 5 content of 50% by weight or more in the glass component, and the glass component contains V 2 O 5 as a main component.
  • the solderability was good and the differential resistance was 0.70 ⁇ or higher.
  • Sample Nos. 11 to 13 with a V 2 O 5 content of 70% by weight or more in the glass component have good solderability and a differential resistance of 5.45 to 46.42 ⁇ , which is a leak. It has been found that the current can be further suppressed.
  • FIG. 8 is a diagram showing the relationship between the content of V 2 O 5 in the glass component and the differential resistance, where the horizontal axis is the content (% by weight) of V 2 O 5 and the vertical axis is the differential resistance ( ⁇ ). Is shown.
  • a predetermined electrode pattern was prepared on the surface of a semiconductor substrate having a p-Si layer and an n-Si layer by using the conductive paste of sample numbers 21 to 26 in the same manner and procedure as in Example 1, and the TLM method Thus, the contact resistance Rc, solderability, and tensile strength of the n-Si layer and the p-Si layer were determined.
  • the contact resistance Rc was substantially the same in the sample numbers 21 to 25 containing the phosphate compound in the n-Si layer and in the sample number 26 not containing the phosphate compound.
  • the sample numbers 21 to 25 containing the phosphoric acid compound are significantly higher than the sample number 26 not containing the phosphoric acid compound, indicating that the insulation is improved. It was.
  • FIG. 9 is a SEM image obtained by imaging the cross section of the p-Si layer side semiconductor substrate of sample number 25 with a SEM (scanning electron microscope).
  • an insulating layer having a high P concentration is formed on the outer peripheral surface of the Ag particles, and it is considered that high insulating properties are obtained by forming such an insulating layer.
  • Example 2 a glass component having the same composition as that of Sample No. 11 in Example 2, an organic vehicle similar to that in Example 1, and the like were prepared.
  • a predetermined electrode pattern was prepared on the surface of the semiconductor substrate having the p-Si layer and the n-Si layer by using the conductive paste of sample numbers 31 to 36 in the same manner and procedure as in Example 1, and the TLM method Thus, the contact resistance Rc, solderability, and tensile strength of the n-Si layer and the p-Si layer were determined.
  • the contact resistance Rc As for the contact resistance Rc, it was found that a good result of 50 to 56 ⁇ was obtained for the n-Si layer, and a good result of 30000 to 170000 ⁇ was obtained for the p-Si layer. This is probably because the Ag powder has a large crystallite diameter of 70 nm or more, and the electrode does not shrink excessively, so that a high contact resistance is obtained.

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Abstract

La présente invention porte sur une pâte conductrice qui permet la production d'une cellule solaire qui présente une excellente aptitude au soudage et une excellente résistance mécanique tout en obtenant une bonne isolation entre un substrat semi-conducteur et une électrode traversante, atteignant ainsi un rendement de génération d'énergie amélioré. Une pâte conductrice de la présente invention contient une poudre conductrice telle que Ag, 5-15 % en poids d'un composant de verre qui est composé d'une matière d'oxyde de vanadium (V) principalement composée d'oxyde de vanadium (V), un milieu organique et similaire. La matière d'oxyde de vanadium (V) est de préférence une matière qui est cristallisée par un traitement thermique telle qu'une matière de V2O5-BaO-ZnO ou une matière de V2O5-Fe2O3-BaO. Une électrode traversante (6) qui est constituée d'une partie de trou de liaison (6a) et d'une partie de barre omnibus (6b) est formée à l'aide de la pâte conductrice. La pâte conductrice de la présente invention est appropriée pour la formation d'une électrode traversante dans une cellule solaire, une couche de semi-conducteur de type p (1a) et une couche de semi-conducteur de type n (1b) étant en contact avec une électrode traversante (6), parmi des cellules solaires ayant une structure MWT.
PCT/JP2012/078975 2011-11-10 2012-11-08 Pâte conductrice et procédé de production d'électrode traversante WO2013069727A1 (fr)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103594529A (zh) * 2013-11-27 2014-02-19 奥特斯维能源（太仓）有限公司 Mwt与背钝化结合的晶硅太阳能电池及其制造方法
CN104538461A (zh) * 2015-01-16 2015-04-22 浙江晶科能源有限公司 一种mwt太阳能电池片
WO2017204422A1 (fr) * 2016-05-25 2017-11-30 알무스인터내셔널 주식회사 Cellule solaire et son procédé de fabrication
CN116722079A (zh) * 2023-08-09 2023-09-08 浙江晶科能源有限公司 太阳能电池的制造方法、太阳能电池及光伏组件

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JPH10326522A (ja) * 1997-03-24 1998-12-08 Murata Mfg Co Ltd 太陽電池用導電性組成物
JPH11329072A (ja) * 1998-05-13 1999-11-30 Murata Mfg Co Ltd 導電ペースト及びそれを用いた太陽電池
JP2008543080A (ja) * 2005-06-03 2008-11-27 フエロ コーポレーション 鉛フリー太陽電池コンタクト
JP2010080578A (ja) * 2008-09-25 2010-04-08 Sharp Corp 光電変換素子およびその製造方法
JP2011171273A (ja) * 2010-01-25 2011-09-01 Hitachi Chem Co Ltd 電極用ペースト組成物及び太陽電池

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10326522A (ja) * 1997-03-24 1998-12-08 Murata Mfg Co Ltd 太陽電池用導電性組成物
JPH11329072A (ja) * 1998-05-13 1999-11-30 Murata Mfg Co Ltd 導電ペースト及びそれを用いた太陽電池
JP2008543080A (ja) * 2005-06-03 2008-11-27 フエロ コーポレーション 鉛フリー太陽電池コンタクト
JP2010080578A (ja) * 2008-09-25 2010-04-08 Sharp Corp 光電変換素子およびその製造方法
JP2011171273A (ja) * 2010-01-25 2011-09-01 Hitachi Chem Co Ltd 電極用ペースト組成物及び太陽電池

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103594529A (zh) * 2013-11-27 2014-02-19 奥特斯维能源（太仓）有限公司 Mwt与背钝化结合的晶硅太阳能电池及其制造方法
CN104538461A (zh) * 2015-01-16 2015-04-22 浙江晶科能源有限公司 一种mwt太阳能电池片
WO2017204422A1 (fr) * 2016-05-25 2017-11-30 알무스인터내셔널 주식회사 Cellule solaire et son procédé de fabrication
CN116722079A (zh) * 2023-08-09 2023-09-08 浙江晶科能源有限公司 太阳能电池的制造方法、太阳能电池及光伏组件
CN116722079B (zh) * 2023-08-09 2024-05-28 浙江晶科能源有限公司 太阳能电池的制造方法、太阳能电池及光伏组件

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