WO2012161517A3 - 연성 인쇄회로기판 및 그 제조방법 - Google Patents

연성 인쇄회로기판 및 그 제조방법 Download PDF

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Publication number
WO2012161517A3
WO2012161517A3 PCT/KR2012/004080 KR2012004080W WO2012161517A3 WO 2012161517 A3 WO2012161517 A3 WO 2012161517A3 KR 2012004080 W KR2012004080 W KR 2012004080W WO 2012161517 A3 WO2012161517 A3 WO 2012161517A3
Authority
WO
WIPO (PCT)
Prior art keywords
attached
adhesive sheet
circuit board
printed circuit
flexible printed
Prior art date
Application number
PCT/KR2012/004080
Other languages
English (en)
French (fr)
Other versions
WO2012161517A2 (ko
Inventor
김종수
김태균
유정상
Original Assignee
주식회사 아모그린텍
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020110048735A external-priority patent/KR20120130640A/ko
Priority claimed from KR1020110048734A external-priority patent/KR20120130639A/ko
Priority claimed from KR1020110097783A external-priority patent/KR101376750B1/ko
Application filed by 주식회사 아모그린텍 filed Critical 주식회사 아모그린텍
Publication of WO2012161517A2 publication Critical patent/WO2012161517A2/ko
Publication of WO2012161517A3 publication Critical patent/WO2012161517A3/ko

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969Apertured conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1275Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

본 발명의 연성 인쇄회로기판은 일면에 제1접착시트가 부착되고, 타면에 제2접착시트가 부착되며 도전성 연결부가 충진된 비아홀을 구비한 베이스 필름과, 상기 제1접착시트에 전사방식에 의해 부착되는 제1도전패턴과, 상기 제2접착시트에 전사방식에 의해 부착되고 상기 도전성 연결부에 의해 제1도전패턴과 전기적으로 연결되는 제2도전패턴과, 상기 제1접착시트에 부착되는 제1커버층과, 상기 제2접착시트에 부착되는 제2커버층으로 구성되어, 베이스 필름의 양면에 접착시트만 부착한 상태에서 비아홀을 형성하므로 스미어(Smear) 발생을 최소화하고, 제조 공정을 단순화할 수 있으며, 두께를 얇게 형성할 수 있고 제조비용을 감소시킬 수 있다.
PCT/KR2012/004080 2011-05-23 2012-05-23 연성 인쇄회로기판 및 그 제조방법 WO2012161517A2 (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
KR1020110048735A KR20120130640A (ko) 2011-05-23 2011-05-23 양면 연성 인쇄회로기판 및 그 제조방법
KR1020110048734A KR20120130639A (ko) 2011-05-23 2011-05-23 양면 연성 인쇄회로기판 및 그 제조방법
KR10-2011-0048735 2011-05-23
KR10-2011-0048734 2011-05-23
KR10-2011-0097783 2011-09-27
KR1020110097783A KR101376750B1 (ko) 2011-09-27 2011-09-27 연성 인쇄회로기판 및 그 제조방법

Publications (2)

Publication Number Publication Date
WO2012161517A2 WO2012161517A2 (ko) 2012-11-29
WO2012161517A3 true WO2012161517A3 (ko) 2013-03-14

Family

ID=47217903

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/004080 WO2012161517A2 (ko) 2011-05-23 2012-05-23 연성 인쇄회로기판 및 그 제조방법

Country Status (1)

Country Link
WO (1) WO2012161517A2 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10798817B2 (en) * 2015-12-11 2020-10-06 Intel Corporation Method for making a flexible wearable circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990013967A (ko) * 1997-07-16 1999-02-25 모리시타 요이찌 배선판 및 그 제조방법
JP2001144398A (ja) * 1999-11-16 2001-05-25 Dainippon Printing Co Ltd 配線基板および配線基板の製造方法
JP2003188497A (ja) * 2001-12-18 2003-07-04 Yasunaga Corp 導体回路の形成方法
KR20100013033A (ko) * 2008-07-30 2010-02-09 삼성전자주식회사 도금 층을 구비한 도전성 잉크 및 페이스트 인쇄회로기판및 그 제조 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990013967A (ko) * 1997-07-16 1999-02-25 모리시타 요이찌 배선판 및 그 제조방법
JP2001144398A (ja) * 1999-11-16 2001-05-25 Dainippon Printing Co Ltd 配線基板および配線基板の製造方法
JP2003188497A (ja) * 2001-12-18 2003-07-04 Yasunaga Corp 導体回路の形成方法
KR20100013033A (ko) * 2008-07-30 2010-02-09 삼성전자주식회사 도금 층을 구비한 도전성 잉크 및 페이스트 인쇄회로기판및 그 제조 방법

Also Published As

Publication number Publication date
WO2012161517A2 (ko) 2012-11-29

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