WO2012134097A3 - 데이터 기록 방법, 메모리, 및 메모리 기록 시스템 - Google Patents

데이터 기록 방법, 메모리, 및 메모리 기록 시스템 Download PDF

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Publication number
WO2012134097A3
WO2012134097A3 PCT/KR2012/002048 KR2012002048W WO2012134097A3 WO 2012134097 A3 WO2012134097 A3 WO 2012134097A3 KR 2012002048 W KR2012002048 W KR 2012002048W WO 2012134097 A3 WO2012134097 A3 WO 2012134097A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
recording
data
recording data
completing
Prior art date
Application number
PCT/KR2012/002048
Other languages
English (en)
French (fr)
Other versions
WO2012134097A2 (ko
Inventor
서명규
황태선
Original Assignee
(주)아토솔루션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주)아토솔루션 filed Critical (주)아토솔루션
Priority to EP12764014.2A priority Critical patent/EP2696348A4/en
Priority to CN201280026819.4A priority patent/CN103650055B/zh
Priority to US14/009,221 priority patent/US9292430B2/en
Publication of WO2012134097A2 publication Critical patent/WO2012134097A2/ko
Publication of WO2012134097A3 publication Critical patent/WO2012134097A3/ko

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)

Abstract

데이터 출력 디바이스가 NAND 셀 어레이를 포함하는 메모리에게 데이터 기록 시작 주소 및 데이터를 전송함으로써 상기 메모리에 상기 데이터를 기록하는 것을 완료하는 단계를 포함하는 데이터 기록 방법이 공개된다.
PCT/KR2012/002048 2011-04-01 2012-03-22 데이터 기록 방법, 메모리, 및 메모리 기록 시스템 WO2012134097A2 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP12764014.2A EP2696348A4 (en) 2011-04-01 2012-03-22 PROCEDURE FOR RECORDING DATA, MEMORY AND SYSTEM FOR RECORDING THE MEMORY
CN201280026819.4A CN103650055B (zh) 2011-04-01 2012-03-22 记录数据的方法、存储器、和在存储器中进行记录的系统
US14/009,221 US9292430B2 (en) 2011-04-01 2012-03-22 Method of writing data, memory, and system for writing data in memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2011-0030400 2011-04-01
KR1020110030400A KR101293224B1 (ko) 2011-04-01 2011-04-01 데이터 기록 방법. 메모리, 및 메모리 기록 시스템

Publications (2)

Publication Number Publication Date
WO2012134097A2 WO2012134097A2 (ko) 2012-10-04
WO2012134097A3 true WO2012134097A3 (ko) 2013-01-10

Family

ID=46932066

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/002048 WO2012134097A2 (ko) 2011-04-01 2012-03-22 데이터 기록 방법, 메모리, 및 메모리 기록 시스템

Country Status (5)

Country Link
US (1) US9292430B2 (ko)
EP (1) EP2696348A4 (ko)
KR (1) KR101293224B1 (ko)
CN (1) CN103650055B (ko)
WO (1) WO2012134097A2 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9595339B2 (en) 2014-10-20 2017-03-14 Micron Technology, Inc. Apparatuses and methods for reducing read disturb
US9460792B2 (en) 2014-10-20 2016-10-04 Micron Technology, Inc. Apparatuses and methods for segmented SGS lines
CN105701021B (zh) * 2014-12-10 2021-03-02 慧荣科技股份有限公司 数据储存装置及其数据写入方法
CN108573729B (zh) * 2017-03-08 2021-01-08 北京兆易创新科技股份有限公司 一种nand-flash存储器写操作方法及装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836432B1 (en) * 2002-02-11 2004-12-28 Advanced Micro Devices, Inc. Partial page programming of multi level flash
KR20070002344A (ko) * 2005-06-30 2007-01-05 주식회사 하이닉스반도체 비휘발성 메모리 장치와 그것의 멀티-페이지 프로그램,독출 및 카피백 프로그램 방법
KR100669342B1 (ko) * 2004-12-21 2007-01-16 삼성전자주식회사 낸드 플래시 메모리 장치의 프로그램 방법
KR100737919B1 (ko) * 2006-02-28 2007-07-10 삼성전자주식회사 낸드 플래시 메모리의 프로그램 방법 및 메모리 시스템의프로그램 방법
KR100832461B1 (ko) * 2007-01-29 2008-05-26 엠진 (주) 듀얼 에지 엑세스가 가능한 낸드 플래시 메모리
KR20090101195A (ko) * 2006-12-21 2009-09-24 인텔 코오퍼레이션 Ｎａｎｄ 플래시 메모리의 커맨드 기반 제어
US7796440B2 (en) * 2007-08-09 2010-09-14 Samsung Electronics Co., Ltd. NAND flash memory device and method of programming the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6571312B1 (en) * 1999-02-19 2003-05-27 Mitsubishi Denki Kabushiki Kaisha Data storage method and data processing device using an erasure block buffer and write buffer for writing and erasing data in memory
US6809964B2 (en) * 2001-08-30 2004-10-26 Micron Technology, Inc. Nonvolatile semiconductor memory device capable of transferring data internally without using an external bus
US6760805B2 (en) * 2001-09-05 2004-07-06 M-Systems Flash Disk Pioneers Ltd. Flash management system for large page size
JP4350431B2 (ja) * 2003-06-10 2009-10-21 パナソニック株式会社 半導体メモリ装置
CN101123117B (zh) * 2006-08-10 2010-07-07 莫斯艾得科技有限公司 非易失性存储器装置及其操作方法
US7477547B2 (en) * 2007-03-28 2009-01-13 Sandisk Corporation Flash memory refresh techniques triggered by controlled scrub data reads
KR101066686B1 (ko) * 2009-06-29 2011-09-21 주식회사 하이닉스반도체 반도체 메모리 소자 및 이의 독출 방법
KR101056876B1 (ko) * 2009-06-30 2011-08-12 주식회사 하이닉스반도체 불휘발성 메모리 장치의 동작 방법 및 이를 구현하는 불휘발성 메모리 장치

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6836432B1 (en) * 2002-02-11 2004-12-28 Advanced Micro Devices, Inc. Partial page programming of multi level flash
KR100669342B1 (ko) * 2004-12-21 2007-01-16 삼성전자주식회사 낸드 플래시 메모리 장치의 프로그램 방법
KR20070002344A (ko) * 2005-06-30 2007-01-05 주식회사 하이닉스반도체 비휘발성 메모리 장치와 그것의 멀티-페이지 프로그램,독출 및 카피백 프로그램 방법
KR100737919B1 (ko) * 2006-02-28 2007-07-10 삼성전자주식회사 낸드 플래시 메모리의 프로그램 방법 및 메모리 시스템의프로그램 방법
KR20090101195A (ko) * 2006-12-21 2009-09-24 인텔 코오퍼레이션 Ｎａｎｄ 플래시 메모리의 커맨드 기반 제어
KR100832461B1 (ko) * 2007-01-29 2008-05-26 엠진 (주) 듀얼 에지 엑세스가 가능한 낸드 플래시 메모리
US7796440B2 (en) * 2007-08-09 2010-09-14 Samsung Electronics Co., Ltd. NAND flash memory device and method of programming the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2696348A4 *

Also Published As

Publication number Publication date
CN103650055B (zh) 2016-12-07
KR101293224B1 (ko) 2013-08-05
WO2012134097A2 (ko) 2012-10-04
US9292430B2 (en) 2016-03-22
EP2696348A2 (en) 2014-02-12
CN103650055A (zh) 2014-03-19
US20140040538A1 (en) 2014-02-06
KR20120111811A (ko) 2012-10-11
EP2696348A4 (en) 2015-03-04

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