WO2012131352A1 - Improvements for electrical circuits - Google Patents
Improvements for electrical circuits Download PDFInfo
- Publication number
- WO2012131352A1 WO2012131352A1 PCT/GB2012/050669 GB2012050669W WO2012131352A1 WO 2012131352 A1 WO2012131352 A1 WO 2012131352A1 GB 2012050669 W GB2012050669 W GB 2012050669W WO 2012131352 A1 WO2012131352 A1 WO 2012131352A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electrically conductive
- pathway
- substrate
- resiliently flexible
- elongate
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0277—Bendability or stretchability details
- H05K1/028—Bending or folding regions of flexible printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0277—Bendability or stretchability details
- H05K1/0283—Stretchable printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09263—Meander
Definitions
- This invention relates to improvements for electrical circuits, particularly in relation to electrical circuit boards for use in electrical devices.
- Electrical circuit boards (often referred to as printed circuit boards or PCBs) are used in virtually all electrical devices to support the electrical components thereof and the electrically conductive pathways therebetween.
- the pathways (commonly referred to as “tracks” or “traces”) are typically etched from copper sheets which are laminated onto a non-conductive planar supports, e.g. fibreglass sheet. Layers are then built up one on top of the other and electrical connections made between the pathways of each "layer", as desired, in order to provide the required electrical circuitry between the electrical components.
- PCBs provide mechanical support for the electrical components and the pathways of copper due to the rigidity and strength of the fibreglass support layers and are thus the preferred choice for the electrical circuitry and component support for most electrical devices worldwide. Their inherent rigidity, however, and thus their lack of flexibility, can often be a disadvantage, as it can render their integration in certain products difficult.
- each pathway section includes:
- a second resiliently flexible part connected at one end to an second end of the second part and connected at its opposite end to a first end of the first part of an adjacent pathway section.
- an electrically conductive member including a pathway according to the first aspect of the invention.
- an electrical circuit board including an electrically conductive member according to the second aspect of the invention.
- FIGURE 1 is a plan view of a first embodiment of a portion of a pathway of the present invention
- FIGURE 2 is a plan view of a second embodiment of a portion of a pathway of the present invention.
- FIGURE 3 is a plan view of a third embodiment of a portion of a pathway of the present invention.
- FIGURE 4 is a plan view of a fourth embodiment of a portion of a pathway of the present invention
- FIGURE 5 is a plan view of a plurality of the pathways of Figure 1 shown in a "stacked" configuration;
- FIGURE 6 is a plan view of a plurality of the pathways as shown in Figure 2 shown in a stacked configuration
- FIGURE 7 is a plan view of a plurality of the pathways of Figure 3 shown in a "stacked" configuration
- FIGURE 8 is a plan view of a plurality of the pathways as shown in Figure 4 shown in a stacked configuration
- FIGURE 9 is a graph plotting the relationship between the 'percentage stretch' of a pathway of the present invention and the length of the first and second elongate parts of the pathway.
- the graph illustrates a pathway manufactured from copper foil which has a thickness of 35microns and a width of 0.1 mm and where the angle between the first and second elongate parts of the pathway is 45°-;
- FIGURE 10 is a graph plotting the relationship between 'track density' and the length of the first and second elongate parts of the pathway;
- FIGURE 1 1 is a graph plotting the relationship between the 'percentage stretch' of a pathway of the present invention and the length of the first and second elongate parts of the pathway.
- the graph illustrates a pathway manufactured from copper foil which has a thickness of 35microns and a width of 0.15mm and where the angle between the first and second elongate parts of the pathway is 45 Q ;
- FIGURE 12 is a graph plotting the relationship between 'track density' and the length of the first and second elongate parts of the pathway.
- FIGURE 13 is a graph plotting track density against the angle between the first and second elongate parts of the pathway;
- FIGURE 14 is a graph plotting the percentage stretch against the angle between the first and second elongate parts of a pathway of the present invention;
- Pathway density is a measure of the number of pathways, when laid side by side per unit length. In the present examples, the unit length is 25mm, so the figures shown as number of pathways per 25mm in the width-wise direction.
- Percentage stretch is the percentage increase in overall length of the pathway when subjected to a tensile force.
- Portureway thickness is a measurement of the thickness/depth of the pathway measured in a direction perpendicular, and generally vertically, to its length.
- Pulthway width is a measurement of the thickness/depth of the pathway measured in a direction perpendicular, and generally horizontally, to its length.
- FIGS 1 through 4 show four embodiments of an electrically conductive pathway in accordance with the present invention.
- Each of figures 1 through 4 shows a portion of an electrically conductive pathway, for illustration purposes only, and it should be appreciated that the pathway could be any length, as desired, with the pattern repeated.
- the electrically conductive pathway includes a plurality of pathway sections which are connected end to end.
- Figures 1 through 4 include dash lines which indicate the start and end point of each pathway section, for ease of reference.
- like features of the embodiments shown in figures 1 through 4 have been given the same reference numeral, with the addition of single, double or triple prime (') symbols.
- each pathway section includes a first generally rectilinear elongate part 1 1 and a second generally rectilinear elongate part 12.
- the first and second elongate parts 1 1 , 12 are connected to each other by a first resiliently flexible part 13, and the pathway section includes a second resilient flexible part 14 which is connected to an opposite end of the part 12 and to an end of a first part of an adjacent pathway section (see for example the part 1 1 a in figure 1 ).
- the pathway 10 is made up from a plurality of pathway sections which are connected end to end.
- the pathway sections are identical to each other for each embodiment, and are repeated, but it should be appreciated that variances between adjacent sections could be provided without departing from the scope of the present invention.
- the first and second resiliently flexible parts 13, 14 are provided as biasing member or springs which permit the elongate parts 1 1 , 12 to move/pivot relative to each other when the pathway 10 is subject to a tensile of force.
- Figures 1 through 4 show four different variants of the first and second resiliently flexible parts 13, 14 and it should be appreciated that other shapes/configurations of these parts could be utilised without departing from the scope of the present invention.
- the resiliently flexible parts includes V, U or W shaped sections of pathway, whilst the embodiment in figure 4 utilises a part-circular portion 13"', 14"'.
- the parts 13, 14 permit the respective ends of the parts 1 1 , 12 to pivot relative to each other thus permitting the pathway 10 to increase (stretch) in length when subjected to a tensile force, but without the pathway 10 being damaged as a result of that tensile force.
- a "safe" limit to which the pathway 10 can be stretched without compromising the integrity of the pathway 10.
- an amount of extension will be tolerated by the pathway 10 of the present invention, without the pathway breaking, and thus not being able to conduct electricity from one end to its opposite end.
- the configuration of the electrically conductive pathways 10 of the present invention are highly advantageous over the prior art due to their ability to be positioned closely adjacent (side-by-side) each other.
- Figures 5 through 8 show "stacked" pathways corresponding to the embodiments of figures 1 through 4.
- the ability to "stack/position" the pathways 10 in this way is highly advantageous, because the lateral distance between corresponding points an adjacent pathways is also constant substantially along the entire length of the pathway.
- the lateral distance between the points F and G is the same is the lateral distance between the points H and I. This results in improved performance when the pathway(s) is incorporated into a circuit board, because signal integrity is improved, controlled impedance matching is achieved and because the pathway density is improved over any given distance.
- first and second resiliently flexible parts 13, 14 of one pathway 10 are received in spaces defined in between the first and second elongate parts 1 1 , 12 of an adjacent pathway 10. This allows the pathways 10 to be positioned closely adjacent each other so that a higher number of pathways 10 can be provided over a desired width - i.e. an increased pathway/track density.
- first and second elongate parts of each pathway section are oblique to an elongate axis of the pathway 10 and are inclined at an angle ⁇ to each other.
- a preferred range of angle is between 15 Q and 75 Q .
- the angle between the first and second elongate parts is 30 Q to 60 Q . Most preferably the angle is between 40 Q and 50 Q , with a particularly desired angle being 45 Q .
- the angle between the first and second parts 1 1 , 12 needs to be selected bearing in mind the desired pathway/track density required for a particular use (i.e. how many pathways 10 are desired to be positioned adjacent each other) and the desired percentage stretch or stretchability of pathways in use. All of these factors/physical characteristics need to be considered together.
- the length of the first and second elongate parts 1 1 , 12 and the configuration/shape of the resiliently flexible parts 13, 14 can also have an effect on the stretchability and pathway/track density.
- this shows a graph plotting the relationship between the length of the first and second elongate parts 1 1 , 1 2 of the pathway 10 and the achievable percentage stretch of the pathway before failure.
- the graph has been created using data points from an experimentation using 35 micron copper and where the angle between the first and second elongate parts is 45 Q .
- the width of each pathway is 0.10mm and the minimum spacing between adjacent sections of the pathway is 0.1 mm.
- FIG 10 shows a graph plotting the relationship between the length of the first and second elongate parts 1 1 , 1 2 of the pathway 10 and the achievable pathway density.
- the graph has been created using data points from an experimentation using 35 micron copper and where the angle between the first and second elongate parts is 45 Q .
- the width of each pathway is 0.10mm and the minimum spacing between adjacent sections of the pathway is 0.1 mm.
- the graph of figure 10 demonstrates the relationship between these two parameters, and highlights that a greater pathway density can be achieved by reducing the length of the elongate parts.
- this is only one variable of the shape/configuration of the pathway and thus other factors need to be taken into account, such as the percentage stretch in length of the pathway whilst maintaining integrity of the pathway.
- Figures 1 1 and 12 correspond to figures 9 and 10 except that in these experiments the pathway width is 0.15mm. It can be seen from figure 1 1 that little improvement in percentage stretch is achieved when the length of the first and second parts exceeds 7/8mm and figure 12 illustrates that a reduction in the length of the first and second elongate parts 1 1 , 12 gives rise to a higher pathway density per 25mm measured in the lateral dimension of the pathways.
- Figure 13 illustrates the relationship between the angle ⁇ between the first and second elongate parts 1 1 , 12 and the achievable pathway density per 25mm.
- the pathways are 0.1 mm in width and 35microns thick with the length of the first and second parts being 3mm.
- This graph illustrates that achievable pathway density does not greatly improve when the angle exceeds 40 Q .
- This graph highlights that a track angle of between 30 Q and 60 Q would provide the highest pathway density, but of course, the percentage stretch also needs to be taken into account as demonstrated in the other figures.
- Figure 14 illustrates that an increase in the angle between the first and second elongate parts 1 1 , 12 does indeed result in increased stretchability of the pathway.
- this graph illustrates that there is little improvement in the percentage stretch of the pathway when the angle ⁇ between the first and second elongate parts exceeds 50 Q .
- the graphs indicate that an angle between the first and second parts 1 1 , 12 of about 45 Q provides good stretchability whilst also providing a satisfactory performance in terms of track/pathway density.
- the pathways are 0.1 mm in width and 35microns thick with the length of the first and second parts being 3mm.
- the applicant has devised the following method for manufacturing an electrically conductive member which may be used as part of an electrical circuit board including the pathways according to the invention.
- the method has been derived starting from known methods for manufacturing printed circuit boards having copper layers which are bonded to (and usually sandwiched between) fibreglass layers.
- simply replicating existing manufacturing methods does not work when attempting to manufacture an electrically conductive member having the stretchable pathways of the present invention.
- the applicant has therefore devised the following methodology, which works surprisingly well.
- a layer of electrically conductive material e.g. copper foil
- the layer of copper foil can be of any desired thickness, for example 0.15mm.
- the copper foil can be any desired thickness, but usually will be selected from the range of 12 to 79 microns.
- the substrate layer is a flexible plastics material of substantially uniform thickness, and the applicant has found that polyurethane is a preferred choice, due to its physical characteristics, as discussed below.
- the polyurethane used has a thickness of 25 or 50 microns, but any desired thickness can be used. It should be noted, however, that an increased thickness will reduce the stretchability of the resulting electrically conductive member, but too thin a substrate can easily become damaged. It is necessary to bond/connect the copper foil to the polyurethane substrate layer, as a first step in the manufacturing process.
- the applicant has surprisingly found that the polyurethane substrate layer and copper foil layer will bond to each other, without any need for additional adhesive, by using the applicant's inventive method.
- the following methodology utilises pressure and temperature to heat-bond the copper foil to the polyurethane substrate.
- the copper foil layer is placed on top of the polyurethane layer (or vice versa) and the layers are then positioned between a pair of substantially flat heatable plates.
- the assembly i.e. copper foil layer, polyurethane layer and plates
- the laminating press includes a means for applying pressure to the plates so as to force the polyurethane substrate and copper foil layer towards each other.
- the temperature of the plates is gradually increased to a predetermined value, which in this example is 120 Q C (+ or - 8 Q C), and is held at that temperature for a predetermined time period, which in this example is about 1 hour.
- a shorter time period can be used, but it should be noted that applicant has found that a minimum time required to achieve a good bond between the layers is 50 minutes. If the assembly is left in the laminating press for more than 70 minutes, the substrate will likely loose is elastic properties.
- the pressure applied to the plates is between 150PSI and 170PSI (preferably @ 155PSI), and the pressure is gradually increased until this value is reached. Preferably the pressure is applied in two stages, with stage one being at 50PSI and lasting for 15 minutes and stage two being at the final pressure (e.g. 155PSI) for the remaining bond time.
- the assembly is then cooled, until a desired temperature of the plates is reached, for example 40 Q C (this means that the assembly can easily be handed by a person).
- a pressure e.g. 50PSI
- the plates are removed to reveal the composite copper foil/polyurethane layer (which layers have heat-bonded to each other).
- An additional layer of copper foil may be positioned on an opposite side of the substrate layer, before the layers are placed in between the plates.
- two copper foil layers could be provided, sandwiching the substrate layer.
- each copper layer heat bonds to its respective side of the substrate layer.
- the copper foil layer bonded to the substrate it is necessary to create in the copper foil layer the pathways of the present invention. This is achieved, in broad terms, by exposing unwanted copper (i.e. that which does not form part of the desired number of pathways) to an etchant.
- unwanted copper i.e. that which does not form part of the desired number of pathways
- an etchant i.e. that is not form part of the desired number of pathways
- the photoimageable layer is then covered with a mask (which has openings defining the areas which form of the pathways), e.g. silver halide.
- the exposed areas of the photoimageable layer are then exposed assembly to UV light, thus causing them to harden.
- the assembly is then developed in a liquid which removes the unhardened areas of the photoimageable layer.
- the assembly is then baked in an oven at about 120 Q C for about 3 hours. Lower temperature can be used, but will result in an increased baking time. The temperature should not exceed 125 Q C as this will destroy the substrate material.
- the assembly is then exposed to an etchant (e.g. cupric chloride) to remove the exposed copper (i.e. the copper which does not form part of the pathways).
- the assembly is then exposed to another etchant (e.g. a caustic / amine liquid) to remove the remaining photoimageable layer, thus leaving the piolyurethane substrate layer with a plurality of pathways connected thereto.
- the method may include, before etching the assembly in cupric chloride, the additional steps of applying a further layer of photoimageable material to the copper side of the assembly and using a mask to expose only the solder pads.
- the assembly is then exposed to UV light for a second time, which hardens only the solder pad areas of the second photoimageable layer.
- the assembly may be micro-etched prior to the second layer of photoimageable material being applied to remove an oxide build up on the surface.
- the assembly is then, as described above, etched to remove all of the photoimageable material, thus leaving the pathways and their respective solder pads.
- the resulting electrically conductive member then has a solderable finish applied to the copper pathways, by immersion in liquid containing silver. If desired, a further substrate layer is then heat bonded to the copper pathways and the other substrate, to provide insulation for the pathways. It will be necessary, of course, for the solder pads to remain exposed, so that components, for example, can be connected thereto.
- the result is therefore a three layer electrically conductive member having a plurality of pathways which are sandwiched in between two polyurethane substrate layers.
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Abstract
An electrically conductive pathway including a plurality of pathway sections which are connected end to end, and wherein each pathway section includes: a) a first elongate part; b) a second elongate part; c) a first resiliently flexible part connected at one end to an second end of the first part and connected at its opposite end to a first end of the second part; and d) a second resiliently flexible part connected at one end to an second end of the second part and connected at its opposite end to a first end of the first part of an adjacent pathway section.
Description
Title: Improvements for electrical circuits Description of Invention
This invention relates to improvements for electrical circuits, particularly in relation to electrical circuit boards for use in electrical devices. Electrical circuit boards (often referred to as printed circuit boards or PCBs) are used in virtually all electrical devices to support the electrical components thereof and the electrically conductive pathways therebetween. The pathways (commonly referred to as "tracks" or "traces") are typically etched from copper sheets which are laminated onto a non-conductive planar supports, e.g. fibreglass sheet. Layers are then built up one on top of the other and electrical connections made between the pathways of each "layer", as desired, in order to provide the required electrical circuitry between the electrical components.
Printed circuit boards or PCBs provide mechanical support for the electrical components and the pathways of copper due to the rigidity and strength of the fibreglass support layers and are thus the preferred choice for the electrical circuitry and component support for most electrical devices worldwide. Their inherent rigidity, however, and thus their lack of flexibility, can often be a disadvantage, as it can render their integration in certain products difficult.
It has therefore been proposed to substitute the rigid fibreglass support layers of the PCB with a flexible material to provide a circuit board. Such as 'board' can be used in devices which require the circuit board to be capable of being distorted in three dimensions, which is not possible with standard PCBs. However, the current manufacturing methods and the resulting 'boards' have some performance an reliability issues.
H12792WO
According to a first aspect of the invention we provide an electrically conductive pathway including a plurality of pathway sections which are connected end to end, and wherein each pathway section includes:
a) a first elongate part;
b) a second elongate part;
c) a first resiliently flexible part connected at one end to an second end of the first part and connected at its opposite end to a first end of the second part; and
d) a second resiliently flexible part connected at one end to an second end of the second part and connected at its opposite end to a first end of the first part of an adjacent pathway section.
According to a second aspect of the invention we provide an electrically conductive member including a pathway according to the first aspect of the invention.
According to a third aspect of the invention we provide an electrical circuit board including an electrically conductive member according to the second aspect of the invention.
According to a fourth aspect of the invention we provide a method of manufacturing an electrically conductive member, the method comprising the steps of:
positioning a layer of electrically conductive material adjacent a substrate layer;
increasing the temperature of the electrically conductive and substrate layers to a predetermined temperature;
applying pressure to the electrically conductive and substrate layers so as to urge the layers towards each other;
holding the electrically conductive and substrate layers at said temperature for a predetermined time period;
cooling the electrically conductive and substrate layers to a predetermined temperature;
removing unwanted areas of the electrically conductive layer to provide at least one electrically conductive pathway connected to the substrate.
Further features of the various aspects of the invention are set out in the claims appended hereto. Examples of the invention will be described by way of example only with reference to the accompanying figures, of which :-
FIGURE 1 is a plan view of a first embodiment of a portion of a pathway of the present invention;
FIGURE 2 is a plan view of a second embodiment of a portion of a pathway of the present invention;
FIGURE 3 is a plan view of a third embodiment of a portion of a pathway of the present invention;
FIGURE 4 is a plan view of a fourth embodiment of a portion of a pathway of the present invention; FIGURE 5 is a plan view of a plurality of the pathways of Figure 1 shown in a "stacked" configuration;
FIGURE 6 is a plan view of a plurality of the pathways as shown in Figure 2 shown in a stacked configuration;
FIGURE 7 is a plan view of a plurality of the pathways of Figure 3 shown in a "stacked" configuration;
FIGURE 8 is a plan view of a plurality of the pathways as shown in Figure 4 shown in a stacked configuration;
FIGURE 9 is a graph plotting the relationship between the 'percentage stretch' of a pathway of the present invention and the length of the first and second elongate parts of the pathway. The graph illustrates a pathway manufactured from copper foil which has a thickness of 35microns and a width of 0.1 mm and where the angle between the first and second elongate parts of the pathway is 45°-;
FIGURE 10 is a graph plotting the relationship between 'track density' and the length of the first and second elongate parts of the pathway;
FIGURE 1 1 is a graph plotting the relationship between the 'percentage stretch' of a pathway of the present invention and the length of the first and second elongate parts of the pathway. The graph illustrates a pathway manufactured from copper foil which has a thickness of 35microns and a width of 0.15mm and where the angle between the first and second elongate parts of the pathway is 45Q;
FIGURE 12 is a graph plotting the relationship between 'track density' and the length of the first and second elongate parts of the pathway.
FIGURE 13 is a graph plotting track density against the angle between the first and second elongate parts of the pathway;
FIGURE 14 is a graph plotting the percentage stretch against the angle between the first and second elongate parts of a pathway of the present invention; Various phrases and terminology are used throughout this specification, and, unless explicitly mentioned elsewhere, are defined as follows:-
"Pathway density" - is a measure of the number of pathways, when laid side by side per unit length. In the present examples, the unit length is 25mm, so the figures shown as number of pathways per 25mm in the width-wise direction.
"Percentage stretch" - is the percentage increase in overall length of the pathway when subjected to a tensile force.
"Pathway thickness" - is a measurement of the thickness/depth of the pathway measured in a direction perpendicular, and generally vertically, to its length.
"Pathway width" - is a measurement of the thickness/depth of the pathway measured in a direction perpendicular, and generally horizontally, to its length.
Referring firstly to figures 1 through 4, these show four embodiments of an electrically conductive pathway in accordance with the present invention. Each of figures 1 through 4 shows a portion of an electrically conductive pathway, for illustration purposes only, and it should be appreciated that the pathway could be any length, as desired, with the pattern repeated. In each embodiment the electrically conductive pathway includes a plurality of pathway sections which are connected end to end. Figures 1 through 4 include dash lines which indicate the start and end point of each pathway section, for ease of reference.
For ease of reference, like features of the embodiments shown in figures 1 through 4 have been given the same reference numeral, with the addition of single, double or triple prime (') symbols. Thus, referring to figure 1 , each pathway section includes a first generally rectilinear elongate part 1 1 and a second generally rectilinear elongate part 12. The first and second elongate parts 1 1 , 12 are connected to each other by a first resiliently flexible part 13, and the pathway section includes a second resilient flexible part 14 which is connected to an opposite end of the part 12 and to an end of a first part of an adjacent pathway section (see for example the part 1 1 a in figure 1 ).
Thus, it is clear from figures 1 to 4 that the pathway 10 is made up from a plurality of pathway sections which are connected end to end. In the present examples the pathway sections are identical to each other for each embodiment, and are repeated, but it should be appreciated that variances between adjacent sections could be provided without departing from the scope of the present invention.
In the embodiments shown in figures 1 through 4 the first and second resiliently flexible parts 13, 14 are provided as biasing member or springs which permit the elongate parts 1 1 , 12 to move/pivot relative to each other when the pathway 10 is subject to a tensile of force. Figures 1 through 4 show four different variants of the first and second resiliently flexible parts 13, 14 and it should be appreciated that other shapes/configurations of these parts could be utilised without departing from the scope of the present invention. In the embodiment shown in figures 1 , 2 and 3 the resiliently flexible parts includes V, U or W shaped sections of pathway, whilst the embodiment in figure 4 utilises a part-circular portion 13"', 14"'. In all four embodiments the parts 13, 14 permit the respective ends of the parts 1 1 , 12 to pivot relative to each other thus permitting the pathway 10 to increase (stretch) in length when subjected to a tensile force, but without the pathway 10 being damaged as a result of that tensile force.
Of course, as in indicated in the description hereinafter, there is a "safe" limit to which the pathway 10 can be stretched, without compromising the integrity of the pathway 10. In other words, it will be appreciated by those skilled in the art that an amount of extension will be tolerated by the pathway 10 of the present invention, without the pathway breaking, and thus not being able to conduct electricity from one end to its opposite end.
As shown in figures 5 through 8, the configuration of the electrically conductive pathways 10 of the present invention, particularly the embodiment shown in figures 1 through 4, are highly advantageous over the prior art due to their ability to be positioned closely adjacent (side-by-side) each other. Figures 5 through 8 show "stacked" pathways corresponding to the embodiments of figures 1 through 4. The ability to "stack/position" the pathways 10 in this way is highly advantageous, because the lateral distance between corresponding points an adjacent pathways is also constant substantially along the entire length of the pathway. For example, with reference to figure 6, the lateral distance between the points F and G is the same is the lateral distance between the points H and I. This results in improved performance when the pathway(s) is incorporated into a circuit board, because signal integrity is improved, controlled impedance matching is achieved and because the pathway density is improved over any given distance.
In each of the examples shown in figures 5 through 8, it will be noted that the first and second resiliently flexible parts 13, 14 of one pathway 10 are received in spaces defined in between the first and second elongate parts 1 1 , 12 of an adjacent pathway 10. This allows the pathways 10 to be positioned closely adjacent each other so that a higher number of pathways 10 can be provided over a desired width - i.e. an increased pathway/track density.
As can be seen in the figures the first and second elongate parts of each pathway section are oblique to an elongate axis of the pathway 10 and are inclined at an angle Θ to each other. As is demonstrated from the graphs shown in the attached figures, a preferred range of angle is between 15Q and 75Q. More preferably the angle between the first and second elongate parts is 30Q to 60Q. Most preferably the angle is between 40Q and 50Q, with a particularly desired angle being 45Q. The angle between the first and second parts 1 1 , 12 needs to be selected bearing in mind the desired pathway/track density required for a particular use (i.e. how many pathways 10 are desired to be positioned adjacent each other) and the desired percentage stretch or stretchability of pathways in use. All of these factors/physical characteristics need to be considered together.
In addition to the angle between the first and second parts 1 1 , 12 affecting the stretchability and pathway/track density, the length of the first and second elongate parts 1 1 , 12 and the configuration/shape of the resiliently flexible parts 13, 14 can also have an effect on the stretchability and pathway/track density. Referring to figure 9, this shows a graph plotting the relationship between the length of the first and second elongate parts 1 1 , 1 2 of the pathway 10 and the achievable percentage stretch of the pathway before failure. The graph has been created using data points from an experimentation using 35 micron copper and where the angle between the first and second elongate parts is 45Q. The width of each pathway is 0.10mm and the minimum spacing between adjacent sections of the pathway is 0.1 mm. It can be seen from figure 9 that increasing the length of the first and second elongate parts above about 7mm does not provide an improved a percentage stretch of the pathway. Referring to figure 10, this shows a graph plotting the relationship between the length of the first and second elongate parts 1 1 , 1 2 of the pathway 10 and the
achievable pathway density. The graph has been created using data points from an experimentation using 35 micron copper and where the angle between the first and second elongate parts is 45Q. The width of each pathway is 0.10mm and the minimum spacing between adjacent sections of the pathway is 0.1 mm.
The graph of figure 10 demonstrates the relationship between these two parameters, and highlights that a greater pathway density can be achieved by reducing the length of the elongate parts. However, this is only one variable of the shape/configuration of the pathway and thus other factors need to be taken into account, such as the percentage stretch in length of the pathway whilst maintaining integrity of the pathway.
Figures 1 1 and 12 correspond to figures 9 and 10 except that in these experiments the pathway width is 0.15mm. It can be seen from figure 1 1 that little improvement in percentage stretch is achieved when the length of the first and second parts exceeds 7/8mm and figure 12 illustrates that a reduction in the length of the first and second elongate parts 1 1 , 12 gives rise to a higher pathway density per 25mm measured in the lateral dimension of the pathways.
Figure 13 illustrates the relationship between the angle Θ between the first and second elongate parts 1 1 , 12 and the achievable pathway density per 25mm. In this example the pathways are 0.1 mm in width and 35microns thick with the length of the first and second parts being 3mm. This graph illustrates that achievable pathway density does not greatly improve when the angle exceeds 40Q. This graph highlights that a track angle of between 30Q and 60Q would provide the highest pathway density, but of course, the percentage stretch also needs to be taken into account as demonstrated in the other figures. Figure 14 illustrates that an increase in the angle between the first and second elongate parts 1 1 , 12 does indeed result in increased stretchability of the
pathway. That said, this graph illustrates that there is little improvement in the percentage stretch of the pathway when the angle Θ between the first and second elongate parts exceeds 50Q. Thus, the graphs indicate that an angle between the first and second parts 1 1 , 12 of about 45Q provides good stretchability whilst also providing a satisfactory performance in terms of track/pathway density. In this example the pathways are 0.1 mm in width and 35microns thick with the length of the first and second parts being 3mm.
The applicant has devised the following method for manufacturing an electrically conductive member which may be used as part of an electrical circuit board including the pathways according to the invention. The method has been derived starting from known methods for manufacturing printed circuit boards having copper layers which are bonded to (and usually sandwiched between) fibreglass layers. However, it should be noted that simply replicating existing manufacturing methods does not work when attempting to manufacture an electrically conductive member having the stretchable pathways of the present invention. The applicant has therefore devised the following methodology, which works surprisingly well. In a similar fashion to existing printed circuit board manufacturing methods, a layer of electrically conductive material, e.g. copper foil, is positioned on a substrate. In the present example, the layer of copper foil can be of any desired thickness, for example 0.15mm. The copper foil can be any desired thickness, but usually will be selected from the range of 12 to 79 microns. The substrate layer is a flexible plastics material of substantially uniform thickness, and the applicant has found that polyurethane is a preferred choice, due to its physical characteristics, as discussed below. Preferably, the polyurethane used has a thickness of 25 or 50 microns, but any desired thickness can be used. It should be noted, however, that an increased thickness will reduce the stretchability of the resulting electrically conductive member, but too thin a substrate can easily become damaged.
It is necessary to bond/connect the copper foil to the polyurethane substrate layer, as a first step in the manufacturing process. Although this bond can in one example be achieved by using an adhesive, the applicant has surprisingly found that the polyurethane substrate layer and copper foil layer will bond to each other, without any need for additional adhesive, by using the applicant's inventive method. The following methodology utilises pressure and temperature to heat-bond the copper foil to the polyurethane substrate.
The copper foil layer is placed on top of the polyurethane layer (or vice versa) and the layers are then positioned between a pair of substantially flat heatable plates. The assembly (i.e. copper foil layer, polyurethane layer and plates) is then placed in an laminating press (although any heating device could be used) which includes a means for applying pressure to the plates so as to force the polyurethane substrate and copper foil layer towards each other. The temperature of the plates is gradually increased to a predetermined value, which in this example is 120QC (+ or - 8QC), and is held at that temperature for a predetermined time period, which in this example is about 1 hour. A shorter time period can be used, but it should be noted that applicant has found that a minimum time required to achieve a good bond between the layers is 50 minutes. If the assembly is left in the laminating press for more than 70 minutes, the substrate will likely loose is elastic properties. The pressure applied to the plates is between 150PSI and 170PSI (preferably @ 155PSI), and the pressure is gradually increased until this value is reached. Preferably the pressure is applied in two stages, with stage one being at 50PSI and lasting for 15 minutes and stage two being at the final pressure (e.g. 155PSI) for the remaining bond time.
The assembly is then cooled, until a desired temperature of the plates is reached, for example 40QC (this means that the assembly can easily be handed by a person). A pressure (e.g. 50PSI) is maintained on the plates until the cooled temperature is reached. The plates are removed to reveal the composite copper foil/polyurethane layer (which layers have heat-bonded to each other).
An additional layer of copper foil may be positioned on an opposite side of the substrate layer, before the layers are placed in between the plates. In other words, two copper foil layers could be provided, sandwiching the substrate layer. In such an embodiment, each copper layer heat bonds to its respective side of the substrate layer.
Now that the copper foil layer bonded to the substrate, it is necessary to create in the copper foil layer the pathways of the present invention. This is achieved, in broad terms, by exposing unwanted copper (i.e. that which does not form part of the desired number of pathways) to an etchant. First, however, it is necessary to define on the copper surface the areas to form part of the pathway(s). This is achieved by covering the copper surface with a photoimageable layer, which is then dried. The photoimageable layer is then covered with a mask (which has openings defining the areas which form of the pathways), e.g. silver halide. The exposed areas of the photoimageable layer are then exposed assembly to UV light, thus causing them to harden. The assembly is then developed in a liquid which removes the unhardened areas of the photoimageable layer. The assembly is then baked in an oven at about 120QC for about 3 hours. Lower temperature can be used, but will result in an increased baking time. The temperature should not exceed 125QC as this will destroy the substrate material. The assembly is then exposed to an etchant (e.g. cupric chloride) to remove the exposed copper (i.e. the copper which does not form part of the pathways).
The assembly is then exposed to another etchant (e.g. a caustic / amine liquid) to remove the remaining photoimageable layer, thus leaving the piolyurethane substrate layer with a plurality of pathways connected thereto. If the free ends of the pathways are to be provided with solder pads (as they are known in the art) then the method may include, before etching the assembly in cupric chloride, the additional steps of applying a further layer of photoimageable material to the copper side of the assembly and using a mask to expose only the solder pads. The assembly is then exposed to UV light for a second time, which hardens only the solder pad areas of the second photoimageable layer. The assembly may be micro-etched prior to the second layer of photoimageable material being applied to remove an oxide build up on the surface. The assembly is then, as described above, etched to remove all of the photoimageable material, thus leaving the pathways and their respective solder pads.
The resulting electrically conductive member then has a solderable finish applied to the copper pathways, by immersion in liquid containing silver. If desired, a further substrate layer is then heat bonded to the copper pathways and the other substrate, to provide insulation for the pathways. It will be necessary, of course, for the solder pads to remain exposed, so that components, for example, can be connected thereto. The result is therefore a three layer electrically conductive member having a plurality of pathways which are sandwiched in between two polyurethane substrate layers.
It should be appreciated that although in the above described method a copper foil layer is used, which is then etched to remove copper not forming the pathway, an alternative method could include the step of manufacturing the pathways and then adhering the pathways to the substrate, thus eliminating the need for the etching step.
When used in this specification and claims, the terms "comprises" and "comprising" and variations thereof mean that the specified features, steps or integers are included. The terms are not to be interpreted to exclude the presence of other features, steps or components.
The features disclosed in the foregoing description, or the following claims, or the accompanying drawings, expressed in their specific forms or in terms of a means for performing the disclosed function, or a method or process for attaining the disclosed result, as appropriate, may, separately, or in any combination of such features, be utilised for realising the invention in diverse forms thereof.
Claims
1 . An electrically conductive pathway including a plurality of pathway sections which are connected end to end, and wherein each pathway section includes:
e) a first elongate part;
f) a second elongate part;
g) a first resiliently flexible part connected at one end to an second end of the first part and connected at its opposite end to a first end of the second part; and
h) a second resiliently flexible part connected at one end to an second end of the second part and connected at its opposite end to a first end of the first part of an adjacent pathway section.
2. An electrically conductive pathway according to claim 1 wherein the plurality of pathway sections are substantially identical to each other.
3. An electrically conductive pathway according to claim 1 or claim 2 wherein the first and second elongate parts of the pathway section are substantially rectilinear.
4. An electrically conductive pathway according to any preceding claim wherein the first and second elongate parts of the pathway section are oblique to an elongate axis of the pathway.
5. An electrically conductive pathway according to any preceding claim wherein the first and second elongate parts of the pathway section are each inclined at an angle to an elongate axis of the pathway.
6. An electrically conductive pathway according to claim 5 wherein the angle is in the range of 15Q to 75Q.
7. An electrically conductive pathway according to claim 5 wherein the angle is in the range of 30Q to 60Q.
8. An electrically conductive pathway according to claim 5 wherein the angle is in the range of 40Q to 50Q.
9. An electrically conductive pathway according to claim 5 wherein the angle is substantially 45Q.
10. An electrically conductive pathway according to any preceding claim wherein each resiliently flexible part includes a plurality of portions which are connected, and resiliently moveable relative, to each other.
1 1 . An electrically conductive pathway according to any preceding claim wherein at least one of the portions of each resiliently flexible part is substantially rectilinear.
12. An electrically conductive pathway according to any preceding claim wherein at least one of the portions of each resiliently flexible part is oblique to an elongate axis of the pathway.
13. An electrically conductive pathway according to any preceding claim wherein all portions of each resiliently flexible part are oblique to an elongate axis of the pathway.
14. An electrically conductive pathway according to any preceding claim wherein adjacent portions of each resiliently flexible part are inclined at an angle to each other.
15. An electrically conductive pathway according to claim 14 wherein the angle is in the range of 15Q to 75Q.
16. An electrically conductive pathway according to claim 14 wherein the angle is in the range of 30Q to 60Q.
17. An electrically conductive pathway according to claim 14 wherein the angle is in the range of 40Q to 50Q.
18. An electrically conductive pathway according to claim 14 wherein the angle is substantially 45Q.
19. An electrically conductive pathway according to any one of claims 1 to 10 wherein at least one of the portions of each resiliently flexible part is non- linear.
20. An electrically conductive pathway according to claim 19 wherein at least one of the portions of each resiliently flexible part is curved.
21 . An electrically conductive pathway according to any preceding claim wherein each or at least a part of each resiliently flexible part is V, U or W- shaped in plan view.
22. An electrically conductive pathway according to any preceding claim wherein width of each of the first and second resiliently flexible parts, when measured in a direction perpendicular to an elongate axis of the pathway, is between 10% and 30% of the overall width of the pathway.
23. An electrically conductive pathway according to any preceding claim wherein an overall width of each of the first and second resiliently flexible parts, when measured in a direction perpendicular to an elongate axis of the pathway, is between 15% and 25%, most preferably 20%, of the overall width of the pathway.
24. An electrically conductive pathway according to any preceding claim wherein the first and second elongate parts define a space therebetween configured to receive a first or second resiliently flexible part of an adjacent pathway.
25. An electrically conductive pathway according to claim 24 wherein the spaced defined between the first and second elongate parts is substantially trapezoidal.
26. An electrically conductive member including an electrically conductive pathway according to any one of the preceding claims.
27. An electrically conductive member according to claim 26 including two electrically conductive pathways positioned adjacent each other.
28. An electrically conductive member according to claim 27 wherein the first resiliently flexible parts of one pathway are received in spaces defined in between the first and second elongate parts of the adjacent pathway.
29. An electrically conductive member according to claim 27 or claim 28 wherein the two electrically conductive pathways are positioned next to each other such that an elongate axis of one pathway extends through the first and second elongate parts of the adjacent pathway.
30. An electrically conductive member according to any one of claims 27 to 29 wherein a lateral distance between corresponding points on adjacent pathways is constant substantially along the entire length of the conductive member.
31 . An electrically conductive member according to any one of claims 27 to 29 wherein a lateral distance between corresponding points on the adjacent pathways is constant substantially along the entire length of the conductive member during extension of the member under a tensile force.
32. An electrically conductive member according to any one of claims 26 to 31 wherein the member includes a substrate supporting the electrically conductive pathway(s).
33. An electrically conductive member according to claim 32 wherein the electrically conductive pathway(s) is connected to a surface of the substrate.
34. An electrically conductive member according to claim 32 or claims 33 wherein the electrically conductive pathway(s) is adhered or bonded to a surface of the substrate.
35. An electrically conductive member according to claim 32, 33 or 34 wherein when the member includes at least two electrically conductive pathways, one is connected to each of opposite surfaces of the substrate.
36. An electrically conductive member according to claim 32, 33 or claim 34 wherein a plurality of electrically conductive pathways are connected to opposite surfaces of the substrate.
37. An electrically conductive member according to any one of claims 32 to 36 wherein the electrically conductive pathway(s) is sandwiched between two substrates which are connected, adhered or bonded to each other.
38. An electrically conductive member according any one of claims 32 to 37 wherein the substrate is a polymer.
39. An electrically conductive member according to claim 38 wherein the polymer is a polyurethane.
40. An electrical circuit board including an electrically conductive member according to any one of claims 26 to 39.
41 . A method of manufacturing an electrically conductive member, the method comprising the steps of:
positioning a layer of electrically conductive material adjacent a substrate layer;
increasing the temperature of the electrically conductive and substrate layers to a predetermined temperature;
applying pressure to the electrically conductive and substrate layers so as to urge the layers towards each other;
holding the electrically conductive and substrate layers at said temperature for a predetermined time period;
cooling the electrically conductive and substrate layers to a predetermined temperature;
removing unwanted areas of the electrically conductive layer to provide at least one electrically conductive pathway connected to the substrate.
42. A method of manufacturing according to claim 41 including the step of positioning the electrically conductive and substrate layers in between a pair of heat conductive members.
43. A method of manufacturing according to claim 41 or claim 42 wherein the substrate layer and electrically conductive layer adhere to each other by heat-bonding.
44. A method of manufacturing according to any one of claims 41 to 43 wherein pressure is applied to the electrically conductive and substrate layers whilst they are cooled the predetermined temperature.
45. A method of manufacturing according to any one of claims 41 to 44 wherein the method includes the step of positioning a second electrically conductive layer adjacent an opposite side of the substrate layer.
46. A method of manufacturing according to any one of claims 41 to 45 wherein the step of removing unwanted areas of the electrically conductive layer to provide at least one pathway connected to the substrate is achieved by exposing the unwanted areas of the electrically conductive layer to an etchant.
47. A method of manufacturing according to any one of claims 41 to 44 including the step of positioning a further substrate layer adjacent an opposite side of the electrically conductive layer, once the pathways have been created.
48. A method of manufacturing according to claim 47 wherein the further substrate layer is connected to the pathway(s) and the other substrate layer.
49. A method of manufacturing according to claim 48 the further substrate layer is heat-bonded to the pathway(s) and the other substrate layer.
50. An electrically conductive pathway substantially as hereinbefore described with reference to and as shown in the accompanying drawings.
51 . An electrically conductive member substantially as hereinbefore described with reference to and as shown in the accompanying drawings.
52. An electrical circuit board substantially as hereinbefore described with reference to and as shown in the accompanying drawings.
53. A method of manufacturing an electrically conductive member substantially as hereinbefore described with reference to and as shown in the accompanying drawings.
54. Any novel feature or novel combination of features described herein and/or in the accompanying drawings.
Priority Applications (3)
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US14/008,639 US9629236B2 (en) | 2011-03-31 | 2012-03-26 | Improvements for electrical circuits |
CN201280026023.9A CN103563494B (en) | 2011-03-31 | 2012-03-26 | The improvement of circuit |
EP12715716.2A EP2692214A1 (en) | 2011-03-31 | 2012-03-26 | Improvements for electrical circuits |
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GB1105495.4A GB2489508B8 (en) | 2011-03-31 | 2011-03-31 | Improvements for electrical circuits |
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EP (1) | EP2692214A1 (en) |
CN (1) | CN103563494B (en) |
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Also Published As
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TW201247050A (en) | 2012-11-16 |
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