JP5373912B2 - Low resistance chip resistor and manufacturing method thereof - Google Patents

Low resistance chip resistor and manufacturing method thereof Download PDF

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JP5373912B2
JP5373912B2 JP2011526658A JP2011526658A JP5373912B2 JP 5373912 B2 JP5373912 B2 JP 5373912B2 JP 2011526658 A JP2011526658 A JP 2011526658A JP 2011526658 A JP2011526658 A JP 2011526658A JP 5373912 B2 JP5373912 B2 JP 5373912B2
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substrate
resistance
resistance layer
chip resistor
protective film
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JPWO2011018842A1 (en
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修 松川
立樹 平野
篤司 戸田
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Kamaya Electric Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/003Thick film resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C1/00Details
    • H01C1/14Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/148Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/006Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C3/00Non-adjustable metal resistors made of wire or ribbon, e.g. coiled, woven or formed as grids
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/285Permanent coating compositions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors

Description

本発明は、チップ形抵抗器、特に低抵抗器のチップ形抵抗器とその製造方法に関する。   The present invention relates to a chip resistor, and more particularly to a low resistor chip resistor and a method of manufacturing the same.

最近、多機能の携帯機器等へ突入する過電流を保護するため、電流検知用の低抵抗値のチップ形抵抗器が多用されている。そこで、その抵抗器の大きさ、抵抗値は同一で、より大きい電流値まで検知できるようにするため、定格電力の増大の要求がある。よって、その要求により、その抵抗器の自己発熱が増大する。そして、その抵抗器の保護膜かつ、その抵抗器の実装後のプリント配線板等に損傷を及ぼす不具合が発生する。   Recently, in order to protect an overcurrent entering a multifunctional portable device or the like, a chip resistor having a low resistance value for current detection is frequently used. Therefore, there is a demand for an increase in the rated power so that the resistor has the same size and resistance value and can detect a larger current value. Thus, the requirement increases self-heating of the resistor. And the malfunction which damages the protective film of the resistor, the printed wiring board after mounting of the resistor, etc. occurs.

そこで特許文献1は、セラミックス基板1上に抵抗体2を直接熱拡散で接合して、部品の機械的強度を補強しているものである。   Therefore, Patent Document 1 reinforces the mechanical strength of a component by bonding a resistor 2 directly on a ceramic substrate 1 by thermal diffusion.

また、特許文献2には、セラミック基板に抵抗体を銀ロウなどを用いた活性化金属法によって一体に接合するものも開示されている。   Patent Document 2 also discloses a method in which a resistor is integrally bonded to a ceramic substrate by an activated metal method using silver solder or the like.

さらに、特許文献3では、シリカを含有する無機接着剤により、セラミック基板に抵抗箔を貼る技法を適用した抵抗器も提案されている。   Further, Patent Document 3 proposes a resistor to which a technique of applying a resistance foil to a ceramic substrate with an inorganic adhesive containing silica is applied.

特開2006−313763号公報JP 2006-313763 A 特開平11−97203号公報Japanese Patent Laid-Open No. 11-97203 特開平9−320802号公報JP-A-9-320802

しかしながら、上記特許文献1では、セラミックス基板に抵抗金属板または箔を接合する場合、高温960〜980℃、酸素濃度50ppm以下という雰囲気で熱拡散により接合することは、量産設備としても大規模になる問題が想定される。さらに、抵抗値の調節を抵抗器の幅の許容範囲内で切断幅を調節するため、抵抗金属板とセラミックスとを機械的に容易に切断することは困難である。また、上記高温の処理では、抵抗金属板の電気的特性が劣化する場合もある。   However, in Patent Document 1, when a resistance metal plate or foil is bonded to a ceramic substrate, bonding by thermal diffusion in an atmosphere of a high temperature of 960 to 980 ° C. and an oxygen concentration of 50 ppm or less becomes large-scale as a mass production facility. A problem is assumed. Further, since the cutting width is adjusted within the allowable range of the resistor width for adjusting the resistance value, it is difficult to mechanically easily cut the resistance metal plate and the ceramic. In addition, the electrical characteristics of the resistive metal plate may be deteriorated by the high temperature treatment.

また、特許文献2は、セラミックス基板に抵抗金属板または箔を接合する場合、銀ロウなどを用いた活性化金属法を適用している。その場合も特許文献1と同様具体的な温度等の条件の記載はないが800℃程度の温度にさらされることが想定される。それにより、特許文献1と同様な問題がある。
さらに、特許文献3には、基板の上面から側面にかけて、シリカを主成分とする無機接着剤を介して抵抗箔が設けられている。そして、抵抗値の調節はレーザートリミング等で開口を形成して行なうことが述べられている。しかし、その態様では、抵抗値の調節で抵抗箔に開口を形成するとその部分に電流集中が発生し、抵抗器の寿命特性の低下につながると想定される。
Patent Document 2 applies an activated metal method using silver braze or the like when a resistance metal plate or foil is bonded to a ceramic substrate. In this case as well, there is no description of specific conditions such as temperature as in Patent Document 1, but it is assumed that the temperature is exposed to about 800 ° C. Thereby, there is a problem similar to that of Patent Document 1.
Further, in Patent Document 3, a resistance foil is provided from an upper surface to a side surface of a substrate via an inorganic adhesive mainly composed of silica. It is described that the resistance value is adjusted by forming an opening by laser trimming or the like. However, in that aspect, it is assumed that when an opening is formed in the resistance foil by adjusting the resistance value, current concentration occurs in that portion, leading to a decrease in the life characteristics of the resistor.

そこで、本発明は、上記問題点を解決せんとしたものであり、その課題とするところは、一層大きい電流も検知でき、高い電気的耐久性と、自己自立性の機械的強度を向上した低抵抗のチップ形抵抗器を提供したことにある。ここで、本チップ形抵抗器に上記自己自立性を持たせるとは、本チップ形抵抗器を搭載機によりマウントするに十分な機械的強度を保有することであり、また高い電気的耐久性ということは、大電流にも十分通用することを意味する。そのために、大きい電流を通電した時でも、その抵抗器の表面温度を低減する基板あるいは抵抗膜と、体積をより小さくしながらも自己自立性を有する抵抗層構造の低抵抗のチップ形抵抗器を得ることができるようにした。   Therefore, the present invention has been made to solve the above-described problems, and the problem is that a higher current can be detected, and a high electrical durability and a low self-supporting mechanical strength are improved. The present invention provides a resistor chip resistor. Here, giving the chip resistor the above self-supporting property means that the chip resistor has sufficient mechanical strength to be mounted by a mounting machine, and also has high electrical durability. This means that it can be applied to a large current. Therefore, even when a large current is applied, a substrate or a resistance film that reduces the surface temperature of the resistor, and a low-resistance chip-type resistor with a resistance layer structure that has a self-supporting property while reducing the volume further To be able to get.

また、本発明の他の課題としては、基板と抵抗層を張合わせたものに、端面電極や必要によっては保護膜を設けた帯状のものを用い、本抵抗器の電気的耐久性を増強するため、抵抗層にトリミング痕による電流の集中部を設けることなく、その代わり、帯状の長さ方向の切断幅を調節し抵抗値に応じて予め設定した幅で切断することにより、容易かつ迅速な方法で高精度な本抵抗器を製造することができるようにした。   Another object of the present invention is to enhance the electrical durability of the resistor by using an end face electrode or a belt-like one provided with a protective film if necessary, which is a laminate of a substrate and a resistance layer. Therefore, without providing the current concentration portion due to the trimming trace in the resistance layer, instead of adjusting the cutting width in the longitudinal direction of the band and cutting with a preset width according to the resistance value, it is easy and quick This method makes it possible to manufacture a highly accurate resistor.

本発明の低抵抗のチップ形抵抗器請求項1は、上記課題を解決したものであり、その要旨は、基板の表裏両面に抵抗層を、その表裏両面の中央部に保護膜をそれぞれ形成し、前記抵抗層上の前記保護膜の両側に表電極と裏電極を配置すると共に、前記基板、抵抗膜、および表裏電極の両端に端面電極を形成したものから成り、前記基板がセラミック粉を内部に分散した絶縁樹脂またはゴム製であり、しかも前記抵抗層を金属板か金属箔のいずれかにしたものである。
ここで、上記抵抗層の金属板または金属箔としては、マンガニンや、ニクロム、鉄・クロム・アルミニウムの単体か、これらの合金がある。その中で金属板とは、0.1mm以上で、金属箔は0.1mm未満のものをいう。それは、所望の抵抗値により、低抵抗金属板の種類で特定される体積抵抗率とその厚さにより設定する。よって、このように抵抗膜の厚さにより各種の板と箔が考えられる。また、基板のセラミック粉を内部に分散したものの絶縁樹脂またはゴムとしては、アクリル系樹脂の他に、エポキシ系樹脂、クロロプレンゴム、ブチルゴム、ウレタンゴム、ニトリル―ブタジエン系ゴム、スチレン―ブタジエン系ゴム、ポリエステル系樹脂、ポリ塩化ビニル系樹脂、ポリウレタン樹脂、シリコーン樹脂、フェノール樹脂、アミド系樹脂、イミド系樹脂、セルロース系樹脂、ABS樹脂のうちから一以上選択したものがある。さらに、上記抵抗層は、マンガニン、ニクロム、鉄・クロム・アルミニウムの単体か、これらの合金を用いる。なお、保護膜の原料として、エポキシ樹脂、ポリイミド樹脂、シリコーン樹脂等が考えられ、表電極は抵抗層上に、下から順に、例えば電気めっき法により銅、ニッケル、スズめっき膜で形成したものからなり、端面電極には、下から例えばスパッタ法によるニクロム膜または導電性樹脂ペーストによる膜上に電気めっき法により銅、ニッケル、スズめっき膜からなる。
The low-resistance chip-type resistor according to the present invention is a solution to the above-mentioned problem, and the gist thereof is that a resistance layer is formed on both the front and back surfaces of the substrate, and a protective film is formed on the center of both the front and back surfaces. The front and back electrodes are disposed on both sides of the protective film on the resistance layer, and end electrodes are formed on both ends of the substrate, the resistance film, and the front and back electrodes. It is made of an insulating resin or rubber dispersed in the metal, and the resistance layer is either a metal plate or a metal foil.
Here, as the metal plate or metal foil of the resistance layer, there are manganin, nichrome, iron / chromium / aluminum, or an alloy thereof. Among them, the metal plate is 0.1 mm or more and the metal foil is less than 0.1 mm. It is set by the volume resistivity specified by the kind of the low resistance metal plate and its thickness depending on the desired resistance value. Therefore, various plates and foils are conceivable depending on the thickness of the resistance film. In addition to acrylic resin, insulating resin or rubber with ceramic powder dispersed inside is epoxy resin, chloroprene rubber, butyl rubber, urethane rubber, nitrile-butadiene rubber, styrene-butadiene rubber, One or more selected from polyester resins, polyvinyl chloride resins, polyurethane resins, silicone resins, phenol resins, amide resins, imide resins, cellulose resins, and ABS resins. Further, the resistance layer is made of manganin, nichrome, iron / chromium / aluminum, or an alloy thereof. In addition, an epoxy resin, a polyimide resin, a silicone resin, etc. can be considered as a raw material of the protective film, and the surface electrode is formed from a copper, nickel, tin plating film on the resistance layer in order from the bottom, for example, by electroplating. The end face electrode is made of, for example, a copper, nickel, or tin plating film by electroplating on a nichrome film by sputtering or a film by conductive resin paste from below.

上記本発明である低抵抗のチップ形抵抗器の製造方法として請求項3は、セラミック粉を内部に分散した帯状の絶縁樹脂またはゴム製基板の表裏両面に金属板か金属箔からなる抵抗層を積層し、該積層した帯状の表裏両面の長手方向中央部に保護膜を形成し、該保護膜の両側の前記抵抗層上に表電極と裏電極を形成すると共に、前記基板、抵抗膜及び表裏電極の両端に端面電極を形成した後、前記帯状の長手方向にクロスして所定幅に切断して得られることがある。
この発明は、請求項1の低抵抗のチップ形抵抗器の製造方法であり、その特徴は帯状基板の表裏両面に抵抗層と保護膜を形成し、そしてこれらの両側に表裏電極と端面電極を形成した帯状のものを、長手方向にクロスして、予め設計された長さ(所定幅)に切断する技法を適用したことを特徴とするものである。
According to a third aspect of the present invention, there is provided a method for manufacturing a low-resistance chip-type resistor. And a protective film is formed in the longitudinal center of both sides of the laminated belt-like front and back, and a front electrode and a back electrode are formed on the resistance layer on both sides of the protective film, and the substrate, the resistance film, and the front and back are formed. After end face electrodes are formed on both ends of the electrode, it may be obtained by crossing in the longitudinal direction of the belt and cutting to a predetermined width.
The present invention is a method of manufacturing a low resistance chip resistor according to claim 1, characterized in that a resistance layer and a protective film are formed on both front and back sides of a belt-like substrate, and front and back electrodes and end electrodes are formed on both sides thereof. It is characterized by applying a technique in which the formed belt-like material is crossed in the longitudinal direction and cut into a length (predetermined width) designed in advance.

本発明の他の方法としての請求項4は、前記請求項3における前記帯状の絶縁樹脂またはゴム製基板に前記抵抗層を積層する方法が、前記金属板か金属箔のいずれかの抵抗層を加熱して前記基板に張付するものであり、しかも前記積層した帯状の長手方向両端部を、後工程でできた保護膜が位置する中央部より大きく加圧する圧延により積層することを特徴とする。
この発明は、積層した長手方向両端部を中央部より大きく加圧することで、積層体の両端側より内部方向に一体化するようにした。
According to another aspect of the present invention, there is provided a method for laminating the resistance layer on the strip-shaped insulating resin or rubber substrate according to the third aspect, wherein the resistance layer of either the metal plate or the metal foil is used. Heating and sticking to the substrate, and the both ends of the laminated strip in the longitudinal direction are laminated by rolling that presses more than the central part where the protective film formed in the subsequent process is located. .
According to the present invention, both end portions in the longitudinal direction of the laminated body are pressed more greatly than the center portion so that they are integrated in the inner direction from both end sides of the laminated body.

本発明の別の方法としての請求項5は、前記請求項3における前記帯状の絶縁樹脂またはゴム製基板に前記抵抗層を積層する方法が、前記金属板か金属箔のいずれかの抵抗層を加熱して前記基板に張付するものであり、しかも前記積層した帯状の後工程でできる保護膜が位置する長手方向の中央部を、その両端部より大きく加圧する圧延により積層することにある。
この発明は、積層した長手方向の中央部を両端部より大きく加圧するもので、積層体の中央部より両端側を十分に一体化するものである。
According to a fifth aspect of the present invention, the method for laminating the resistive layer on the strip-shaped insulating resin or rubber substrate according to the third aspect is characterized in that the resistive layer of either the metal plate or the metal foil is used. Heating and sticking to the substrate, and laminating the central portion in the longitudinal direction where the protective film formed in the post-process of the laminated strip is positioned by rolling that presses more than both ends.
In the present invention, the laminated central portion in the longitudinal direction is pressed more greatly than both end portions, and both end sides are sufficiently integrated from the central portion of the laminate.

また、本発明の請求項2として、抵抗層の表裏両面の中央部に基板を形成し、前記基板の両側の前記抵抗層上に表電極と裏電極を配置すると共に、前記抵抗層と基板の両側に端面電極を形成したものから成り、前記基板がセラミック粉を内部に分散した絶縁樹脂またはゴム製であり、しかも前記抵抗層を金属板か金属箔のいずれかにしたものがある。
上記の請求項2の発明は、請求項1の基板と抵抗層を逆にし、しかもその基板は保護膜の機能も有するようにして、請求項1よりも構造を単純化したものである。
According to a second aspect of the present invention, a substrate is formed in the center of both front and back surfaces of the resistance layer, and front and back electrodes are disposed on the resistance layer on both sides of the substrate, and the resistance layer and the substrate There is one in which end electrodes are formed on both sides, the substrate is made of an insulating resin or rubber in which ceramic powder is dispersed, and the resistance layer is either a metal plate or a metal foil.
The invention of claim 2 is a simplified structure than that of claim 1 in which the substrate of claim 1 and the resistance layer are reversed and the substrate also has a protective film function.

上記請求項2の本発明である低抵抗のチップ形の製造方法として、金属板か金属箔のいずれかの帯状抵抗層の表裏両面の長手方向中央部に、前記抵抗層を加熱して、セラミック粉を内部に分散した絶縁樹脂またはゴム製基板を張合し、前記基板の両側の前記抵抗層上に表電極と裏電極を形成すると共に、前記抵抗層と基板の両端に端面電極を形成した後、前記帯状の長手方向にクロスして所定幅に切断して得られることを特徴とする。
この請求項6は、前記請求項2の低抵抗のチップ形抵抗器の製造方法である。
As a low resistance chip-shaped manufacturing method according to the present invention of claim 2, the resistance layer is heated at the center in the longitudinal direction on both the front and back sides of the belt-like resistance layer of either a metal plate or a metal foil, and the ceramic An insulating resin or rubber substrate in which powder is dispersed is bonded to form a front electrode and a back electrode on the resistance layer on both sides of the substrate, and end electrodes are formed on both ends of the resistance layer and the substrate. Thereafter, it is obtained by crossing the strip in the longitudinal direction and cutting it to a predetermined width.
The sixth aspect of the present invention is a method for manufacturing the low resistance chip resistor of the second aspect.

本発明の特徴は、一層大きい電流も検知でき、高い電気的耐久性と自己自立性の機械的強度を向上し、さらに、電流通電時に低抵抗のチップ形抵抗器の保護膜もしくは基板上の表面温度を低減した。その効果を奏するために、本発明の基板にセラミック粉を内部に分散した絶縁樹脂またはゴム製のもの絶縁樹脂を適用した。さらに、その絶縁樹脂を適用した低抵抗のチップ形抵抗器の電気的耐久性を低下する要因となる、従来の抵抗層にあるトリミング溝間の電流集中を回避し、迅速かつ容易な方法で製造することができる。   The feature of the present invention is that it can detect even larger currents, improves the mechanical strength of high electrical durability and self-sustainedness, and further protects the surface of the low-resistance chip resistor when the current is applied or the surface on the substrate Reduced temperature. In order to achieve the effect, an insulating resin in which ceramic powder is dispersed or a rubber insulating resin is applied to the substrate of the present invention. In addition, the current resistance between the trimming grooves in the conventional resistance layer, which is a cause of lowering the electrical durability of the low resistance chip resistors to which the insulating resin is applied, is manufactured in a quick and easy manner. can do.

(a)と(b)は、本発明の低抵抗のチップ形抵抗器を製造する一部帯状の概略斜視図とその横断面図である。(A) And (b) is the one part strip | belt-shaped schematic perspective view which manufactures the low resistance chip-type resistor of this invention, and its cross-sectional view. (a)と(b)は、図1とは別の実施例である低抵抗のチップ形抵抗器を製造する一部帯状の概略斜視図と横断面図である。(A) And (b) is the one part strip | belt-shaped schematic perspective view and cross-sectional view which manufacture the chip resistor of the low resistance which is an Example different from FIG. (a)−1〜4及び(b)−1〜4は、図1の低抵抗のチップ形抵抗器の製造手順を示す説明図である。(A) -1-4 and (b) -1-4 are explanatory drawings which show the manufacture procedure of the low resistance chip-type resistor of FIG. (a)−1〜4及び(b)−1〜4は、図3とは別の製造手順を示す説明図である。(A) -1-4 and (b) -1-4 are explanatory drawings which show a manufacturing procedure different from FIG. (a)−1〜4及び(b)−1〜4は、図3や図4とは異なる低抵抗のチップ形抵抗器の製造手順を示す説明図である。(A) -1-4 and (b) -1-4 are explanatory drawings which show the manufacture procedure of the low resistance chip-type resistor different from FIG.3 and FIG.4. (a)−1〜3及び(b)−1〜4は、図2の低抵抗のチップ形抵抗器の製造手順を示す説明図である。(A) -1 to 3 and (b) -1 to 4 are explanatory views showing a manufacturing procedure of the low-resistance chip resistor of FIG. 本発明の絶縁基板と従来品の絶縁基板を用いた抵抗器の、表面温度を比較したグラフである。It is the graph which compared the surface temperature of the resistor using the insulated substrate of this invention, and the conventional insulated substrate.

1 絶縁基板
2 抵抗層
3 保護膜
4−1 表電極
4−2 端面電極
4−3 裏電極
DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Resistance layer 3 Protective film 4-1 Front electrode 4-2 End surface electrode 4-3 Back electrode

低抵抗のチップ形抵抗器を、薄厚な小形とした低抵抗のものを前提とし、これに自己自立性をもたせて機械的強度を上げることで、耐久性の向上を図れる。
また、この発明方法では、帯状の基板と抵抗層を張付け、これに保護膜と表裏電極及び端面電極のもの、あるいは抵抗層と基板に表裏電極と端面電極を設けたものを、その帯状の長手方向にクロスして所定幅で切断して製造する。
Assuming that the low-resistance chip-type resistor is a thin, small and low-resistance resistor, it is possible to improve durability by increasing the mechanical strength by giving it self-independence.
Further, in the method of the present invention, a belt-like substrate and a resistance layer are stretched, and a protective film, front and back electrodes and end face electrodes, or a resistance layer and a substrate provided with front and back electrodes and end face electrodes, It is manufactured by cutting in a predetermined width by crossing in the direction.

本発明である低抵抗のチップ形抵抗器の構成について、以下に説明する。
図1(a)と(b)は、エポキシ系樹脂の中にセラミック粉の一種であるアルミナ粉が体積比で7対3に分散された絶縁基板の長尺物の斜視図と、その横断面図である。これらの図において、厚さ0.3mm、幅4.3mmの帯状の数m程度の基板1の表裏両面には、厚さ0.05mm、幅6.3mmの帯状の数m程度の長さの抵抗層2としての鉄・クロム・アルミ合金製の金属板を積層している。この抵抗膜の上下両側の中央部長手方向には、エポキシ樹脂の保護膜3をスクリーン印刷法にて10μm程度の厚さを形成し、上下の保護膜3の両側の抵抗層2上には基板1と抵抗層2の端部に設けた端面電極4−2を介して、それぞれ表裏電極4−1、4−3を重合している。
なお、上記各層状の長尺物は、図1(a)に示す3.2mm毎に切断して本発明の低抵抗のチップ形抵抗器を完成する。
尚、図7のグラフのように、本発明の低抵抗のチップ形抵抗器に0.5W、1W、1.5W、2W、の各電力に相当する電流を通電したときに発生する抵抗器の保護膜表面の温度は、セラミック粉を内部に分散した絶縁樹脂またはゴム製の絶縁樹脂基板の場合(A)と、従来品としてのセラミック粉を内部に分散していない絶縁樹脂またはゴム製の絶縁樹脂基板の場合(B)とで差異があることを示す。その結果より、前記各電力に相当する電流を通電したときの保護膜の表面温度が、従来のセラミック基板より本発明の基板中に分散したセラミック粉を混入したものの方が、耐熱放出の効果があることが判った。
The configuration of the low resistance chip resistor according to the present invention will be described below.
1 (a) and 1 (b) are a perspective view of a long object of an insulating substrate in which alumina powder, which is a kind of ceramic powder, is dispersed in an epoxy resin in a volume ratio of 7 to 3, and a cross section thereof. FIG. In these figures, both the front and back surfaces of a strip-shaped substrate 1 having a thickness of 0.3 mm and a width of 4.3 mm have a length of approximately several meters of a strip-shaped substrate having a thickness of 0.05 mm and a width of 6.3 mm. A metal plate made of iron, chrome, and aluminum alloy is laminated as the resistance layer 2. In the longitudinal direction of the central part of the upper and lower sides of the resistance film, an epoxy resin protective film 3 is formed by a screen printing method to a thickness of about 10 μm, and the substrate is placed on the resistive layer 2 on both sides of the upper and lower protective films 3. The front and back electrodes 4-1 and 4-3 are polymerized through end face electrodes 4-2 provided at the end portions of 1 and the resistance layer 2, respectively.
Note that the above-mentioned long layered objects are cut every 3.2 mm shown in FIG. 1A to complete the low-resistance chip resistor of the present invention.
As shown in the graph of FIG. 7, the resistance of the resistor generated when a current corresponding to 0.5 W, 1 W, 1.5 W, 2 W is applied to the low resistance chip resistor of the present invention. The surface temperature of the protective film depends on the insulating resin or rubber insulating resin substrate in which the ceramic powder is dispersed (A), and the insulating resin or rubber insulating material in which the ceramic powder is not dispersed in the conventional product. It shows that there is a difference between the resin substrate (B). As a result, the surface temperature of the protective film when a current corresponding to each of the electric powers is applied is mixed with ceramic powder dispersed in the substrate of the present invention rather than the conventional ceramic substrate, and the heat release effect is more effective. It turns out that there is.

次に、本発明の低抵抗のチップ形抵抗器の製造方法につて、以下に記載する。
(実施例1−1)
Next, the manufacturing method of the low resistance chip resistor of the present invention will be described below.
(Example 1-1)

図3(a)と(b)の1〜4は、上記実施例1である図1の低抵抗のチップ形抵抗器の製造手順を示す一部斜視図とその横断面図である。
図(a)−1,(b)−1は、エポキシ系樹脂の中にアルミナ粉を分散混合した絶縁板1で、図(a)−2,(b)−2でその表裏に抵抗層の鉄・クロム・アルミ合金製金属板を張り、150℃〜200℃で加熱してから2hPa〜3hPaの範囲で加圧して圧延し、(a)−3,(b)−3では、さらに上下中央部に上記したエポキシ樹脂をスクリーン印刷して150℃〜250℃の温度で焼付し、(a)−4,(b)−4において両端部をクロム・ニッケル製の溶液の中に順次浸漬してから焼付し、最後に(a)−4に示すように長手方向にクロスして所定抵抗値に決められた幅、例えば3.0mm〜3.3mm毎に裁断して仕上げる。
(実施例1−2)
FIGS. 3A and 3B are a partial perspective view and a transverse cross-sectional view showing a manufacturing procedure of the low-resistance chip resistor of FIG.
FIGS. 1 (a) -1 and (b) -1 are insulating plates 1 in which alumina powder is dispersed and mixed in an epoxy resin. In FIGS. An iron / chrome / aluminum alloy metal plate is stretched, heated at 150 ° C. to 200 ° C., pressed and rolled in the range of 2 hPa to 3 hPa, and in (a) -3 and (b) -3, the upper and lower centers The above-mentioned epoxy resin is screen-printed on the part and baked at a temperature of 150 ° C. to 250 ° C., and both ends are sequentially immersed in a chromium / nickel solution in (a) -4 and (b) -4. Finally, as shown in (a) -4, it is crossed in the longitudinal direction and cut into a predetermined resistance value, for example, every 3.0 mm to 3.3 mm, and finished.
(Example 1-2)

図4に示す実施例は、前記(実施例1−1)の変形例である。
この実施例が(実施例1−1)と異なるところは、絶縁基板1に抵抗膜2を加熱して圧延する際に、幅方向の中央部より両端部を強く、すなわち中央部は1.5hPaで両側は3hPaで加圧して圧延することにある。
(実施例1−3)
The embodiment shown in FIG. 4 is a modification of the above-described (Example 1-1).
This embodiment differs from (Example 1-1) in that when the resistance film 2 is heated and rolled on the insulating substrate 1, both ends are stronger than the center in the width direction, that is, the center is 1.5 hPa. And both sides are to press and roll at 3 hPa.
(Example 1-3)

図5に示す実施例は、前記(実施例1−1)や(実施例1−2)とは更に別の変形例を示す。
この実施例が(実施例1−1)や(実施例1−2)と異なる箇所は、絶縁基板に抵抗層2を加熱して圧延する際に、上記(実施例1−2)とは逆に幅方向の両端部1.5hPaで中央部を3hPaで加圧し、圧延したものである。
The embodiment shown in FIG. 5 shows another modified example different from the above-mentioned (Example 1-1) and (Example 1-2).
When this example is different from (Example 1-1) and (Example 1-2), the resistance layer 2 is heated and rolled on the insulating substrate, which is opposite to the above (Example 1-2). The center part is pressed at 3 hPa at both end parts 1.5 hPa in the width direction and rolled.

図2(a)と(b)は、上記実施例とは別の抵抗器であり、同図において、抵抗層2として、厚さ0.1mm、幅6.3mmの帯状の数m程度の大きさの鉄・クロム・アルミ合金製の金属板の上下中央部に、エポキシ樹脂の中にセラミック粉を分散した絶縁基板1を積層している。
なお、上下基板の上下両側には抵抗層2の両端部にある端面電極4−2を介して上下に表と裏の各電極がある。
(実施例2−1)
FIGS. 2A and 2B are resistors different from those in the above embodiment. In FIG. 2, the resistive layer 2 is a strip-shaped layer having a thickness of 0.1 mm and a width of 6.3 mm, which is about several meters in size. An insulating substrate 1 in which ceramic powder is dispersed in epoxy resin is laminated at the upper and lower central portions of a metal plate made of iron, chrome, and aluminum alloy.
Note that there are upper and lower electrodes on both upper and lower sides of the upper and lower substrates via end face electrodes 4-2 at both ends of the resistance layer 2.
(Example 2-1)

図6に示した実施例は、上記実施例2の製造方法である。
鉄・クロム・アルミ合金製金属板の抵抗層2の表裏中央部には、エポキシ系樹脂の中にアルミナ粉を体積比7:3で分散混合した絶縁基板1を150℃〜200℃で加熱し、圧延して積層し、その基板の両側の抵抗層の上下に表と裏電極4−1と4−3をスクリーン印刷し、150℃〜250℃で加熱してから長尺の両端部を、クロム・ニッケル製の溶液中に順次浸漬して焼付し、最後に(b)−4図に示すように3.0mm〜3.3mmの幅で裁断して仕上げる。
The embodiment shown in FIG. 6 is the manufacturing method of Embodiment 2 described above.
Insulating substrate 1 in which alumina powder is dispersed and mixed in an epoxy resin at a volume ratio of 7: 3 is heated at 150 ° C. to 200 ° C. at the center of the front and back sides of resistance layer 2 of a metal plate made of iron, chrome, and aluminum alloy. , Rolled and laminated, screen-printed front and back electrodes 4-1 and 4-3 on the upper and lower sides of the resistance layer on both sides of the substrate, heated at 150 to 250 ° C. Baking is carried out by sequentially dipping in a solution made of chromium / nickel, and finally it is cut to a width of 3.0 mm to 3.3 mm as shown in FIG.

低抵抗のチップ形抵抗器として利用される。   Used as a low-resistance chip resistor.

Claims (6)

基板の表裏両面に抵抗層を、その表裏両面の中央部に保護膜をそれぞれ形成し、前記抵抗層上の前記保護膜の両側に表電極と裏電極を配置すると共に、前記基板、抵抗膜、及び表裏電極の両端に端面電極を形成したものから成り、前記基板がセラミック粉を内部に分散した絶縁樹脂またはゴム製であり、しかも前記抵抗層を金属板か金属箔のいずれかにしたものであることを特徴とする低抵抗のチップ形抵抗器。   A resistance layer is formed on both the front and back surfaces of the substrate, a protective film is formed on the center portion of the front and back surfaces, and a front electrode and a back electrode are disposed on both sides of the protective film on the resistance layer, and the substrate, the resistance film, And an end face electrode formed on both ends of the front and back electrodes, the substrate is made of insulating resin or rubber in which ceramic powder is dispersed, and the resistance layer is either a metal plate or a metal foil. A low-resistance chip resistor characterized by being. 抵抗層の表裏両面の中央部に基板を形成し、前記基板の両側の前記抵抗層上に表電極と裏電極を配置すると共に、前記抵抗層と表裏電極の両端に端面電極を形成したものから成り、前記基板がセラミック粉を内部に分散した絶縁樹脂またはゴム製であり、しかも前記抵抗層を金属板か金属箔のいずれかにしたものであることを特徴とする低抵抗のチップ形抵抗器。   A substrate is formed at the center of both front and back surfaces of the resistance layer, front and back electrodes are arranged on the resistance layer on both sides of the substrate, and end electrodes are formed at both ends of the resistance layer and the front and back electrodes. A low resistance chip resistor characterized in that the substrate is made of insulating resin or rubber in which ceramic powder is dispersed, and the resistance layer is made of either a metal plate or a metal foil. . セラミック粉を内部に分散した帯状の絶縁樹脂またはゴム製基板の表裏両面に金属板か金属箔からなる抵抗層を積層し、該積層した帯状の表裏両面の長手方向中央部に保護膜を形成し、該保護膜の両側の前記抵抗層上に表電極と裏電極を形成すると共に、前記基板、抵抗膜、及び表裏電極の両端に端面電極を形成した後、前記帯状の長手方向にクロスして所定幅に切断して得られることを特徴とする低抵抗のチップ形抵抗器の製造方法。   A resistive layer made of a metal plate or metal foil is laminated on both the front and back sides of a strip-shaped insulating resin or rubber substrate with ceramic powder dispersed inside, and a protective film is formed at the center in the longitudinal direction on both sides of the laminated strip-shaped front and back surfaces. The front and back electrodes are formed on the resistance layer on both sides of the protective film, and end electrodes are formed on both ends of the substrate, the resistance film, and the front and back electrodes, and then crossed in the longitudinal direction of the strip. A method of manufacturing a low-resistance chip resistor, which is obtained by cutting to a predetermined width. 前記請求項3における前記帯状の絶縁樹脂またはゴム製基板に前記抵抗層を積層する方法が、前記金属板か金属箔のいずれかの抵抗層を加熱して前記基板に張付するものであり、しかも前記積層した帯状の長手方向両端部を、後工程でできる保護膜が位置する中央部より大きく加圧する圧延により積層したことを特徴とする低抵抗のチップ形抵抗器の製造方法。   The method of laminating the resistance layer on the band-shaped insulating resin or rubber substrate according to claim 3 is to heat and paste the resistance layer of either the metal plate or the metal foil to the substrate. In addition, a method of manufacturing a low-resistance chip resistor, characterized in that the laminated strip-like longitudinal ends are laminated by rolling that presses larger than the central portion where a protective film formed in a later step is located. 前記請求項3における前記帯状の絶縁樹脂またはゴム製基板に前記抵抗層を積層する方法が、前記金属板か金属箔のいずれかの抵抗層を加熱して前記基板に張付するものであり、しかも前記積層した帯状の後工程でできた保護膜が位置する長手方向の中央部を、その両端部より大きく加圧する圧延により積層したことを特徴とする低抵抗のチップ形抵抗器の製造方法。   The method of laminating the resistance layer on the band-shaped insulating resin or rubber substrate according to claim 3 is to heat and paste the resistance layer of either the metal plate or the metal foil to the substrate. And the manufacturing method of the chip resistor of low resistance characterized by laminating | stacking the center part of the longitudinal direction in which the protective film made in the laminated | stacked strip | belt-shaped post-process was located more greatly than the both ends. 金属板か金属箔のいずれかの帯状抵抗層の表裏両面の長手方向中央部に、前記抵抗層を加熱して、セラミック粉を内部に分散した絶縁樹脂またはゴム製基板を張合し、前記基板の両側の前記抵抗層上に表電極と裏電極を形成すると共に、前記抵抗層と基板の両端に端面電極を形成した後、前記帯状の長手方向にクロスして所定幅に切断して得られることを特徴とする低抵抗のチップ形抵抗器の製造方法。   The resistance layer is heated and the insulating resin or rubber substrate in which the ceramic powder is dispersed is bonded to the longitudinal center portions of the front and back surfaces of the belt-shaped resistance layer of either the metal plate or the metal foil, and the substrate A front electrode and a back electrode are formed on the resistance layers on both sides of the substrate, and end electrodes are formed on both ends of the resistance layer and the substrate, and then crossed in the longitudinal direction of the strip and cut to a predetermined width. A method for manufacturing a chip resistor having a low resistance.
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JPWO2011018842A1 (en) 2013-01-17
CN102473494B (en) 2015-11-25

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