WO2012113799A1 - Dispositif et procédé de liaison directe de tranches - Google Patents

Dispositif et procédé de liaison directe de tranches Download PDF

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Publication number
WO2012113799A1
WO2012113799A1 PCT/EP2012/052950 EP2012052950W WO2012113799A1 WO 2012113799 A1 WO2012113799 A1 WO 2012113799A1 EP 2012052950 W EP2012052950 W EP 2012052950W WO 2012113799 A1 WO2012113799 A1 WO 2012113799A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
chuck
wafers
elements
bonding
Prior art date
Application number
PCT/EP2012/052950
Other languages
English (en)
Inventor
Marcel Broekaart
Arnaud Castex
Original Assignee
Soitec
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec filed Critical Soitec
Publication of WO2012113799A1 publication Critical patent/WO2012113799A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions

Definitions

  • the present invention relates to direct wafer bonding carried out between two wafers used, for example, to produce multilayer semiconductor wafers, e.g. for 3D integration technology that requires the transfer of one or more layers of microcomponents onto a final support substrate, but also for circuit transfer or in the fabrication of back-lit imaging devices.
  • the transferred layer or layers include microcomponents (electronic, optoelectronic, etc.) produced at least in part on the initial substrate, said layers then being stacked onto a final substrate that may itself include components.
  • each transferred layer must be positioned on the final substrate with great accuracy for successful, very strict alignment with the subjacent layer. Further, it may be necessary to carry out treatments on the layer after it has been transferred, for example in order to form other microcomponents, to expose the microcomponents on the surface, to produce interconnections, etc.
  • the non-uniform deformation resulting from low pressure direct wafer bonding then leads to a phenomenon of misalignment of the microcomponents of the various layers .
  • That phenomenon of misalignment also known as "overlay”, described below with reference to Figure 1, is exhibited in the form of defects of the order of 50 run [nanometer] , which are substantially smaller than the precision in the alignment of the wafers at the time of direct bonding.
  • Figure 1 illustrates a three-dimensional structure 500 obtained by low pressure direct wafer bonding between a first wafer or initial substrate 510, on which a first series of microcomponents 511 to 519 is formed by photolithography using a mask to define zones for the formation of patterns corresponding to the
  • microcomponents to be formed and a second wafer or final substrate 520.
  • the initial substrate 510 has been thinned after bonding in order to remove a portion of the material present above the layer of microcomponents 511 to 519 and a second layer of microcomponents 521 to 529 has been formed at the exposed surface of the initial substrate 510.
  • offsets occur between some of the microcomponents 511 to 519 relative to some of the components 521 to 529, such as the offsets An , ⁇ 2 2 ⁇ 33 , ⁇ 44 indicated in Figure 1 (respectively corresponding to the offsets observed between the microcomponent pairs 511/521, 512/522,
  • transformations transformations (translation, rotation, or combinations thereof) that could originate from inaccurate assembly of the substrates.
  • Said offsets result from non-uniform deformation that causes local, non-uniform movements at certain microcomponents 511 to 519.
  • some of the microcomponents 521 to 529 formed on the exposed surface of the substrate after transfer exhibit
  • microcomponents are imaging devices made up of pixels, and when the post-transfer treatment steps are intended to form color filters on each of those pixels, a loss of the colorizing function has been observed on some of those pixels.
  • That phenomenon of overlay thus results in a reduction in the quality and value of manufactured multilayer semiconductor wafers.
  • the impact of that phenomenon is becoming more and more critical because of the constant demand for increasing the miniaturization of microcomponents and for increasing their density of integration per layer.
  • bonding apparatus comprising a substrate carrier device or wafer carrier with a support platen (also termed a "chuck") on which there rests a first of the two wafers that are to be bonded together, the second wafer being placed on the first wafer.
  • a support platen also termed a "chuck”
  • aligning the wafers is/are carried out, consisting in pushing the two wafers against abutment elements using a pusher.
  • the contacts between the wafers and said aligning elements directly or indirectly result in mechanical stresses in the wafers that, if they are not relaxed, result in non-uniform deformation in the wafers compared with the same wafers that have not been
  • the aim of the invention is to provide a solution that can relax the stresses arising in the wafers while they are being aligned and then to carry out direct wafer bonding with wafers that have little non-uniform
  • the present invention proposes an apparatus for direct wafer bonding between at least two wafers, the apparatus comprising at least one wafer carrier device comprising a chuck constituted by one or more support elements for receiving one of the two wafers, and aligning elements placed around said chuck; the apparatus being characterized in that the support element or elements of the chuck have an overall contact surface area that is not greater than 85% of the surface area of the wafer that is to be supported by said support element or elements.
  • the Applicant has observed that the non-uniform deformation resulting from direct wafer bonding that results in the largest overlays is located in a region in the vicinity of the side of the wafers.
  • the Applicant has also determined that the wafer in contact with the chuck of the wafer carrier device cannot always change position freely relative to said chuck, in particular in the vicinity of the aligning elements due to an attractive force between the wafer and the chuck.
  • the apparatus of the invention includes a chuck that, in contrast to prior art chucks, has an overall contact surface area with the wafer that is to be supported thereby that is smaller than the total surface area of the wafer, which means that contactless zones can be provided between the wafer and the chuck, allowing the wafer to change position freely in these zones and to relieve stresses.
  • the overall contact surface area of the support element or elements of the chuck may be less than 60%, or even 50% of the surface area of the wafer that is to be supported by said support element or elements .
  • the support element or elements of the chuck are located at a predetermined distance from the aligning elements, which means that the wafer in contact with the chuck can change position freely in the vertical direction at least in the vicinity of said aligning elements, and so stresses arising at these elements during the alignment operations can be relaxed, or mechanical and/or electrostatic adhesion interactions linked to contact of the lower surface of the wafer with the chuck do not occur. This thus avoids the risk of non-uniform deformation in the wafers appearing after bonding.
  • the distance between the support elements of the chuck and the aligning elements is preferably at least 5 mm [millimeter] .
  • the chuck comprises a support element in the form of a crenellated disk including recessed regions at its periphery respectively placed facing the aligning elements .
  • the chuck comprises a circular support element with a diameter smaller than the diameter of the circular zone corresponding to the diameter of the wafer to be placed on the chuck.
  • the wafer carrier device may further include an annular region at the circular zone, said annular region projecting upwards to a height that differs from the height to which the chuck projects.
  • the chuck includes a plurality of support elements, such as studs or pins, distributed within a circular zone corresponding to the diameter of the wafer that is to be supported by the chuck. Said support elements may have the same height or different heights in order to define a chuck surface with a convex or concave shape.
  • the aligning elements are constituted by a pusher and two abutment elements.
  • the two abutment elements may respectively correspond to a retaining pin and to a positioning pin intended to cooperate with alignment notches provided in the wafers.
  • the bonding apparatus further comprises movable spacer elements placed around the chuck to keep the wafers that are to be bonded together facing each other temporarily without contact.
  • the invention also provides a method of direct wafer bonding between at least a first wafer and a second wafer, said method being carried out with a bonding apparatus in accordance with the invention and comprising at least:
  • the method is carried out with a bonding apparatus in accordance with the invention comprising a pusher, two abutment elements, and at least three spacer elements placed around the chuck, the method being further characterized in that during the step of placing the two wafers on the chuck of the wafer carrier device of the bonding apparatus, the first wafer is placed in contact with the chuck of the wafer carrier device while the second wafer is placed facing the first wafer, interposing the spacer elements between the two wafers so as to maintain a space between the two wafers, the method further comprising, before the step of initiating propagation of a bonding wave:
  • initiating a bonding wave comprises mechanically applying a point of pressure to one of the two wafers.
  • Using the method of direct wafer bonding of the present invention means that during transfer of a layer of microcomponents , the phenomenon of overlay can be eliminated or limited, and very high quality multilayer semiconductor wafers can be produced.
  • the layer of microcomponents may in particular comprise imaging sensors.
  • Figure 1 is a diagrammatic view showing a three- dimensional structure after direct wafer bonding in accordance with the prior art
  • Figure 2 is a diagrammatic perspective view of a prior art bonding apparatus
  • Figure 3 is a diagrammatic perspective view of a bonding apparatus in accordance with one embodiment of the invention.
  • Figures 4A and 4B are respectively perspective and sectional diagrammatic views of a bonding apparatus in accordance with another embodiment of the invention.
  • Figure 5 is a diagrammatic perspective view of a bonding apparatus in accordance with another embodiment of the invention.
  • FIG. 6 is a flow diagram of the steps in a method of direct wafer bonding of the invention
  • Figures 7A to 7J are diagrammatic views of a method of direct wafer bonding in accordance with one implementation of the invention.
  • Figures 8A and 8B are respectively perspective and sectional diagrammatic views of a bonding apparatus in accordance with another embodiment of the invention. Detailed description of embodiments of the invention
  • the present invention is generally applicable to the production of composite structures comprising at least direct wafer bonding of a first substrate or wafer onto a second substrate or wafer.
  • Direct wafer bonding is a technique that is well known per se. It should be recalled that the principle of direct wafer bonding is based on bringing two surfaces into direct contact, i.e. without using a specific material (adhesive, wax, solder, etc.) . Such an
  • Direct bonding is carried out by initiating at least one contact point on a wafer in intimate contact with another wafer in order to trigger propagation of a bonding wave from that point of contact.
  • bonding wave is applied here to the bonding or direct bonding front that propagates from the initiation point and that corresponds to diffusion of the attractive forces (Van der Waals forces) from the point of contact over the whole intimate contact surface between the two wafers (bonding interface) .
  • the point of contact may typically be initiated by applying mechanical pressure to the exposed surface of one of the two wafers.
  • FIG. 2 shows a prior art bonding apparatus 100 that comprises a wafer carrier device 110 provided with a chuck 111 for receiving one of the two wafers that are to be bonded together.
  • a pusher 120 and two abutment elements respectively constituted by a retaining pin 130 and by a positioning pin 140 are disposed around the chuck 111.
  • the diameter of the chuck 111 is almost the same as that of the wafers intended to be disposed thereon so that the pusher, the retaining pin 130 and the positioning pin 140 are very close to the side of the chuck 111.
  • Three spacer elements 150 to 152 for temporarily preventing contact between the two wafers that are to be bonded together are also present around the chuck 111. As is explained below in detail, a first wafer is placed on the chuck 111 while a second wafer is initially placed facing the first wafer on the three spacer elements 150 to 152. The second wafer is
  • an alignment operation is generally carried out by actuating the pusher 120 against one or both wafers that are retained on the opposite side by the retaining pin 130 and the positioning pin 140.
  • the Applicant has carried out tests for aligning a wafer with a bonding apparatus similar to the bonding apparatus 100 of Figure 2 in order to determine the source or sources of not-relieved stresses that result in non-uniform deformation in the wafer.
  • the Applicant has established that, after one or more alignment operations consisting in placing the wafer against the retaining pin and positioning the pusher by actuation, there remain stresses and, as a consequence, deformation at the side of the wafer and that the deformation is greater in a defined zone in the vicinity of the aligning elements.
  • FIG. 3 shows a bonding apparatus 200 in accordance with one embodiment of the invention.
  • the bonding apparatus 200 comprises a wafer carrier device 210 provided with a chuck 211 constituted by a support element 2110 in the form of a crenellated disk and intended to receive one of the two wafers that are to be bonded together.
  • a pusher 220 and two abutment elements respectively constituted by a retaining pin 230 and by a positioning pin 240 are disposed around the chuck 211 at a circular zone Z C 2 corresponding to the diameter of the wafer that is to be supported by the chuck.
  • Three spacer elements 250 to 252 for temporarily preventing contact between the two wafers that are to be bonded together are also present around the chuck 111.
  • the support element 2110 includes three recessed regions 2111, 2112 and 2113 disposed respectively in the vicinity of the pusher 220, of the retaining pin 230, and of the positioning pin 240. Because of the presence of the recessed regions in the vicinity of these three aligning elements, the chuck 211 does not have a contact surface over a predetermined distance around these elements. Thus, during alignment operations involving applying contact forces between the wafer and the
  • the element of the chuck 3110 has a diameter D 3 u that is several times smaller than the diameter D ZC 3 of the circular zone Z C 3 corresponding to the diameter of the wafer that is to be supported by the chuck .
  • the chuck 311 further comprises a second support element constituted by an annular region 3111 that extends substantially at the circular zone Z C3 .
  • the annular region 360 has a width ⁇ 360 for example of a few millimeters, in order to minimize the contact surface area with the wafer in this zone, and a height h3m that differs from the height h 31 i of the chuck 311 in order to be able to adapt to the bow of the wafer.
  • the annular region has a width of only a few millimeters so as to present a reduced contact surface area with the wafer in the vicinity of the aligning elements and to allow it to change position freely in the vicinity of the aligning elements and relax the stresses caused by the aligning elements.
  • Figure 5 represents a bonding apparatus 400 in accordance with another embodiment of the invention that comprises a wafer carrier device 410 provided with a chuck 411 constituted by a circular support element 4110 intended to receive one of the two wafers that are to be bonded together.
  • a pusher 420 and two abutment elements respectively constituted by a retaining pin 430 and by a positioning pin 440 are disposed at a circular zone Z C 4 around the chuck 411.
  • Three spacer elements 450 to 452 for temporarily preventing contact between the two wafers that are to be bonded together are also present around the chuck 411.
  • the support element 4110 has a diameter D 4 u that is smaller than the diameter D ZC 4 of the circular zone Z C 4 corresponding to the diameter of the wafer that is to be supported by the chuck.
  • the diameter D 4 ii may, for example, be 8 cm [centimeter] shorter than the diameter D ZC 4 of the circular zone Z C 4 such that the support element 4110 is at a distance of 4 cm from the pusher 420 and the abutment elements 430 and 440.
  • a pusher 520 and two abutment elements respectively-constituted by a retaining pin 530 and by a positioning pin 540 are disposed around the chuck 511 at the circular zone Z C 5.
  • the sum of the individual surface areas S 5 no of the support elements corresponds to an overall contact surface area that is not greater than 85% of the surface area of the wafer that is to be supported.
  • the bonding apparatus 200 and more precisely the wafer carrier device 210 comprising the chuck 211 constituted by the support element 2110, the pusher 220, the
  • a first wafer or substrate 20 is placed on the support element 2110 of the chuck 211 of the wafer carrier device 210 of the bonding apparatus 200 (step SI) .
  • the wafer 20 rests freely on the support element 2110, i.e. under gravity alone and without using active means for maintaining the wafer such as, for example, an electrostatic system or a vacuum device associated with the chuck.
  • the wafer 30 is then deposited on the spacer elements 250 to 252 so as to position the lower surface or face 32 of the wafer 30 to face the upper surface 22 of the wafer 20 ( Figure 7C, step S3) .
  • the spacer element 252 is withdrawn, and then the pusher 220 is placed in its retracted position ( Figure 7E, step S5) , which causes the region of the wafer 30 at the location of the spacer element 252 and the holding pin 240 to drop onto the wafer 20.
  • the pusher 220 is again placed in its alignment position in order to keep the wafers aligned ( Figure 7F, step S6) while the spacer elements still present between the two wafers, namely here the spacer elements 250 and 251, are withdrawn, the wafers 20 and 30 being subjected to compressive loads at this time ( Figure 7F, step S7 ) .
  • the pusher 220 is then placed in its retracted position in order to free the wafer 30 from being held against the pins 230 and 240 and to leave the lower face 32 thereof resting entirely on the upper face 22 of the wafer 20 ( Figure 7G, step S8) .
  • the pusher 220 is once again placed in its
  • the tool 50 may include a
  • Too flexible a material could deform and produce an imprecise contact surface, and as a result produce a loss of accuracy in the applied pressure.
  • microcomponents over the majority of their surfaces or only in a limited zone.
  • One particular, but non-exclusive, field for the bonding method of the present invention is that of producing three-dimensional structures by forming a first series of microcomponents on the surface of a wafer or initial substrate, the microcomponents possibly being whole components and/or only portions of components, and the initial substrate possibly being a monolayer
  • a structure for example a layer of silicon, or a
  • the microcomponents are formed by photolithography by means of a mask that can be used to define zones for forming patterns corresponding to the microcomponents to be produced.
  • the three-dimensional structure is formed by a stack of layers, each layer being transferred by the assembly method of the present invention, and each layer being in alignment with the directly adjacent layers.
  • the final substrate itself also includes microcomponents.
  • the bonding method of the present invention can be employed to limit phenomena of nonuniform deformation of wafers during direct bonding thereof.
  • the method can limit the phenomenon of overlay during transfer of a circuit layer onto another layer or onto a support substrate and produce very high quality multilayer semiconductor wafers.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

L'invention concerne un dispositif (200) de liaison directe entre deux tranches (20, 30), qui comprend au moins un dispositif (210) de support de tranches comprenant un support (211), lequel est constitué d'un élément de support (2110) destiné à recevoir une des deux tranches, et d'éléments d'alignement (220, 230, 240) placés autour dudit support. L'élément de support (2110) du support (211) présente une surface de contact globale inférieure à la surface de la tranche (20) devant être maintenue par l'élément de support (2110).
PCT/EP2012/052950 2011-02-24 2012-02-21 Dispositif et procédé de liaison directe de tranches WO2012113799A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1151493 2011-02-24
FR1151493A FR2972078A1 (fr) 2011-02-24 2011-02-24 Appareil et procédé de collage par adhésion moléculaire

Publications (1)

Publication Number Publication Date
WO2012113799A1 true WO2012113799A1 (fr) 2012-08-30

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FR (1) FR2972078A1 (fr)
TW (1) TW201241955A (fr)
WO (1) WO2012113799A1 (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016092073A (ja) * 2014-10-30 2016-05-23 株式会社デンソー 化学気相成長装置に用いられるサセプタおよびそれを備えた化学気相成長装置
NL2021059A (en) * 2017-06-06 2018-12-11 Suss Microtec Lithography Gmbh System and Related Techniques for Handling Aligned Substrate Pairs
US10825705B2 (en) 2015-05-15 2020-11-03 Suss Microtec Lithography Gmbh Apparatus, system, and method for handling aligned wafer pairs
RU2745297C1 (ru) * 2020-08-05 2021-03-23 Обществом с ограниченной ответственностью "Маппер" Устройство для ручного выравнивания кремниевых пластин перед их временным сращиванием
US11094575B2 (en) 2019-06-03 2021-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Simultaneous bonding approach for high quality wafer stacking applications
US20230187248A1 (en) * 2021-12-10 2023-06-15 Sky Tech Inc. Substrate-bonding device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI732700B (zh) * 2020-10-16 2021-07-01 天虹科技股份有限公司 鍵合機台的對準機構及對準方法
TWI792447B (zh) * 2021-07-26 2023-02-11 天虹科技股份有限公司 鍵合機的對準機構及對準方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245143A (ja) * 1985-08-23 1987-02-27 Canon Inc 円板物体の位置決め装置
US5817156A (en) * 1994-10-26 1998-10-06 Tokyo Electron Limited Substrate heat treatment table apparatus
US20020182038A1 (en) * 1997-08-27 2002-12-05 Toru Takisawa Substrate processing apparatus, substrate support apparatus, substrate processing method, and substrate fabrication method
WO2007047536A2 (fr) * 2005-10-14 2007-04-26 Silicon Genesis Corporation Procede et appareil pour outil de liaison de plaquettes dite « flag-less »
US20080285059A1 (en) * 2007-05-18 2008-11-20 Suss Microtec Ag Apparatus and method for in-situ monitoring of wafer bonding time
US20100167499A1 (en) * 2002-12-09 2010-07-01 Commissariat A L'energie Atomique Method for making a stressed structure designed to be dissociated
FR2947380A1 (fr) * 2009-06-26 2010-12-31 Soitec Silicon Insulator Technologies Procede de collage par adhesion moleculaire.

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245143A (ja) * 1985-08-23 1987-02-27 Canon Inc 円板物体の位置決め装置
US5817156A (en) * 1994-10-26 1998-10-06 Tokyo Electron Limited Substrate heat treatment table apparatus
US20020182038A1 (en) * 1997-08-27 2002-12-05 Toru Takisawa Substrate processing apparatus, substrate support apparatus, substrate processing method, and substrate fabrication method
US20100167499A1 (en) * 2002-12-09 2010-07-01 Commissariat A L'energie Atomique Method for making a stressed structure designed to be dissociated
WO2007047536A2 (fr) * 2005-10-14 2007-04-26 Silicon Genesis Corporation Procede et appareil pour outil de liaison de plaquettes dite « flag-less »
US20080285059A1 (en) * 2007-05-18 2008-11-20 Suss Microtec Ag Apparatus and method for in-situ monitoring of wafer bonding time
FR2947380A1 (fr) * 2009-06-26 2010-12-31 Soitec Silicon Insulator Technologies Procede de collage par adhesion moleculaire.

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016092073A (ja) * 2014-10-30 2016-05-23 株式会社デンソー 化学気相成長装置に用いられるサセプタおよびそれを備えた化学気相成長装置
US10825705B2 (en) 2015-05-15 2020-11-03 Suss Microtec Lithography Gmbh Apparatus, system, and method for handling aligned wafer pairs
US11183401B2 (en) 2015-05-15 2021-11-23 Suss Microtec Lithography Gmbh System and related techniques for handling aligned substrate pairs
US11651983B2 (en) 2015-05-15 2023-05-16 Suss Microtec Lithography Gmbh Apparatus, system, and method for handling aligned wafer pairs
NL2021059A (en) * 2017-06-06 2018-12-11 Suss Microtec Lithography Gmbh System and Related Techniques for Handling Aligned Substrate Pairs
US11094575B2 (en) 2019-06-03 2021-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Simultaneous bonding approach for high quality wafer stacking applications
US11621186B2 (en) 2019-06-03 2023-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Simultaneous bonding approach for high quality wafer stacking applications
RU2745297C1 (ru) * 2020-08-05 2021-03-23 Обществом с ограниченной ответственностью "Маппер" Устройство для ручного выравнивания кремниевых пластин перед их временным сращиванием
US20230187248A1 (en) * 2021-12-10 2023-06-15 Sky Tech Inc. Substrate-bonding device
US11961753B2 (en) * 2021-12-10 2024-04-16 Sky Tech Inc. Substrate-bonding device

Also Published As

Publication number Publication date
FR2972078A1 (fr) 2012-08-31
TW201241955A (en) 2012-10-16

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