WO2012102880A1 - Dispositif et procédé d'amplification avec gain d'extrémité élevé en présence de forts décalages de courant continu - Google Patents

Dispositif et procédé d'amplification avec gain d'extrémité élevé en présence de forts décalages de courant continu Download PDF

Info

Publication number
WO2012102880A1
WO2012102880A1 PCT/US2012/021331 US2012021331W WO2012102880A1 WO 2012102880 A1 WO2012102880 A1 WO 2012102880A1 US 2012021331 W US2012021331 W US 2012021331W WO 2012102880 A1 WO2012102880 A1 WO 2012102880A1
Authority
WO
WIPO (PCT)
Prior art keywords
gain
electrically coupled
input nodes
circuit
signal
Prior art date
Application number
PCT/US2012/021331
Other languages
English (en)
Inventor
Alasdair Gordon ALEXANDER
David PLOURDE
Matthew DUFF
Original Assignee
Analog Devices, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices, Inc. filed Critical Analog Devices, Inc.
Publication of WO2012102880A1 publication Critical patent/WO2012102880A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
    • H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
    • H03F3/45973—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit
    • H03F3/45977—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit using switching means, e.g. sample and hold
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
    • H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
    • H03F3/45973—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/261—Amplifier which being suitable for instrumentation applications
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/375—Circuitry to compensate the offset being present in an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/513—Indexing scheme relating to amplifiers the amplifier being made for low supply voltages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/78—A comparator being used in a controlling circuit of an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45511—Indexing scheme relating to differential amplifiers the feedback circuit [FBC] comprising one or more transistor stages, e.g. cascaded stages of the dif amp, and being coupled between the loading circuit [LC] and the input circuit [IC]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45512—Indexing scheme relating to differential amplifiers the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45516—Indexing scheme relating to differential amplifiers the FBC comprising a coil and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45521—Indexing scheme relating to differential amplifiers the FBC comprising op amp stages, e.g. cascaded stages of the dif amp and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45526—Indexing scheme relating to differential amplifiers the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45536—Indexing scheme relating to differential amplifiers the FBC comprising a switch and being coupled between the LC and the IC

Definitions

  • Embodiments of the disclosure relate to electronic devices, and more particularly, in one or more embodiments, to instrumentation amplifiers.
  • large DC offsets which may also be referred to as the DC component of a signal
  • the size of a "large" DC offset may vary from system to system. For example, in some systems, a 1000 millivolt (mV) offset is considered large, while in others, a 300 mV offset is considered large. Processing low-voltage signals in the presence of large DC offsets can be difficult. For example, when measuring small biopotential signals, relatively large differential DC offsets can appear due to respiration, muscular activity, and the like. In some cases, when measuring biopotential signals, the DC offset may be as high as 500 mV, while the biopotential signals themselves may be only a few mV.
  • amplifying biopotential signals with a large DC offset can cause significant problems.
  • Amplifying the biopotential signals with a substantial gain may cause an amplifier of the system to saturate due to the large DC offset.
  • Amplifying the biopotential signals with a relatively small gain may make it difficult to resolve the small biopotential signals, and lead to additional and more expensive filtering and gain stages later on. This problem is exacerbated in portable devices in which low supply voltages are used.
  • a large DC offset makes it difficult to have high gain in the front-end of the measurement system.
  • An electrical circuit, or apparatus includes an instrumentation amplifier circuit including an instrumentation amplifier, a plurality of first input nodes, a first output node, a feedback resistor electrically coupled between the first output node and at least one of the plurality of first input nodes, a first gain setting resistor electrically coupled between at least one of the plurality of first input nodes and at least one other node.
  • the electrical circuit also includes a feedback circuit including at least one operational amplifier, at least one input electrically coupled to the first output node, and a second output node directly or indirectly coupled to at least one of the plurality of first input nodes.
  • the electrical circuit further includes an operational amplifier circuit including the operational amplifier, and a plurality of second input nodes, wherein the second output node is electrically coupled to at least one of the plurality of second input nodes.
  • the electrical circuit further includes a low pass filter circuit electrically coupled with the at least one input of the feedback circuit and at least one of the plurality of second input nodes.
  • the apparatus further includes a second gain setting resistor electrically coupled between the second output node and at least one of the plurality of first input nodes and the operational amplifier circuit further includes a first resistor electrically coupled between a selected one of the plurality of second input nodes and a voltage reference, and a second resistor electrically coupled between the second output node and the selected one of the plurality of second input nodes.
  • the second output node is electrically coupled to the at least one of the plurality of first input nodes via a second gain setting resistor.
  • the second output node is electrically coupled directly to at least one of the plurality of second input nodes
  • the first gain setting resistor is electrically coupled between the second output node and the at least one of the plurality of first input nodes.
  • the feedback circuit further includes an integrator circuit including the operational amplifier, wherein the operational amplifier is in an inverting configuration, a plurality of second input nodes, a resistor disposed in a signal path between the at least one input of the feedback circuit and at least one of the second input nodes, and a capacitor electrically coupled between the second output node and the at least one of the second input nodes, wherein the second output node is electrically coupled to a non-inverting input of the plurality of first input nodes.
  • a DC component of the signal has a gain of approximately zero and an AC component has a gain of at least one.
  • at least one of the plurality of first input nodes is electrically coupled to an electrode and receive a signal indicative of a physiological parameter.
  • a DC component of the signal has a gain of less than approximately two and an AC component has a gain of greater than approximately one.
  • the DC component of the signal has a gain of less than approximately two and an AC component has a gain of greater than approximately twenty.
  • the apparatus further amplifies the AC component of the signal by at least fifty, while the gain of the DC component is still relatively small.
  • the apparatus further amplifies the AC component of the signal by at least 100, while the gain of the DC component is still relatively small. In certain embodiments, the apparatus amplifies the further AC component of the signal by at least 500, while the gain of the DC component is still relatively small. In certain embodiments, the apparatus further includes a high pass filter circuit electrically coupled to the first output node. In certain embodiments the high pass filter includes at least a resistor and a capacitor.
  • the apparatus further includes a switching circuit configured to determine when the instrumentation amplifier circuit has saturated, and at least partly in response to the determination, to activate at least one switch, the at least one switch configured to reduce a time constant of an associated filter to reduce a recovery time of an output signal of the instrumentation amplifier circuit from that of a saturated state.
  • an apparatus includes an instrumentation amplifier circuit including an instrumentation amplifier, a plurality of input nodes, wherein at least a first input node of the plurality of input nodes is electrically coupled to a first voltage reference, an output node, a feedback resistor electrically coupled between the output node and at least one of the plurality of first input nodes, and a first gain setting resistor electrically coupled between at least one of the plurality of first input nodes and at least one other node, wherein a gain of the instrumentation amplifier is determined by a value of the gain setting resistor, wherein with the gain setting resistor; and a first capacitor electrically coupled between a second input node of the plurality of input nodes and a second reference voltage.
  • an apparatus includes an instrumentation amplifier circuit including an instrumentation amplifier, a plurality of first input nodes, a first output node, a feedback resistor electrically coupled between the first output node and at least one of the plurality of first input node, and a first gain setting resistor electrically coupled between at least one of the plurality of first input nodes and at least one other node, wherein a gain of the instrumentation amplifier is determined at least by a value of the gain setting resistor.
  • the apparatus further includes a second gain setting resistor electrically coupled between a voltage source and at least one of the plurality of first input nodes.
  • the voltage source is approximately equal to a DC component of an input signal such that the DC component of the input signal is attenuated by the instrumentation amplifier circuit.
  • FIGURE 1 is a schematic block diagram of one embodiment of an electronic system for measuring and processing a signal.
  • FIGURE 2 is a schematic block diagram illustrating one embodiment of an amplifier circuit of the electronic system of FIGURE 1.
  • FIGURES 3A and 3B are block diagrams illustrating an embodiment of an instrumentation amplifier.
  • FIGURE 4 is a circuit diagram illustrating one embodiment of an instrumentation amplifier circuit configured as a high-pass filter
  • FIGURES 5A and 5B are circuit diagrams illustrating embodiments of an instrumentation amplifier circuit configured as a high-pass filter.
  • FIGURE 6 is a circuit diagram illustrating yet another embodiment of an instrumentation amplifier circuit configured as a high-pass filter.
  • FIGURES 7A and 7B are circuit diagrams illustrating embodiments of an instrumentation amplifier circuit configured as a high-pass filter.
  • FIGURE 8 is a circuit diagram illustrating yet another embodiment of an instrumentation amplifier circuit configured as a high-pass filter.
  • FIGURE 9 is a circuit diagram illustrating yet another embodiment of an instrumentation amplifier circuit configured as a high-pass filter with switching circuitry.
  • FIGURE 10 is a graph showing the gain achieved with an instrumentation amplifier circuit according to one embodiment.
  • FIGURE 11 is a graph showing the gain achieved with an instrumentation amplifier circuit according to another embodiment.
  • DC offset may also be referred to as the DC component of a signal and is not limited to purely DC voltages, but may also include relatively low frequency AC components of a signal, as determined by the overall gain value of the system and the gain and cutoff frequency of the feedback circuit.
  • Attenuating a DC component of a signal can include both having a gain of approximately or less than approximately one, as well as having a gain that is substantially less than the gain of the AC component of the signal.
  • the illustrated system 100 includes an electrode 110, an amplifier circuit 120, an analog-to-digital converter (ADC) 130 and a digital signal processing (DSP) block 140.
  • ADC analog-to-digital converter
  • DSP digital signal processing
  • the electrode 110 is configured to receive a signal from a source.
  • the electronic system can be a measurement system for measuring a signal from a human body.
  • Examples of such electronic systems can include, but are not limited to, medical devices such as an electro-oculogram (EOG) devices, electroencephalogram (EEG) devices, electrocardiogram (ECG) devices, electromyogram (EMG) devices, ultrasound devices, and pressure sensors.
  • EOG electro-oculogram
  • EEG electroencephalogram
  • ECG electrocardiogram
  • EMG electromyogram
  • ultrasound devices and pressure sensors.
  • the electronic system 100 can also be used for measuring relatively small signals in any other environments in the presence of relatively large DC offsets, or when large AC signal gains are desired but DC gain is not desired.
  • the source can be a human body, in which case the signal is a biopotential signal indicative of any number of physiological parameters, such as heart activity, brain activity, respiratory activity, muscle activity, or the like.
  • the electronic system can be used for measuring the heart rate of a human body and can be part of, for example, a treadmill machine.
  • the electrode 110 can be in a form of a bar that can be grasped by a user's hands.
  • the electrode 110 can be a wire, or some other communication path, within an electronic system.
  • the amplifier circuit 120 can receive a signal from the electrode 110 and process it. In certain embodiments, the amplifier circuit 120 can amplify the signal and attenuate the DC offset, or DC component, from the signal. In another embodiment, the amplifier circuit 120 can merely amplify the signal and the removal of the DC component and other filtering can occur at the analog-to-digital converter 130 and/or the digital signal processing block 140.
  • the analog-to-digital converter (ADC) 130 can convert the analog signal into a digital signal that can be processed using the digital signal processing block 140.
  • the ADC 130 can be any suitable ADC.
  • the digital signal processing (DSP) block 140 can correspond to a general-purpose digital signal processor, licensable core, microprocessor, or the like, and can process the digital signal from the ADC 130 according to instructions stored in a tangible, non-transitory, hardware-readable memory.
  • the DSP block 140 can perform any suitable operations on the signals.
  • the DSP block 140 computes health related information regarding biopotential signals, such as an electro- oculogram (EOG), electroencephalogram (EEG), electrocardiogram (ECG), electromyogram (EMG), an axon action potential (AAP), or the like.
  • EOG electro- oculogram
  • EEG electroencephalogram
  • ECG electrocardiogram
  • EMG electromyogram
  • AAP axon action potential
  • the DSP block 140 performs additional filtering and processing on the signal.
  • the DSP block 140 can also be implemented by hardware or by a combination of hardware and software/firmware. Amplifier Circuit
  • the amplifier circuit can be, for example, the amplifier circuit 120 of FIGURE 1.
  • the amplifier circuit 120 includes an amplifier block 202 and a feedback block 204.
  • the amplifier also includes an optional switching block 206 and/or an optional high-pass filter (“HPF") block 208.
  • HPF high-pass filter
  • the amplifier block 202 can be used to amplify incoming signals.
  • the amplifier block 202 can produce a relatively large signal gain of the AC component, while maintaining the gain of the DC component to a relatively low amount, such as one (0 dB) or less than one.
  • the signal gain of the AC component is at least 20.
  • the signal gain the AC component is at least 100.
  • the signal gain the AC component is at least 500. These minimum signal gain levels are impractical to achieve in the prior art because of problems with amplifier saturation.
  • the amplifier block 202 can be implemented in a number of ways.
  • the amplifier block 202 may include an operational amplifier (op-amp), instrumentation amplifier, differential amplifier, or some other device capable of amplifying the differential signal input and attenuating common mode.
  • the instrumentation amplifier may be a direct current mode instrumentation amplifier (also referred to as a direct current feedback instrumentation amplifier).
  • the instrumentation amplifier can be an indirect current mode (ICM) instrumentation amplifier (also referred to as an indirect current feedback instrumentation amplifier).
  • ICM indirect current mode
  • the feedback block 204 can further process the output of the amplifier block 202 and provide some type of feedback to the amplifier block 202.
  • the feedback block 204 attenuates a high frequency component of the signal.
  • the feedback block 204 can amplify a DC component of the signal.
  • the feedback block 204 can also be implemented in a variety of ways.
  • the feedback block 204 can include one or more of high-pass filters (HPF), low- pass filters (LPF), band-pass filters, integrators, differentiators, gain stage amplifiers, resistors, capacitors, inductors, or other circuits.
  • HPFs and LPFs can be implemented as active filters or passive filters.
  • Various embodiments of the feedback block 204 will be described in greater detail below with reference to FIGURES 4-8.
  • the HPF block 208 can further process the output 214 of the amplifier block 202 prior to sending it to the ADC 130 (FIGURE 1).
  • the HPF block 208 can be used to attenuate unwanted noise and further improve the signal characteristics.
  • the HPF block 208 may be implemented in a variety of ways, using components similar to those described above with reference to the feedback block 204. Furthermore, the HPF block 208 may be implemented as a passive filter or an active filter.
  • the switching block 206 can monitor the output of the amplifier block 202, and can alter the characteristics of the HPF block 208 and/or feedback block 204 based on the characteristics of the output. In certain embodiments, when the amplifier block 202 saturates, the switching block 206 decreases the amplifier block 202 recovery time by activating switches coupled with resistors such that time constants associated with RC circuits of filter circuits associated with the amplifier block 202 can be reduced. Such RC circuits can be part of, for example, a low pass filter block 414 or an optional high pass filter block 412, both of which will be described in greater detail later in connection with FIGURE 4.
  • the switching block 206 may also be implemented in a variety of ways and include a number of different circuit components.
  • a first voltage signal 210 enters the amplifier circuit 120, and is provided to the input ⁇ 1 ⁇ 1 of the amplifier block 202 as an input signal.
  • a second voltage signal 212 is provided to the input Vi n2 of the amplifier block 202 as a feedback signal.
  • the amplifier block 202 In response to the signals 210, 212, the amplifier block 202 outputs an amplifier output signal 214.
  • the amplifier output signal 214 is further processed by the feedback block 204, and fed back into the amplifier block 202 as the feedback signal 212.
  • the feedback block 204 can attenuate the high frequency component of the output signal 214 and amplify a DC component of the amplifier output signal 214.
  • the amplifier block 202 can use the feedback signal 212 to further process the signal input 210.
  • the feedback block 204 may further perform any number of operations on the signal, such as filtering, amplifying, integrating, or the like.
  • the output signal 214, 216 may be further filtered by the optional HPF block 208.
  • the HPF filter block 208 can remove unwanted noise or signal characteristics and further prepare the signal for processing at the ADC 130 (FIGURE 1).
  • the amplifier block 202 may saturate. For example, if a hand touching an electrode is quickly removed and then replaced, the amplifier block 202 may saturate, resulting in the output signal 214 swinging to a voltage supply rail, such as to the voltage source connected to the voltage source inputs +V S 304A or -V s 304B.
  • the switching block 206 can be used to control the feedback block 204 and HPF block 208, using a control signal 218.
  • the switching block 206 can monitor the amplifier output signal 214. Based on the characteristics of the amplifier output signal, the switching block 206 can determine when to alter the characteristics of the HPF block 208 and/or the feedback block 204. At times when the amplifier block 202 saturates, or other times when desired, the switching block 206 can decrease the amplifier block recovery time, as will be described in greater detail below with reference to FIGURE 9. Thus, the overall amplifier circuit performance can be improved by the use of the switching block 206 and the control signal 218.
  • FIGURE 3A is a block diagram of an embodiment of an indirect current mode (“ICM") instrumentation amplifier topology 300 that can be used as the amplifier block 202 of FIGURE 2.
  • First differential input terminals 306A, 306B for input signal Vini can correspond to the signal 210 (FIGURE 2) and can, for example, be coupled to the electrode/sensor 110 (FIGURE 1).
  • Second differential input terminals 308A, 308B for input signal Vi n2 can correspond to the signal 212 (FIGURE 2) and can be used to receive a feedback signal.
  • ICM instrumentation amplifier is an AD8129, which is available from Analog Devices, Inc., of Norwood, Massachusetts, U.S.A. In alternative embodiments, other instrumentation amplifier topologies can be used.
  • FIGURE 3B is a circuit diagram of an embodiment of an ICM instrumentation amplifier topology 300 similar to the block diagram of FIGURE 3A.
  • the ICM amplifier topology includes an instrumentation amplifier 302, voltage source inputs 304A, 304B (not shown in FIGURE 3A), positive voltage terminals 306A, 308A (+ ⁇ 1 ⁇ 1 and +Vi n2 , respectively), negative voltage terminals 306B, 308B (-Vi nl and -Vj n2 , respectively), a feedback resistor R fb 312, a gain setting resistor R g 314 and a reference voltage V ref 316.
  • the voltage inputs, or voltage source inputs +V S 304A, -V s 304B can be connected to any number of different voltage sources.
  • the voltage source inputs +V S 304A, -V s 304B can be connected to voltage sources with opposite voltage signals.
  • one voltage source input can be connected to ground, while the other voltage source input is connected to a positive or negative voltage source.
  • the reference voltage (V ref ) 316 is tied directly to the positive input terminal +Vj n2 308 A, however, the voltage reference V ref 316 may be tied to other inputs of the instrumentation amplifier 302, as will be described in greater detail below.
  • the various voltage references may share a common voltage or may be tied to different reference voltages.
  • the voltage reference may be ground.
  • different, fewer, or more components may be used as part of the ICM instrumentation amplifier topology, as will be discussed in greater detail below.
  • the output V out 310 of the instrumentation amplifier is fed back into the input -Vj n2 308B using the feedback resistor R fb 312 and the gain setting resistor R g 314.
  • One end of the feedback resistor R ⁇ 312 is connected to the output Vout 310.
  • the other end of the feedback resistor Ra 312 is connected to the input -Vj n2 and one end of the gain setting resistor R g 314.
  • the other end of the gain setting resistor R g 314 is connected to the voltage reference V ref 316 and the input +V in2 308 A.
  • V ref 316 is tied directly to the input +V in2 308 A and is further tied to the input -Vj n2 via the gain setting resistor R g 314.
  • V out 310 of the ICM instrumentation amplifier topology 300 can be described in Equation (2) below:
  • V out V ref + (1 + 3 ⁇ 4 * V M Equation (2)
  • the ICM instrumentation amplifier topology 300 may be altered in a variety of ways without departing from the spirit and scope of the description.
  • the topology may include different, fewer, or more components.
  • FIGURE 4 is a block diagram of one embodiment of an amplifier circuit having the ICM amplifier topology 300 of FIGURE 3.
  • the ICM amplifier topology 300 can represent one implementation of the amplifier block 202 of FIGURE 2.
  • the voltage output V out i 310 of the instrumentation amplifier 302 is fed back into the input -Vi n2 308B via the feedback resistor R ⁇ 312 as well as through the low-pass filter (LPF) block 414 and the optional second amplifier block 416.
  • the feedback loop further includes the gain setting resistor R g 314.
  • One end of the gain setting resistor R g 314 is connected with the input -Vj n2 308B and the feedback resistor Ra 312.
  • the other end of the gain setting resistor R g 314 is connected with the voltage reference V ref 316 and the input +Vj n2 .
  • the output V out i 310 is also used by the switching block 410 (which corresponds with the switching block 206 of FIGURE 2) to control the HPF block 412 (which corresponds to the HPF block 208 of FIGURE 2) and the LPF block 414.
  • the different blocks may be implemented using a variety of circuit components without departing from the spirit and scope of the disclosure.
  • the LPF block 414 and the second amplifier block 416 may be implemented in a variety of ways using various circuit components, as described in greater detail below.
  • the output 422 of the amplifier block 416 is fed back into the input -Vj n2 308B of the instrumentation amplifier 302.
  • the feedback signal is used to process the input signal and produce the output signal V out i 310.
  • the feedback signal is used to remove or otherwise attenuate the DC offset, or DC component, from the output signal V out i 310.
  • FIGURES 5-9 are circuit diagrams illustrating various embodiments of the circuits described in connection with FIGURES 2 and 4.
  • FIGURE 5A is a circuit diagram illustrating one embodiment of an instrumentation amplifier with a LPF and amplifier feedback.
  • FIGURE 5B is a circuit diagram illustrating one embodiment of an instrumentation amplifier using a voltage source to attenuate the DC offset.
  • FIGURE 6 is a circuit diagram illustrating one embodiment of an instrumentation amplifier with an integrator feedback circuit.
  • FIGURE 7A is a circuit diagram illustrating one embodiment of an instrumentation amplifier with a low pass filter and unity gain buffer used in feedback.
  • FIGURE 7B is a circuit diagram illustrating one embodiment of an instrumentation amplifier using a voltage source to attenuate the DC offset.
  • FIGURE 8 is a circuit diagram illustrating one embodiment of an instrumentation amplifier with a non- amplifier feedback.
  • FIGURE 9 is a circuit diagram illustrating one embodiment of an instrumentation amplifier configured as a HPF with switching circuitry.
  • FIGURE 5A illustrates a circuit diagram of one embodiment of an amplifier circuit capable of achieving a high front-end gain while avoiding saturation.
  • the circuit 500 is further capable of maintaining a relatively small gain, or no gain, for the DC offset of the signal.
  • the amplifier circuit 500 can include various components of the instrumentation amplifier topology of FIGURE 3, including an instrumentation amplifier 302, voltage source inputs 304A, 304B, a first positive terminal +Vj n i 306A, a first negative terminal -V m i 306B, a second positive terminal +Vi n2 308A, a second negative terminal -Vj n2 308B at , a voltage output V out i 310, a feedback resistor R ⁇ 312, a gain setting resistor R g 314 and a reference voltage V ref 316.
  • the circuit 500 can further include a low pass filter (LPF) 509 and a non-inverting amplifier in feedback with the instrumentation amplifier 302.
  • LPF low pass filter
  • the LPF 509 can be implemented using a filter resistor (Rn lt ) 510 in series with the non-inverting amplifier, and a filter capacitor C f ii t 512, which shares one end with the resistor R fi i t 510 and positive terminal 506A. The other end of the capacitor Cn lt 512 is connected to the voltage reference V ref 513.
  • the cutoff frequency for the LPF 509 can be expressed in Equation (3) below.
  • the non-inverting amplifier may be implemented using an op-amp 502 with source voltage inputs +V S 504A, -V s 504B, a positive input terminal 506A, a negative input terminal 506B, and a voltage output V out 508, as well as a feedback resistor R2 514, a gain setting resistor Rl 516 and a reference voltage V ref 518.
  • the voltage inputs, or voltage source inputs +V S 504A, -V s 504B can be connected to any number of different voltage sources.
  • the voltage source inputs +V S 504A, -V s 504B can be connected to voltage sources with opposite voltage signals.
  • one voltage source input can be connected to ground, while the other voltage source input is connected to a positive or negative voltage source.
  • the voltage reference V ref 518 and the voltage reference V ref 316 share a common reference. In other embodiments, the voltage reference V ref 316 and the voltage reference V ref 518 are different.
  • the LPF 509 can function to remove, or attenuate, an AC component of the output signal V out i 310, while leaving a DC component thereof.
  • the non-inverting amplifier can function to amplify the DC component according to the function expressed in Equation (4) below:
  • V out V in (l + ⁇ -) Equation (4)
  • the voltage output 508 of the op-amp 502 is fed back into -Vin2 308B via the gain setting resistor R g2 520.
  • the addition of the gain stage amplifier and R g2 causes the signal gain at the instrumentation amplifier 302 to become as follows in Equation (5):
  • the non-inverting amplifier gain may be calculated as shown in Equation (7) for resistors Ri 516, R 2 , 514, and with the voltage reference V ref 518 set to 0 V:
  • Amplifier gain l + -j- (7)
  • the addition of the gain of the non- inverting amplifier can give more flexibility if attenuation of the DC component is desired.
  • the circuit 500 can further include a high pass filter 540, corresponding to the high pass filter block 216 and the high pass filter block 412 of FIGURES 2 and 4, respectively.
  • the HPF 540 can be implemented in a variety of ways, using various components, as described previously.
  • the HPF 540 is implemented using a capacitor Cm t2 542 in series with the output V out i 310 and the output V 0ut2 548.
  • One end of the capacitor C fllt2 542 is connected with the output V out i 310, and the other end of the capacitor Cn lt2 542 is connected with the output 0 ut2 548, and one end of a resistor R filt2 544.
  • the other end of the resistor R filt2 544 is connected with the voltage reference V ref 546.
  • the voltage reference V ref 546 may be equivalent to, or different from, the voltage reference V ref 316 and/or the voltage reference V ref 518.
  • the cutoff frequency of the HPF 540 can be described as:
  • FIGURE 5B illustrates an alternate circuit, also capable of producing a high front-end gain of the AC component while maintaining a relatively low gain of the DC offset (less than approximately two).
  • the alternate circuit illustrated in FIGURE 5B can be achieved by removing the low-pass filter circuit 509 (510, 512) and the non- inverting amplifier circuit (502, 504A, 504B, 506A, 506B, 514, 516, 518) from circuit 500 of FIGURE 5A, and connecting the voltage output V out 508 to a voltage source V s 507, such that the DC offset is attenuated by the instrumentation amplifier 302.
  • the voltage source V s 507 can be the same voltage as the voltage source connected to the voltage source input +V S 504A, the voltage source input -V s 504B of FIGURE 5A, or it can be different.
  • the low pass filter circuit 509 including the resistor R filt 510 and the capacitor C fllt 512 is removed from the circuit 500 as well as the operational amplifier 502, its corresponding voltage sources (+V S 504A, -V s 504B) and inputs (506A, 506B), the resistors R 2 514 and Ri 516, and the voltage reference V ref 518.
  • the voltage output V out 508 is connected to a voltage source V s 507 such that the voltage received at the negative input terminal -Vj n2 308B is approximately equal to the DC offset of the input signal resulting in the DC offset having a much smaller gain than the AC component of the signal, or being attenuated by the instrumentation amplifier 302.
  • the effects of the DC offset can be attenuated by adjusting the voltage source V s 507connected to the output voltage V out 508.
  • the DC offset can be determined using a voltmeter, or some other device capable of determining voltage, and a controller can adjust the voltage source based on the determined voltage by the voltmeter.
  • the voltage source V s 507 can be manually adjusted.
  • FIGURE 6 illustrates another embodiment of a circuit 600 configured to produce relatively high front-end gain of the AC component while attenuating or maintaining a relatively low gain for the DC offset.
  • the circuit 600 can reject DC component of the signal, resulting in a gain of approximately zero.
  • the circuit 600 includes the components of the instrumentation amplifier topology 300, with some variations, as well as the high pass filter described in greater detail in FIGURE 5A.
  • the voltage reference V ref 316 is still coupled with the input -Vj n2 308B via the gain setting resistor R g 314, but is no longer coupled with the input +V in2 308A.
  • the feedback block of FIGURE 6 also includes an inverting integrator 601.
  • the inverting integrator 601 includes a resistor R fllt 610 in series with an op-amp 602.
  • the inverting integrator 601 further includes a capacitor C fllt 614, which is connected to the R f ii t 610 and the negative terminal 606B on one end and is connected to the output 608 and the input +Vj n2 308A on the other end.
  • the op-amp 602 includes voltage source inputs 604A, 604B as well as a positive terminal 606A and a negative terminal 606B.
  • the voltage inputs, or voltage source inputs +V S 604A, -V s 604B can be connected to any number of different voltage sources.
  • the voltage source inputs +V S 604A, - V s 604B can be connected to voltage sources with opposite voltage signals.
  • one voltage source input can be connected to ground, while the other voltage source input is connected to a positive or negative voltage source.
  • the output V ou ti 310 is fed through the resistor R fllt 610, which is in series with the op-amp 602, to the negative terminal 606B.
  • the output 608 of the op-amp 602 is fed back to the negative terminal 606B via the capacitor Cn lt 614.
  • the positive terminal 606A is connected to a reference voltage V ref 612.
  • the output 608 of the op-amp 602 is fed into the instrumentation amplifier 302 via the input +Vi n2 308A.
  • the signal gain may be represented as 1 + R f o/R g , and the DC gain would be about 0.
  • FIGURE 7A illustrates another embodiment of a circuit 700 configured to produce high front-end gain while maintaining a small DC gain, which in some embodiments may be as low or lower than one.
  • the circuit 600 includes most of the components of the ICM instrumentation amplifier topology 300 of FIGURE 3, as well as the high pass filter 540 described in greater detail in FIGURE 5A.
  • the circuit 700 differs from the instrumentation amplifier topology 300 in at least a few ways.
  • the circuit 700 does not include the gain setting resistor R g 314.
  • the voltage reference V ref 316 remains directly coupled with the input +Vj n2 308 A, the voltage reference V ref 316 is no longer coupled with the input -Vj n2 308B.
  • the gain of the instrumentation amplifier 302 is set using the feedback resistor Ra 312 and the gain setting resistor R g2 714.
  • the circuit 700 also includes the HPF 540, described in greater detail above, with reference to FIGURE 5A.
  • circuit 700 includes a LPF 709, which includes resistor R fllt 710, in parallel with a unity gain buffer, and a capacitor Cn lt 712 in parallel with the unity gain buffer and tied to the voltage reference V ref 713.
  • the unity gain buffer includes an op-amp 702, which contains voltage source inputs 704A, 704B, a positive terminal 706 A, a negative terminal 706B, and an output 708. Similar to voltage source inputs 504A, 504B, of FIGURE 5 A, the voltage source inputs 704A, 704B can be connected to voltage sources that are opposite, or one voltage source input can be connected to ground and the other voltage source input can be connected to a positive or negative voltage source.
  • the positive terminal 706A of the op-amp 702 is coupled with the output of the LPF 709.
  • the negative terminal 706B of the op-amp 702 is coupled with the output 708 of the op-amp 702.
  • the op-amp 702 is configured as a unity gain buffer, wherein the output voltage 708 is substantially equal to the voltage at the positive terminal 706A.
  • the output 708 of the op-amp 702 is fed back into the input -Vin2 308B of the operational amplifier via the gain setting resistor R g2 714.
  • the signal gain of this configuration can also be represented using equations (5) and (8), above.
  • the DC gain approaches 1 and the Signal Gain becomes 1 + R ⁇ /R g2 .
  • FIGURE 7B an alternate circuit to circuit 700 of FIGURE 7A also capable of producing a high front-end gain of the AC component while maintaining a relatively low gain of the DC offset (less than approximately two) is illustrated in FIGURE 7B.
  • the alternate circuit can be achieved by removing the low- pass filter circuit 709 (710, 712) and the operational amplifier circuit (702, 704A, 704B, 706A, 706B) from the circuit 700 illustrated in FIGURE 7A, and connecting the voltage output Vout 708 to a voltage source V s 707 such that the voltage at the negative input terminal -Vj n2 308B is approximately equal to the DC offset of the input signal.
  • the voltage source V s 707 can be the same voltage as the voltage source connected to the voltage source input +V S 704A, the voltage source input -V s 704B of FIGURE 7A, or it can be different. This configuration results in the DC offset having a much smaller gain than the AC component of the signal, or being attenuated by the instrumentation amplifier 302. In this regard, the effects of the DC offset can be attenuated by adjusting the voltage source V s 707 connected to the output voltage V ou t 708.
  • the DC offset can be determined using a voltmeter, or some other device capable of determining voltage, and a controller can adjust the voltage source based on the determined voltage by the voltmeter. Alternatively, the voltage source V s 707 can be manually adjusted.
  • FIGURE 8 illustrates another embodiment of a circuit 800 configured to produce high front-end gain while maintaining a small DC gain, which in some embodiments may be one (0 dB).
  • the circuit 800 accomplishes the high front-end gain and attenuation of DC offset with a non-amplified feedback.
  • the circuit includes the ICM instrumentation amplifier topology 300 with some variations, as well as the HPF circuit 540, described in greater detail with reference to FIGURE 5A.
  • the second positive terminal 308A (+Vi n2 ) is coupled with the voltage reference the voltage reference V ref 316, while the input -Vi n2 308B is coupled to the voltage reference V ref 8 804 via a capacitor C t 804, in series with the voltage reference V ref 8804, and the gain setting resistor R g 314.
  • the voltage reference V ref 8 804 may be equivalent to, or different from the voltage reference V ref 316.
  • the output V out i 310 is fed back to the input -Vj n2 308B via the feedback resistor R ⁇ 312.
  • the gain setting resistor R g2 314 and the capacitor C t 802 are in parallel with the input -Vj n2 308B.
  • the capacitor C fllt 802 acts as a short, which produces a signal gain of 1+ R f t/R g .
  • the capacitor C t 802 acts as an open circuit.
  • this configuration further has a pole at 1 ⁇ 2* ⁇ * R g * C fllt and a zero at 1 ⁇ 2* ⁇ * Ra * C fllt .
  • FIGURE 9 is a circuit diagram illustrating one embodiment of an instrumentation amplifier configured as a HPF with switching circuitry.
  • the circuit 900 includes the components of circuit 500, described above, as well as switching circuit components.
  • the switching circuit components include comparators 902, 904, an OR gate 906, a clock 908 and counter 910. Although described in terms of comparator, counters and OR gates, other values or logical equivalents may be used to implement the switching circuit without departing from the spirit and scope of the description.
  • the switching circuit produces control signals SI 912 and S2 914, which are used to control switches 920 and 922, respectively.
  • the switching circuitry further includes resistors 916 and 918, used in conjunction with switches 916 and 918, respectively.
  • switching circuitry may include Furthermore, although illustrated in FIGURE 9, it is to be understood that the switching circuitry may be implemented with any one of the various embodiments described above with reference to FIGURES 5-8. Furthermore, the switching circuitry may be used with other embodiments without departing from the spirit and scope of the description.
  • the comparators 902, 904 detect when the output signal V ou ti 310 "rails," or when the instrumentation amplifier 302 saturates.
  • the output signal V ou ti 310 may rail when the capacitor C f u t 512 of the LPF is charging and discharging.
  • the comparators trigger a counter that outputs control signals 912, 914.
  • the control signals 912, 914 are used to close switches 920, 922, respectively. Once closed, the switches 920, 922 allow the resistors Rsl 916, Rs2 918 to form part of the closed circuit.
  • the values of the resistors Rsl 916 and Rs2 918 are significantly less than the values of the resistors R fi i t 510 and Rfiit2 544, which allows the capacitor Cm t 512 and the capacitor Cm t2 542 to charge more quickly, leading to improved settling times.
  • FIGURES 10 and 11 are graphical illustrations of embodiments of the gain achieved using the topologies discussed above.
  • FIGURE 10 relates to the embodiments illustrated in FIGURES 5, 7 and 8.
  • FIGURE 11 relates to the embodiment illustrated in FIGURE 6.
  • FIGURE 10 is a graphical illustration of an embodiment of the gain achieved with an instrumentation amplifier configured as a high-pass filter, similar to the embodiments described above with reference to FIGURE 5A.
  • the graph 1000 includes an x-axis 1002 of frequency in a logarithmic scale.
  • the y-axis represents decibel (dB) levels of a signal.
  • Graph 1000 further includes a first line 1006, corresponding to the output Vouti 310 and a second line 1008, corresponding to the output V ou t2 548.
  • R ⁇ 264 k ⁇
  • R g2 8 k ⁇
  • R g 4 k ⁇
  • R fi i t 10 ⁇
  • R fi i t2 100 k ⁇ .
  • the output V ou ti achieves a signal gain of 40 dB, or 100, and a DC gain of one (0 dB).
  • results similar to those shown in Graph 1000 can be achieved using the embodiment illustrated in FIGURE 7A and the same resistor and capacitor levels except for changing the value of the feedback resistor Ra to 247.5 k ⁇ and the value of the gain setting resistor R g2 to 2.5 kH Similarly, the embodiment illustrated in FIGURE 8 can be used to produce similar results, while changing the feedback resistor Ra to 10 ⁇ , and the gain setting resistor R g2 to 100 k ⁇ .
  • resistor and capacitor values may be used without departing from the spirit and scope of the description.
  • FIGURE 11 is a graph of an embodiment of the gain achieved with an instrumentation amplifier configured as a high-pass filter, similar to the configuration described above with reference to FIGURE 6.
  • the graph 1100 includes an x-axis 1102 in frequency in a logarithmic scale.
  • the y-axis represents decibel (dB) levels of a signal.
  • Graph 1100 further includes a first line 1106, corresponding to the output V ou ti 310 and a second line 1108, corresponding to the output V ou t 2 548.
  • the output V ou ti achieves a signal gain of 100 while attenuating the DC offset.
  • the addition of the HPF further improves the circuit response. Similar values for the resistors and capacitors described above with reference to FIGURE 10 may be used, however, the resistors Ra and R g may be changed to 247.5 k ⁇ and 2.5 k ⁇ , respectively.
  • the configurations and principles of the embodiments can be adapted for any other electronic system.
  • the circuits employing the above described configurations can be implemented into various electronic devices or integrated circuits.
  • the electronic devices can include, but are not limited to, consumer electronic products, parts of the consumer electronic products, electronic test equipments, healthcare monitors, etc. Further, the electronic device can include unfinished products.
  • the various topologies, configurations and embodiments described above may be implemented discretely or integrated on a chip without departing from the spirit and scope of the description.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

Dispositif et procédés permettant de réduire le risque de saturation d'un amplificateur par suite de la propagation de décalages CC et de réduire la récupération après survenue d'un état de saturation. L'avantage réside en ce que de tels attributs sont bénéfiques pour la surveillance de signaux bioélectriques. Un circuit utilise un amplificateur d'instruments connecté à un filtre passe-haut pour atténuer des décalages CC importants et amplifier de petits signaux. Le circuit peut inclure un amplificateur d'instruments couplé électriquement à un premier circuit de rétroaction comprenant au moins une résistance et un second circuit de rétroaction comprenant un amplificateur opérationnel (op-amp). Le circuit de rétroaction peut également comporter un filtre passe-bas. Dans le second circuit de rétroaction, l'amplificateur opérationnel peut être configuré comme amplificateur non inverseur, comme amplificateur inverseur et/ou comme circuit intégrateur. En variante, le circuit peut inclure un amplificateur d'instrument avec un seul circuit de rétroaction à une seule résistance, et un condensateur de couplage couplé électriquement à une tension de référence.
PCT/US2012/021331 2011-01-25 2012-01-13 Dispositif et procédé d'amplification avec gain d'extrémité élevé en présence de forts décalages de courant continu WO2012102880A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/013,666 US8390374B2 (en) 2011-01-25 2011-01-25 Apparatus and method for amplification with high front-end gain in the presence of large DC offsets
US13/013,666 2011-01-25

Publications (1)

Publication Number Publication Date
WO2012102880A1 true WO2012102880A1 (fr) 2012-08-02

Family

ID=45607354

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2012/021331 WO2012102880A1 (fr) 2011-01-25 2012-01-13 Dispositif et procédé d'amplification avec gain d'extrémité élevé en présence de forts décalages de courant continu

Country Status (2)

Country Link
US (1) US8390374B2 (fr)
WO (1) WO2012102880A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105615869A (zh) * 2015-12-31 2016-06-01 武汉明德生物科技股份有限公司 十二导心电信号采集装置
CN114070310A (zh) * 2020-07-30 2022-02-18 炬芯科技股份有限公司 高通滤波方法、高通滤波器和主动降噪系统

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2819306B1 (fr) 2013-06-27 2016-04-06 Imec Amplificateur d'instrumentation et procédé d'amplification de signal
US8928409B1 (en) * 2013-07-12 2015-01-06 Ion E. Opris Trans-capacitance amplifier with picoAmperes input biasing and large output swing
KR101937676B1 (ko) 2014-01-13 2019-01-14 삼성전자주식회사 생체 신호 증폭 회로
TWI535193B (zh) * 2014-07-10 2016-05-21 晶致半導體股份有限公司 具有校正功能之驅動裝置及其應用之無線充電驅動系統
WO2016054274A1 (fr) * 2014-09-30 2016-04-07 The Regents Of The University Of California Frontal de détection à grande gamme dynamique pour systèmes d'enregistrement de signal nerveux
TWI633321B (zh) * 2015-03-30 2018-08-21 財團法人工業技術研究院 用於磁場感測之穿隧磁阻裝置
US9698742B2 (en) * 2015-10-06 2017-07-04 Allegro Microsystems, Llc Electronic amplifier with a feedback circuit that includes a transconductance amplifier
US11109790B2 (en) * 2015-11-18 2021-09-07 Samsung Electronics Co., Ltd. Patch including an external floating high-pass filter and an electrocardiograph (ECG) patch including the same
KR102506436B1 (ko) * 2015-11-30 2023-03-07 삼성전자주식회사 증폭 회로에서 입력 신호를 복원하는 방법 및 이를 이용하는 증폭 회로
US10218312B2 (en) 2016-02-29 2019-02-26 Qualcomm Incorporated Dynamic volume management in audio amplifiers
US10256777B2 (en) * 2016-02-29 2019-04-09 Qualcomm Incorporated Audio amplifiers
US11025215B2 (en) 2016-12-07 2021-06-01 The Regents Of The University Of California High input impedance, high dynamic range, common-mode-interferer tolerant sensing front-end for neuromodulation systems
US11398787B2 (en) * 2017-06-30 2022-07-26 Texas Instruments Incorporated Optimizing comparator operation for a varying DC component input
US10725118B2 (en) * 2018-03-28 2020-07-28 Texas Instruments Incorporated Floating input detection
CN108880547A (zh) * 2018-08-21 2018-11-23 中国船舶重工集团公司第七0四研究所 基于电流注入的电桥电路零位偏置在线校正方法
US10911060B1 (en) * 2019-11-14 2021-02-02 Xilinx, Inc. Low power device for high-speed time-interleaved sampling
WO2022035730A1 (fr) 2020-08-13 2022-02-17 Owlet Baby Care, Inc. Amplificateur à gain à courant alternatif couplé en mode commun à canaux multiples
US11626847B2 (en) 2020-12-30 2023-04-11 Analog Devices, Inc. Amplifier input offset compensation
CN114489206B (zh) * 2021-12-31 2022-08-19 中船重工安谱（湖北）仪器有限公司 一种基于电流放大器的偏置电流和偏置电压独立调节系统
US11881969B2 (en) * 2022-04-22 2024-01-23 Samsung Display Co., Ltd. Real-time DC-balance aware AFE offset cancellation

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020000883A1 (en) * 1999-05-24 2002-01-03 David F. Cox Apparatus for and method of controlling amplifier output offset using body biasing in mos transistors
US20020060915A1 (en) * 2000-11-21 2002-05-23 Pomeroy Geoffrey S. Differential current source with active common mode reduction
US20030206054A1 (en) * 2002-05-03 2003-11-06 Samsung Electronics Co., Ltd. DC offset compensation circuit of closed loop operational amplifier and method of compensating for DC offset
US20040077326A1 (en) * 2002-10-21 2004-04-22 Zhongming Shi Fast settling variable gain amplifier with DC offset cancellation
US20070296496A1 (en) * 2006-06-22 2007-12-27 Arthur Russell Blumen Apparatus for reducing offset voltage drifts in a charge amplifier circuit
US20090066419A1 (en) * 2007-09-06 2009-03-12 Mediatek Inc. Variable gain amplifier circuits

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3908173A (en) * 1974-05-13 1975-09-23 Gen Motors Corp Differential amplifying system with forced differential feedback
US4260954A (en) * 1979-01-26 1981-04-07 Barcus-Berry, Inc. Amplifier load correction system
US4638258A (en) * 1982-02-26 1987-01-20 Barcus-Berry Electronics, Inc. Reference load amplifier correction system
US5300896A (en) 1992-10-16 1994-04-05 Suesserman Michael F Bootstrapped, AC-coupled differential amplifier
US5781068A (en) * 1996-03-14 1998-07-14 Nikon Corporation Transadmittance amplifier for a motor
US6249696B1 (en) 1999-01-15 2001-06-19 Medtronic Physio-Control Manufacturing Corp. Method and apparatus for increasing the low frequency dynamic range of a digital ECG measuring system
US6396343B2 (en) 2000-01-28 2002-05-28 Ngee Ann Polytechnic Low-frequency, high-gain amplifier with high DC-offset voltage tolerance
US6844775B2 (en) 2003-05-07 2005-01-18 Texas Instruments Incorporated Operational amplifier with adjustable input offset
US7078965B2 (en) * 2004-04-26 2006-07-18 World Energy Labs (2), Inc. Servo balancing among driver devices
US7132883B2 (en) 2005-02-08 2006-11-07 Maxim Integrated Products, Inc. Chopper chopper-stabilized instrumentation and operational amplifiers
US7532065B2 (en) 2005-07-12 2009-05-12 Agere Systems Inc. Analog amplifier having DC offset cancellation circuit and method of offset cancellation for analog amplifiers
US7368999B2 (en) 2006-07-10 2008-05-06 Jds Uniphase Corporation DC offset cancellation for a trans-impedance amplifier
DE102006044732A1 (de) 2006-09-20 2008-04-10 Micronas Gmbh Dreistufiger Verstärker

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020000883A1 (en) * 1999-05-24 2002-01-03 David F. Cox Apparatus for and method of controlling amplifier output offset using body biasing in mos transistors
US20020060915A1 (en) * 2000-11-21 2002-05-23 Pomeroy Geoffrey S. Differential current source with active common mode reduction
US20030206054A1 (en) * 2002-05-03 2003-11-06 Samsung Electronics Co., Ltd. DC offset compensation circuit of closed loop operational amplifier and method of compensating for DC offset
US20040077326A1 (en) * 2002-10-21 2004-04-22 Zhongming Shi Fast settling variable gain amplifier with DC offset cancellation
US20070296496A1 (en) * 2006-06-22 2007-12-27 Arthur Russell Blumen Apparatus for reducing offset voltage drifts in a charge amplifier circuit
US20090066419A1 (en) * 2007-09-06 2009-03-12 Mediatek Inc. Variable gain amplifier circuits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105615869A (zh) * 2015-12-31 2016-06-01 武汉明德生物科技股份有限公司 十二导心电信号采集装置
CN114070310A (zh) * 2020-07-30 2022-02-18 炬芯科技股份有限公司 高通滤波方法、高通滤波器和主动降噪系统

Also Published As

Publication number Publication date
US8390374B2 (en) 2013-03-05
US20120188009A1 (en) 2012-07-26

Similar Documents

Publication Publication Date Title
US8390374B2 (en) Apparatus and method for amplification with high front-end gain in the presence of large DC offsets
EP2818103B1 (fr) Système d'acquisition de signal biopotentiel et procédé
TWI481196B (zh) 生物電信號感測儀器與其基線漂移移除裝置
US8442628B2 (en) Differential voltage sensing method
US10117591B2 (en) Impedance bootstrap circuit for an interface of a monitoring device
US20080159365A1 (en) Analog Conditioning of Bioelectric Signals
JP2017200221A (ja) 神経増幅器
TW200932194A (en) A feed-forward automatic-gain control amplifier (FFAGCA) for biomedical application
Du et al. Design of an ECG sensor circuitry for cardiovascular disease diagnosis
WO2022142205A1 (fr) Circuit et appareil de traitement de signal
CN108134582B (zh) 一种模拟前端电路
CN113876336B (zh) 肌电采集参考电极的动态切换装置以及动态切换方法
Guermandi et al. EEG acquisition system based on active electrodes with common-mode interference suppression by Driving Right Leg circuit
Szakacs-Simon et al. Signal conditioning techniques for health monitoring devices
Diab et al. 14: 5nW; 30 dB Analog Front-End in 90-nm Technology for Biopotential Signal Detection
Tomasini et al. Digitally controlled feedback for DC offset cancellation in a wearable multichannel EMG platform
JP2016077580A (ja) 生体信号増幅装置、及び生体信号送信装置
AD8232 Single-Lead, Heart Rate Monitor Front End
Ji et al. An active electrode design for weak biosignal measurements
Lee et al. CMRR enhancement technique for IA using three IAs for bio-medical sensor applications
Sinha et al. A 22nm±0.95 V CMOS OTA-C front-end with 50/60 Hz notch for biomedical signal acquisition
EP3042607A1 (fr) Système d'acquisition de signal biopotentiel et procédé
Udupa et al. ECG analog front-end in 180 nm CMOS technology
Liang et al. A switched-capacitor-based low-power receiver for electrocardiogram and respiration rate detection
Tan et al. Two electrodes low voltage input EEG amplifier for brain-computer-interface

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12704152

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12704152

Country of ref document: EP

Kind code of ref document: A1