WO2012081815A1 - Non-shrink varistor board and method for manufacturing same - Google Patents

Abstract

Provided are a varistor board having low shrinkage and high mechanical flexural strength during deformation processing and a method for manufacturing same. The non-shrink varistor board is a ZnO-based varistor board including an internal electrode and an external electrode. A reinforced layer is disposed between the varistor layer including the internal electrode and a reflective layer. The reinforced layer is formed of a material different from that of the varistor layer to reduce shrinkage. Also, a reaction surface may be formed on the surfaces between the reinforced layer and the varistor layer and in the reinforced layer and the varistor layer to improve flexural strength.

Description

Non-shrink varistor substrate and its manufacturing method

The present invention relates to a non-shrink varistor substrate (NON-SHRINKAGE VARISTOR SUBSTRATE) and a method of manufacturing the same, and more particularly, to a varistor substrate having a built-in antistatic function, low shrinkage, high mechanical strength and a method of manufacturing the same will be.

Light emitting diodes (LEDs) have many advantages such as low power, high efficiency, high brightness and long life, and are widely used in electronic components as packages. On the other hand, the light emitting diode has a disadvantage in that it is weak to static electricity or reverse voltage.

Accordingly, when using LED, a Zener diode or varistor is connected in parallel with the LED chip and used as a substitute for static electricity and reverse voltage.

However, the method of packaging the Zener diode or varistor integrally with the LED chip has problems such as space limitation due to the additional process, increase in the number of processes and size increase due to additional mounting, and increase in manufacturing cost.

In addition, the light generated in the LED chip is scattered and refracted by a Zener diode or a varistor placed on the same plane as the LED chip, thereby limiting the efficient control of the direction of light. Thus, a method of embedding a zener diode or varistor in a substrate has been used.

An inner electrode and an outer electrode are used for the substrate including the varistor element, and the inner electrode is printed and sintered between the sheets of the substrate to be laminated. The outer electrode is connected with the inner electrode.

An insulating layer and a reflective layer are respectively formed on the upper surface of the substrate including the varistor element to increase the resistance to heat and to effectively reflect the light emitted from the LED.

However, in the case of the conventional varistor substrate, shrinkage deformation occurs during the firing of the substrate due to the material of the varistor substrate, etc., and the shrinkage ratio is also not constant, making it difficult to manufacture a varistor substrate satisfying a precise dimensional specification. In addition, in order to reduce the shrinkage rate has been pointed out that the complexity of the process, the productivity is low, while the mechanical strength of the varistor substrate does not improve the utilization of the substrate.

Accordingly, an object of the present invention is to provide a varistor substrate having a low shrinkage rate due to plasticity and improved mechanical strength through a simple process in a varistor substrate having an antistatic function. In addition, the purpose is to supply a varistor substrate with high utilization by improving the reflectance.

In order to achieve the above object, the non-shrink varistor substrate according to an embodiment of the present invention, the varistor layer formed therein an internal electrode for the varistor function, a via hole filled with a conductive material for the electrical connection between the internal electrode and the outside; A reinforcement layer including a material different from that of the varistor layer and formed to a predetermined thickness on an upper surface of the varistor layer; A reflective layer printed on the upper surface of the reinforcing layer; And external electrodes formed on an upper surface of the reflective layer and a lower surface of the varistor layer.

In this case, the reinforcing layer is made of at least one of Al ₂ O ₃ , MgO, CaO, TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO ₂ and ZnO. Varistor layer comprising a different material layer. In this case, the reinforcing layer is MgO having a weight ratio of 3 to 8 wt%, CaO of 9 to 15%, Co ₃ O ₄ of 1 to 3 wt%, and Nd ₂ O ₃ to ₂ to 3 wt%, based on the total weight of the reinforcing layer. 6 wt% of Pr ₆ O ₁₁ and 3 wt% or more of ZnO.

The reinforcement layer may also comprise a ceramic material including low temperature cofired ceramics (LTCC) or high temperature cofired ceramics (HTCC). When the reinforcement layer is a low temperature cofired ceramic, the varistor layer is fired, and then the reinforcement layer and the reflection layer are formed.

The reflective layer may be a material containing Ni or Ag, or a mixture of one or more of TiO ₂ , ZrO ₂ , and ZnO with ceramic powder. When the ceramic powder is added to the material, the reflective layer may be formed after firing the varistor layer on which the reinforcing layer is formed.

The external electrode may comprise Au.

According to an embodiment of the present invention, a method of manufacturing a non-shrink varistor substrate may include forming a varistor layer by filling a conductive material in a via hole formed in a green sheet while stacking a plurality of green sheets with an internal electrode printed thereon; Forming a reinforcement layer having a predetermined thickness including a material different from that of the varistor layer on an upper surface of the varistor layer; Printing and firing the reflective layer on the upper surface of the reinforcing layer; And forming an external electrode on an upper surface of the reflective layer and a lower surface of the varistor substrate.

The reinforcing layer may be formed of at least one of Al ₂ O ₃ , MgO, CaO, TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO _2, and ZnO. In particular, the weight ratio of the entire reinforcing layer is MgO of 3 to 8 wt%, CaO of 9 to 15%, Co ₃ O ₄ of 1 to 3 wt%, Nd ₂ O ₃ of 1 to 3 wt% , 2 to 6 wt% of Pr ₆ O ₁₁ and 3 wt% or more of ZnO.

Meanwhile, the reinforcement layer may be manufactured by including a ceramic material including a low temperature cofired ceramic (LTCC) or a high temperature cofired ceramic (HTCC), wherein the step of forming a varistor layer when the reinforcement layer is a low temperature cofired ceramic And firing the varistor layer between the step of forming the reinforcing layer.

The reflective layer may be a material including Ni or Ag or a mixture of one or more of TiO ₂ , ZrO ₂ , and ZnO with ceramic powder. When the reflective layer is a material including ceramic powder, the method further includes firing the varistor layer having the reinforcing layer formed between the step of forming the reinforcing layer and the printing and firing step.

The external electrode includes Ag or Au.

According to the present invention, a varistor substrate is manufactured by using a reinforcing layer having a heterogeneous ceramic material. Accordingly, the varistor substrate having a low shrinkage ratio can be manufactured by the reinforcing layer on the surface, and since the heterogeneous varistor or ceramic is used as the reinforcing layer, the effect of strengthening the substrate strength by forming a reaction layer on the surface or inside can be obtained. have.

In addition, since the reflective layer on the surface is formed of a ceramic reflective layer, it is possible to form a reflective layer having high reflectance and good adhesion, thereby producing a varistor substrate having high reflectance and high productivity.

1 is a side cross-sectional view of a non-shrink varistor substrate according to an embodiment of the present invention.

2 is a perspective cross-sectional view of a non-shrink varistor substrate according to an embodiment of the present invention.

3 is a schematic diagram of the laminated composition of the reinforcement layer, the reflection layer, and the external electrode.

4 illustrates a configuration example of a non-shrink varistor substrate according to an embodiment of the present invention.

5 is a graph comparing the strength when different materials are used for the reinforcement layer.

6 is a flowchart of a method of manufacturing a non-shrink varistor substrate according to an embodiment of the present invention.

Hereinafter, a non-shrink varistor substrate and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to the accompanying drawings. In the following description, the same reference numerals will mean to refer to the same configuration.

1 is a side cross-sectional view of a non-shrink varistor substrate according to an embodiment of the present invention.

In the following description including FIG. 1, it is described that the light emitting device 60 is mounted on the upper surface of the varistor layer 20. Accordingly, the light emitting device 60 is not mounted on the bottom surface of the varistor layer 20, and only the external electrode 42 is formed. However, for convenience of description, the lower and lower surfaces are separately described, and the light emitting device 60 may be mounted on the upper or lower surface of the varistor layer 20, and the external electrode 42 may be formed on the opposite surface of the varistor layer 20. It will be natural.

The varistor layer 20 means a varistor element having an antistatic function. Varistor is an abbreviation of Variable Resistor, and refers to a nonlinear semiconductor resistance device whose resistance value is changed by voltages applied to both ends. Accordingly, when the predetermined voltage is over, it discharges electricity to protect the device.

The characteristics of the varistor are evaluated by the varistor voltage and the capacitance, and the varistor voltage is determined by the linear distance between the internal electrodes 46 shown in FIG. 1, and the capacitance is determined by the area and distance between the internal electrodes 46 and the raw materials. Determined by the material of

When plating is performed to form an electrode pattern on the outside of the varistor layer 20 or to fill the via hole 45, the substrate material itself becomes conductive due to the characteristics of the varistor. Accordingly, the electrical resistance may be lowered during electroplating so that the external electrodes 40 and 42 may spread, and thus, the external electrodes 40 and 42 may be short-circuited with each other. Therefore, the insulating layer is attached between the varistor substrate 20 and the external electrodes 40 and 42.

The varistor substrate 20 may have a structure in which a plurality of green sheets are stacked. The green sheet can generally be manufactured using a method for producing the varistor substrate 20.

For example, ZnO powder is added with ZnO powder, additives such as Bi ₂ O ₃ , Sb ₂ O ₃ , and any one of Co ₃ O ₄ , Nd ₂ O ₃ , and Pr ₆ O ₁₁ to adjust the desired composition. A ZnO powder having a suitable composition is ball milled for 24 hours using water or alcohol as a solvent to prepare a raw material powder. In order to prepare a molded sheet, PVB-based binder (binder) is measured as an additive to the prepared raw powder, and then dissolved in toluene / alcohol (toluene / alcohol) -based solvent. The slurry is then milled and mixed with a small ball mill for about 24 hours. Such a slurry can be formed into a plurality of green sheets of a desired size by a method such as a doctor blade. However, any method of forming the varistor substrate 20 may be used in addition to the above-mentioned method.

In order to form the internal electrode 46, a pattern for the internal electrode may be printed on the green sheets of some of the manufactured green sheets. The internal electrode may comprise a component such as Ag or AgPd, for example. However, since the melting point of Ag is about 960 ° C, it can be melted during sintering after laminating the green sheet, and mainly AgPd is used as the internal electrode 46. However, Ag is also used as the internal electrode 46 depending on the sintering temperature according to the material of the substrate. Could be used.

Referring back to FIG. 1, the non-shrink varistor substrate according to an embodiment of the present invention may include a varistor layer 20 and a reinforcement layer in which a via hole 45 filled with an inner substrate 46 and a conductive material 44 is formed. 10), reflective layer 30 and external electrodes 40, 42.

As described above, the varistor layer 20 refers to a structure in which a plurality of green sheets that perform the function of the varistor through the internal electrode 46 are stacked. The green sheet laminated structure will be integrated through a later firing process.

The reinforcement layer 10 is positioned on the upper surface of the varistor layer 20, and prevents the varistor layer 20 from shrinking during sintering. In addition, by forming a reaction layer (not shown) on the surface or the inside of the reinforcing layer 10 of the portion where the varistor layer 20 and the reinforcing layer 10 abuts to increase the bending strength, which is the mechanical strength of the substrate. .

That is, the reinforcement layer 10 serves to hold the varistor layer 20 so as not to shrink, and reacts with the upper surface of the varistor layer 20 to form a reaction layer (not shown), thereby. It is installed on the varistor layer 20 to serve to improve the strength of the entire substrate.

As described above, the reinforcement layer 10 includes a material different from the varistor layer 20 according to the purpose of reducing the shrinkage of the varistor layer 20 and strengthening the strength of the entire varistor substrate.

In an embodiment of the present invention, the varistor layer 20 includes a ZnO-based material. Accordingly, the reinforcement layer 10 includes heterogeneous varistor materials or heterogeneous ceramic materials.

For example, the reinforcement layer 10 includes Al ₂ O ₃ , MgO, CaO, TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO _2, and It may contain one or more materials of ZnO. In particular, when including one or more of the above materials, it may be desirable to include a material different from the material included in the varistor layer 20.

When generating the reinforcing layer 10 mixed with each of the above materials, the mixing ratio is 3 to 8wt% for MgO, 9 to 15% for CaO, 1 to 1 for Co ₃ O ₄ 3 wt%, 1 to 3 wt% for Nd ₂ O ₃ , 2 to 6 wt% for Pr ₆ O ₁₁ and 3 wt% or more for ZnO.

Depending on the content of ZnO, it will be obvious that the above materials which may be included in the reinforcement layer 10 may be included together in addition to the materials included in the above description of the mixing ratio. ZnO can have a content of up to about 95 wt%.

Accordingly, by including a material used to manufacture a varistor substrate of a material different from that of the ZnO-based varistor layer 20, a substrate capable of reducing shrinkage and increasing strength may be manufactured.

Meanwhile, the reinforcement layer 10 may include a material of ceramic material, and may include, for example, a high temperature cofired ceramic (HTCC) or a low temperature cofired ceramic (LTCC).

In particular, when the reinforcing layer 10 is a low temperature cofired ceramic, the firing temperature is very low due to the characteristics of the material (for example, about 850 to 880 degrees Celsius). On the other hand, in the case of the varistor layer 20, the firing temperature is about 1000 degrees Celsius.

Therefore, in this case, when the low-temperature co-fired ceramic is formed into the reinforcement layer 10 and then collectively fired at a temperature of about 1000 degrees Celsius, the surfaces of both layers at the boundary between the reinforcement layer 10 and the varistor layer 20 and Since the reaction layer is not formed therein, a disadvantage may occur in that the strength is not improved.

Therefore, when the reinforcement layer 10 is a low temperature co-fired ceramic, the varistor layer 20 in which a plurality of green sheets are laminated is first formed at a predetermined temperature before the reinforcement layer 10 is formed on the upper surface of the varistor layer 20. After firing at (eg, 1000 degrees Celsius), the reinforcement layer 10 may be formed and then fired at another temperature (for example, 850 to 880 degrees Celsius) to form a reaction layer.

When the reinforcement layer 10 is formed on the upper surface of the varistor layer 20, the reflective layer 30 is formed on the upper surface of the reinforcement layer 10. When the light emitting device 60 is mounted on the external electrode 40 or the top surface of the reflective layer 30 to emit light, the reflective layer 30 prevents light from being absorbed by the reinforcement layer 10 and the like, and thus the light efficiency is lowered. It means a layer formed for.

Reflective layer 30 will therefore mean a reflective material having a predetermined thickness and printed on the top surface of reinforcement layer 10. For example, a metal reflector including Ag may be used, or may include a material in which at least one of TiO ₂ , ZrO ₂ , and ZnO is mixed with ceramic powder. In particular, when a mixed material of ceramic powder is used for the reflective layer 30 and a ceramic material is used for the reinforcing layer 10, the bonding force between the reflective layer 30 and the reinforcing layer 10 may be improved, thereby increasing productivity. .

If silver (Ag) is used for the reflective layer 30, the varistor layer 20, the reinforcement layer 10 and the reflective layer 30 may be collectively calcined at a set temperature (about 900 degrees Celsius or 1000 degrees). (Except when the reinforcing layer 10 is a low temperature cofired ceramic).

However, if a material mixed with ceramic powder is used in the reflective layer 30, as described above, the firing temperature may be low (about 850 to 880 degrees Celsius), and in this case, the varistor layer 20 is fired. After forming the reinforcement layer 10 and the reflective layer 30 of the low-temperature cofired ceramics and baking again (at different temperatures), or after forming and firing the varistor layer 20 and the reinforcement layer 10, the reflective layer 30 Forming and firing will be able to complete the substrate.

When the reflective layer 30 is formed, the external electrodes 40 and 42 may be formed. The external electrodes 40 and 42 may be formed through nickel (Ni) plating or silver (Ag) or gold (Au) plating, and may be formed on the bottom surface of the varistor layer 20 and the top surface of the reflective layer 30, respectively. Can be.

In the embodiment of the present invention, the external electrodes 40 and 42 may be electrically connected to the conductive material 44 and the internal electrode 46 filled in the via hole 45, respectively. It would also be natural for each pole to be electrically insulated.

Static electricity that may occur at the outer electrodes 40, 42 will be transferred to the inner electrode 46, and the inner electrodes 46 will be spaced apart by the varistor layers 20 between each pole.

The external electrode 42 formed on the bottom surface of the varistor layer 20 may be in contact with the bottom surface of the varistor layer 20 or may be formed to be spaced apart from the varistor layer 20 by a predetermined insulating layer (not shown). will be.

Referring to FIG. 1, the light emitting device 60 is mounted on an upper surface of the formed external electrode 40. This is because the LED chip, which is the light emitting device 60, is directly connected to the external electrode 40 with one pole directly connected to the external electrode 40 through the wire 50. However, other methods of mounting may be used, such as using two wires.

2 is a perspective cross-sectional view of a non-shrink varistor substrate according to an embodiment of the present invention. In the following description, portions that overlap with the description of FIG. 1 will be omitted.

Referring to FIG. 2, the external electrode 40 has a structure in which the external electrode 40 is electrically connected to the via hole 40 filled with the conductive material 44. In FIG. 2, the external electrode 40 is not formed in the via hole 45. However, this is illustrated to clearly indicate that the via hole 45 and the external electrode 40 are electrically connected. The external electrode 40 will cover the via hole 45.

In addition, three internal electrodes 46 are formed to be alternately formed in FIG. 2, but a plurality of internal electrodes 46 are formed in the varistor layer 20 to perform a varistor function.

Referring to FIG. 2, it can be seen that the varistor layer 20, the reinforcement layer 10, and the reflective layer 30 are sequentially formed, and a portion of the via hole 45 is perforated.

The varistor layer 20 has a structure in which a plurality of green sheets are stacked, and the internal electrodes 46 may be printed on a part of the green sheets to form the internal electrodes 46.

3 is a diagram illustrating a stacking composition of the reinforcement layer 10, the reflective layer 30, and the external electrode 40.

Referring to FIG. 3, a varistor substrate 20 exists first, and a reinforcement layer 10 is formed on an upper surface thereof. The reinforcement layer 10 reacts with the top surface of the varistor layer 20 to form a reaction layer (not shown), thereby preventing shrinkage due to thermal firing of the entire substrate and improving mechanical flexural strength of the entire substrate. It will perform the function.

In an embodiment of the present invention, the reinforcement layer 10 has a thickness of about 100 μm to about 300 μm, as shown in FIG. 3. In the embodiment of FIG. 3, the reflective layer 30 is formed by stacking Ag on the upper surface of the reinforcement layer 10 about 10 μm.

The external electrode 40 includes a material of Ni, Ag or Au, and has a thickness of about 0.3 μm for Ni and about 0.5 μm for Ag or Au. The thickness will be only one embodiment, and may vary depending on the use and design of the varistor substrate.

4 illustrates a configuration example of a non-shrink varistor substrate according to an embodiment of the present invention. In the following description, portions overlapping with the description of FIGS. 1 to 3 will be omitted.

In FIG. 4, the structure of the varistor layer 20 in which the plurality of green sheets 21 are stacked may be confirmed.

Referring to FIG. 4, a plurality of green sheets 21 may be stacked to form a structure of the varistor layer 20. Via holes 45 will be perforated in each green sheet 21, and the positions thereof will be the same for each of the upper and lower green sheets 21, so that the vertical via holes 45 will be formed according to the stacking of the green sheets 21.

When the green sheets 21 are stacked, the internal electrodes 46 may be stacked to be alternately connected to each pole as shown in FIG. 4. This is the stacking order for performing the function of the varistor. In addition, in order to form a gap between the internal electrodes 46, the green sheets 21 without the internal electrodes 46 may also be stacked between the green sheets 21 on which the internal electrodes 46 are formed.

The conductive material 44 may be continuously filled while stacking the plurality of green sheets 21, and may be filled while stacking the reinforcing layer 10 and the reflective layer 30.

5 is a graph comparing the strength when different materials are used for the reinforcement layer 10. In the following description, portions that overlap with the description of FIGS. 1 to 4 will be omitted.

5, for comparison it was measured the strength 20 of the varistor material, such as a varistor layer 20, the Al in the varistor to the intensity 22, a varistor during the addition of Al ₂ O _3, MgO, CaO Strength 24 when forming the reinforcement layer 10 composed of TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO ₂ and ZnO The strength 26 of low temperature cofired ceramics and the strength 28 of high temperature cofired ceramics are described.

As shown in FIG. 5, it can be seen that the flexural strength is much stronger when the material of the varistor and the other material is used for the reinforcement layer 10 as compared to the strength of the ordinary varistor.

Of course, in the present invention, all materials may be mixed and used, and according to the required strength, material cost, and simplification of the process depending on the field in which the varistor substrate is used (because different firing temperatures have to be fired in each step). Various materials may be mixed and used as required.

6 is a flowchart of a method of manufacturing a non-shrink varistor substrate according to an embodiment of the present invention. In the following description, portions overlapping with the description of FIGS. 1 to 5 will be omitted.

Referring to FIG. 6, first, a step (S10) of preparing the varistor green sheet 21 is performed. In step S10, the green sheet is manufactured by the example method as mentioned in the description of FIG.

Thereafter, the step S20 of forming the internal electrode 46 on the upper surface of the part of the green sheet 21 for the varistor function is performed. The internal electrode 46 may be formed on a part of the green sheet 21 to exist at a predetermined thickness inside the varistor layer 20 according to the varistor function.

When the varistor layer 20 is completed by stacking the green sheets 21, the step S30 of forming the reinforcement layer 10 on the upper surface of the varistor layer 20 is performed to stack the reinforcement layer 10 thereon. do. If the reinforcing layer 10 is a low temperature cofired ceramic, the step of firing the varistor layer 20 may be further included between the steps S20 and S30.

After the step S30, forming the reflective layer 30 on the upper surface of the reinforcing layer 10 will be performed (S40). In this case, when the ceramic layer is included in the reflective layer 30, the step of firing the varistor layer 20 in which the reinforcing layer 10 is formed may also be included between steps S40 and S30.

When the reflective layer 30 is formed, the step S50 of firing the entire varistor substrate will be performed, and then the step S60 of forming the external electrodes 40 and 42 to complete the substrate will be performed.

The above-described description of the non-shrink varistor substrate and its manufacturing method according to the embodiment of the present invention is not intended to limit the claims. In addition, in addition to the above embodiment of the present invention, it will be obvious that the equivalent invention performing the same function as the present invention also belongs to the scope of the present invention.

Claims (16)

1. An internal electrode for a varistor function therein, a varistor layer having a via hole filled with a conductive material for electrical connection between the internal electrode and the outside;

   A reinforcement layer including a material different from the varistor layer and formed to a predetermined thickness on an upper surface of the varistor layer;

   A reflective layer printed on an upper surface of the reinforcement layer; And

   And an external electrode formed on an upper surface of the reflective layer and a lower surface of the varistor layer.
2. The method according to claim 1,

   The reinforcement layer,

   At least one of Al ₂ O ₃ , MgO, CaO, TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO ₂ and ZnO A non-shrink varistor substrate.
3. The method according to claim 1,

   The reinforcing layer is a non-shrink varistor substrate, characterized in that it comprises a ceramic material including a low temperature co-fired ceramic (LTCC) or a high temperature co-fired ceramic (HTCC).
4. The method according to claim 3,

   When the reinforcing layer is a low temperature cofired ceramic, the varistor layer is fired, and then the reinforcing layer and the reflective layer are formed.
5. The method according to claim 1,

   The reflective layer,

   A non-shrink varistor substrate comprising Ag.
6. The method according to claim 1,

   The reflective layer,

   A non-shrink varistor substrate, characterized in that the ceramic powder is a material in which at least one of TiO ₂ , ZrO ₂ , and ZnO is mixed.
7. The method according to claim 6,

   The reflective layer,

   A non-shrink varistor substrate, characterized in that formed after firing the varistor layer on which the reinforcement layer is formed.
8. The method according to claim 1,

   And the external electrode comprises at least one material of Ni, Ag, and Au.
9. Forming a varistor layer by filling a conductive material in a via hole formed in the green sheet while stacking a plurality of green sheets printed with internal electrodes thereon;

   Forming a reinforcement layer having a predetermined thickness including a material different from that of the varistor layer on an upper surface of the varistor layer;

   Printing and firing a reflective layer on an upper surface of the reinforcement layer; And

   And forming an external electrode on an upper surface of the reflective layer and a lower surface of the varistor substrate.
10. The method according to claim 9,

    The reinforcement layer,

    Prepared by including one or more of Al ₂ O ₃ , MgO, CaO, TiO ₂ , Co ₃ O ₄ , Nd ₂ O ₃ , Pr ₆ O ₁₁ , Bi ₂ O ₃ , Sb ₂ O ₃ , ZrO ₂ and ZnO The manufacturing method of a non-shrink varistor board | substrate characterized by the above-mentioned.
11. The method according to claim 9,

    The reinforcement layer,

    A method for manufacturing a non-shrink varistor substrate, comprising a ceramic material comprising a low temperature cofired ceramic (LTCC) or a high temperature cofired ceramic (HTCC).
12. The method according to claim 11,

    If the reinforcing layer is a low temperature co-fired ceramic, further comprising firing the varistor layer between the forming of the varistor layer and the forming of the reinforcing layer. .
13. The method according to claim 9,

    The reflective layer,

    A method for producing a non-shrink varistor substrate, comprising Ag.
14. The method according to claim 9,

    The reflective layer is a method of manufacturing a non-shrink varistor substrate, characterized in that the ceramic powder is a mixture of at least one of TiO ₂ , ZrO ₂ , and ZnO.
15. The method according to claim 14,

    And firing the varistor layer on which the reinforcing layer is formed between the forming of the reinforcing layer and the printing and firing step.
16. The method according to claim 9,

    And the external electrode comprises at least one of Ni, Ag, and Au.

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