WO2012077704A1 - Serveur de souche de débogage, procédé de débogage et programme - Google Patents

Serveur de souche de débogage, procédé de débogage et programme Download PDF

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Publication number
WO2012077704A1
WO2012077704A1 PCT/JP2011/078272 JP2011078272W WO2012077704A1 WO 2012077704 A1 WO2012077704 A1 WO 2012077704A1 JP 2011078272 W JP2011078272 W JP 2011078272W WO 2012077704 A1 WO2012077704 A1 WO 2012077704A1
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WIPO (PCT)
Prior art keywords
debug
program
control
control instructions
control instruction
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PCT/JP2011/078272
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English (en)
Japanese (ja)
Inventor
中村　祐一
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日本電気株式会社
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Priority to JP2012547887A priority Critical patent/JPWO2012077704A1/ja
Priority to US13/992,539 priority patent/US9292395B2/en
Publication of WO2012077704A1 publication Critical patent/WO2012077704A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2268—Logging of test results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software

Definitions

  • the present invention is based on the priority claim of Japanese patent application: Japanese Patent Application No. 2010-272840 (filed on Dec. 07, 2010), the entire contents of which are incorporated herein by reference. Shall.
  • the present invention relates to a debug stub server, a debugging method, and a program, and more particularly to a debug stub server, a debugging method, and a program that realize debugging from a plurality of information terminals.
  • Non-patent document 1, Non-patent document 2, Patent document 1, and Patent document 2 describe a debug system.
  • FIG. 10 is a block diagram schematically showing the configuration of the debug system described in these documents.
  • the debug system includes a debug target device 210 and an information terminal 220 used by a worker who performs debugging, and the debug target device 210 and the information terminal 220 are configured to be in a one-to-one relationship. ing.
  • the debug system may include a plurality of devices to be debugged 210, or may include a plurality of processes.
  • one debugging target device 210 and one information terminal 220 are in a one-to-one relationship, display the internal state of the debugging target device 210, and stop program execution in the debugging target device 210. And a screen that enables resumption control. According to such a debug system, it is possible to detect an error in a program or to detect an error in a hardware and repair the error while displaying the internal state of the debug target device 210 based on these controls.
  • Non-Patent Document 1 the debug target device 210 and the information terminal 220 are mounted on the same computer.
  • the debug function is present on the debug target apparatus 210, and a debug operation is performed remotely from an externally connected information terminal 220. At this time, the debug function is built in the server on the debug target device 210, and it is not possible to execute a debug function other than the pre-built function.
  • FIG. 11 is a block diagram showing the configuration of the debug system described in Patent Document 1.
  • This debug system is a test apparatus for a plurality of JTAG (Joint Test Action Group) compliant integrated circuits and a test system for testing a plurality of integrated circuits.
  • JTAG Joint Test Action Group
  • each integrated circuit including an on-chip debug protocol is provided with a master controller 102 operable to execute the corresponding test protocol, and the master controller 102 instructs the integrated circuit according to the configuration data.
  • a programmable switch (not shown) that selectively forms a test loop is provided between the master controller 102 and a selected one of the integrated circuits, the test loop being selected from among the test protocols.
  • a data bus is provided that connects the master controller 102 to each of the integrated circuits.
  • the method and operation unit for adjusting the control device of Patent Document 2 similarly handle a plurality of integrated circuits or processes.
  • a plurality of processes are buffered using a memory, and information on the plurality of processes is provided to the outside by reading the buffer serially.
  • Patent Document 3 when debugging a program using an inter-task sharing routine at the same time, for example, an online program using an inter-task sharing routine, etc. A debug processing apparatus that enables debugging in an independent environment is described.
  • JP 2000-148528 A JP 2010-173633 A JP-A-6-103105
  • the debug status cannot be monitored from a plurality of information terminals. Moreover, when control from a plurality of information terminals competes, debugging cannot proceed without contradiction.
  • debug information cannot be displayed simultaneously on a plurality of information terminals. This is because the debugging system described above assumes debugging with a single information terminal.
  • debug control cannot be performed simultaneously from a plurality of information terminals, and there is a risk that contradiction may occur or an uncontrollable state may occur due to control from a plurality of information terminals. is there.
  • the debug processing device described in Patent Document 3 arbitrates instructions received from a plurality of information terminals and provides an independent debugging environment for each of the plurality of information terminals. That is, according to the debug processing apparatus described in Patent Document 3, a separate debug result is output to each information terminal in accordance with an instruction received from each information terminal. At this time, the debug result cannot be shared among a plurality of information terminals, and the other information terminal cannot grasp the debug result based on the instruction of one information terminal.
  • An object of the present invention is to provide a debug stub server, a debugging method, and a program for solving such a problem.
  • the debug stub server is: A plurality of control instructions for a debug program are received from a plurality of information terminals, and by arbitrating the plurality of control instructions, a simultaneously executable one of the plurality of control instructions is selected and transferred to the debug program The mediation department; A transfer unit configured to transfer a debug result acquired by the debug program to the plurality of information terminals according to the control instruction selected by the arbitration unit.
  • the debugging method is: A step in which a debug stub server receives a plurality of control instructions for a debug program from a plurality of information terminals; Selecting a simultaneously executable one of the plurality of control instructions by arbitrating the plurality of control instructions; Transferring the selected control instructions to the debug program; Transferring a debug result acquired by the debug program in response to the selected control instruction to the plurality of information terminals.
  • the program according to the third aspect of the present invention is: Receiving a plurality of control instructions for a debug program from a plurality of information terminals; Processing to select simultaneously executable ones of the plurality of control instructions by arbitrating the plurality of control instructions; A process of transferring the selected control instruction to the debug program; And causing the computer to execute a process of transferring a debug result acquired by the debug program to the plurality of information terminals in accordance with the selected control instruction.
  • the debug result obtained by the debug program is shared among the plurality of information terminals according to the control instruction issued independently from the plurality of information terminals. be able to.
  • FIG. 1 It is a block diagram which shows the structure of the debug controller in the information terminal in an Example as an example. It is a block diagram which shows the structure of the debug screen in the information terminal in an Example as an example. It is a block diagram which shows the structure of the debug stub server in an Example as an example. It is a block diagram which shows the structure of a debug system as an example. It is a block diagram which shows the structure of the test apparatus described in patent document 1. FIG.
  • the debug stub server (11) has a control mechanism for enabling debugging by a plurality of information terminals (20a to 20c).
  • the debug stub server (11) is provided between the debug target device (10) that executes the debug program and the plurality of information terminals (20a to 20c). Further, the debug stub server (11) and the information terminals (20a to 20c) are connected via a network such as TCP-IP, USB, or serial.
  • debugging by a plurality of information terminals is realized by separating the debug stub server (11) close to the debug target device (10) and the information terminals (20a to 20c).
  • the debug stub server (11) controls setting of breakpoints, step execution, etc., and analysis instruction of performance quality information such as profile and coverage collection for the debug program executed in the debug target device (10). Handle the display of results in a batch.
  • the debug stub server (11) includes an arbitration unit (16) and a transfer unit (18).
  • the arbitration unit (16) receives a plurality of control instructions for the debug program from a plurality of information terminals, and selects a controllable one of the plurality of control instructions by arbitrating the plurality of control instructions.
  • a transfer part (18) transfers the debug result acquired by the debug program to a some information terminal according to the control instruction
  • the arbitration unit (16) preferably notifies the information terminal that has transmitted the control instruction not selected by the arbitration among the plurality of control instructions that the control instruction has not been selected.
  • the arbitration unit (16) may arbitrate the received plurality of control instructions with reference to a control condition library that holds a rule for arbitrating a plurality of control instructions for the debug program. Further, the arbitrating unit (16) sets a plurality of control instructions for the debug program to at least one of the priority of the control instructions, the number assigned to the information terminal that has transmitted the control instructions, and the order in which the control instructions are received. Mediation may be performed accordingly.
  • the debug result obtained by the debug program can be shared among the plurality of information terminals in accordance with the control instructions issued independently from the plurality of information terminals. This is because the debug stub server transfers a plurality of control instructions received from a plurality of information terminals simultaneously executable to the debug program, and a debug result obtained by the debug program according to the control instructions executable simultaneously Is transmitted to a plurality of information terminals.
  • debug information can be supplied to a plurality of information terminals. This is because the debug stub server collects debug information and then provides information to the information terminal.
  • debug control can be performed simultaneously from a plurality of information terminals. This is because the debug stub server performs exclusive control based on the control condition library.
  • the debug screen in each information terminal can be freely configured. This is because the debug terminal can transfer the debug screen only, not the debug screen, so that the information terminal can freely configure the debug screen.
  • the arbitration unit notifies an information terminal that has transmitted a control instruction that is not selected by arbitration among the plurality of control instructions, that the control instruction has not been selected.
  • the arbitration unit may arbitrate a plurality of received control instructions with reference to a control condition library that holds a rule for arbitrating a plurality of control instructions for the debug program.
  • the arbitration unit arbitrates a plurality of control instructions for the debug program according to at least one of a priority of the control instruction, a number assigned to the information terminal that has transmitted the control instruction, and an order of receiving the control instruction. You may make it do.
  • the debug system is configured to send the control instruction for the debug stub server and the debug program received from the user to the debug stub server, and to display the debug result transferred from the debug stub server.
  • a plurality of information terminals may be provided in either a debug target device that executes the debug program or the plurality of information terminals.
  • Each of the plurality of information terminals includes a display method library that holds a display method of debug results; It is preferable to include a display designating unit that displays the debug result according to a display method stored in the display method library.
  • the debugging method according to the second aspect is as described above.
  • the debug stub server arbitrates a plurality of received control instructions with reference to a control condition library that holds a rule for arbitrating a plurality of control instructions for the debug program. Also good.
  • the debug stub server receives a plurality of control instructions for the debug program, the priority of the control instructions, the number assigned to the information terminal that sent the control instructions, and the order in which the control instructions are received Arbitration may be performed according to at least one of the above.
  • the program is related to the third viewpoint. This program can be stored on a non-transient computer-readable recording medium and can be embodied as a storage state.
  • the information terminal that has transmitted a control instruction that is not selected by arbitration among the plurality of control instructions may cause a computer to execute a process of notifying that the control instruction has not been selected. preferable.
  • the received plurality of control instructions may be arbitrated with reference to a control condition library that holds a rule for arbitrating a plurality of control instructions for the debug program.
  • the plurality of control instructions for the debug program are in accordance with at least one of the priority of the control instruction, the number assigned to the information terminal that has transmitted the control instruction, and the order in which the control instruction is received. May be used for mediation.
  • FIG. 2 is a block diagram showing the configuration of the debug system according to the present embodiment.
  • the debug system includes a debug target device 10 that is a device to be verified, and a plurality of information terminals 20a to 20c.
  • the number of information terminals is three as an example, but the number of information terminals is not limited to this.
  • the debug target device 10 includes a debug stub server 11, a verification target system 12, and a control condition library 14.
  • the program execution unit 13 is activated separately from the debug stub server 11 in the verification target system 12.
  • the information terminals 20a to 20c include debug controllers 31a to 31c and debug screens 32a to 32c, respectively.
  • the debug system includes a debug program 71 and debug execution data 72.
  • the debug stub server 11 is connected to the debug controllers 31a to 31c of the information terminals 20a to 20c by Ethernet, USB, serial communication or the like.
  • the debug stub server 11 receives a debug program and data from a program execution unit 13 that debugs and analyzes the verification target system 12, and debugs or analyzes the debug program and data based on instructions from the information terminals 20a to 20c. I do.
  • the debug stub server 11 sends the results of debugging or analysis to the debug screens 32a to 32c of the information terminals 20a to 20c via the debug controllers 31a to 31c.
  • the debug stub server 11 When the debug stub server 11 receives control instructions such as stop, step, and information acquisition from the debug controllers 31a to 31c, according to the control conditions described in the control condition library 14, Control is performed by determining an executable control instruction.
  • the debug stub server 11 notifies the debug screens 32a to 32c of the control instructions that cannot be executed via the debug controllers 31a to 31c.
  • the program execution unit 13 activates a debugging analysis program such as a debugger, coverage acquisition, automatic test, memory management, profile acquisition, and the like.
  • the program execution unit 13 operates based on an instruction from the debug stub server 11 and returns a result to the debug stub server 11.
  • the debug controllers 31 a to 31 c generate the debug program 71 and the debug execution data 72 and transfer them to the debug stub server 11.
  • the debug controllers 31a to 31c control the start, end, stop, display instruction, designation of the stop position, and the like of debugging, and display on the debug screens 32a to 32c.
  • the debug screens 32a to 32c display debug information received from the debug stub server 11 via the debug controllers 31a to 31c, a button for a debug instruction, a command input screen, source code, and a stop location in the source code. Display so that can be specified.
  • the control condition library 14 holds arbitration rules when a plurality of instructions that cannot be executed simultaneously are received, such as when a similar instruction is simultaneously received from a plurality of information terminals 20a to 20c.
  • the debug stub server 11 refers to the control condition library 14 and performs exclusive control for a plurality of instructions.
  • the debug program 71 and the debug execution data 72 are a program compiled for the verification target system and execution data for the purpose of execution and debugging in the debug target device 10, respectively.
  • FIGS. 3 and 4 are flowcharts showing an example of the operation of the debug system according to this embodiment. With reference to FIGS. 2 to 4, the operation of the entire debugging system of this embodiment will be described.
  • a debug program 71 that can be executed by the verification target system 12 of the debug target device 10 in the information terminals 20a to 20c or another system
  • a debug program for knowing the internal state or a debug program for analysis is used.
  • Generate step S11). These debug programs are generated by setting a compile option or by executing another program during or after compilation.
  • debug execution data 72 is prepared as data for debugging or analysis (step S12).
  • Step S31 the debug controllers 31a to 31c are activated, and the debug screens 32a to 32c are activated.
  • the debug stub server 11 is activated on the debug target device 10, and the connection between the debug stub server 11 and the debug controllers 31a to 31c is established by communication means such as Ethernet, USB, PCI, and serial (step S32).
  • step S32 Using the network established in step S32, the debug program 71 and the debug execution data 72 prepared in steps S11 and S12 are transferred to the program execution unit 13 via the debug stub server 11 (step S13). .
  • An instruction to start the debug program 71 is output from any of the debug controllers 31a to 31c (step S14), and the debug program 71 is started (step S15).
  • an instruction to specify the stop position of the program or change the amount of the type of acquired information is instructed on the debug screens 32a to 32c and is output from the debug controllers 31a to 31c (step S16-1, S16-2).
  • the debug stub server 11 inquires the control condition library 14 in which the control conditions are set in advance, executes the control that matches the control conditions, and controls that are not executed via the debug controllers 31a to 31c that are the control designation sources. This is displayed on the debug screens 32a to 32c (step S17).
  • step S18 data is input from the program execution unit 13 to the debug program 71 and executed (step S18), and a debug result is acquired and transferred (step S19).
  • step S19 The result obtained in step S19 is displayed on the debug screens 32a to 32c by the display method specified by the debug controllers 31a to 31c via the program execution unit 13, the debug stub server 11, and the debug controllers 31a to 31c. (Step S20).
  • step S21 an end instruction is output from the debug screens 32a to 32c (step S21).
  • the termination instruction arrives at the debug stub server 11, the debugging is terminated (step S22).
  • a debug program 71 that can be executed by the verification target system 12 of the debug target device 10 in the information terminals 20a to 20c or another system
  • a debug program for knowing the internal state or a debug program for analysis is used.
  • Generate step S41.
  • These debug programs are generated by setting a compile option or by executing another program during or after compilation.
  • debug execution data 72 is prepared as data for debugging or analysis (step S42).
  • the debug controllers 31a to 31c are activated and the debug screens 32a to 32c are activated (step S61).
  • the debug stub server 11 is activated on the debug target device 10, and the connection between the debug stub server 11 and the debug controllers 31a to 31c is established by communication means such as Ethernet, USB, PCI, and serial (step S62).
  • step S62 Using the network established in step S62, the debug program 71 and the debug execution data 72 prepared in steps S41 and S42 are transferred to the program execution unit 13 via the debug stub server 11 (step S43). .
  • the debug stub server 11 inquires about the control conditions stored in the control condition library 14 and sets the execution conditions. As for the control that is not executed, the fact is displayed on the debug screens 32a to 32c via the debug controllers 31a to 31c as the control designation source (step S45).
  • step S46 The activation of the executable debug program 71 with control is instructed (step S46), and the debug program 71 is activated (step S47).
  • Step S48 Data is input from the program execution unit 13 to the debug program 71, and the debug program 71 is executed (step S48).
  • step S48 The result acquired in step S48 is displayed on the debug screens 32a to 32c by the display method specified by the debug controllers 31a to 31c via the program execution unit 13, the debug stub server 14, and the debug controllers 31a to 31c. (Step S49).
  • step S50 When the end instruction is output from the debug screens 32a to 32c and the output end instruction arrives at the debug stub server 11, the debugging is ended (step S50).
  • FIG. 5 is a block diagram showing the configuration of the debug system according to the present embodiment.
  • the debug system includes a debug target device 10 that is a device to be verified, and a plurality of information terminals 20a to 20c.
  • the number of information terminals is three as an example, but the number of information terminals is not limited to this.
  • the debug stub server 11 is provided on the debug target device 10 (FIG. 2).
  • the debug stub server 11 is provided on the information terminal 20a. Since the operation of each unit illustrated in FIG. 5 is the same as the operation of each unit in the first embodiment, the description thereof is omitted.
  • the debug stub server 11 may be provided on any one of the information terminals 20a to 20c. Further, if the debug system has some communication means between the debug stub server 11 and the program execution unit 13, the debug stub is provided on a separate device other than the debug target device 10 and the information terminals 20a to 20c. A server 11 may be provided. According to the debug system of this embodiment, the same operation as that of the debug system according to the first embodiment can be realized.
  • the number of information terminals is three, but the number of information terminals can be expanded to an arbitrary number.
  • the debug stub server 11 and the program execution unit 13 are independent.
  • the debug stub server 11 is connected to the debug controllers 31a to 31c of the plurality of information terminals 20a to 20c via a network. Further, the debug stub server 11 executes and controls debugging, transfers results, and communicates with the debug controllers 31a to 31c. Thereby, debugging by the plurality of information terminals 20a to 20c is realized.
  • the debug target device 10 is debugged from the three information terminals 20a to 20c.
  • the debug target device 10 and the information terminals 20a to 20c are physically connected by Ethernet, USB, PCI, PCI Express, serial, or the like. Therefore, data can be exchanged between the debug target apparatus 10 and the information terminals 20a to 20c.
  • compilation is performed by the command CC using the “-g” command that enables debugging by the UNIX Cx dbx command to prepare an executable debug program (step of FIG. 3). S11).
  • commands such as profile acquisition, coverage acquisition, automatic test, and memory management status investigation can be executed.
  • test data for debugging and debug data are prepared (step S12). These data may be generated by the information terminals 20a to 20c or the debug target device 10, or may be generated by other devices.
  • the debug controllers 31a to 31c and the debug screens 32a to 32c are activated on the information terminals 20a to 20c (step S31). Further, the debug stub server 11 is activated on the debug target device 10 (step S32). When the debug screens 32a to 32c are activated, the debug controllers 31a to 31c may be activated simultaneously.
  • an instruction to start the debug program 71 is output from the debug screen 32a of one information terminal 20a among the plurality of information terminals 20a to 20c (step S14).
  • step S15 When the program execution unit 13 receives a start instruction via the debug controller 31a and the debug stub server 11, the program execution unit 13 starts the debug program 71 (step S15).
  • the debug stub server 11 when there are a plurality of control designations when the debug program 71 is activated, the debug stub server 11 performs exclusive control determination, designates only the controls that can be performed simultaneously as options, and displays other controls as debug screens. An error is displayed on 32a to 32c (step S45 in FIG. 4).
  • the debug stub server 11 when there are a plurality of control designations when the debug program 71 is operated, the debug stub server 11 performs exclusive control determination and only controls that can be performed simultaneously. Is designated as an option, and other controls are displayed as errors on the debug screens 32a to 32c (step S17 in FIG. 3).
  • step S18 the debug program 71 with control repeats control such as stop and restart, for example, the debug is continued until the debug is completed, and the debug results are displayed on the debug screens 32a to 32c (step S18).
  • step S20 While adding or deleting control, debugging is repeated until an instruction to end debugging (step S21) is given.
  • FIG. 6 is a flowchart showing a method for determining the control exclusivity by the debug stub server 11. Referring to FIG. 6, the debug stub server 11 accepts all controls at once (step S71).
  • the debug stub server 11 determines a controllable process and its order using the control exclusivity described in the control condition library 14 or the priority of the process (step S72).
  • control condition library 14 the priority of processing such as the first-come-first-served basis of control, the priority of the information terminal, the priority of control, and the like is made into a library.
  • the control condition library 14 may be placed in any location that can be referred to from the debug stub server 11. As shown in FIG. 2, the control condition library 14 may be provided on the debug target apparatus 10.
  • control condition library 14 detection of exclusive control, determination of control when there is exclusive, and processing order of exclusive control are set by a predetermined method. For example, there is an exclusivity between stop and restart, but it is determined whether to perform stop or restart control by a preset method such as the arrival order of these controls or the order of numbers assigned to the information terminals. Is done.
  • FIG. 7 is a block diagram showing the configuration of the debug controller 31a in the information terminal 20a.
  • the debug controller 31a includes a network interface 41 responsible for communication with the debug stub server 11, a control condition transfer unit 42 that transfers control conditions, a control error reception unit 43 that receives control errors, an execution start unit 44, A result receiving unit 45 for receiving a debug result and an end instruction unit 46 are provided.
  • FIG. 8 is a block diagram showing a configuration other than the configuration shown in FIG. 7 in the configuration of the information terminal 20a.
  • the information terminal 20 a further includes a display method library 56.
  • the debug screen 32a includes a startup control unit 51, an operation control unit 52, a display specification unit 53 for specifying a display method, a result display unit 54 for displaying a debug result, and a control error display unit for displaying a control error. 55.
  • the display method library 56 sets a display method.
  • the display method library 56 and the display designating unit 53 make it possible, for example, to hide or display the display of a certain register and to switch the layout and size of the screen for each debug screen.
  • FIG. 9 is a block diagram showing the configuration of the debug stub server 11.
  • the debug stub server 11 includes an external network interface 61 that communicates with the information terminal 20a, an execution control unit 62, a transfer unit 63 that transfers data, programs, and results, and a verification target system 12.
  • the verification target interface 64 that performs communication of the above and the arbitration unit 65 that determines the control order based on the information from the control condition library 14 are provided.
  • the debug system according to the present invention can be applied to verification, debugging, quality analysis, performance analysis, etc. of LSIs for embedded systems, computers, microprocessors, digital home appliances or mobile phones.

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
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  • Quality & Reliability (AREA)
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Abstract

L'invention concerne un serveur de souche de débogage comprenant : une unité d'arbitrage qui reçoit une pluralité d'instructions de commande pour un programme de débogage à partir d'une pluralité de terminaux d'informations et, au moyen de l'arbitrage de la pluralité d'instructions de commande, qui sélectionne les instructions de commande qui sont exécutables simultanément parmi la pluralité d'instructions de commande afin de transférer celles-ci au programme de débogage ; et une unité de transfert pour transférer les résultats de débogage qui ont été acquis par le programme de débogage selon l'instruction de commande sélectionnée par l'unité d'arbitrage à la pluralité de terminaux d'informations. L'invention permet aux résultats de débogage qui ont été obtenus par le programme de débogage selon les instructions de commande qui ont été émises indépendamment à partir de la pluralité de terminaux d'informations d'être partagés parmi la pluralité des terminaux d'information.
PCT/JP2011/078272 2010-12-07 2011-12-07 Serveur de souche de débogage, procédé de débogage et programme WO2012077704A1 (fr)

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JP2012547887A JPWO2012077704A1 (ja) 2010-12-07 2011-12-07 デバッグスタブサーバ、デバッグ方法およびプログラム
US13/992,539 US9292395B2 (en) 2010-12-07 2011-12-07 Debug stub server, debug method, and program

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JP2010272840 2010-12-07

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