WO2012050034A1 - Procédé pour fabriquer un dispositif d'affichage, et dispositif d'affichage - Google Patents

Procédé pour fabriquer un dispositif d'affichage, et dispositif d'affichage Download PDF

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Publication number
WO2012050034A1
WO2012050034A1 PCT/JP2011/073045 JP2011073045W WO2012050034A1 WO 2012050034 A1 WO2012050034 A1 WO 2012050034A1 JP 2011073045 W JP2011073045 W JP 2011073045W WO 2012050034 A1 WO2012050034 A1 WO 2012050034A1
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Prior art keywords
connection
voltage
connection element
active matrix
matrix substrate
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PCT/JP2011/073045
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English (en)
Japanese (ja)
Inventor
善光 田島
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シャープ株式会社
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Publication of WO2012050034A1 publication Critical patent/WO2012050034A1/fr

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/22—Antistatic materials or arrangements

Definitions

  • the present invention relates to a method of manufacturing a display device having an electrostatic protection function and a display device having an electrostatic protection function.
  • the liquid crystal panel has a structure in which a liquid crystal substance is sandwiched between two glass substrates.
  • a thin film transistor hereinafter referred to as TFT
  • a pixel electrode and the like are formed on one glass substrate, and a counter electrode is formed on the other glass substrate.
  • TFT thin film transistor
  • the former is called an active matrix substrate, and the latter is called a counter substrate.
  • a method for preventing electrostatic breakdown in the manufacturing process a method of providing a protective wiring (also called a short ring) on the outer periphery of the active matrix substrate and commonly connecting the external terminals of the active matrix substrate to the protective wiring is used. .
  • a protective wiring also called a short ring
  • the active matrix substrate provided with the protective wiring even if charging occurs, the charge is immediately distributed to other external terminals without being localized. Thereby, it is possible to prevent a large potential difference from occurring between the external terminals and to prevent electrostatic breakdown.
  • Patent Document 1 describes an electrically programmable antifuse (see FIG. 16).
  • a PN junction 92 is formed on a silicon substrate 91, and a diffusion barrier 93 made of titanium nitride (TiN) or the like and a metal layer 94 made of aluminum or the like are disposed thereon.
  • TiN titanium nitride
  • a metal layer 94 made of aluminum or the like are disposed thereon.
  • a voltage pulse is applied to this laminate from a programmable voltage pulse source 95, a current flows through the PN junction 92, Joule heat is generated, and the metal of the metal layer 94 penetrates into the PN junction 92 and the diffusion barrier 93. . Thereby, the resistance of the PN junction 92 can be reduced.
  • the same ITO (Indium ⁇ ⁇ Tin Oxide) film as that for forming a pixel electrode may be used.
  • this method has a problem in that after the pixel electrode is formed, an independent signal cannot be input to the external terminal, and thus the electrical inspection of the active matrix substrate cannot be performed.
  • Patent Document 1 a method using an antifuse described in Patent Document 1 can be considered when connecting the external terminal and the protective wiring.
  • a voltage pulse is applied to the laminate, a high-density current of about 1 ⁇ 10 5 A / cm 2 flows through the PN junction 92, and intense Joule heat is generated. appear.
  • invades high heat
  • an object of the present invention is to provide a manufacturing method of a display device in which an external terminal on an active matrix substrate and a protective wiring are connected with a small calorific value, and a display device manufactured by this method.
  • a first aspect of the present invention is a method of manufacturing a display device having an electrostatic protection function, A plurality of connection elements are formed by overlapping the first conductor portion connected to the protective wiring, the semiconductor portion, and the second conductor portion connected to each external terminal at a plurality of locations on the active matrix substrate. Forming, and By applying a voltage for connection between the first and second conductor parts in a state where the connecting element is pressed and pressed against one conductor part of the connection element and the connection element is compressed and distorted, A connection step of irreversibly changing the connection element from the non-conductive state to the conductive state.
  • the method Prior to the connecting step, the method further includes a step of inspecting the active matrix substrate by applying an inspection voltage to the second conductor portion.
  • a needle used when applying the inspection voltage is used as the voltage applying needle.
  • the method Prior to the connecting step, the method further includes a step of correcting the active matrix substrate based on an inspection result.
  • connection step in the first aspect of the present invention, the connection voltage is sequentially applied to the plurality of connection elements.
  • a sixth aspect of the present invention is the fifth aspect of the present invention, In the connection step, when the current flowing through the connection element exceeds a threshold value, the connection element to which the connection voltage is applied is switched.
  • connection step in the first aspect of the present invention, the connection voltage is applied in parallel to the plurality of connection elements.
  • a temperature sensitive element having a positive temperature characteristic is provided on a path of a current flowing through the connecting element.
  • a ninth aspect of the present invention is a display device having an electrostatic protection function, An active matrix substrate; A counter substrate, The active matrix substrate is A pixel region including a plurality of thin film transistors and a plurality of pixel electrodes; A plurality of external terminals provided for external connection; Protective wiring commonly connected to the external terminals; A plurality of connection elements provided between the external terminal and the protective wiring, The connection element includes a first conductor portion connected to the protective wiring, a semiconductor portion, and a needle for applying a voltage to one conductor portion of a stacked portion formed by a second conductor portion connected to the external terminal.
  • connection element (laminated portion) is formed using the first conductor portion, the semiconductor portion, and the second conductor portion between the protective wiring and the external terminal, and the connection voltage Is applied irreversibly to connect the plurality of external terminals to the protective wiring in common, thereby preventing electrostatic breakdown of the display device.
  • the connection voltage Is applied irreversibly to connect the plurality of external terminals to the protective wiring in common, thereby preventing electrostatic breakdown of the display device.
  • the connection voltage Is applied irreversibly to connect the plurality of external terminals to the protective wiring in common, thereby preventing electrostatic breakdown of the display device.
  • the connection voltage Is applied irreversibly to connect the plurality of external terminals to the protective wiring in common, thereby preventing electrostatic breakdown of the display device.
  • the active matrix substrate can be inspected by inputting an independent signal to the external terminals even in the state having the protective wiring.
  • Such a connection element can be formed by a normal manufacturing process of the active matrix substrate.
  • connection voltage to the connection element in a compressed and distorted state
  • current and heat generated when the connection element is conducted can be smoothed.
  • pixel defects can be detected and corrected without adding a new film formation process and a wiring process (hereinafter abbreviated as wiring process) in which a predetermined pattern is exposed / etched using a photomask. And the yield of the substrate can be improved.
  • the protective wiring is provided by applying the inspection voltage to the second conductor portion. Even in the state, the active matrix substrate can be inspected by inputting an independent signal to the external terminal.
  • connection element it is possible to perform a process of conducting the connection element following the inspection of the active matrix substrate while the needle is applied to the second conductor portion.
  • the yield of the display device can be improved by correcting the active matrix substrate based on the inspection result.
  • the external terminals and the protective wiring can be reliably connected by sequentially applying the connection voltages to the plurality of connection elements.
  • connection element when the current flowing through the connection element exceeds a threshold value, an excessive current is passed through each external terminal and the protective wiring by switching the connection element to which the connection voltage is applied. Can be securely connected without any problems.
  • a plurality of external terminals and protective wiring can be connected in a short time by applying a connection voltage in parallel to a plurality of connection elements.
  • connection element by providing a temperature-sensitive element on the path of the current flowing through the connection element, conduction in one connection element causes delay in conduction of other connection elements. Can be suppressed.
  • FIG. 4 is a partially enlarged view of FIG. 3. It is a figure which shows the state before the connection process of the active matrix substrate shown in FIG. It is a figure which shows the state after the connection process of the active matrix substrate shown in FIG. It is a figure which shows the manufacturing process of the liquid crystal panel which concerns on 1st Embodiment. It is a figure which shows the other manufacturing process of the liquid crystal panel which concerns on 1st Embodiment.
  • FIG. 1 is a diagram showing a configuration of an active matrix substrate included in a liquid crystal panel according to the first embodiment of the present invention.
  • An active matrix substrate 1 shown in FIG. 1 includes a pixel region 2, a scanning signal line driving circuit 3, a plurality of external terminals 4, a protective wiring 5, and a plurality of connection elements 10.
  • the active matrix substrate 1 has a high electrostatic protection function when the plurality of external terminals 4 are brought into conduction with each other through the protective wiring 5.
  • m and n are natural numbers other than 1
  • i is a natural number of m or less
  • j is a natural number of n or less.
  • the pixel area 2 includes m scanning signal lines G1 to Gm, n data signal lines S1 to Sn, and (m ⁇ n) pixel circuits Pij arranged in a matrix.
  • the scanning signal lines G1 to Gm are arranged in parallel to each other, and the data signal lines S1 to Sn are arranged in parallel to each other so as to be orthogonal to the scanning signal lines G1 to Gm.
  • the pixel circuit Pij includes a TFT 6 connected to these two signal lines in the vicinity of the intersection of the scanning signal line Gi and the data signal line Sj, and a pixel electrode 7. According to the matrix permutation example shown in FIG. , I-th from the top and j-th position from the left.
  • the gate terminal, the source terminal, and the drain terminal of the TFT 6 are respectively connected to the scanning signal line Gi, the data signal line Sj, and the pixel electrode 7 without unnecessarily intersecting with other wirings.
  • the pixel region 2 includes a plurality of TFTs 6 and a plurality of pixel electrodes 7 that are two-dimensionally arranged.
  • the scanning signal line driving circuit 3 is a driving circuit for the scanning signal lines G1 to Gm, and is formed on the active matrix substrate 1.
  • the drive circuits for the data signal lines S1 to Sn are provided outside the active matrix substrate 1.
  • An external terminal 4 is provided at one end of the data signal lines S1 to Sn in order to apply a voltage corresponding to the video signal to the data signal lines S1 to Sn from the outside.
  • an external terminal 4 connected to the scanning signal line driving circuit 3 is provided in order to give a control signal to the scanning signal line driving circuit 3 from the outside.
  • the external terminal 4 is provided for external connection.
  • the protective wiring 5 is a wiring for electrostatic protection and is provided on the outer peripheral portion of the active matrix substrate 1.
  • One connection element 10 is provided between the external terminal 4 and the protective wiring 5.
  • the external terminal 4 is commonly connected to the protective wiring 5 via the connection element 10.
  • the protective wiring 5 is provided along one side of the active matrix substrate 1, but the protective wiring 5 may be provided along two or more sides of the active matrix substrate 1.
  • FIG. 2 is a cross-sectional view of the liquid crystal panel according to the present embodiment.
  • a liquid crystal panel 100 shown in FIG. 2 includes an active matrix substrate 1, a counter substrate 101, and a liquid crystal substance 102. As described above, the TFT 6 and the pixel electrode 7 are formed on the active matrix substrate 1. On the other hand, a counter electrode 103 is formed on the counter substrate 101.
  • the liquid crystal panel 100 is formed by disposing the active matrix substrate 1 and the counter substrate 101 so as to face each other, and filling and sealing the liquid crystal material 102 between them (a seal used for sealing is not shown).
  • the protective wiring 5 and the connection element 10 formed on the active matrix substrate 1 are removed in a process of dividing the mother substrate into a plurality of liquid crystal panels (hereinafter referred to as a cutting process). Specifically, the portion above line A-A ′ shown in FIG. 1 (the portion on the right side of line B-B ′ in FIG. 3 described later) is removed in the cutting step.
  • the liquid crystal panel according to this embodiment is characterized by a connection element 10 that connects the external terminal 4 and the protective wiring 5.
  • the connection element 10 is formed by overlapping the first conductor part, the semiconductor part, and the second conductor part.
  • the connection element 10 is in a non-conductive state in the initial state.
  • the connection element 10 is irreversibly changed from a non-conduction state to a conduction state by applying a predetermined voltage (hereinafter referred to as a connection voltage) under conditions described later.
  • a connection voltage a predetermined voltage
  • FIG. 3 is a diagram showing a connection process of the liquid crystal panel according to the present embodiment.
  • FIG. 4 is an enlarged view of a part of FIG.
  • the connection element forming step the first conductor portion 11, the semiconductor portion 12, and the second conductor portion 13, for example, are formed at a plurality of locations on the active matrix substrate 1, thereby forming the connection element 10.
  • the first conductor portion 11 is formed using a conductor material in the same process as the scanning signal lines G1 to Gm (that is, film formation by W / Ta continuous sputtering, wiring process).
  • the semiconductor portion 12 is formed using a material mainly composed of silicon oxide in the same process as the gate oxide film of the TFT 6.
  • the second conductor portion 13 has the same process as the data signal lines S1 to Sn (that is, a film forming and wiring process by continuous sputtering of Ti / Al / TiN) and the same process as the pixel electrode 7 (that is, an alternating current of ITO). Film formation by sputtering, wiring process).
  • the first conductor portion 11 is connected to the protective wiring 5 (not shown) via the wiring 15, and the second conductor portion 13 is connected to the external terminal 4 via the wiring 14. Since the semiconductor part 12 having an insulating layer is interposed between the first conductor part 11 and the second conductor part 13, the connection element 10 is in a non-conductive state before the connection process.
  • a power supply circuit 21 that outputs a connection voltage is used.
  • Voltage supply needles 22 and 23 are connected to the power supply circuit 21.
  • One needle 23 is applied to the protective wiring 5 (or the wiring 15 connected to the protective wiring 5).
  • the other needle 22 is pressed against the second conductor portion 13 in the uppermost layer of the connection element 10.
  • the power supply circuit 21 applies a connection voltage to the connection element 10 in a compressed and distorted state. Thereby, the semiconductor part 12 is destroyed and the connection element 10 is irreversibly changed from the non-conductive state to the conductive state.
  • connection step the voltage application needle 22 is pressed against the second conductor 13 and the connection element 10 is compressed and distorted so that the connection is made between the first conductor 11 and the second conductor 13.
  • the connection element 10 is irreversibly changed from the non-conductive state to the conductive state.
  • FIG. 5A is a diagram showing a state of the active matrix substrate 1 before the connection process.
  • FIG. 5B is a diagram illustrating a state of the active matrix substrate 1 after the connection process.
  • the connection element 10 Prior to the connection step (FIG. 5A), since the connection element 10 is in a non-conductive state, the external terminals 4 are electrically disconnected from each other by a high resistance. Therefore, by applying an inspection voltage to the second conductor portion 13 of the connection element 10, an independent signal is input to the external terminal 4 to perform an electrical inspection of the active matrix substrate 1 even when the protective wiring 5 is provided. be able to.
  • an inspection voltage may be applied to the external terminal 4 or the wiring 14.
  • connection step since the connection element 10 is in a conductive state, all the external terminals 4 are commonly connected to the protective wiring 5. Therefore, even when charging occurs in the active matrix substrate 1, the electric charge is dispersed to the plurality of external terminals 4, so that a large potential difference does not occur between the external terminals 4. Therefore, after the connecting step, electrostatic breakdown of the active matrix substrate 1 can be prevented.
  • FIG. 6 is a diagram showing a manufacturing process of the liquid crystal panel according to the present embodiment.
  • the scanning signal lines G1 to Gm, the gate electrode of the TFT 6, and the like are formed on the active matrix substrate 1.
  • the pixel electrode 7 and the like are formed using an ITO film.
  • the connection element 10 is formed in the TFT formation step S1 and the pixel formation step S2.
  • a plurality of non-conductive connection elements 10 are formed on the active matrix substrate 1 when the pixel formation step S2 is completed.
  • an electrical inspection of the active matrix substrate 1 is first performed, and then a process for making the connection element 10 conductive is performed.
  • a needle is applied to the second conductor portion 13 and an inspection voltage is applied to the second conductor portion 13.
  • the connection element 10 is made conductive, the needle used for applying the inspection voltage is used as the voltage application needle 22.
  • a process of bonding the active matrix substrate 1 and the counter substrate 101 is performed.
  • the liquid crystal process S5 a process of filling and sealing the liquid crystal substance 102 between the active matrix substrate 1 and the counter substrate 101 is performed.
  • the cutting step S6 a process of cutting the mother substrate and dividing it into a plurality of liquid crystal panels 100 is performed.
  • the mounting step S7 a process of attaching a polarizing plate (not shown) to the liquid crystal panel 100 is performed.
  • FIG. 7 is a diagram showing another manufacturing process of the liquid crystal panel according to the present embodiment.
  • an inspection / correction / connection process S13 is performed instead of the inspection / connection process S3.
  • the inspection / correction / connection process S13 after the electrical inspection of the active matrix substrate 1, a process of correcting the active matrix substrate 1 is performed, and after checking the success / failure of the correction, the connection element 10 is made conductive. Processing is performed. Thereby, the yield of the liquid crystal panel 100 can be improved.
  • FIG. 8A and 8B are diagrams showing a manufacturing process of a conventional liquid crystal panel.
  • the active matrix substrate cannot be electrically inspected after the pixel electrode is formed. Therefore, whether the pixel electrode is formed after the electrical inspection of the active matrix substrate (FIG. 8A), or whether the external terminal and the protective wiring are connected by forming a film and wiring for connection after the pixel inspection ( 8B).
  • the former method has a problem that defects generated in the pixel formation process cannot be detected and corrected, and the latter method has a new process (connection wiring formation process in FIG. 8B) for connecting the external terminal and the protective wiring. ) Need to be added.
  • connection element 10 can be formed by a normal manufacturing process of the active matrix substrate 1. Therefore, according to the manufacturing process of the liquid crystal panel according to the present embodiment, it is possible to connect the external terminal and the protective wiring without adding a new process, and to detect and correct a defect generated in the pixel forming process. .
  • connection step the voltage application needle 22 is pressed against the second conductor portion 13 to compress and distort the connection element 10 between the first conductor portion 11 and the second conductor portion 13. Apply connection voltage to.
  • EPROM Electrically Programmable Read Only Memory
  • the operating voltage of an FPGA Field Programmable Gate Array: Field Programmable Gate Array
  • FPGA Field Programmable Gate Array
  • FIG. 9 is a diagram showing the relationship between the gate oxide film thickness and the gate breakdown voltage. As shown in FIG. 9, for example, in order to achieve a breakdown voltage of 20 V or more with only the gate oxide film, the gate oxide film thickness needs to be 30 nm or more.
  • the semiconductor part 12 of the connection element 10 is formed in the same process as the gate oxide film of the TFT 6, the thickness of the semiconductor part 12 is the same as the gate oxide film thickness of the TFT 6. For this reason, when the connection voltage is applied to the connection element 10 without being pressed by the voltage application needle 22, after the breakdown voltage is exceeded, the connection element 10 is subjected to intense Joule heat irregularly. There is a danger that a high-density current that is generated suddenly flows and the connecting element 10 is burnt.
  • connection step according to the present embodiment the first conductor portion 11 and the second conductor portion 13 are pressed in a state where the voltage application needle 22 is pressed against the second conductor portion 13 to compress and distort the connection element 10.
  • a connection voltage is applied between the two.
  • the current locally flows in a portion of the connection element 10 pressed by the voltage application needle 22. Therefore, compared with the case where the needle 22 for applying voltage is not pressed, energization starts from a low voltage state and the energization region can be controlled, so that the current flowing through the entire connection element 10 becomes gentler.
  • connection element 10 the heat generated locally in the connection element 10 is smoothly dissipated to the peripheral region, and the wiring is not easily cut by scorching due to sudden overheating. Therefore, by applying a connection voltage to the connection element 10 in a compressed and distorted state, current and heat generated when the connection element 10 is conducted can be smoothed.
  • the manufacturing method of the liquid crystal panel according to the present embodiment includes the first conductor portion 11 connected to the protective wiring 5, the semiconductor portion 12, and each external part at a plurality of locations on the active matrix substrate 1.
  • a step of forming a plurality of connection elements 10 and a voltage application to one conductor portion (second conductor portion 13) of the connection element 10 are performed.
  • the connecting element 10 is made conductive from the non-conductive state.
  • a connection step for irreversibly changing the state Prior to the connection step, the active matrix substrate 1 is inspected by applying an inspection voltage to the second conductor portion 13.
  • the plurality of external terminals 4 can be commonly connected to the protective wiring 5, and electrostatic breakdown of the liquid crystal panel 100 can be prevented. Further, since the external terminals 4 are electrically separated from each other by a high resistance before the connection process, the active matrix substrate 1 is inspected by inputting an independent signal to the external terminals 4 even when the protective wiring 5 is provided. be able to.
  • the connection element 10 can be formed by a normal manufacturing process of the active matrix substrate 1. In addition, by applying a connection voltage to the connection element 10 in a compressed and distorted state, current and heat generated when the connection element 10 is conducted can be smoothed.
  • connection step the inspection matrix used when applying the inspection voltage is used as the voltage application needle 22, so that the active matrix substrate 1 remains in a state where the needle is applied to the second conductor portion 13. Subsequent to the inspection, a process for making the connection element 10 conductive can be performed. Further, the yield of the liquid crystal panel 100 can be improved by correcting the active matrix substrate 1 based on the inspection result before the connection step.
  • FIG. 10 is a diagram showing a connection process of the liquid crystal panel according to the second embodiment of the present invention.
  • the plurality of connection elements 10 are sequentially conducted using the power supply circuit 21, the plurality of switches 24, and the plurality of current sensors (not shown).
  • the switch 24 and the current sensor are provided in series on the path of the current flowing through the connection element 10.
  • the current sensor detects a current flowing through the connection element 10.
  • connection elements 10a to 10d are conducted in the connection process.
  • the switches provided on the path of the current flowing through the connection elements 10a to 10d are referred to as switches 24a to 24d. Further, in order to facilitate understanding of the drawings, in FIG. 10 and FIG.
  • FIG. 11 is a diagram illustrating changes in voltages Va to Vd applied to the connection elements 10a to 10d and currents Ia to Id flowing through the connection elements 10a to 10d.
  • the switch 24a switch corresponding to the connection element 10a
  • the power supply circuit 21 increases the voltage Va (voltage applied to the connection element 10a) at a predetermined speed.
  • the power supply circuit 21 slows the rate of increase of the voltage Va.
  • the second threshold value Ith2 Ith2> Ith1
  • the connection element 10a is stably in a conductive state. Therefore, the power supply circuit 21 controls the voltage Va to zero, and the switch 24a is turned off. Note that, after the current Ia exceeds the first threshold value Ith1, the power supply circuit 21 may keep the voltage Va constant.
  • the power supply circuit 21 controls the voltage Vb applied to the connection element 10b by the same method. Furthermore, the power supply circuit 21 controls the voltage Vc applied to the connection element 10c and the voltage Vd applied to the connection element 10d by the same method. As described above, in the connection process according to the present embodiment, when the current flowing through the connection element 10 exceeds the threshold, the connection element 10 to which the connection voltage is applied is switched using the power supply circuit 21 and the switches 24a to 24d.
  • an electrical inspection of the active matrix substrate 1 is performed by applying an inspection voltage to the second conductor portion 13 before the connection step.
  • the needle used when applying the inspection voltage may be used as the voltage application needle 22.
  • a process for correcting the active matrix substrate 1 may be performed before the connection step.
  • connection voltage is sequentially applied to the plurality of connection elements 10 in the connection step, whereby each external terminal 4 and the protective wiring 5 Can be securely connected. Further, in the connection process, when the current flowing through the connection element 10 exceeds the threshold value, the connection element 10 to which the connection voltage is applied is switched, so that an excessive current does not flow through each external terminal 4 and the protective wiring 5. It can be securely connected.
  • FIG. 12 is a diagram showing a connection process of the liquid crystal panel according to the third embodiment of the present invention.
  • the plurality of connection elements 10 are conducted in parallel using the power supply circuit 21 and the plurality of thermistors 25.
  • the thermistor 25 is a kind of temperature sensitive element, and is provided on a path of current flowing through the connection element 10.
  • a PTC (Positive Temperature Coefficient) thermistor having a positive temperature characteristic (a characteristic in which a resistance value increases as the temperature increases) is used.
  • FIG. 13 is a characteristic diagram showing several examples of characteristics indicating resistance change with temperature of the PTC thermistor.
  • the horizontal axis indicates the temperature
  • the vertical axis indicates the resistance ratio with a resistance value of 1 at 25 ° C. as a logarithmic value.
  • the resistance value of the PTC thermistor increases rapidly when the temperature rises to some extent. For example, when the temperature changes from 25 ° C. to 100 ° C., the resistance of the PTC thermistor becomes 1000 times or more.
  • the PTC thermistor is used as a switch for preventing overheating.
  • the thermistor 25 when a large current flows through the previously connected connection element 10, the temperature of the corresponding thermistor 25 rises due to Joule heat. When the temperature of the thermistor 25 increases to some extent, the resistance of the thermistor 25 increases rapidly. Thereby, the electric current which flows into the connection element 10 which conduct
  • connection elements 10a to 10d are conducted in the connection process.
  • the thermistors provided on the path of the current flowing through the connection elements 10a to 10d are referred to as thermistors 25a to 25d.
  • FIG. 14 is a diagram illustrating changes in voltages Va and Vb applied to the connection elements 10a and 10b and currents Ia and Ib flowing through the connection elements 10a and 10b.
  • the connection element 10a is first conducted among the four connection elements 10a to 10d.
  • the connection element 10a becomes conductive at time t1
  • a large current flows through the connection element 10a.
  • the voltage Vb voltage applied to the connection element 10b decreases.
  • FIG. 15 is an equivalent circuit diagram when the connection elements 10a to 10d are conducted in parallel.
  • Ra to Rd indicate the resistances of the connection elements 10a to 10d
  • Za to Zd indicate the resistances of the thermistors 25a to 25d.
  • the thermistor temperature is low, Ra >> Za, Rb >> Zb, Rc >> Zc, Rd >> Zd, and the circuit resistance is ⁇ (Ra) ⁇ 1 + (Rb) ⁇ . 1 + (Rc) becomes -1 + (Rd) -1 ⁇ -1 .
  • the connection element 10a is first turned on, the resistance Ra decreases rapidly, and Ra ⁇ Za.
  • the circuit resistance is ⁇ (Za) ⁇ 1 + (Rb) ⁇ 1 + (Rc) ⁇ 1 + (Rd) ⁇ 1 ⁇ ⁇ 1 .
  • connection element 10a Thereafter, a large current flows through the connection element 10a and the thermistor 25a, so that most of the energy supplied from the output power supply to the entire circuit is consumed around the connection element 10a, resulting in a voltage drop due to exceeding the power supply capability.
  • the voltage applied to the connection elements 10b to 10d also decreases.
  • the resistance Za increases exponentially as the temperature of the thermistor 25a increases to some extent due to the temperature rise due to Joule heat.
  • connection element 10b when the connection element 10b is turned on, the resistance Rb rapidly decreases, and Rb ⁇ Zb.
  • the circuit resistance is ⁇ (Za) ⁇ 1 + (Zb) ⁇ 1 + (Rc) ⁇ 1 + (Rd) ⁇ 1 ⁇ ⁇ 1 .
  • a large current flows through the connection element 10b and the thermistor 25b, a voltage drop occurs in the entire circuit, and the voltage applied to the connection elements 10c and 10d also decreases.
  • the temperature of the thermistor 25b rises due to Joule heat and increases to some extent, the resistance Zb rapidly increases.
  • connection element 10b After a while after the connection element 10b becomes conductive, the voltage of the entire circuit is recovered, and the voltage applied to the connection elements 10c and 10d is also recovered. Even when the connection elements 10c and 10d are turned on, the resistance of the circuit shown in FIG. 15 changes similarly.
  • the resistance of the thermistor 25 at room temperature is about 1 k ⁇ . If the resistance at room temperature is about 1 k ⁇ , the resistance at high temperature is several M ⁇ , so that the voltage of the entire circuit can be sufficiently recovered.
  • an electrical inspection of the active matrix substrate 1 is performed by applying an inspection voltage to the second conductor portion 13 before the connection step.
  • the needle used when applying the inspection voltage may be used as the voltage application needle 22.
  • a process for correcting the active matrix substrate 1 may be performed before the connection step.
  • connection voltage is applied in parallel to the plurality of connection elements 10 in the connection step, thereby connecting the plurality of external terminals 4 to the protective wiring. 5 can be realized within a short time. Further, in the connection process, by providing the thermistor 25 having a positive temperature characteristic on the path of the current flowing through the connection element 10, conduction in one connection element 10 is a factor, and conduction in other connection elements 10 is delayed. This can be suppressed.
  • the active matrix substrate 1 includes the scanning signal line driving circuit 3.
  • the active matrix substrate of the present invention may not include the scanning signal line driving circuit, and other control circuits (for example, all or part of the data signal line driver circuit) may be provided.
  • the active matrix substrate 1 includes only one protective wiring 5, the active matrix substrate of the present invention may include two or more protective wirings.
  • the method for manufacturing a display device according to the present invention has a feature that an external terminal and a protective wiring can be connected with a small amount of wiring, and can be used, for example, for manufacturing an active matrix substrate such as a liquid crystal panel.
  • the display device of the present invention can be used for an active matrix substrate such as a liquid crystal panel, for example.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)

Abstract

Selon l'invention, une pluralité d'éléments de connexion (10) sont formés par la formation et la stratification de premières parties conductrices (11) qui sont connectées à une ligne de câblage protectrice (5), de parties semi-conductrices (12) et de secondes parties conductrices (13) qui sont connectées à des bornes externes respectives (4) dans une pluralité de positions sur un substrat de matrice active. Dans une étape de connexion, une aiguille (22) pour une application de tension est pressée contre chaque seconde partie conductrice (13), de telle sorte que chaque élément de connexion (10) est maintenu dans un état comprimé et déformé, et une tension pour la connexion est appliquée entre chaque première partie conductrice (11) et chaque seconde partie conductrice (13), de telle sorte que l'élément de connexion (10) est changé de façon irréversible d'un état électriquement déconnecté à un état électriquement connecté. Par conséquent, les bornes externes sur le substrat de matrice active et la ligne de câblage protectrice peuvent être connectées avec une faible puissance calorifique.
PCT/JP2011/073045 2010-10-13 2011-10-06 Procédé pour fabriquer un dispositif d'affichage, et dispositif d'affichage WO2012050034A1 (fr)

Applications Claiming Priority (2)

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JP2010230552 2010-10-13
JP2010-230552 2010-10-13

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629396A (ja) * 1992-03-27 1994-02-04 Internatl Business Mach Corp <Ibm> 電気的にプログラミング可能なアンチヒューズ
JPH06317810A (ja) * 1993-05-07 1994-11-15 Mitsubishi Electric Corp マトリックス配線基板
JPH11142888A (ja) * 1997-11-14 1999-05-28 Sharp Corp 液晶表示装置及びその検査方法
JP2006040916A (ja) * 2004-07-22 2006-02-09 Seiko Epson Corp 半導体装置及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629396A (ja) * 1992-03-27 1994-02-04 Internatl Business Mach Corp <Ibm> 電気的にプログラミング可能なアンチヒューズ
JPH06317810A (ja) * 1993-05-07 1994-11-15 Mitsubishi Electric Corp マトリックス配線基板
JPH11142888A (ja) * 1997-11-14 1999-05-28 Sharp Corp 液晶表示装置及びその検査方法
JP2006040916A (ja) * 2004-07-22 2006-02-09 Seiko Epson Corp 半導体装置及びその製造方法

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