WO2012043625A1 - Cellule solaire, module de cellules solaires, et procédé de fabrication de cellules solaires - Google Patents

Cellule solaire, module de cellules solaires, et procédé de fabrication de cellules solaires Download PDF

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Publication number
WO2012043625A1
WO2012043625A1 PCT/JP2011/072177 JP2011072177W WO2012043625A1 WO 2012043625 A1 WO2012043625 A1 WO 2012043625A1 JP 2011072177 W JP2011072177 W JP 2011072177W WO 2012043625 A1 WO2012043625 A1 WO 2012043625A1
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Prior art keywords
solar cell
side electrode
mark
substrate
type region
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PCT/JP2011/072177
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English (en)
Japanese (ja)
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井手　大輔
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三洋電機株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/05—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
    • H01L31/0504—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module
    • H01L31/0508—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module the interconnection means having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/05—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
    • H01L31/0504—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module
    • H01L31/0516—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module specially adapted for interconnection of back-contact solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a solar cell, a solar cell module including the solar cell, and a method for manufacturing the solar cell.
  • Patent Document 1 proposes a so-called back junction type solar cell in which a p-type region and an n-type region are formed on the back side.
  • this back junction solar cell it is not always necessary to provide an electrode for collecting carriers on the light receiving surface. For this reason, in the back junction solar cell, the light receiving efficiency can be improved. Therefore, more improved conversion efficiency can be realized.
  • the solar cell according to one embodiment of the present invention includes a solar cell substrate, a p-side electrode, and an n-side electrode.
  • the p-side electrode is provided on the p-type region.
  • the n-side electrode is provided on the n-type region.
  • Each of the p-side electrode and the n-side electrode has a plating film.
  • the plating film includes at least one feeding point portion. The mark is provided in the part located under the at least 1 electric power feeding point part of a solar cell board
  • the solar cell module includes a plurality of solar cells and a wiring material.
  • the solar cell has a solar cell substrate, a p-side electrode, and an n-side electrode.
  • the p-side electrode is provided on the p-type region.
  • the n-side electrode is provided on the n-type region.
  • the wiring member electrically connects the p-side electrode of one of the adjacent solar cells and the n-side electrode of the other solar cell.
  • each of the p-side electrode and the n-side electrode has a plating film.
  • the plating film includes at least one feeding point portion. The mark is provided in the part located under the at least 1 electric power feeding point part of a solar cell board
  • a method for manufacturing a solar cell according to one embodiment of the present invention includes a p-side electrode provided on a p-type region and an n-side electrode provided on the n-type region, Each of the n-side electrodes relates to a method for manufacturing a solar cell having a plating film and having a mark on one main surface of the solar cell substrate.
  • at least one of the p-side electrode and the n-side electrode is formed in a state where the feeding probe is pressed against the position of the mark on the solar cell substrate.
  • a solar cell with improved photoelectric conversion efficiency can be provided.
  • FIG. 1 is a schematic cross-sectional view of a solar cell module according to a first embodiment. It is a schematic plan view of the solar cell in the first embodiment. It is a schematic plan view showing a part of the solar cell string in the first embodiment.
  • FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 2.
  • FIG. 5 is a schematic cross-sectional view taken along line VV in FIG. 2.
  • FIG. 1 is a schematic cross-sectional view of a solar cell described in Patent Document 1.
  • the solar cell module 1 includes a solar cell string 9.
  • the solar cell string 9 includes a plurality of solar cells 10 arranged along one direction x.
  • the plurality of solar cells 10 are electrically connected by the wiring material 11.
  • a plurality of solar cells 10 are electrically connected in series or in parallel by electrically connecting adjacent solar cells 10 by the wiring material 11.
  • First and second protection members 34 and 35 are disposed on the back surface side and the light receiving surface side of the plurality of solar cells 10.
  • a sealing layer 33 is provided between the first protection member 34 and the second protection member 35. The plurality of solar cells 10 are sealed in the sealing layer 33.
  • the material of the sealing layer 33 and the first and second protective members 34 and 35 is not particularly limited.
  • the sealing layer 33 can be formed of, for example, a resin such as ethylene / vinyl acetate copolymer (EVA) or polyvinyl butyral (PVB).
  • EVA ethylene / vinyl acetate copolymer
  • PVB polyvinyl butyral
  • the first and second protective members 34 and 35 can be formed of a translucent member such as glass or resin. Moreover, since the 1st protection member 34 arrange
  • the solar cell 10 includes a solar cell substrate 8.
  • the solar cell substrate 8 includes a semiconductor substrate 7, an n-type region disposed in the first region on the surface of the semiconductor substrate 7, and a p-type region disposed in the second region.
  • the n-type region and the p-type region include an n-type amorphous semiconductor layer 6 n and a p-type amorphous semiconductor layer 6 p disposed on the back surface 7 a of the semiconductor substrate 7.
  • the semiconductor substrate 7 has a back surface 7a and a light receiving surface 7b.
  • the semiconductor substrate 7 generates carriers by receiving light at the light receiving surface 7b.
  • the carriers are holes and electrons generated when light is absorbed by the semiconductor substrate 7.
  • the semiconductor substrate 7 is composed of a substrate made of a semiconductor material having n-type or p-type conductivity. Specific examples of the semiconductor material include crystalline silicon such as single crystal silicon and polycrystalline silicon.
  • crystalline silicon such as single crystal silicon and polycrystalline silicon.
  • the n-type amorphous semiconductor layer 6 n constitutes the n-type region of the solar cell substrate 8.
  • the p-type amorphous semiconductor layer 6 p constitutes a p-type region of the solar cell substrate 8.
  • the n-type amorphous semiconductor layer 6n is disposed on the first region of the back surface 7a of the semiconductor substrate 7, and the p-type amorphous semiconductor layer 6p is disposed on the second region of the back surface 7a.
  • each of the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p has a comb-like shape.
  • the back surface 8a of the solar cell substrate 8 is constituted by the surface of the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p and the exposed portion of the back surface 7a. For this reason, the back surface 8a of the solar cell substrate 8 includes the surface of the n-type amorphous semiconductor layer 6n constituting the n-type region and the p-type amorphous semiconductor layer 6p constituting the p-type region. Each surface is exposed.
  • the light receiving surface 8 b of the solar cell substrate 8 is constituted by the light receiving surface 7 b of the semiconductor substrate 7.
  • the light receiving surface 8b has a texture structure.
  • the “texture structure” refers to a concavo-convex structure provided in order to suppress surface reflection and increase the amount of light absorption of the solar cell substrate.
  • the texture structure can be formed using, for example, anisotropic etching of Si with alkali. In this case, a quadrangular pyramid texture structure is formed.
  • the texture structure can also be formed by isotropic etching of Si with acid. In that case, texture structures of various shapes including craters are formed.
  • the light receiving surface 8b of the solar cell substrate 8 can also be constituted by a light receiving surface of a passivation layer or an antireflection layer formed on substantially the entire surface of the light receiving surface 7b of the semiconductor substrate 7.
  • a semiconductor layer or a protective layer may be provided on the light receiving surface 7 b of the semiconductor substrate 7.
  • an i-type amorphous semiconductor layer having a thickness that does not substantially contribute to power generation, an amorphous semiconductor layer having the same conductivity type as that of the semiconductor substrate 7, and a function as a reflection suppressing film are combined.
  • the protective layers may be laminated in this order. In that case, the light receiving surface 8b of the solar cell substrate 8 is constituted by the surface of the protective layer.
  • the n-type amorphous semiconductor layer 6n is composed of n-type amorphous silicon containing hydrogen.
  • the p-type amorphous semiconductor layer 6p is also made of p-type amorphous silicon containing hydrogen.
  • the thicknesses of the p-type and n-type amorphous semiconductor layers 6p and 6n are not particularly limited, but can be, for example, about 20 to 500 mm.
  • an i-type amorphous semiconductor layer may be interposed between the semiconductor substrate 7 and the n-type amorphous semiconductor layer 6n and between the semiconductor substrate 7 and the p-type amorphous semiconductor layer 6p.
  • the i-type amorphous semiconductor layer is preferably composed of an i-type amorphous silicon layer containing hydrogen.
  • the thickness of the i-type amorphous silicon layer is preferably a thickness that does not substantially contribute to power generation, for example, about several to 250 inches.
  • a p-side electrode 17p is disposed on the p-type amorphous semiconductor layer 6p constituting the p-type region.
  • an n-side electrode 17n is disposed on the n-type amorphous semiconductor layer 6n constituting the n-type region.
  • Each of the p-side electrode 17p and the n-side electrode 17n is arranged at a predetermined interval so as not to be electrically short-circuited.
  • Each of the p-side electrode 17p and the n-side electrode 17n has, for example, a comb-like pattern corresponding to the shape of the p-type amorphous semiconductor layer 6p and the n-type amorphous semiconductor layer 6n.
  • the p-side electrode 17p has a p-side bus bar portion 17p1 and a plurality of p-side finger portions 17p2.
  • the p bus bar portion 17p1 is provided so as to extend in the y direction orthogonal to the x direction at one edge of the semiconductor substrate 7 in the x direction.
  • the plurality of p-side finger portions 17p2 extend along the x direction from the p-side bus bar portion 17p1 toward the other side in the x direction.
  • the n-side electrode 17n has an n-side bus bar portion 17n1 and a plurality of n-side finger portions 17n2.
  • the n-side bus bar portion 17n1 is provided so as to extend in the y direction at the other edge portion of the semiconductor substrate 7 in the x direction.
  • the plurality of n-side finger portions 17n2 extend along the x direction from the bus bar portion 17n1 toward one side in the x direction.
  • the plurality of n-side finger portions 17n2 and the plurality of p-side finger portions 17p2 are alternately arranged in the y direction.
  • the n-side electrode 17n serves as an electrode that collects electrons that are majority carriers, and the p-side electrode 17p collects holes that are minority carriers. Electrode.
  • Each of the n-side electrode 17n and the p-side electrode 17p includes a plating layer at least partially.
  • the surface layer of each of the n-side electrode 17n and the p-side electrode 17p is composed of a plating layer. More specifically, as shown in FIG. 4, the n-side electrode 17n is configured by a laminate of a conductive layer 17b and a plating layer 17c on the conductive layer 17b. Similarly, the p-side electrode 17p is also composed of a laminate of a conductive layer 17b and a plating layer 17c on the conductive layer 17b.
  • each of the n-side electrode 17n and the p-side electrode 17b includes a metal oxide layer 17a on the base of the conductive layer 17b. Also good.
  • the metal oxide layer 17a can be made of, for example, a metal oxide such as indium oxide or zinc oxide.
  • the thickness of the metal oxide layer film 17a can be, for example, about 20 nm to 200 nm.
  • the conductive layer 17b is used as a base layer when forming the plating layer 17c. Therefore, the conductive layer 17b is formed by a method other than plating, such as a sputtering method or a vapor deposition method. The conductive layer 17b also has a function of improving the adhesion between the metal oxide layer 17a and the plating layer 17c.
  • the conductive layer 17b can be formed of, for example, a metal such as Cu, Sn, Ag, Au, Pt, Pd, Al, Ti, or Ni, or an alloy containing one or more of these metals.
  • the conductive layer 17b may be configured by a stacked body of a plurality of conductive layers. The thickness of the conductive layer 17b can be about 50 nm to 500 nm, for example.
  • the plating layer 17c can be formed of, for example, a metal such as Cu or Sn, or an alloy containing one or more of these metals.
  • the plating layer 17c may be configured by a stacked body of a plurality of plating layers.
  • the thickness of the plating layer 17c can be, for example, about 2 ⁇ m to 50 ⁇ m.
  • the plating layer 17c is formed by electrolytic plating.
  • each of the p-side electrode 17p and the n-side electrode 17n has at least one feeding point portion.
  • each of the p-side electrode 17p and the n-side electrode 17n includes a plurality of feeding point portions 12.
  • the feeding point portions 12 of the p-side electrode 17p and the n-side electrode 17n are arranged at equal intervals.
  • the feeding point portion 12 is a point where the feeding probe is pressed when the plating layer 17c is formed. For this reason, as shown in FIG.
  • the feeding point portion 12 surrounds the central portion 12 a thinner than the portion other than the feeding point portion 12 of the plating layer 17 c and the central portion 12 a outside the central portion 12 a. It has a projection 12b that is positioned and is thicker than the portion other than the feeding point portion 12.
  • the shape of the central portion 12a is a shape corresponding to the shape of the tip portion of the power feeding probe.
  • the central portion 12a is circular, but the shape of the central portion 12a is not particularly limited.
  • the central portion 12a may be rectangular, triangular, or polygonal.
  • the thickness of the central portion 12a and the maximum thickness of the protruding portion 12b are 0 to 0.5 times and 1.1 to 10 times the average of the portion other than the feeding point portion 12 of the plating layer 17c. It is preferably 0 times to 0.1 times, more preferably 1.1 times to 5 times.
  • the ratio of the maximum thickness of the protruding portion 12b to the thickness of the central portion 12a is preferably 2.2 times or more, 2.2 times or more, and 11 times or more. 11 times or more is more preferable.
  • the number of power feeding point portions 12 provided in each of the n-side electrode 17n and the p-side electrode 17p is not particularly limited.
  • One feeding point portion 12 may be provided for each of the n-side electrode 17n and the p-side electrode 17p, or a plurality of feeding point portions 12 may be provided.
  • a plurality of feeding point portions 12 are provided on each of the n-side electrode 17n and the p-side electrode 17p will be described.
  • the solar cell 10 includes a mark 13 in a portion located below the feeding point portion 12 on the back surface 8 a of the solar cell substrate 8.
  • the mark 13 is provided in a region including a portion located below the feeding point portion 12 on the back surface 7 a of the semiconductor substrate 7 constituting a part of the solar cell substrate 8. It has been. More specifically, in a region including a portion located under the central portion 12a of the feeding point portion 12 provided in the bus bar portion 17n1 of the n-side electrode 17n that is an electrode on the majority-carrier collecting side of the back surface 7a. Is provided.
  • the mark 13 is simply drawn as a rectangle, but the actual shape of the mark 13 is not necessarily a rectangle.
  • the shape of the mark 13 can be a shape that functions as an alignment mark, a product information mark, or the like.
  • the mark 13 can be constituted by a plurality of straight lines intersecting each other.
  • the mark 13 can be composed of a figure such as a barcode or QR code (registered trademark) or a plurality of character strings.
  • a plurality of marks may be provided.
  • a plurality of alignment marks may be provided, or a plurality of types of marks may be provided.
  • the mark 13 is constituted by a recess formed by processing the semiconductor substrate 7 by laser beam irradiation, etching, or mechanical processing.
  • the mark may not be a recess.
  • the mark may be formed by forming another layer on the back surface of the semiconductor substrate.
  • the p-side electrode 17 p of one of the adjacent solar cells 10 and the n-side electrode 17 n of the other solar cell 10 are electrically connected by the wiring material 11.
  • the wiring member 11 and the solar cell 10 are joined by solder, whereby the wiring member 11 and the p-side electrode 17p or the n-side electrode 17n are electrically connected.
  • the wiring material 11 and the solar cell 10 may be joined using a resin adhesive such as an anisotropic conductive resin adhesive, or the wiring material 11 and the solar cell 10 may be bonded by a method that does not use an adhesive such as welding. And may be joined.
  • the wiring member 11 includes a wiring member body 11a and a plurality of first and second joint portions 11b and 11c.
  • the wiring material main body 11a extends along the y direction between the adjacent solar cells 10.
  • Each of the plurality of first and second joint portions 11b and 11c is electrically connected to the wiring material body 11a.
  • Each of the plurality of first and second joint portions 11b and 11c extends from the wiring material body 11a to the x1 side or the x2 side in the x direction.
  • the plurality of first joint portions 11b are electrically connected to the n-side electrode 17n by being joined to the bus bar portion 17n1 of the n-side electrode 17n by solder.
  • the plurality of second joint portions 11c are electrically connected to the p-side electrode 17p by being joined to the bus bar portion 17p1 of the p-side electrode 17p by solder.
  • Each of the 1st and 2nd junction parts 11b and 11c is discretely joined and electrically connected to parts other than the feeding point part 12 of the n-side electrode 17n or the p-side electrode 17p. That is, the wiring material 11 is not located on the mark 13.
  • the wiring material 11 is not particularly limited as long as it is a conductive member.
  • the wiring member 11 can be formed of, for example, a metal selected from the group consisting of Cu, Ni, and Sn, an alloy containing one or more metals selected from the group consisting of Cu, Ni, and Sn. Further, the shape of the wiring member 11 may be another shape such as a straight line shape.
  • the mark 13 is formed on the back surface 7 a of the semiconductor substrate 7.
  • the method for forming the mark 13 is not particularly limited.
  • the mark 13 can be formed, for example, by performing removal processing on the back surface 7a using laser irradiation, etching, mechanical processing, or the like.
  • the texture structure is formed on the light receiving surface 7 b of the semiconductor substrate 7.
  • the texture structure can be formed by, for example, anisotropic etching using an alkaline solution, isotropic etching using an acid solution, or plasma etching.
  • the mark 13 In order to suppress the disappearance of the mark 13 when the texture structure is formed on the light receiving surface 7b, it is preferable to coat the mark 13 in advance with a coating layer having resistance to the etching agent used for the texture. Alternatively, it is preferable to form the mark 13 at such a depth that it remains even when the back surface 7a is etched.
  • the n-type amorphous semiconductor layer 6n is formed on the first region of the back surface 7a of the semiconductor substrate 7, and the p-type amorphous semiconductor layer 6p is formed on the second region.
  • the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p can be formed by, for example, a CVD (Chemical Vapor Deposition) method.
  • the mark 13 is an alignment mark
  • the mark 13 is detected using a detection unit such as an imaging device, Based on the detection position, an n-type amorphous semiconductor layer 6n and a p-type amorphous semiconductor layer 6p are formed. Therefore, the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p can be formed with high positional accuracy. Therefore, the interval between the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p can be reduced. Therefore, the solar cell 10 with higher photoelectric conversion efficiency can be manufactured.
  • n-side electrode 17n and a p-side electrode 17p are formed.
  • the n-side electrode 17n and the p-side electrode 17p can be formed by, for example, a thin film forming method such as a vacuum deposition method or a sputtering method, a method using a conductive paste, a plating method, or the like.
  • the step of forming the n-side electrode 17n and the p-side electrode 17p is the same as the step of forming the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p.
  • the mark 13 is detected using a detection means such as an imaging device, and the n-side electrode 17n and the p-side electrode 17p are formed based on the detection position. For this reason, the n-side electrode 17n and the p-side electrode 17p can be formed with high positional accuracy. Therefore, the solar cell 10 with higher photoelectric conversion efficiency can be manufactured.
  • the metal oxide layer 17a and the conductive film 17b are formed by a thin film forming method such as a sputtering method or a vacuum evaporation method. can do.
  • the plating layer 17 c is immersed in a plating bath in a state where the power supply probes 22 and 23 are pressed against the surface of the conductive layer 17 b, and power is supplied from the power supply probes 22 and 23 to perform electrolytic plating.
  • the plating layer 17c is formed.
  • the plating layer 17c In the step of forming the plating layer 17c, the plating layer is not formed thick in the portion where the power feeding probes 22 and 23 are pressed, and the thickness of the plating layer is around the area where the power feeding probes 22 and 23 are pressed. Becomes thicker. As a result, as shown in FIG. 5, the feeding point portion 12 having the thin central portion 12a and the thick protruding portion 12b is formed.
  • At least one of the plurality of power supply probes 22 and 23 is pressed against a position including a portion where the mark 13 is formed. For this reason, the center part 12a of the feeding point part 12 is located on the part where the mark 13 is formed.
  • the solar cell string 9 is produced.
  • a resin sheet such as an EVA sheet is placed on the second protective member 35.
  • a plurality of solar cell strings 9 that are electrically connected to each other are disposed on the resin sheet.
  • a resin sheet such as an EVA sheet is placed thereon, and a first protective member 34 is placed thereon.
  • the solar cell module 1 can be manufactured by laminating these by thermocompression bonding in a reduced-pressure atmosphere.
  • the mark 13 is arranged under the n-side electrode 17n. For this reason, the ratio for which the area
  • the mark 13 is arranged so as to include a portion located below the central portion 12a of the feeding point portion 12 on the back surface 8a of the solar cell substrate 8.
  • the thickness of the central portion 12a is thin. For this reason, even when the depth of the mark 13 is shallow, the mark 13 can be viewed from above the n-side electrode 17n. That is, in the present embodiment, the mark 13 can be made shallow while maintaining the visibility of the mark 13. Therefore, structural defects are unlikely to occur in the solar cell substrate 8 by forming the mark 13 on the solar cell substrate 8. Therefore, the photoelectric conversion efficiency of the solar cell 10 and eventually the solar cell module 1 can be increased.
  • the wiring member 11 is electrically connected to a portion other than the feeding point portion 12 of the n-side electrode 17n and the p-side electrode 17p. For this reason, the wiring material 11 having light shielding properties is not positioned on the mark 13. Therefore, good visibility of the mark 13 is realized. A part of the wiring material 11 having translucency may be positioned on the mark 13.
  • the mark 13 is arranged below the feed point portion 12 of the n-side electrode 17n that collects majority carriers in the solar cell substrate 8. For this reason, the formation of the mark 13 is unlikely to reduce the collection efficiency of minority carriers that greatly affects the photoelectric conversion efficiency of the solar cell 10. Therefore, recombination of minority carriers can be effectively suppressed, and thus a decrease in photoelectric conversion efficiency due to the formation of the mark 13 can be effectively suppressed. As a result, the photoelectric conversion efficiency of the solar cell 10 and eventually the solar cell module 1 can be further increased.
  • the mark 13 is arranged under the bus bar portion 17n1. For this reason, the fall of the photoelectric conversion efficiency by formation of the mark 13 can be suppressed compared with the case where the mark 13 is formed under the finger electrode part 17n2. As a result, the photoelectric conversion efficiency of the solar cell 10 and eventually the solar cell module 1 can be further increased.
  • the mark 13 is formed prior to the texture structure and the formation of the n-type amorphous semiconductor layer 6n and the p-type amorphous semiconductor layer 6p. For this reason, by detecting the mark 13, the back surface 7a and the light receiving surface 7b of the semiconductor substrate 7 can be easily identified. Further, the position of the semiconductor substrate 7 can be detected by detecting the mark 13. Therefore, the solar cell 10 can be easily manufactured.
  • the depth of the mark 13 provided on the semiconductor substrate 7 is made larger than the total thickness of each layer formed on the mark 13. It is preferable. By doing in this way, the mark 13 can be easily visually recognized even after each layer is formed.
  • FIG. 8 is a schematic cross-sectional view of a solar cell according to the second embodiment.
  • the solar cell substrate 8 includes the semiconductor substrate 7, the n-type amorphous semiconductor layer 6n, and the p-type amorphous semiconductor layer 6p has been described.
  • the present invention is not limited to this configuration.
  • a p-type dopant diffusion region 10ap in which a p-type dopant is diffused and an n-type dopant diffusion region 10an in which an n-type dopant is diffused are exposed on the back surface 7a.
  • the solar cell substrate may be constituted by the semiconductor substrate 7 formed and having the mark 13 formed on the back surface 7a.
  • the mark 13 it is preferable to form the mark 13 before forming the p-type dopant diffusion region 10ap and the n-type dopant diffusion region 10an. By doing so, the mark 13 can be used to identify the front and back of the semiconductor substrate 7 and the position. Therefore, manufacture of a solar cell becomes easy.

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  • Photovoltaic Devices (AREA)

Abstract

La présente invention concerne une cellule solaire à jonction arrière présentant une efficacité de conversion photoélectrique élevée. Une cellule solaire (10) comporte un substrat de cellule solaire (8), une électrode du côté p (17p), et une électrode du côté n (17n). L'électrode du côté p (17p) est disposée en haut d'une zone de type p. L'électrode du côté n (17n) est disposée en haut d'une zone de type n. L'électrode du côté p (17p) et l'électrode du côté n (17n) comprennent chacune une pellicule de placage (17c) contenant au moins un point d'alimentation en énergie (12). Au minimum, une marque (13) est disposée dans une zone du substrat de cellule solaire (8) située sous un point d'alimentation en énergie (12).
PCT/JP2011/072177 2010-09-28 2011-09-28 Cellule solaire, module de cellules solaires, et procédé de fabrication de cellules solaires WO2012043625A1 (fr)

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JP2010216354A JP2012074426A (ja) 2010-09-28 2010-09-28 太陽電池、太陽電池モジュール及び太陽電池の製造方法
JP2010-216354 2010-09-28

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WO2012117765A1 (fr) * 2011-02-28 2012-09-07 三洋電機株式会社 Module de cellules solaires
KR20140098304A (ko) * 2013-01-30 2014-08-08 엘지전자 주식회사 태양 전지 모듈
WO2020109696A1 (fr) * 2018-11-29 2020-06-04 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule solaire photovoltaique presentant des fonctions de stockage d'information et d'affichage
FR3089349A1 (fr) * 2018-11-29 2020-06-05 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule solaire photovoltaique presentant des fonctions de stockage d’information et d’affichage

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CN114242810B (zh) * 2022-02-24 2022-04-29 广东爱旭科技有限公司 背接触电池的电极结构、电池、组件以及电池系统

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WO2008090718A1 (fr) * 2007-01-25 2008-07-31 Sharp Kabushiki Kaisha Cellule de batterie solaire, réseau de batteries solaires, module de batterie solaire et procédé de fabrication d'un réseau de batteries solaires
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WO2012117765A1 (fr) * 2011-02-28 2012-09-07 三洋電機株式会社 Module de cellules solaires
KR20140098304A (ko) * 2013-01-30 2014-08-08 엘지전자 주식회사 태양 전지 모듈
KR102000063B1 (ko) * 2013-01-30 2019-09-27 엘지전자 주식회사 태양 전지 모듈
WO2020109696A1 (fr) * 2018-11-29 2020-06-04 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule solaire photovoltaique presentant des fonctions de stockage d'information et d'affichage
FR3089349A1 (fr) * 2018-11-29 2020-06-05 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule solaire photovoltaique presentant des fonctions de stockage d’information et d’affichage
CN113196503A (zh) * 2018-11-29 2021-07-30 原子能和替代能源委员会 具有信息存储和显示功能的光伏太阳能电池

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