WO2012036343A1 - Resonator type dielectric low pass filter and communication device including same - Google Patents

Resonator type dielectric low pass filter and communication device including same Download PDF

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Publication number
WO2012036343A1
WO2012036343A1 PCT/KR2010/008106 KR2010008106W WO2012036343A1 WO 2012036343 A1 WO2012036343 A1 WO 2012036343A1 KR 2010008106 W KR2010008106 W KR 2010008106W WO 2012036343 A1 WO2012036343 A1 WO 2012036343A1
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pattern
resonator
disposed
pass filter
low pass
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PCT/KR2010/008106
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French (fr)
Korean (ko)
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류지만
장대훈
김남철
피터스 제임스엠
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(주)파트론
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Publication of WO2012036343A1 publication Critical patent/WO2012036343A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • H01P1/201Filters for transverse electromagnetic waves
    • H01P1/203Strip line filters
    • H01P1/2039Galvanic coupling between Input/Output

Definitions

  • the present invention relates to a resonator type dielectric low pass filter and a communication element comprising the same.
  • low pass filters used in wireless communication systems are manufactured in the form of LC concentrators, micro strip lines, or LTCCs.
  • the low pass filter manufactured by the LC lumped element has a high insertion loss in the circuit and it is very difficult to implement in the high frequency region of the GHz band.
  • the low pass filter manufactured by the micro strip line is mounted on the communication device, The disadvantage is that it takes up a relatively large physical space compared to the others.
  • the low pass filter manufactured in the LTCC form has a large insertion loss in the circuit as well as a disadvantage that tuning is impossible.
  • the present invention has been made in an effort to provide a resonator type dielectric low pass filter capable of obtaining a low insertion loss and a rapid attenuation characteristic while occupying a relatively narrow space when mounted in a communication device.
  • Another technical problem to be solved by the present invention is to provide a communication device mounted with the resonator type dielectric low pass filter.
  • One aspect of the resonator type dielectric low pass filter of the present invention for achieving the above technical problem is a dielectric block having a resonance hole, a ground pattern disposed on at least one surface of the dielectric block, disposed on the dielectric block, and grounded Input and output patterns spaced apart from the ground pattern to form patterns and first and second capacitors respectively, a resonator pattern disposed in the inner wall of the resonant hole and having a cavity in the center thereof, and an input / output pattern and a resonator pattern on the dielectric block And an inductor pattern disposed to be connected to the inductor.
  • the ground terminal, the signal input terminal and the signal output terminal is formed; And a resonator type dielectric low pass filter mounted on the substrate, wherein the resonator type dielectric low pass filter comprises: a dielectric block having a resonance hole formed therein, a ground pattern disposed on at least one surface of the dielectric block and connected to a ground terminal; An input / output pattern disposed apart from the ground pattern and connected to the signal input terminal and the signal output terminal to form a ground pattern on the block and first and second capacitors, respectively, and disposed at an inner wall of the resonance hole, and having a cavity at the center thereof And a resonator pattern and an inductor pattern disposed on the dielectric block to be connected to the input / output pattern and the resonator pattern.
  • the resonator type dielectric low pass filter according to the embodiments of the present invention is formed on the dielectric block to occupy a relatively narrow space when mounted in a communication device, and the insertion loss in the circuit is low, and the abrupt attenuation characteristics are realized. This has a possible advantage.
  • FIG 1 and 2 are perspective views of the resonator type dielectric low pass filter according to the first embodiment of the present invention, respectively, as viewed from above and below.
  • FIG. 3 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a first embodiment of the present invention.
  • FIGS. 4 and 5 are perspective views of the resonator type dielectric low pass filter according to the second embodiment of the present invention as viewed from the top and bottom, respectively.
  • FIG. 6 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a second embodiment of the present invention.
  • FIG. 7 and 8 are perspective views as viewed from the top and bottom of the resonator type dielectric low pass filter according to the third embodiment of the present invention, respectively.
  • FIG. 9 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a third embodiment of the present invention.
  • 10 to 12 are diagrams for explaining the frequency response characteristics of the resonator type dielectric low pass filter in accordance with embodiments of the present invention.
  • FIG. 13 is a perspective view from above of a communication device according to an embodiment of the present invention.
  • first, second, etc. are used to describe various components, these components are of course not limited by these terms. These terms are only used to distinguish one component from another. Therefore, of course, the first component mentioned below may be a second component within the technical spirit of the present invention.
  • FIGS. 1 to 3 a resonator type dielectric low pass filter according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 3.
  • FIG. 1 and 2 are perspective views of the resonator type dielectric low pass filter according to the first embodiment of the present invention, respectively, as viewed from above and below.
  • 3 is a circuit diagram of a resonator type dielectric low pass filter according to a first embodiment of the present invention.
  • the resonator type dielectric low pass filter 100 includes a dielectric block 10, a ground pattern 30 and 31, an input / output pattern 40 and 50,
  • the first resonator patterns 61a to 61c and the first and second inductor patterns 71 and 72 may be included.
  • the dielectric block 10 may be a mono block in which a dielectric material is formed in a hexahedral shape as shown in FIGS. 1 and 2.
  • the first resonance hole 21 may be formed in the dielectric block 10.
  • the first resonator hole 21 is a hole in which a conductor is applied to an inner wall thereof to form a resonator (Re1 of FIG. 3), and may have a circular shape as shown in FIGS. 1 and 2.
  • FIGS. 1 and 2 illustrate that the hexagonal dielectric block 10 and the circular first resonance hole 21 are formed in the center of the dielectric block 10, the present invention is not limited thereto.
  • the shape of the dielectric block 10 is not limited to the shape of a hexahedron, and the shape of the first resonance hole 21 is not limited to a circle. That is, if necessary, the shape of the dielectric block 10 may be deformed differently from the drawing, and the shape of the first resonator hole 21 may be deformed differently from the drawing if the shape of the first resonator hole 21 is effective to form a resonator. Do.
  • Ground patterns 30 and 31 may be disposed on at least one surface of the dielectric block 10. 1 and 2 illustrate that the first ground pattern 30 and the second ground pattern 31 face each other on the front and rear surfaces of the dielectric block 10, but the present invention is not limited thereto. One of the first ground pattern 30 and the second ground pattern 31 may be omitted as necessary. In addition, although not shown, it is also possible to further arrange the third or fourth ground pattern (not shown) if necessary. 1 and 2, the first ground pattern 30 and the second ground pattern 31 are formed on the front and rear surfaces of the dielectric block 10, respectively, and the dielectric having the input / output patterns 40 and 50 formed thereon.
  • a portion of the left and right surfaces of the block 10 may be formed to be spaced apart from the input / output patterns 40 and 50 by a predetermined interval, respectively.
  • These ground patterns 30 and 31 serve as ground electrodes while the resonator type dielectric low pass filter 100 is operating.
  • the input / output patterns 40 and 50 may serve as input lines for receiving signals input to the resonator type dielectric low pass filter 100 and output lines for outputting signals output from the resonator type dielectric low pass filter 100.
  • the input / output patterns 40 and 50 have a first pattern 40 that is uniform with the ground patterns 30 and 31 on the lower, right and upper surfaces of the dielectric block 10.
  • the second pattern 50 may be disposed to be spaced apart from each other, and the second pattern 50 may be disposed to be spaced apart from the ground patterns 30 and 31 on the lower surface, the left surface, and the upper surface of the dielectric block 10, but the first pattern 40 may be spaced apart. ) May be arranged to face.
  • the first pattern 40 may be disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the first capacitor C1
  • the second pattern 50 may be uniform with the ground patterns 30 and 31.
  • the second capacitor C2 may be formed by being spaced apart from each other. That is, the input / output patterns 40 and 50 play a role of a line through which an input signal and an output signal flow, and also serve as the first and second capacitors C1 and C2 using the ground patterns 30 and 31 as other electrodes. Can be performed. Therefore, the input / output patterns 40 and 50 should be arranged to be spaced apart from the ground patterns 30 and 31 as shown in FIGS. 1 and 2.
  • the first resonator patterns 61a to 61c may be formed by applying a conductor to an inner wall of the first resonator hole 21.
  • the first resonator patterns 61a to 61c may include a first upper pattern 61a disposed on the top surface of the dielectric block 10 so as to be connected to the first and second inductor patterns 71 and 72, and a first resonant hole.
  • the lower surface of the dielectric block 10 may include a first lower pattern 61c disposed to be connected to the first internal pattern 61b and spaced apart from the ground patterns 30 and 31.
  • the first lower pattern 61c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the third capacitor C3, the first lower pattern 61c is grounded as shown in FIG. 2. It should be arranged to be spaced apart from the pattern (30, 31).
  • the first resonator patterns 61a to 61c may serve as a first resonator (Re1 of FIG. 3) together with the first resonator hole 21 in the resonator type dielectric low pass filter 100. 1 and 2, the area of the first lower pattern 61c may be larger than the area of the first upper pattern 61a. However, this is only one example, and the area of the first lower pattern 61c and the area of the first upper pattern 61a may be modified differently as necessary.
  • the first inductor pattern 71 is disposed on the upper surface of the dielectric block 10, and the first pattern 40 and the first resonator patterns 61a to 61c of the input / output patterns 40 and 50 are formed. It may be disposed to connect the first upper pattern (61a) of the, and the second inductor pattern 72 is disposed on the upper surface of the dielectric block 10, as shown in Figure 1, the input and output patterns (40, 50) It may be arranged to connect the second pattern 50 of the first pattern and the first upper pattern (61a) of the first resonator patterns (61a ⁇ 61c).
  • the first and second inductor patterns 71 and 72 may serve as the first and second inductors L1 and L2 in the resonator type dielectric low pass filter 100, respectively. Accordingly, the first and second inductor patterns 71 and 72 have predetermined inductance values as the resonator type dielectric low pass filter 100 of the present invention operates.
  • the present invention is not limited to the shapes shown in FIGS. 1 and 2. That is, if the function as described above can be exhibited, the shape of the dielectric block 10, the ground patterns 30 and 31, the input and output patterns 40 and 50, the first resonator patterns 61a to 61c, and the first and the first
  • the arrangement of the two inductor patterns 71 and 72 can be modified in any way. In the following, further two embodiments will be further described in the modified embodiments.
  • FIG. 4 and 5 are perspective views of the resonator type dielectric low pass filter according to the second embodiment of the present invention, respectively, and FIG. 6 is a perspective view of the resonator type dielectric low pass filter according to the second embodiment of the present invention. It is a circuit diagram.
  • the description of the resonator type dielectric low pass filter according to the first embodiment of the present invention will be omitted. That is, only the differences will be described below, and like reference numerals denote like elements.
  • the resonator type dielectric low pass filter 100 includes a second resonator hole 22, second resonator patterns 62a to 62c, and a third inductor pattern. (73) may be further included.
  • the shape of the second resonance hole 22 may be the same as the shape of the first resonance hole 21. That is, the second resonance hole 22 may be, for example, a circular hole having the same shape as that of the first resonance hole 21.
  • the second resonator patterns 62a to 62c may include a second upper pattern 62a disposed on the upper surface of the dielectric block 10 so as to be connected to the second and third inductor patterns 72 and 73, and the second resonator hole 22.
  • the lower surface may include a second lower pattern 62c disposed to be connected to the second internal pattern 62b and spaced apart from the ground patterns 30 and 31.
  • the second lower pattern 62c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the fourth capacitor C4, the second lower pattern 62c is grounded as shown in FIG. 5. It should be arranged to be spaced apart from the pattern (30, 31).
  • the second resonator patterns 62a to 62c may serve as the second resonator Re2 together with the second resonator hole 22 in the resonator type dielectric low pass filter 100.
  • the first lower pattern 61c and the second lower pattern 62c may be spaced apart from each other to form the seventh capacitor C7. Therefore, the first lower pattern 61c and the second lower pattern 62c should be disposed to be spaced apart from each other.
  • the areas of the first lower pattern 61c and the second lower pattern 62c may be different from each other. That is, the capacitance value of the third capacitor C3 and the capacitance value of the fourth capacitor C4 may be different from each other.
  • the third inductor pattern 73 is disposed on the upper surface of the dielectric block 10 so as to connect the output pattern 50 and the second upper pattern 62a of the second resonator pattern. And may serve as the third inductor L3 in the resonator type dielectric low pass filter 100. Accordingly, the third inductor pattern 73 has a predetermined inductance value as the resonator type dielectric low pass filter 100 operates.
  • FIG. 7 and 8 are perspective views of a resonator type dielectric low pass filter according to a third embodiment of the present invention, respectively, and FIG. 9 is a perspective view of the resonator type dielectric low pass filter according to a third embodiment of the present invention. It is a circuit diagram. Similarly, hereinafter, for convenience of description, descriptions of the resonator type dielectric low pass filter according to the first and second embodiments of the present invention will be omitted. That is, only the differences will be described below, and like reference numerals denote like elements.
  • the resonator type dielectric low pass filter 100 may include the third and fourth resonator holes 23 and 24, and the third and fourth resonator patterns 63a. ⁇ 63c, 64a to 64c, and fourth and fifth inductor patterns 74 and 75.
  • the size and shape of the third and fourth resonance holes 23 and 24 may be the same as the size and shape of the first and second resonance holes 21 and 22.
  • the third resonator patterns 63a to 63c may include a third upper pattern 63a disposed on the upper surface of the dielectric block 10 so as to be connected to the third and fourth inductor patterns 73 and 74, and a third resonant hole. (23) A third internal pattern 63b and a dielectric block disposed on the inner wall to be connected to the third upper pattern 63a and the third lower pattern 63c, and having a predetermined cavity in the center thereof.
  • the lower surface may include a third lower pattern 63c disposed to be connected to the third internal pattern 63b and spaced apart from the ground patterns 30 and 31.
  • the third lower pattern 63c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the fifth capacitor C5
  • the third lower pattern 63c is grounded as shown in FIG. 8. It should be arranged to be spaced apart from the pattern (30, 31).
  • the fourth resonator patterns 64a to 64c may include a fourth upper pattern 64a disposed on the upper surface of the dielectric block 10 so as to be connected to the fourth and fifth inductor patterns 74 and 75, and a fourth resonator hole.
  • the lower surface may include a fourth lower pattern 64c disposed to be connected to the fourth internal pattern 64b and spaced apart from the ground patterns 30 and 31.
  • the fourth lower pattern 64c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the sixth capacitor C6, the fourth lower pattern 64c is also grounded as shown in FIG. 8. It should be arranged to be spaced apart from the pattern (30, 31).
  • the third and fourth resonator patterns 63a to 63c and 64a to 64c are formed in the resonator type dielectric low pass filter 100 together with the third and fourth resonator holes 23 and 24, respectively.
  • Re3, Re4 can play a role.
  • the second lower pattern 62c and the third lower pattern 63c may be spaced apart from each other as shown in FIG. 8 to form an eighth capacitor C8, and the third lower pattern 63c
  • the fourth lower pattern 64c may be spaced apart from each other to form a ninth capacitor C9. Therefore, the second lower pattern 62c, the third lower pattern 63c, and the fourth lower pattern 64c should be disposed to be spaced apart from each other.
  • areas of the second lower pattern 62c and the third lower pattern 63c may be different from those of the first lower pattern 61c and the fourth lower pattern 64c.
  • any one of the first to fourth lower patterns 61c to 64c may have an area different from the rest. That is, only one of the third to sixth capacitors C3 to C6 may have a different capacitance value.
  • the fourth and fifth inductor patterns 74 and 75 are disposed on the upper surface of the dielectric block 10 as shown in FIG. 7, and the third upper patterns 63a of the third resonator patterns 63a to 63, respectively. And the fourth upper pattern 64a of the fourth resonator patterns 64a to 64c and the fourth upper pattern 64a of the fourth resonator patterns 64a to 64c and the output pattern 50.
  • the fourth and fifth inductor patterns 74 and 75 may serve as the fourth and fifth inductors L4 and L5 in the resonator type dielectric low pass filter 100, respectively. Accordingly, the fourth and fifth inductor patterns 74 and 75 have predetermined inductance values as the resonator type dielectric low pass filter 100 operates.
  • 10 to 12 are diagrams for explaining the frequency response characteristics of the resonator type dielectric low pass filter in accordance with embodiments of the present invention.
  • the resonator type dielectric low pass filter exhibits a response characteristic of the low pass filter. Specifically, as the number of resonators Re1 to Re4 formed by the resonance holes 21 to 24 and the resonance patterns 61a to 61c, 62a to 62c, 63a to 63c, and 64a to 64c increases, the abrupt attenuation characteristics are more rapid. It can be seen that. (See S21 of FIGS. 10-12)
  • FIG. 11 shows the frequency response characteristics of the resonator type dielectric low pass filter according to the second embodiment of the present invention
  • FIG. 10 shows the frequency response characteristics of the resonator type dielectric low pass filter according to the first embodiment of the present invention.
  • a sharper attenuation characteristic is shown after the cutoff frequency (C).
  • C shows cutoff frequency
  • FIG. 12 shows frequency response characteristics of the resonator type dielectric low pass filter according to the third embodiment of the present invention.
  • FIG. 12 shows frequency response characteristics of the resonator type dielectric low pass filter according to the first and second embodiments of the present invention.
  • a more rapid attenuation characteristic is shown after the cutoff frequency C.
  • the resonator type dielectric low pass filter according to the embodiments of the present invention works very well as a low pass filter in the circuit, and furthermore, the attenuation characteristics of the signal by adjusting the number of resonators Re1 to Re4. It can be seen that it can also be adjusted. That is, since the number of resonators Re1 to Re4 can be increased as necessary, it is possible to implement a sudden attenuation characteristic.
  • the resonator type dielectric low pass filter according to the embodiments of the present invention is formed on the dielectric block 10, it occupies a relatively narrow space when mounted in a communication device, and also has low insertion loss in a circuit. There is this.
  • FIG. 13 is a perspective view from above of a communication device according to an embodiment of the present invention.
  • a communication device 200 may include a substrate 210 and a resonator type dielectric low pass filter 100 according to embodiments of the present invention mounted on the substrate 210. ) May be included.
  • the substrate 210 is a component constituting the base of the communication element, and although not shown on the substrate 210, a signal input terminal (not shown) through which a communication signal is input and a signal from which a communication signal is output. An output terminal (not shown) and a ground terminal (not shown) connected to the ground electrode may be formed.
  • the resonator type dielectric low pass filter 100 may be mounted on the substrate 210 by, for example, a surface mounting technology (SMT) method, and the ground patterns 30 and 31 may be disposed on the substrate.
  • the ground terminal 210 and the input / output patterns 40 and 50 of the 210 may be mounted to be connected to the signal input terminal (not shown) and the signal output terminal (not shown) of the substrate 210, respectively.
  • the invention is applicable to the telecommunications industry using low pass filters. However, it is not limited thereto.

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Abstract

Provided is a resonator type dielectric low pass filter. The resonator type dielectric low pass filter includes: a dielectric block having a resonance hole therein; a ground pattern disposed on at least one side of the dielectric block; an input/output pattern disposed on the dielectric block and spaced from the ground pattern to form the ground pattern and first and second capacitors; a resonator pattern disposed on an inner wall of the resonance hole and having a cavity in the middle thereof; and an inductor pattern disposed on the dielectric block to be connected to the input/output pattern and the resonator pattern.

Description

공진기 타입 유전체 저역 통과 여파기 및 그를 포함하는 통신 소자Resonator type dielectric low pass filter and communication element comprising same
본 발명은 공진기 타입 유전체 저역 통과 여파기 및 그를 포함하는 통신 소자에 관한 것이다.The present invention relates to a resonator type dielectric low pass filter and a communication element comprising the same.
일반적으로 무선 통신 시스템에서 사용되는 저역 통과 여파기(low pass filter)는 LC 집중소자나 마이크로 스트립 선로, 또는 LTCC형태로 제작되고 있다. 이 중 LC 집중소자로 제작된 저역 통과 여파기는 회로에서의 삽입 손실이 크고 GHz대 고주파 영역에 대한 구현이 매우 어려운 단점이 있으며, 마이크로 스트립 선로로 제작된 저역 통과 여파기는 통신 소자에 실장될 때, 다른 것들에 비해 상대적으로 넓은 물리적 공간을 차지한다는 단점이 있다. 또한, LTCC 형태로 제작된 저역 통과 여파기는 회로에서의 삽입 손실도 클 뿐만 아니라 튜닝이 불가능한 단점이 있다. In general, low pass filters used in wireless communication systems are manufactured in the form of LC concentrators, micro strip lines, or LTCCs. Among them, the low pass filter manufactured by the LC lumped element has a high insertion loss in the circuit and it is very difficult to implement in the high frequency region of the GHz band.When the low pass filter manufactured by the micro strip line is mounted on the communication device, The disadvantage is that it takes up a relatively large physical space compared to the others. In addition, the low pass filter manufactured in the LTCC form has a large insertion loss in the circuit as well as a disadvantage that tuning is impossible.
이에 따라, 이러한 단점들을 보완할 수 있는 새로운 형태의 저역 통과 여파기에 대한 연구가 진행되고 있다.Accordingly, research on a new type of low pass filter that can compensate for these drawbacks is in progress.
본 발명이 해결하고자 하는 기술적 과제는 통신 소자에 실장될 때 비교적 좁은 공간을 차지하면서도 낮은 삽입 손실과 급격한 감쇄 특성을 얻을 수 있는 공진기 타입 유전체 저역 통과 여파기를 제공하는 것이다.SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a resonator type dielectric low pass filter capable of obtaining a low insertion loss and a rapid attenuation characteristic while occupying a relatively narrow space when mounted in a communication device.
본 발명이 해결하고자 하는 다른 기술적 과제는 상기 공진기 타입 유전체 저역 통과 여파기가 실장된 통신 소자를 제공하는 것이다.Another technical problem to be solved by the present invention is to provide a communication device mounted with the resonator type dielectric low pass filter.
본 발명의 기술적 과제들은 이상에서 언급한 기술적 과제로 제한되지 않으며, 언급되지 않은 또 다른 기술적 과제들은 아래의 기재로부터 당업자에게 명확하게 이해될 수 있을 것이다.Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.
상기 기술적 과제를 달성하기 위한 본 발명의 공진기 타입 유전체 저역 통과 여파기의 일 태양(aspect)은, 공진홀이 형성된 유전체 블록, 유전체 블록의 적어도 일면에 배치된 접지 패턴, 유전체 블록 상에 배치되고, 접지 패턴과 각각 제1 및 제2 커패시터를 형성하도록 접지 패턴으로부터 이격되게 배치된 입출력 패턴, 공진홀 내벽에 배치되되 그 중앙에 캐비티(cavity)를 갖는 공진기 패턴, 및 유전체 블록 상에 입출력 패턴 및 공진기 패턴과 연결되게 배치되는 인덕터 패턴을 포함한다.One aspect of the resonator type dielectric low pass filter of the present invention for achieving the above technical problem is a dielectric block having a resonance hole, a ground pattern disposed on at least one surface of the dielectric block, disposed on the dielectric block, and grounded Input and output patterns spaced apart from the ground pattern to form patterns and first and second capacitors respectively, a resonator pattern disposed in the inner wall of the resonant hole and having a cavity in the center thereof, and an input / output pattern and a resonator pattern on the dielectric block And an inductor pattern disposed to be connected to the inductor.
상기 다른 기술적 과제를 달성하기 위한 본 발명의 통신 소자의 일 태양은, 접지 단자, 신호 입력 단자 및 신호 출력 단자가 형성된 기판; 및 기판 상에 실장된 공진기 타입 유전체 저역 통과 여파기를 포함하되, 공진기 타입 유전체 저역 통과 여파기는, 공진홀이 형성된 유전체 블록과, 유전체 블록의 적어도 일면에 배치되고 접지 단자와 접속되는 접지 패턴과, 유전체 블록 상에 접지 패턴과 각각 제1 및 제2 커패시터를 형성하도록 접지 패턴으로부터 이격되게 배치되고 신호 입력 단자 및 신호 출력 단자에 각각 접속되는 입출력 패턴과, 공진홀 내벽에 배치되되 그 중앙에 캐비티를 갖는 공진기 패턴과, 유전체 블록 상에 입출력 패턴 및 공진기 패턴과 연결되게 배치되는 인덕터 패턴을 포함한다.One aspect of the communication device of the present invention for achieving the above another technical problem, the ground terminal, the signal input terminal and the signal output terminal is formed; And a resonator type dielectric low pass filter mounted on the substrate, wherein the resonator type dielectric low pass filter comprises: a dielectric block having a resonance hole formed therein, a ground pattern disposed on at least one surface of the dielectric block and connected to a ground terminal; An input / output pattern disposed apart from the ground pattern and connected to the signal input terminal and the signal output terminal to form a ground pattern on the block and first and second capacitors, respectively, and disposed at an inner wall of the resonance hole, and having a cavity at the center thereof And a resonator pattern and an inductor pattern disposed on the dielectric block to be connected to the input / output pattern and the resonator pattern.
기타 실시예들의 구체적인 사항들은 상세한 설명 및 도면들에 포함되어 있다.Specific details of other embodiments are included in the detailed description and the drawings.
본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기는 유전체 블록 상에 형성되어 통신 소자에 실장될 때 비교적 좁은 공간을 차지하게 되고, 회로에서의 삽입 손실도 낮을 뿐만 아니라, 급격한 감쇄 특성의 구현이 가능한 장점을 가지고 있다.The resonator type dielectric low pass filter according to the embodiments of the present invention is formed on the dielectric block to occupy a relatively narrow space when mounted in a communication device, and the insertion loss in the circuit is low, and the abrupt attenuation characteristics are realized. This has a possible advantage.
도 1 및 도 2는 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이다.1 and 2 are perspective views of the resonator type dielectric low pass filter according to the first embodiment of the present invention, respectively, as viewed from above and below.
도 3은 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 등가 회로도이다.3 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a first embodiment of the present invention.
도 4 및 도 5는 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이다.4 and 5 are perspective views of the resonator type dielectric low pass filter according to the second embodiment of the present invention as viewed from the top and bottom, respectively.
도 6은 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 등가 회로도이다.6 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a second embodiment of the present invention.
도 7 및 도 8은 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이다.7 and 8 are perspective views as viewed from the top and bottom of the resonator type dielectric low pass filter according to the third embodiment of the present invention, respectively.
도 9는 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 등가 회로도이다.9 is an equivalent circuit diagram of a resonator type dielectric low pass filter according to a third embodiment of the present invention.
도 10 내지 도 12는 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 설명하기 위한 도면들이다.10 to 12 are diagrams for explaining the frequency response characteristics of the resonator type dielectric low pass filter in accordance with embodiments of the present invention.
도 13은 본 발명의 일 실시예에 따른 통신 소자를 상부에서 바라본 사시도이다.13 is a perspective view from above of a communication device according to an embodiment of the present invention.
본 발명의 이점 및 특징, 그리고 그것들을 달성하는 방법은 첨부되는 도면과 함께 상세하게 후술되어 있는 실시예들을 참조하면 명확해질 것이다. 그러나 본 발명은 이하에서 개시되는 실시예들에 한정되는 것이 아니라 서로 다른 다양한 형태로 구현될 것이며, 단지 본 실시예들은 본 발명의 개시가 완전하도록 하며, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 발명의 범주를 완전하게 알려주기 위해 제공되는 것이며, 본 발명은 청구항의 범주에 의해 정의될 뿐이다. 도면에서 표시된 구성요소의 크기 및 상대적인 크기는 설명의 명료성을 위해 과장된 것일 수 있다.Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. The size and relative size of the components shown in the drawings may be exaggerated for clarity of explanation.
명세서 전체에 걸쳐 동일 참조 부호는 동일 구성 요소를 지칭하며, "및/또는"은 언급된 아이템들의 각각 및 하나 이상의 모든 조합을 포함한다.Like reference numerals refer to like elements throughout the specification, and "and / or" includes each and every combination of one or more of the mentioned items.
본 명세서에서 사용된 용어는 실시예들을 설명하기 위한 것이며 본 발명을 제한하고자 하는 것은 아니다. 본 명세서에서, 단수형은 문구에서 특별히 언급하지 않는 한 복수형도 포함한다. 명세서에서 사용되는 "포함한다(comprises)" 및/또는 "이루어지다(made of)"는 언급된 구성요소, 단계, 동작 및/또는 소자는 하나 이상의 다른 구성요소, 단계, 동작 및/또는 소자의 존재 또는 추가를 배제하지 않는다.The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In this specification, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, “comprises” and / or “made of” refers to a component, step, operation, and / or element that includes one or more other components, steps, operations, and / or elements. It does not exclude existence or addition.
비록 제1, 제2 등이 다양한 구성요소들을 서술하기 위해서 사용되나, 이들 구성요소들은 이들 용어에 의해 제한되지 않음은 물론이다. 이들 용어들은 단지 하나의 구성요소를 다른 구성요소와 구별하기 위하여 사용하는 것이다. 따라서, 이하에서 언급되는 제1 구성요소는 본 발명의 기술적 사상 내에서 제2 구성요소일 수도 있음은 물론이다.Although the first, second, etc. are used to describe various components, these components are of course not limited by these terms. These terms are only used to distinguish one component from another. Therefore, of course, the first component mentioned below may be a second component within the technical spirit of the present invention.
다른 정의가 없다면, 본 명세서에서 사용되는 모든 용어(기술 및 과학적 용어를 포함)는 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 공통적으로 이해될 수 있는 의미로 사용될 수 있을 것이다. 또 일반적으로 사용되는 사전에 정의되어 있는 용어들은 명백하게 특별히 정의되어 있지 않는 한 이상적으로 또는 과도하게 해석되지 않는다.Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used in a sense that can be commonly understood by those skilled in the art. In addition, the terms defined in the commonly used dictionaries are not ideally or excessively interpreted unless they are specifically defined clearly.
이하, 도 1 내지 도 3을 참조하여, 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기에 대해 설명한다.Hereinafter, a resonator type dielectric low pass filter according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 3.
도 1 및 도 2는 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이다. 도 3은 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 회로도이다.1 and 2 are perspective views of the resonator type dielectric low pass filter according to the first embodiment of the present invention, respectively, as viewed from above and below. 3 is a circuit diagram of a resonator type dielectric low pass filter according to a first embodiment of the present invention.
도 1 내지 도 3을 참조하면, 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기(100)는 유전체 블록(10), 접지 패턴(30, 31), 입출력 패턴(40, 50), 제1 공진기 패턴(61a~61c) 및 제1 및 제2 인덕터 패턴(71, 72)을 포함할 수 있다.1 to 3, the resonator type dielectric low pass filter 100 according to the first embodiment of the present invention includes a dielectric block 10, a ground pattern 30 and 31, an input / output pattern 40 and 50, The first resonator patterns 61a to 61c and the first and second inductor patterns 71 and 72 may be included.
유전체 블록(10)은 도 1 및 도 2에 도시된 바와 같이 유전 물질이 육면체 형상으로 형성된 모노블록(mono block)일 수 있다. 그리고, 이러한 유전체 블록(10)에는 제1 공진홀(21)이 형성되어 있을 수 있다. 이러한 제1 공진홀(21)은 그 내벽에 도전체가 도포되어 공진기(resonator, 도 3의 Re1)가 형성되는 홀이며, 도 1 및 도 2에 도시된 바와 같이 원형 형상일 수 있다.The dielectric block 10 may be a mono block in which a dielectric material is formed in a hexahedral shape as shown in FIGS. 1 and 2. In addition, the first resonance hole 21 may be formed in the dielectric block 10. The first resonator hole 21 is a hole in which a conductor is applied to an inner wall thereof to form a resonator (Re1 of FIG. 3), and may have a circular shape as shown in FIGS. 1 and 2.
비록 도 1 및 도 2에는 육면체 형상의 유전체 블록(10)과 유전체 블록(10) 중앙에 원형 형상의 제1 공진홀(21)이 형성된 것이 도시되어 있으나, 본 발명이 이에 제한되는 것은 아니다. 유전체 블록(10)의 형상은 육면체 형상에 제한되지 않으며, 제1 공진홀(21)의 형상도 원형에 제한되는 것은 아니다. 즉, 필요에 따라 유전체 블록(10)의 형상은 도시된 것과 달리 얼마든지 변형될 수 있으며, 제1 공진홀(21)의 형상도 공진기를 형성하는데 효율적인 형상이면 도시된 것과 다르게 얼마든지 변형이 가능하다.Although FIGS. 1 and 2 illustrate that the hexagonal dielectric block 10 and the circular first resonance hole 21 are formed in the center of the dielectric block 10, the present invention is not limited thereto. The shape of the dielectric block 10 is not limited to the shape of a hexahedron, and the shape of the first resonance hole 21 is not limited to a circle. That is, if necessary, the shape of the dielectric block 10 may be deformed differently from the drawing, and the shape of the first resonator hole 21 may be deformed differently from the drawing if the shape of the first resonator hole 21 is effective to form a resonator. Do.
유전체 블록(10)의 적어도 일면에는 접지 패턴(30, 31)이 배치될 수 있다. 도 1 및 도 2에는 유전체 블록(10)의 전면 및 후면에 제1 접지 패턴(30)과 제2 접지 패턴(31)이 마주보며 배치된 것이 도시되어 있으나, 역시 본 발명이 이에 제한되는 것은 아니며, 제1 접지 패턴(30)과 제2 접지 패턴(31) 중 어느 하나는 필요에 따라 생략 가능하다. 또한, 도시하지는 않았으나 필요하다면 제3 또는 제4 접지 패턴(미도시)을 더 배치하는 것도 가능하다. 도 1 및 도 2를 참조하면, 이러한 제1 접지 패턴(30)과 제2 접지 패턴(31)은 유전체 블록(10)의 전면 및 후면에 각각 형성되되, 입출력 패턴(40, 50)이 형성된 유전체 블록(10)의 좌측면과 우측면 일부에도 각각 입출력 패턴(40, 50)과 소정 간격 이격되도록 형성될 수 있다. 이러한 접지 패턴(30, 31)은 공진기 타입 유전체 저역 통과 여파기(100)가 동작하는 동안 접지 전극의 역할을 한다. Ground patterns 30 and 31 may be disposed on at least one surface of the dielectric block 10. 1 and 2 illustrate that the first ground pattern 30 and the second ground pattern 31 face each other on the front and rear surfaces of the dielectric block 10, but the present invention is not limited thereto. One of the first ground pattern 30 and the second ground pattern 31 may be omitted as necessary. In addition, although not shown, it is also possible to further arrange the third or fourth ground pattern (not shown) if necessary. 1 and 2, the first ground pattern 30 and the second ground pattern 31 are formed on the front and rear surfaces of the dielectric block 10, respectively, and the dielectric having the input / output patterns 40 and 50 formed thereon. A portion of the left and right surfaces of the block 10 may be formed to be spaced apart from the input / output patterns 40 and 50 by a predetermined interval, respectively. These ground patterns 30 and 31 serve as ground electrodes while the resonator type dielectric low pass filter 100 is operating.
입출력 패턴(40, 50)은 공진기 타입 유전체 저역 통과 여파기(100)에 입력되는 신호를 입력 받는 입력 선로와, 공진기 타입 유전체 저역 통과 여파기(100)로부터 출력되는 신호를 출력하는 출력 선로의 역할을 할 수 있다. 입출력 패턴(40, 50)은 도 1 및 도 2에 도시된 바와 같이, 제1 패턴(40)이 유전체 블록(10)의 하부면, 우측면 및 상부면 상에 접지 패턴(30, 31)과 일정 간격 이격되도록 배치될 수 있고, 제2 패턴(50)은 유전체 블록(10)의 하부면, 좌측면 및 상부면 상에 접지 패턴(30, 31)과 일정 간격 이격되도록 배치되되 제1 패턴(40)과 마주보도록 배치될 수 있다. 여기서 제1 패턴(40)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제1 커패시터(C1)를 형성할 수 있고, 제2 패턴(50)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제2 커패시터(C2)를 형성할 수 있다. 즉, 입출력 패턴(40, 50)은 입력 신호 및 출력 신호가 흐르는 선로의 역할을 함과 동시에, 접지 패턴(30, 31)을 다른 전극으로 하여 제1 및 제2 커패시터(C1, C2)의 역할을 수행할 수 있다. 따라서, 입출력 패턴(40, 50)은 도 1 및 도 2에 도시된 바와 같이 접지 패턴(30, 31)과 이격되도록 배치되어야 한다.The input / output patterns 40 and 50 may serve as input lines for receiving signals input to the resonator type dielectric low pass filter 100 and output lines for outputting signals output from the resonator type dielectric low pass filter 100. Can be. As shown in FIGS. 1 and 2, the input / output patterns 40 and 50 have a first pattern 40 that is uniform with the ground patterns 30 and 31 on the lower, right and upper surfaces of the dielectric block 10. The second pattern 50 may be disposed to be spaced apart from each other, and the second pattern 50 may be disposed to be spaced apart from the ground patterns 30 and 31 on the lower surface, the left surface, and the upper surface of the dielectric block 10, but the first pattern 40 may be spaced apart. ) May be arranged to face. Here, the first pattern 40 may be disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the first capacitor C1, and the second pattern 50 may be uniform with the ground patterns 30 and 31. The second capacitor C2 may be formed by being spaced apart from each other. That is, the input / output patterns 40 and 50 play a role of a line through which an input signal and an output signal flow, and also serve as the first and second capacitors C1 and C2 using the ground patterns 30 and 31 as other electrodes. Can be performed. Therefore, the input / output patterns 40 and 50 should be arranged to be spaced apart from the ground patterns 30 and 31 as shown in FIGS. 1 and 2.
제1 공진기 패턴(61a~61c)은 도 1 및 도 2에 도시된 바와 같이, 제1 공진홀(21) 내벽에 도전체가 도포되어 형성될 수 있다. 구체적으로 제1 공진기 패턴(61a~61c)은 유전체 블록(10) 상부면에 제1 및 제2 인덕터 패턴(71, 72)과 연결되도록 배치된 제1 상부 패턴(61a)과, 제1 공진홀(21) 내벽에 도전체가 도포되어 제1 상부 패턴(61a) 및 제1 하부 패턴(61c)과 연결되도록 배치되고, 그 중앙에 소정의 캐비티(cavitiy)가 형성된 제1 내부 패턴(61b)과, 유전체 블록(10) 하부면에 제1 내부 패턴(61b)과 연결되도록 배치되되, 접지 패턴(30, 31)과 이격되도록 배치된 제1 하부 패턴(61c)을 포함할 수 있다. 여기서, 제1 하부 패턴(61c)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제3 커패시터(C3)를 형성하므로, 제1 하부 패턴(61c)은 도 2에 도시된 바와 같이 접지 패턴(30, 31)과 이격되도록 배치되어야 한다.As shown in FIGS. 1 and 2, the first resonator patterns 61a to 61c may be formed by applying a conductor to an inner wall of the first resonator hole 21. Specifically, the first resonator patterns 61a to 61c may include a first upper pattern 61a disposed on the top surface of the dielectric block 10 so as to be connected to the first and second inductor patterns 71 and 72, and a first resonant hole. (21) a first inner pattern 61b disposed on the inner wall to be connected to the first upper pattern 61a and the first lower pattern 61c, and having a predetermined cavity formed in the center thereof; The lower surface of the dielectric block 10 may include a first lower pattern 61c disposed to be connected to the first internal pattern 61b and spaced apart from the ground patterns 30 and 31. Here, since the first lower pattern 61c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the third capacitor C3, the first lower pattern 61c is grounded as shown in FIG. 2. It should be arranged to be spaced apart from the pattern (30, 31).
이러한 제1 공진기 패턴(61a~61c)은 공진기 타입 유전체 저역 통과 여파기(100)에서 제1 공진홀(21)과 함께 제1 공진기(resonator)(도 3의 Re1)의 역할을 할 수 있다. 한편, 도 1 및 도 2에 도시된 바와 같이 제1 하부 패턴(61c)의 면적은 제1 상부 패턴(61a)의 면적보다 클 수 있다. 하지만, 이는 하나의 예시에 불과할 뿐이며, 필요에 따라 제1 하부 패턴(61c)의 면적과 제1 상부 패턴(61a)의 면적은 얼마든지 다르게 변형 가능하다.The first resonator patterns 61a to 61c may serve as a first resonator (Re1 of FIG. 3) together with the first resonator hole 21 in the resonator type dielectric low pass filter 100. 1 and 2, the area of the first lower pattern 61c may be larger than the area of the first upper pattern 61a. However, this is only one example, and the area of the first lower pattern 61c and the area of the first upper pattern 61a may be modified differently as necessary.
제1 인덕터 패턴(71)은 도 1에 도시된 바와 같이 유전체 블록(10)의 상부면에 배치되되, 입출력 패턴(40, 50)의 제1 패턴(40)과 제1 공진기 패턴(61a~61c)의 제1 상부 패턴(61a)을 연결하도록 배치될 수 있고, 제2 인덕터 패턴(72)은 도 1에 도시된 바와 같이 유전체 블록(10)의 상부면에 배치되되, 입출력 패턴(40, 50)의 제2 패턴(50)과 제1 공진기 패턴(61a~61c)의 제1 상부 패턴(61a)을 연결하도록 배치될 수 있다. 이러한 제1 및 제2 인덕터 패턴(71, 72)은 각각 공진기 타입 유전체 저역 통과 여파기(100)에서 제1 및 제2 인덕터(L1, L2)의 역할을 할 수 있다. 따라서, 제1 및 제2 인덕터 패턴(71, 72)은 본 발명의 공진기 타입 유전체 저역 통과 여파기(100)가 동작함에 따라 각각 소정의 인덕턴스 값을 갖게 된다.As shown in FIG. 1, the first inductor pattern 71 is disposed on the upper surface of the dielectric block 10, and the first pattern 40 and the first resonator patterns 61a to 61c of the input / output patterns 40 and 50 are formed. It may be disposed to connect the first upper pattern (61a) of the, and the second inductor pattern 72 is disposed on the upper surface of the dielectric block 10, as shown in Figure 1, the input and output patterns (40, 50) It may be arranged to connect the second pattern 50 of the first pattern and the first upper pattern (61a) of the first resonator patterns (61a ~ 61c). The first and second inductor patterns 71 and 72 may serve as the first and second inductors L1 and L2 in the resonator type dielectric low pass filter 100, respectively. Accordingly, the first and second inductor patterns 71 and 72 have predetermined inductance values as the resonator type dielectric low pass filter 100 of the present invention operates.
앞서, 도 1 내지 도 3을 참조하여 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기에 대해서 설명하였으나, 본 발명이 도 1 및 도 2에 도시된 형상에 제한되는 것은 아니다. 즉, 앞서 설명한 바와 같은 기능을 발휘할 수 있다면 유전체 블록(10)의 형상과, 접지 패턴(30, 31), 입출력 패턴(40, 50), 제1 공진기 패턴(61a~61c) 및 제1 및 제2 인덕터 패턴(71, 72)의 배치는 얼마든지 변형될 수 있다. 이하에서는 그 변형 실시예들 중 앞선 제1 실시예와 다른 두 가지 실시예에 대해 추가로 더 설명하도록 하겠다.Although the resonator type dielectric low pass filter according to the first embodiment of the present invention has been described above with reference to FIGS. 1 to 3, the present invention is not limited to the shapes shown in FIGS. 1 and 2. That is, if the function as described above can be exhibited, the shape of the dielectric block 10, the ground patterns 30 and 31, the input and output patterns 40 and 50, the first resonator patterns 61a to 61c, and the first and the first The arrangement of the two inductor patterns 71 and 72 can be modified in any way. In the following, further two embodiments will be further described in the modified embodiments.
먼저, 도 4 내지 도 6을 참조하여 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기에 대해 설명한다.First, a resonator type dielectric low pass filter according to a second embodiment of the present invention will be described with reference to FIGS. 4 to 6.
도 4 및 도 5는 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이고, 도 6은 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 회로도이다. 이하에서는 설명의 편의를 위해, 앞서 설명한 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 설명하면서 설명한 사항에 대해서는 그 중복된 설명을 생략한다. 즉, 이하에서는 그 차이점에 대해서만 설명하도록 하며, 동일 참조 부호는 동일 구성요소를 의미한다.4 and 5 are perspective views of the resonator type dielectric low pass filter according to the second embodiment of the present invention, respectively, and FIG. 6 is a perspective view of the resonator type dielectric low pass filter according to the second embodiment of the present invention. It is a circuit diagram. In the following description, for the convenience of description, the description of the resonator type dielectric low pass filter according to the first embodiment of the present invention will be omitted. That is, only the differences will be described below, and like reference numerals denote like elements.
도 4 내지 도 6을 참조하면, 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기(100)는 제2 공진홀(22), 제2 공진기 패턴(62a~62c) 및 제3 인덕터 패턴(73)을 더 포함할 수 있다.4 to 6, the resonator type dielectric low pass filter 100 according to the second embodiment of the present invention includes a second resonator hole 22, second resonator patterns 62a to 62c, and a third inductor pattern. (73) may be further included.
제2 공진홀(22)의 형상은 제1 공진홀(21)의 형상과 동일할 수 있다. 즉, 제2 공진홀(22)은 제1 공진홀(21)의 형상과 동일한 예를 들어, 원형 홀일 수 있다. The shape of the second resonance hole 22 may be the same as the shape of the first resonance hole 21. That is, the second resonance hole 22 may be, for example, a circular hole having the same shape as that of the first resonance hole 21.
제2 공진기 패턴(62a~62c)은 유전체 블록(10) 상부면에 제2 및 제3 인덕터 패턴(72, 73)과 연결되도록 배치된 제2 상부 패턴(62a)과, 제2 공진홀(22) 내벽에 도전체가 도포되어 제2 상부 패턴(62a) 및 제2 하부 패턴(62c)과 연결되도록 배치되고, 그 중앙에 소정의 캐비티가 형성된 제2 내부 패턴(62b)과, 유전체 블록(10) 하부면에 제2 내부 패턴(62b)과 연결되도록 배치되되, 접지 패턴(30, 31)과 이격되도록 배치된 제2 하부 패턴(62c)을 포함할 수 있다. 여기서, 제2 하부 패턴(62c)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제4 커패시터(C4)를 형성하므로, 제2 하부 패턴(62c)은 도 5에 도시된 바와 같이 접지 패턴(30, 31)과 이격되도록 배치되어야 한다. 이러한 제2 공진기 패턴(62a~62c)은 공진기 타입 유전체 저역 통과 여파기(100)에서 제2 공진홀(22)과 함께 제2 공진기(Re2)의 역할을 할 수 있다.The second resonator patterns 62a to 62c may include a second upper pattern 62a disposed on the upper surface of the dielectric block 10 so as to be connected to the second and third inductor patterns 72 and 73, and the second resonator hole 22. A second inner pattern 62b and a dielectric block 10 disposed on the inner wall to be connected to the second upper pattern 62a and the second lower pattern 62c, and having a predetermined cavity in the center thereof. The lower surface may include a second lower pattern 62c disposed to be connected to the second internal pattern 62b and spaced apart from the ground patterns 30 and 31. Here, since the second lower pattern 62c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the fourth capacitor C4, the second lower pattern 62c is grounded as shown in FIG. 5. It should be arranged to be spaced apart from the pattern (30, 31). The second resonator patterns 62a to 62c may serve as the second resonator Re2 together with the second resonator hole 22 in the resonator type dielectric low pass filter 100.
한편, 제1 하부 패턴(61c)과 제2 하부 패턴(62c)은 도 5에 도시된 바와 같이 서로 이격되어 배치됨으로써 제7 커패시터(C7)를 형성할 수 있다. 따라서, 제1 하부 패턴(61c)과 제2 하부 패턴(62c)은 서로 이격되도록 배치되어야 한다. 또한, 도 5에 도시된 바와 같이 제1 하부 패턴(61c)과 제2 하부 패턴(62c)의 면적은 서로 다를 수 있다. 즉, 제3 커패시터(C3)의 커패시턴스 값과 제4 커패시터(C4)의 커패시턴스 값은 서로 다를 수 있다. 하지만, 역시 이는 하나의 예시에 불과할 뿐이며 제1 하부 패턴(61c)과 제2 하부 패턴(62c)의 면적은 필요에 따라 서로 동일하게도, 또 도 5에 도시된 것과 다르게도 각각 조절될 수 있다.Meanwhile, as shown in FIG. 5, the first lower pattern 61c and the second lower pattern 62c may be spaced apart from each other to form the seventh capacitor C7. Therefore, the first lower pattern 61c and the second lower pattern 62c should be disposed to be spaced apart from each other. In addition, as illustrated in FIG. 5, the areas of the first lower pattern 61c and the second lower pattern 62c may be different from each other. That is, the capacitance value of the third capacitor C3 and the capacitance value of the fourth capacitor C4 may be different from each other. However, this is only one example, and the areas of the first lower pattern 61c and the second lower pattern 62c may be adjusted to be identical to each other and different from those shown in FIG. 5 as necessary.
제3 인덕터 패턴(73)은 도 4에 도시된 바와 같이 유전체 블록(10)의 상부면에 배치되되, 출력 패턴(50)과 제2 공진기 패턴()의 제2 상부 패턴(62a)을 연결하도록 배치될 수 있고, 공진기 타입 유전체 저역 통과 여파기(100)에서 제3 인덕터(L3)의 역할을 할 수 있다. 따라서, 제3 인덕터 패턴(73)은 공진기 타입 유전체 저역 통과 여파기(100)가 동작함에 따라 소정의 인덕턴스 값을 갖게 된다.As shown in FIG. 4, the third inductor pattern 73 is disposed on the upper surface of the dielectric block 10 so as to connect the output pattern 50 and the second upper pattern 62a of the second resonator pattern. And may serve as the third inductor L3 in the resonator type dielectric low pass filter 100. Accordingly, the third inductor pattern 73 has a predetermined inductance value as the resonator type dielectric low pass filter 100 operates.
다음, 도 7 내지 도 9를 참조하여 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기에 대해 설명한다.Next, a resonator type dielectric low pass filter according to a third embodiment of the present invention will be described with reference to FIGS. 7 to 9.
도 7 및 도 8은 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 각각 상부 및 하부에서 바라본 사시도들이고, 도 9는 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 회로도이다. 마찬가지로, 이하에서는 설명의 편의를 위해, 앞서 설명한 본 발명의 제1 및 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기를 설명하면서 설명한 사항에 대해서는 그 중복된 설명을 생략한다. 즉, 이하에서는 그 차이점에 대해서만 설명하도록 하며, 동일 참조 부호는 동일 구성요소를 의미한다.7 and 8 are perspective views of a resonator type dielectric low pass filter according to a third embodiment of the present invention, respectively, and FIG. 9 is a perspective view of the resonator type dielectric low pass filter according to a third embodiment of the present invention. It is a circuit diagram. Similarly, hereinafter, for convenience of description, descriptions of the resonator type dielectric low pass filter according to the first and second embodiments of the present invention will be omitted. That is, only the differences will be described below, and like reference numerals denote like elements.
도 7 내지 도 9를 참조하면, 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기(100)는 제3 및 제4 공진홀(23, 24), 제3 및 제4 공진기 패턴(63a~63c, 64a~64c) 및 제4 및 제5 인덕터 패턴(74, 75)을 더 포함할 수 있다.7 to 9, the resonator type dielectric low pass filter 100 according to the third embodiment of the present invention may include the third and fourth resonator holes 23 and 24, and the third and fourth resonator patterns 63a. ˜63c, 64a to 64c, and fourth and fifth inductor patterns 74 and 75.
제3 및 제4 공진홀(23, 24)의 크기 및 형상은 제1 및 제2 공진홀(21, 22)의 크기 및 형상과 동일할 수 있다. 그리고, 제3 공진기 패턴(63a~63c)은 유전체 블록(10) 상부면에 제3 및 제4 인덕터 패턴(73, 74)과 연결되도록 배치된 제3 상부 패턴(63a)과, 제3 공진홀(23) 내벽에 도전체가 도포되어 제3 상부 패턴(63a) 및 제3 하부 패턴(63c)과 연결되도록 배치되고, 그 중앙에 소정의 캐비티가 형성된 제3 내부 패턴(63b)과, 유전체 블록(10) 하부면에 제3 내부 패턴(63b)과 연결되도록 배치되되, 접지 패턴(30, 31)과 이격되도록 배치된 제3 하부 패턴(63c)을 포함할 수 있다. 여기서, 제3 하부 패턴(63c)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제5 커패시터(C5)를 형성하므로, 제3 하부 패턴(63c)은 도 8에 도시된 바와 같이 접지 패턴(30, 31)과 이격되도록 배치되어야 한다.The size and shape of the third and fourth resonance holes 23 and 24 may be the same as the size and shape of the first and second resonance holes 21 and 22. The third resonator patterns 63a to 63c may include a third upper pattern 63a disposed on the upper surface of the dielectric block 10 so as to be connected to the third and fourth inductor patterns 73 and 74, and a third resonant hole. (23) A third internal pattern 63b and a dielectric block disposed on the inner wall to be connected to the third upper pattern 63a and the third lower pattern 63c, and having a predetermined cavity in the center thereof. 10) The lower surface may include a third lower pattern 63c disposed to be connected to the third internal pattern 63b and spaced apart from the ground patterns 30 and 31. Here, since the third lower pattern 63c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the fifth capacitor C5, the third lower pattern 63c is grounded as shown in FIG. 8. It should be arranged to be spaced apart from the pattern (30, 31).
한편, 제4 공진기 패턴(64a~64c)은 유전체 블록(10) 상부면에 제4 및 제5 인덕터 패턴(74, 75)과 연결되도록 배치된 제4 상부 패턴(64a)과, 제4 공진홀(24) 내벽에 도전체가 도포되어 제4 상부 패턴(64a) 및 제4 하부 패턴(64c)과 연결되도록 배치되고, 그 중앙에 소정의 캐비티가 형성된 제4 내부 패턴(64b)과, 유전체 블록(10) 하부면에 제4 내부 패턴(64b)과 연결되도록 배치되되, 접지 패턴(30, 31)과 이격되도록 배치된 제4 하부 패턴(64c)을 포함할 수 있다. 여기서, 제4 하부 패턴(64c)은 접지 패턴(30, 31)과 일정 간격 이격되도록 배치됨으로써 제6 커패시터(C6)를 형성하므로, 제4 하부 패턴(64c) 역시 도 8에 도시된 바와 같이 접지 패턴(30, 31)과 이격되도록 배치되어야 한다.The fourth resonator patterns 64a to 64c may include a fourth upper pattern 64a disposed on the upper surface of the dielectric block 10 so as to be connected to the fourth and fifth inductor patterns 74 and 75, and a fourth resonator hole. (24) A fourth internal pattern 64b and a dielectric block disposed on the inner wall to be connected to the fourth upper pattern 64a and the fourth lower pattern 64c, and having a predetermined cavity formed in the center thereof. 10) The lower surface may include a fourth lower pattern 64c disposed to be connected to the fourth internal pattern 64b and spaced apart from the ground patterns 30 and 31. Here, since the fourth lower pattern 64c is disposed to be spaced apart from the ground patterns 30 and 31 by a predetermined interval to form the sixth capacitor C6, the fourth lower pattern 64c is also grounded as shown in FIG. 8. It should be arranged to be spaced apart from the pattern (30, 31).
이러한 제3 및 제4 공진기 패턴(63a~63c, 64a~64c)은 공진기 타입 유전체 저역 통과 여파기(100)에서 각각 제3 및 제4 공진홀(23, 24)과 함께 제3 및 제4 공진기(Re3, Re4)의 역할을 할 수 있다.The third and fourth resonator patterns 63a to 63c and 64a to 64c are formed in the resonator type dielectric low pass filter 100 together with the third and fourth resonator holes 23 and 24, respectively. Re3, Re4) can play a role.
한편, 제2 하부 패턴(62c)과 제3 하부 패턴(63c)은 도 8에 도시된 바와 같이 서로 이격되어 배치됨으로써 제8 커패시터(C8)를 형성할 수 있고, 제3 하부 패턴(63c)과 제4 하부 패턴(64c)은 도 8에 도시된 바와 같이 서로 이격되어 배치됨으로써 제9 커패시터(C9)를 형성할 수 있다. 따라서, 제2 하부 패턴(62c), 제3 하부 패턴(63c) 및 제4 하부 패턴(64c)은 서로 이격되도록 배치되어야 한다. 또한, 도 8에 도시된 바와 같이 제2 하부 패턴(62c) 및 제3 하부 패턴(63c)의 면적은 제1 하부 패턴(61c) 및 제4 하부 패턴(64c)의 면적과 서로 다를 수 있다. 하지만, 이는 역시 하나의 예시에 불과할 뿐이며, 필요에 따라 제1 내지 제4 하부 패턴(61c~64c) 중 어느 하나만 나머지와 다른 면적을 가질 수도 있다. 즉, 제3 내지 제6 커패시터(C3~C6) 중에서 어느 하나만 다른 커패시턴스 값을 가질 수 있다.Meanwhile, the second lower pattern 62c and the third lower pattern 63c may be spaced apart from each other as shown in FIG. 8 to form an eighth capacitor C8, and the third lower pattern 63c As illustrated in FIG. 8, the fourth lower pattern 64c may be spaced apart from each other to form a ninth capacitor C9. Therefore, the second lower pattern 62c, the third lower pattern 63c, and the fourth lower pattern 64c should be disposed to be spaced apart from each other. In addition, as illustrated in FIG. 8, areas of the second lower pattern 62c and the third lower pattern 63c may be different from those of the first lower pattern 61c and the fourth lower pattern 64c. However, this is also merely an example, and if necessary, any one of the first to fourth lower patterns 61c to 64c may have an area different from the rest. That is, only one of the third to sixth capacitors C3 to C6 may have a different capacitance value.
제4 및 제5 인덕터 패턴(74, 75)은 도 7에 도시된 바와 같이 유전체 블록(10)의 상부면에 배치되되, 각각 제3 공진기 패턴(63a~63)의 제3 상부 패턴(63a)과 제4 공진기 패턴(64a~64c)의 제4 상부 패턴(64a), 제4 공진기 패턴(64a~64c)의 제4 상부 패턴(64a)과 출력 패턴(50)을 연결하도록 배치될 수 있다. 여기서 제4 및 제5 인덕터 패턴(74, 75)은 각각 공진기 타입 유전체 저역 통과 여파기(100)에서 제4 및 제5 인덕터(L4, L5)의 역할을 할 수 있다. 따라서, 제4 및 제5 인덕터 패턴(74, 75)은 각각 공진기 타입 유전체 저역 통과 여파기(100)가 동작함에 따라 소정의 인덕턴스 값을 갖게 된다.The fourth and fifth inductor patterns 74 and 75 are disposed on the upper surface of the dielectric block 10 as shown in FIG. 7, and the third upper patterns 63a of the third resonator patterns 63a to 63, respectively. And the fourth upper pattern 64a of the fourth resonator patterns 64a to 64c and the fourth upper pattern 64a of the fourth resonator patterns 64a to 64c and the output pattern 50. The fourth and fifth inductor patterns 74 and 75 may serve as the fourth and fifth inductors L4 and L5 in the resonator type dielectric low pass filter 100, respectively. Accordingly, the fourth and fifth inductor patterns 74 and 75 have predetermined inductance values as the resonator type dielectric low pass filter 100 operates.
다음 도 10 내지 도 12를 참조하여, 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성에 대해 설명한다.Next, the frequency response characteristics of the resonator type dielectric low pass filter according to the embodiments of the present invention will be described with reference to FIGS. 10 to 12.
도 10 내지 도 12는 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 설명하기 위한 도면들이다.10 to 12 are diagrams for explaining the frequency response characteristics of the resonator type dielectric low pass filter in accordance with embodiments of the present invention.
도 10 내지 도 12를 참조하면, 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기는 로우 패스 필터의 응답 특성을 나타냄을 알 수 있다. 구체적으로, 공진홀(21~24)과 공진 패턴(61a~61c, 62a~62c, 63a~63c, 64a~64c)에 의해 형성된 공진기(Re1~Re4)의 개수가 늘어남에 따라, 보다 급격한 감쇄 특성을 나타냄을 알 수 있다. (도 10 내지 도 12의 S21 참조)10 to 12, it can be seen that the resonator type dielectric low pass filter according to the embodiments of the present invention exhibits a response characteristic of the low pass filter. Specifically, as the number of resonators Re1 to Re4 formed by the resonance holes 21 to 24 and the resonance patterns 61a to 61c, 62a to 62c, 63a to 63c, and 64a to 64c increases, the abrupt attenuation characteristics are more rapid. It can be seen that. (See S21 of FIGS. 10-12)
즉, 본 발명의 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 나타내는 도 11은 본 발명의 제1 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 나타내는 도 10과 비교하여, 컷 오프 주파수(C) 이후에서 보다 급격한 감쇄 특성을 보여준다. 또한, 본 발명의 제3 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 나타내는 도 12는 본 발명의 제1 및 제2 실시예에 따른 공진기 타입 유전체 저역 통과 여파기의 주파수 응답 특성을 나타내는 도 10 및 도 11과 비교하여, 컷 오프 주파수(C) 이후에서 보다 급격한 감쇄 특성을 보여준다.That is, FIG. 11 shows the frequency response characteristics of the resonator type dielectric low pass filter according to the second embodiment of the present invention, and FIG. 10 shows the frequency response characteristics of the resonator type dielectric low pass filter according to the first embodiment of the present invention. In comparison, a sharper attenuation characteristic is shown after the cutoff frequency (C). 12 shows frequency response characteristics of the resonator type dielectric low pass filter according to the third embodiment of the present invention. FIG. 12 shows frequency response characteristics of the resonator type dielectric low pass filter according to the first and second embodiments of the present invention. In comparison with FIGS. 10 and 11, a more rapid attenuation characteristic is shown after the cutoff frequency C. FIG.
따라서, 이로부터 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기는 회로에서 로우 패스 필터로 매우 훌륭하게 동작함을 알 수 있으며, 나아가 공진기(Re1~Re4)의 개수를 조절함으로써 신호의 감쇄 특성 역시 조절할 수 있음을 알 수 있다. 즉, 필요에 따라 공진기(Re1~Re4)의 개수를 늘릴 수가 있으므로, 급격한 감쇄 특성의 구현이 가능하다.Therefore, it can be seen that the resonator type dielectric low pass filter according to the embodiments of the present invention works very well as a low pass filter in the circuit, and furthermore, the attenuation characteristics of the signal by adjusting the number of resonators Re1 to Re4. It can be seen that it can also be adjusted. That is, since the number of resonators Re1 to Re4 can be increased as necessary, it is possible to implement a sudden attenuation characteristic.
또한, 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기는 유전체 블록(10) 상에 형성되기 때문에, 통신 소자에 실장될 때 비교적 좁은 공간을 차지하게 되며, 회로에서의 삽입 손실도 낮은 장점이 있다.In addition, since the resonator type dielectric low pass filter according to the embodiments of the present invention is formed on the dielectric block 10, it occupies a relatively narrow space when mounted in a communication device, and also has low insertion loss in a circuit. There is this.
다음 도 13을 참조하여, 본 발명의 일 실시예에 따른 통신 소자에 대해 설명한다.Next, a communication element according to an exemplary embodiment of the present invention will be described with reference to FIG. 13.
도 13은 본 발명의 일 실시예에 따른 통신 소자를 상부에서 바라본 사시도이다.13 is a perspective view from above of a communication device according to an embodiment of the present invention.
도 13을 참조하면, 본 발명의 일 실시예에 따른 통신 소자(200)는 기판(210), 및 기판(210) 상에 실장된 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기(100)를 포함할 수 있다.Referring to FIG. 13, a communication device 200 according to an embodiment of the present invention may include a substrate 210 and a resonator type dielectric low pass filter 100 according to embodiments of the present invention mounted on the substrate 210. ) May be included.
기판(210)은 통신 소자()의 베이스(base)를 구성하는 부품으로써, 이러한 기판(210) 상에는 비록 도시하지는 않았으나, 통신 신호가 입력되는 신호 입력 단자(미도시), 통신 신호가 출력되는 신호 출력 단자(미도시) 및 접지 전극에 접속되는 접지 단자(미도시)가 형성될 수 있다.The substrate 210 is a component constituting the base of the communication element, and although not shown on the substrate 210, a signal input terminal (not shown) through which a communication signal is input and a signal from which a communication signal is output. An output terminal (not shown) and a ground terminal (not shown) connected to the ground electrode may be formed.
그리고, 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기(100)는 기판(210)상에 예를 들어, SMT(Surface Mounting Technology) 방식으로 실장되되, 접지 패턴(30, 31)이 기판(210)의 접지 단자(미도시)와, 입출력 패턴(40, 50)이 각각 기판(210)의 신호 입력 단자(미도시)와 신호 출력 단자(미도시)에 접속되도록 실장될 수 있다.In addition, the resonator type dielectric low pass filter 100 according to the embodiments of the present invention may be mounted on the substrate 210 by, for example, a surface mounting technology (SMT) method, and the ground patterns 30 and 31 may be disposed on the substrate. The ground terminal 210 and the input / output patterns 40 and 50 of the 210 may be mounted to be connected to the signal input terminal (not shown) and the signal output terminal (not shown) of the substrate 210, respectively.
이외에 기타 앞서 본 발명의 실시예들에 따른 공진기 타입 유전체 저역 통과 여파기(100)를 설명하면서 설명한 구성요소들에 대해서는 중복되는 설명을 생략하도록 한다.In addition to the other components described above while explaining the resonator type dielectric low pass filter 100 according to the embodiments of the present invention will be omitted overlapping.
이상 첨부된 도면을 참조하여 본 발명의 실시예들을 설명하였으나, 본 발명은 상기 실시예들에 한정되는 것이 아니라 서로 다른 다양한 형태로 제조될 수 있으며, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자는 본 발명의 기술적 사상이나 필수적인 특징을 변경하지 않고서 다른 구체적인 형태로 실시될 수 있다는 것을 이해할 수 있을 것이다. 그러므로 이상에서 기술한 실시예들은 모든 면에서 예시적인 것이며 한정적이 아닌 것으로 이해해야만 한다.Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments but may be manufactured in various forms, and having ordinary skill in the art to which the present invention pertains. It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.
본 발명은 저역 통과 여파기를 이용하는 통신 산업에 이용 가능하다. 그러나 이에 제한되는 것은 아니다.The invention is applicable to the telecommunications industry using low pass filters. However, it is not limited thereto.

Claims (14)

  1. 공진홀이 형성된 유전체 블록;A dielectric block in which resonance holes are formed;
    상기 유전체 블록의 적어도 일면에 배치된 접지 패턴;A ground pattern disposed on at least one surface of the dielectric block;
    상기 유전체 블록 상에 배치되고, 상기 접지 패턴과 각각 제1 및 제2 커패시터를 형성하도록 상기 접지 패턴으로부터 이격되게 배치된 입출력 패턴;An input / output pattern disposed on the dielectric block and spaced apart from the ground pattern to form first and second capacitors, respectively, and the ground pattern;
    상기 공진홀 내벽에 배치되되 그 중앙에 캐비티(cavity)를 갖는 공진기 패턴; 및A resonator pattern disposed on an inner wall of the resonator hole and having a cavity in the center thereof; And
    상기 유전체 블록 상에 상기 입출력 패턴 및 상기 공진기 패턴과 연결되게 배치되는 인덕터 패턴을 포함하는 공진기 타입 유전체 저역 통과 여파기.A resonator type dielectric low pass filter including an inductor pattern disposed on the dielectric block and connected to the input / output pattern and the resonator pattern.
  2. 제 1항에 있어서,The method of claim 1,
    상기 공진홀의 형상은 원형인 공진기 타입 유전체 저역 통과 여파기.And a resonator type dielectric low pass filter having a circular shape.
  3. 제 1항에 있어서,The method of claim 1,
    상기 공진기 패턴은,The resonator pattern is,
    상기 유전체 블록 상에 상기 인덕터 패턴과 연결되게 배치된 상부 패턴과,An upper pattern disposed on the dielectric block to be connected to the inductor pattern;
    상기 공진홀 내벽에 도전체가 도포되어 상기 상부 패턴과 연결되게 배치되고, 그 중앙에 캐비티가 형성된 내부 패턴과,An inner pattern formed on the inner wall of the resonance hole and connected to the upper pattern, and having a cavity formed in the center thereof;
    상기 유전체 블록 상에 상기 내부 패턴과 연결되게 배치된 하부 패턴을 포함하는 공진기 타입 유전체 저역 통과 여파기.A resonator type dielectric low pass filter comprising a lower pattern disposed on the dielectric block and connected to the inner pattern.
  4. 제 3항에 있어서,The method of claim 3, wherein
    상기 하부 패턴의 면적은 상기 상부 패턴의 면적보다 큰 공진기 타입 유전체 저역 통과 여파기.And an area of the lower pattern is larger than an area of the upper pattern.
  5. 제 3항에 있어서,The method of claim 3, wherein
    상기 하부 패턴은 상기 접지 패턴과 제3 커패시터를 형성하도록 상기 접지 패턴으로부터 이격되게 상기 유전체 블록 상에 배치된 공진기 타입 유전체 저역 통과 여파기.The lower pattern is a resonator type dielectric low pass filter disposed on the dielectric block to be spaced apart from the ground pattern to form a ground capacitor and a third capacitor.
  6. 제 3항에 있어서,The method of claim 3, wherein
    상기 공진홀은 제1 및 제2 공진홀을 포함하고,The resonance hole includes first and second resonance holes,
    상기 공진기 패턴은 상기 제1 공진홀 내벽에 배치된 제1 공진기 패턴과, 상기 제2 공진홀 내벽에 배치된 제2 공진기 패턴을 포함하고,The resonator pattern includes a first resonator pattern disposed on an inner wall of the first resonance hole, and a second resonator pattern disposed on an inner wall of the second resonance hole,
    상기 제1 공진기 패턴의 상기 하부 패턴은 상기 접지 패턴과 제3 커패시터를 형성하고,The lower pattern of the first resonator pattern forms the ground pattern and a third capacitor,
    상기 제2 공진기 패턴의 상기 하부 패턴은 상기 접지 패턴과 제4 커패시터를 형성하는 공진기 타입 유전체 저역 통과 여파기.And a lower pattern of the second resonator pattern to form the ground pattern and a fourth capacitor.
  7. 제 6항에 있어서,The method of claim 6,
    상기 제1 공진기 패턴의 상기 하부 패턴과 상기 제2 공진기 패턴의 상기 하부 패턴은 제7 커패시터를 형성하도록 서로 이격되어 상기 유전체 블록 상에 배치된 공진기 타입 유전체 저역 통과 여파기.And the lower pattern of the first resonator pattern and the lower pattern of the second resonator pattern are disposed on the dielectric block to be spaced apart from each other to form a seventh capacitor.
  8. 제 6항에 있어서,The method of claim 6,
    상기 제1 공진기 패턴의 상기 하부 패턴의 면적과 상기 제2 공진기 패턴의 상기 하부 패턴의 면적은 서로 다른 공진기 타입 유전체 저역 통과 여파기.And an area of the lower pattern of the first resonator pattern and an area of the lower pattern of the second resonator pattern are different from each other.
  9. 제 3항에 있어서,The method of claim 3, wherein
    상기 공진홀은 제1 내지 제4 공진홀을 포함하고,The resonance hole may include first to fourth resonance holes,
    상기 공진기 패턴은 상기 제1 내지 제4 공진홀 내벽에 각각 배치된 제1 내지 제4 공진기 패턴을 포함하고,The resonator pattern may include first to fourth resonator patterns disposed on inner walls of the first to fourth resonator holes, respectively.
    상기 제1 내지 제4 공진기 패턴의 상기 하부 패턴은 각각 상기 접지 패턴과 제3 내지 제6 커패시터를 형성하는 공진기 타입 유전체 저역 통과 여파기.And the lower patterns of the first to fourth resonator patterns respectively form the ground pattern and the third to sixth capacitors.
  10. 제 9항에 있어서,The method of claim 9,
    상기 제1 공진기 패턴의 상기 하부 패턴과 상기 제2 공진기 패턴의 상기 하부 패턴은 제7 커패시터를 형성하고,The lower pattern of the first resonator pattern and the lower pattern of the second resonator pattern form a seventh capacitor,
    상기 제2 공진기 패턴의 상기 하부 패턴과 상기 제3 공진기 패턴의 상기 하부 패턴은 제8 커패시터를 형성하고,The lower pattern of the second resonator pattern and the lower pattern of the third resonator pattern form an eighth capacitor,
    상기 제3 공진기 패턴의 상기 하부 패턴과 상기 제4 공진기 패턴의 상기 하부 패턴은 제9 커패시터를 형성하도록 각각 서로 이격되어 상기 유전체 블록 상에 배치된 공진기 타입 유전체 저역 통과 여파기.And the lower pattern of the third resonator pattern and the lower pattern of the fourth resonator pattern are disposed on the dielectric block to be spaced apart from each other to form a ninth capacitor.
  11. 제 9항에 있어서,The method of claim 9,
    상기 제1 내지 제4 공진기 패턴 중 적어도 어느 하나의 상기 하부 패턴의 면적은 나머지의 상기 하부 패턴의 면적과 다른 공진기 타입 유전체 저역 통과 여파기.And an area of the lower pattern of at least one of the first to fourth resonator patterns is different from an area of the remaining lower pattern.
  12. 제 1항에 있어서,The method of claim 1,
    상기 접지 패턴은 상기 유전체 블록의 제1 면에 배치된 제1 접지 패턴과,The ground pattern may include a first ground pattern disposed on a first surface of the dielectric block;
    상기 유전체 블록의 제2 면에 상기 제1 접지 패턴과 마주보도록 배치된 제2 접지 패턴을 포함하는 공진기 타입 유전체 저역 통과 여파기.And a second ground pattern disposed on the second surface of the dielectric block so as to face the first ground pattern.
  13. 접지 단자, 신호 입력 단자 및 신호 출력 단자가 형성된 기판; 및A substrate on which a ground terminal, a signal input terminal and a signal output terminal are formed; And
    상기 기판 상에 실장된 공진기 타입 유전체 저역 통과 여파기를 포함하되,A resonator type dielectric low pass filter mounted on the substrate,
    상기 공진기 타입 유전체 저역 통과 여파기는,The resonator type dielectric low pass filter,
    공진홀이 형성된 유전체 블록과,A dielectric block having a resonance hole formed therein;
    상기 유전체 블록의 적어도 일면에 배치되고 상기 접지 단자와 접속되는 접지 패턴과,A ground pattern disposed on at least one surface of the dielectric block and connected to the ground terminal;
    상기 유전체 블록 상에 상기 접지 패턴과 각각 제1 및 제2 커패시터를 형성하도록 상기 접지 패턴으로부터 이격되게 배치되고 상기 신호 입력 단자 및 신호 출력 단자에 각각 접속되는 입출력 패턴과,An input and output pattern spaced apart from the ground pattern and connected to the signal input terminal and the signal output terminal to form first and second capacitors and the ground pattern on the dielectric block, respectively;
    상기 공진홀 내벽에 배치되되 그 중앙에 캐비티를 갖는 공진기 패턴과,A resonator pattern disposed on an inner wall of the resonance hole and having a cavity in the center thereof;
    상기 유전체 블록 상에 상기 입출력 패턴 및 상기 공진기 패턴과 연결되게 배치되는 인덕터 패턴을 포함하는 통신 소자.And an inductor pattern disposed on the dielectric block to be connected to the input / output pattern and the resonator pattern.
  14. 제 13항에 있어서,The method of claim 13,
    상기 공진기 타입 유전체 저역 통과 여파기는 SMT 방식으로 상기 기판에 실장되는 통신 소자.And the resonator type dielectric low pass filter is mounted on the substrate in an SMT manner.
PCT/KR2010/008106 2010-09-15 2010-11-16 Resonator type dielectric low pass filter and communication device including same WO2012036343A1 (en)

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