WO2016148340A1 - Dielectric diplexer - Google Patents

Dielectric diplexer Download PDF

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Publication number
WO2016148340A1
WO2016148340A1 PCT/KR2015/005277 KR2015005277W WO2016148340A1 WO 2016148340 A1 WO2016148340 A1 WO 2016148340A1 KR 2015005277 W KR2015005277 W KR 2015005277W WO 2016148340 A1 WO2016148340 A1 WO 2016148340A1
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WO
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Prior art keywords
pattern
input
resonance
output
patterns
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PCT/KR2015/005277
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French (fr)
Korean (ko)
Inventor
류지만
김덕한
장대훈
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(주)파트론
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Publication of WO2016148340A1 publication Critical patent/WO2016148340A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/207—Hollow waveguide filters
    • H01P1/208—Cascaded cavities; Cascaded resonators inside a hollow waveguide structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/207—Hollow waveguide filters
    • H01P1/208—Cascaded cavities; Cascaded resonators inside a hollow waveguide structure
    • H01P1/2084—Cascaded cavities; Cascaded resonators inside a hollow waveguide structure with dielectric resonators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/213—Frequency-selective devices, e.g. filters combining or separating two or more different frequencies

Definitions

  • the present invention relates to a dielectric diplexer, and more particularly, to a dielectric diplexer capable of filtering and outputting an input signal according to a frequency band.
  • Japanese Patent Laid-Open No. 2001-136004 discloses such a dielectric monoblock diplexer.
  • the insertion loss is small and the physical size is small, so that it can be miniaturized.
  • conventional diplexers using dielectric monoblocks have been difficult to have wideband characteristics, and it is difficult to control parasitic capacitances between resonance holes. Accordingly, there is a need for a dielectric diplexer that can solve this problem.
  • the problem to be solved by the present invention is to provide a diplexer having a small size and low insertion loss.
  • Another object of the present invention is to provide a diplexer having a configuration capable of maximally suppressing unintended parasitic capacitance between resonance holes formed in a dielectric monoblock.
  • Another object of the present invention is to provide a diplexer capable of securing a wide bandwidth and having excellent attenuation characteristics of a cutoff band.
  • Dielectric diplexer of the present invention for solving the above problems, a dielectric block formed with a plurality of resonant holes penetrating from the first surface to the second surface facing the first surface, the inner pattern formed on the inner surface of the resonance hole A ground pattern formed on at least a portion of an outer surface of the dielectric block, first to third input / output patterns formed on the dielectric block, a low pass filter part, a band pass filter part, and an electrical connection with the ground pattern; And a metal cover facing the surface and spaced apart from each other, wherein the low pass filter unit is formed on the first surface of the first resonance hole located on one side of the dielectric block among the plurality of resonance holes and on the first surface, A first inductance pattern connected to the input / output pattern and the inner pattern of the first resonance hole, and formed on the first surface, and connected to the second input / output pattern and the inner pattern of the first resonance hole.
  • the first to third input / output patterns may be sequentially arranged in the dielectric block, and the first resonance hole may be disposed between the first input / output pattern and the second input / output pattern.
  • the second resonance hole may be located between the second input / output pattern and the third input / output pattern.
  • the first resonance hole includes a plurality of resonance holes arranged in one direction
  • the low pass filter unit is formed on the first surface, between the plurality of first resonance holes In may further include a third inductance pattern connecting each of the internal patterns.
  • the first capacitance pattern may include a plurality of patterns connected to the inner patterns of each of the plurality of first resonance holes and spaced apart from each other.
  • the second resonant hole includes a plurality of resonant holes arranged in one direction, the second capacitance pattern is connected to the internal patterns of each of the plurality of second resonant holes, It may include a plurality of patterns spaced apart.
  • the inner pattern of the second resonance hole may be electrically connected to the ground pattern formed on the second surface.
  • the metal cover, the coupling portion coupled to the ground pattern formed on the surface connecting the first surface and the second surface and bent at one end of the coupling portion spaced apart from the first surface It may include a bent portion facing the state.
  • the coupling portion may be coupled to the ground pattern through a conductive adhesive.
  • the metal cover is coupled to one of the surfaces connecting the first surface and the second surface, the first to third input and output patterns are the first surface and the second surface It may be formed on the other surface facing the one of the surfaces connecting the.
  • the dielectric diplexer according to the embodiment of the present invention is small in size and low in insertion loss.
  • the dielectric diplexer according to an embodiment of the present invention can suppress the unintended parasitic capacitance between resonance holes formed in the dielectric monoblock to the maximum.
  • the dielectric diplexer according to an embodiment of the present invention has a feature of excellent attenuation characteristic of the blocking band while ensuring a wide bandwidth.
  • FIG. 1 is a perspective view of a dielectric diplexer according to an embodiment of the present invention.
  • FIG. 2 is an exploded perspective view of a dielectric diplexer according to an embodiment of the present invention.
  • FIG. 3 is a perspective view of the dielectric diplexer according to the exemplary embodiment viewed from a direction different from that of FIG. 1.
  • FIG. 4 is an equivalent circuit diagram of a dielectric diplexer according to an embodiment of the present invention.
  • FIG. 5 is a graph illustrating frequency response characteristics of a dielectric diplexer according to an embodiment of the present invention.
  • first or second may be used to describe various components.
  • the components are not limited to the above terms. The term may be used to distinguish one component from another. Therefore, the first component referred to herein may be a second component within the technical spirit of the present invention.
  • FIG. 1 is a perspective view of a dielectric diplexer according to an embodiment of the present invention.
  • 2 is an exploded perspective view of a dielectric diplexer according to an embodiment of the present invention.
  • 3 is a perspective view of the dielectric diplexer according to the exemplary embodiment viewed from a direction different from that of FIG. 1.
  • the dielectric diplexer includes a dielectric block 110, a resonance hole 120, an internal pattern 130, a ground pattern 140, an input / output pattern 150, and a low pass filter unit 200. ), The band pass filter unit 300 and the metal cover 400.
  • the dielectric block 110 is formed in a block shape such as a cube.
  • the dielectric block 110 may be formed of a ceramic material, an alumina material, or the like.
  • the dielectric block 110 is preferably formed of a material having a relative dielectric constant of 3.5 or more.
  • the dielectric block 110 is illustrated as having a rectangular parallelepiped shape, but is not limited thereto.
  • the dielectric block 110 may include a first surface 111 and a second surface 112 facing each other.
  • the dielectric block 110 may include surfaces connecting the first surface 111 and the second surface 112.
  • the first surface 111 and the second surface 112 may be front and rear surfaces of the dielectric block 110.
  • the surfaces connecting the first surface 111 and the second surface 112 may include an upper surface, a lower surface, a left side, and a right side.
  • the resonance hole 120 may be formed in the dielectric block 110.
  • the resonance hole 120 may penetrate from the first surface 111 to the second surface 112 of the dielectric block 110.
  • the resonance hole 120 may have a circular cross section. By the resonance hole 120, a cylindrical cavity may be formed in the dielectric block 110.
  • a plurality of resonance holes 120 may be formed in the dielectric block 110.
  • the plurality of resonance holes 120 may be arranged in one direction in the dielectric block 110.
  • the plurality of resonance holes 120 may be arranged from one side to the other side of the dielectric block 110 in a parallel form, respectively.
  • a portion of the plurality of resonance holes 120 biased to one side of the dielectric block 110 may be the first resonance hole 121.
  • another portion of the plurality of resonant holes 120 which is biased to the other side of the dielectric block 110 may be the second resonant hole 122.
  • the first resonance hole 121 and the second resonance hole 122 may include a plurality of resonance holes 120, respectively.
  • the plurality of resonant holes 120 not the first resonant hole 121 but also the second resonant hole 122 other than the resonant hole 120 may exist.
  • 310 may be a conductive layer bonded to the surface of the dielectric block 110.
  • These patterns 130, 140, 150, 210, 220, 230, 240, and 310 may be formed of a conductive material through which electricity flows.
  • the patterns 130, 140, 150, 210, 220, 230, 240, and 310 may be formed of a plating layer bonded to the surface of the dielectric block 110.
  • the thicknesses of the patterns 130, 140, 150, 210, 220, 230, 240, and 310 are not separately expressed in the accompanying drawings, the patterns 130, 140, 150, 210, 220, 230, and 240 are not separately represented.
  • 310 may be formed of a thin film having a thickness of several ⁇ m to several hundred ⁇ m on the surface of the dielectric block 110.
  • the inner pattern 130 is formed on the inner surface of the resonance hole 120.
  • the inner pattern 130 may extend from the opening surface of the first surface 111 side of the resonance hole 120 to the opening surface of the second surface 112 side.
  • the inner pattern 130 formed on each opening surface side may be electrically connected to other patterns formed on the first surface 111 and the second surface 112 around each opening surface. This electrical connection will be described in detail below.
  • the ground pattern 140 is formed on at least a portion of the outer surface of the dielectric block 110.
  • the ground pattern 140 may be formed to surround the input / output pattern, inductance patterns 210, 220, and 230 and the capacitance patterns 240 and 310 to be described later.
  • the ground pattern 140 may be formed on all surfaces of the outer surface of the dielectric block 110, but in some cases, the ground pattern 140 may not be formed. In more detail, the ground pattern 140 may not be formed on the left side and / or the right side of the dielectric block 110.
  • the input / output pattern 150 is formed on at least a portion of an outer surface of the dielectric block 110.
  • the input / output pattern 150 may be formed on the first surface 111 or the lower surface of the dielectric block 110.
  • the dielectric diplexer may be mounted so as to be oriented so as to contact the substrate on which the bottom surface is mounted.
  • the input / output pattern 150 may include a plurality of input / output patterns.
  • the input / output pattern 150 may include first to third input / output patterns 151, 152, and 153 that are distinguished from each other.
  • the first to third input / output patterns 151, 152, and 153 may be formed in the dielectric block 110 in one direction.
  • the first input / output pattern 151 is formed on one side of the dielectric block 110
  • the second input / output pattern 152 is on one side and the other side of the dielectric block 110.
  • the third input / output pattern 153 may be formed on the other side of the dielectric block 110.
  • Each input / output pattern 150 may be used to input or output a signal to the dielectric diplexer.
  • the second input / output pattern 152 may receive a signal as an input terminal
  • the first and third input / output patterns 153 may output a frequency selective filtered signal as an output terminal. have.
  • the dielectric diplexer includes a low pass filter unit 200 and a band pass filter unit 300 formed at spaced positions, respectively.
  • the low pass filter unit 200 may be formed at one side of the dielectric block 110
  • the band pass filter unit 300 may be formed at the other side of the dielectric block 110. More specifically, the low pass filter unit 200 may be formed between a portion of the first input / output pattern 151 and the second input / output pattern 152 of the dielectric block 110.
  • the band pass filter unit 300 may be formed between the second input / output pattern 152 and the third input / output pattern 153 of the dielectric block 110.
  • the low pass filter unit 200 will be described first.
  • the low pass filter unit 200 includes a first resonance hole 121, a first inductance pattern 210, a second inductance pattern 220, a third inductance pattern 230, and a first capacitance pattern 240. .
  • the first resonant hole 121 may be a part of the plurality of resonant holes 120 biased to one side of the dielectric block 110.
  • the first resonance hole 121 may include a plurality of resonance holes 121. 2 and 3, five resonance holes 121 formed at one side of the dielectric block 110 are illustrated as the first resonance holes 121, but the number and positions of the first resonance holes 121 are It can be changed according to the design of those skilled in the art.
  • the first to third inductance patterns 210, 220, and 230 are formed on the first surface 111 of the dielectric block 110.
  • the first capacitance pattern 240 is formed on the second surface 112 of the dielectric block 110. Accordingly, the first to third inductance patterns 210, 220, and 230 and the first capacitance pattern 240 are formed on surfaces facing each other.
  • the first to third inductance patterns 210, 230, and 230 and the first capacitance pattern 240 are formed so as not to be directly connected to the ground pattern 140.
  • the first to third inductance patterns 230, the first capacitance pattern 240, and the ground pattern 140 may be formed in a non-pattern region, which is a non-conductive region, to be spaced apart from each other.
  • the non-patterned region may be a portion where the conductive pattern formed on the dielectric block 110 is removed using a laser or the like.
  • a first inductance pattern 210 is formed on the first surface 111 and the internal patterns of the first input / output pattern 151 and the first resonance hole 121 are described. 131 is connected.
  • the second inductance pattern 220 is formed on the first surface 111 and is connected to the second input / output pattern 152 and the inner pattern 131 of the first resonance hole 121.
  • the third inductance pattern 230 is formed on the first surface 111 and connects the respective internal patterns 130 between the plurality of first resonance holes 121.
  • the first inductance pattern 210 is connected to the internal pattern 130 of the resonance hole 120 located at one end of the first input / output pattern 151 and the first resonance hole 121. .
  • the first inductance pattern 210 is opened on the first surface 111 of the first surface 111 of the resonance hole 120 located at one end of the first resonance hole 121 in the first input / output pattern 151 on the first surface 111. It extends around the sphere.
  • the first inductance pattern 210 around the opening surface of the first surface 111 and the internal pattern 130 of the resonance hole 120 are electrically connected to each other.
  • the first inductance pattern 210 may be formed in a line shape having a predetermined thickness. The inductance between the first input / output pattern 151 and the inner pattern 131 of the first resonance hole may be changed according to the shape of the line and the thickness of the line.
  • the second inductance pattern 220 is connected to the internal pattern 130 of the resonance hole 120 located at the other end of the second input / output pattern 152 and the first resonance hole 121.
  • the second inductance pattern 220 is opened on the first surface 111 side of the resonance hole 120 located at the other end of the first resonance hole 121 in the second input / output pattern 152 on the first surface 111. It extends around the sphere.
  • the second inductance pattern 220 around the opening surface of the first surface 111 and the internal pattern 130 of the resonance hole 120 are electrically connected to each other.
  • the second inductance pattern 220 may be formed in a line shape having a predetermined thickness. The inductance between the second input / output pattern 152 and the inner pattern 131 of the first resonance hole may be changed according to the shape of the line and the thickness of the line.
  • the third inductance pattern 230 connects the respective internal patterns 130 of the plurality of first resonance holes 121 from one side to the other side.
  • the third inductance pattern 230 connects the internal patterns 130 around the opening surface on the side of the first surface 111 of each of the plurality of first resonance holes 121 on the first surface 111.
  • the third inductance pattern 230 may be disposed between the adjacent resonance holes 120 among the plurality of first resonance holes 121 to connect the respective internal patterns 130.
  • the third inductance pattern 230 may be formed in a line shape having a predetermined thickness. The inductance between the internal patterns 131 of the plurality of first resonance holes may be changed according to the shape of the line and the thickness of the line.
  • the first capacitance pattern 240 is formed on the second surface 112, is connected to the internal pattern 131 of the first resonance hole 121, and is grounded. Spaced apart from the pattern 140.
  • the first capacitance pattern 240 may be connected to the internal patterns 130 of each of the plurality of first resonance holes 121, and may include a plurality of patterns spaced apart from each other.
  • the first capacitance pattern 240 is formed around the opening surface of the second surface 112 side of the first resonance hole 121 to be electrically connected to the internal pattern 130.
  • the first capacitance pattern 240 is surrounded by the non-patterned area and spaced apart from the surrounding ground pattern 140.
  • the first capacitance may be formed in a predetermined shape, and may be spaced apart from the ground pattern 140 at a predetermined interval by the non-patterned region.
  • the capacitance between the internal pattern 131 of the first resonance hole 121 and the ground pattern 140 may be changed according to the shape and the spacing interval of the first capacitance pattern 240.
  • the low pass filter unit 200 including the first resonance hole 121, the first inductance pattern 210, the second inductance pattern 220, the third inductance pattern 230, and the first capacitance pattern 240. Can function as a low pass filter.
  • the low pass filter 200 may function as a low pass filter between the first input / output pattern 151 and the second input / output pattern 152. Detailed description thereof will be described later.
  • band pass filter 300 will be described.
  • the band pass filter unit 300 includes a second resonance hole 122 and a second capacitance pattern 310.
  • the second resonator hole 122 may be a portion of the plurality of resonant holes 120 that are biased to the other side of the dielectric block 110.
  • the second resonance hole 122 may include a plurality of resonance holes 122. 2 and 3, four resonance holes 122 formed on the other side of the dielectric block 110 are illustrated as second resonance holes 122, but the number and positions of the second resonance holes 122 are It can be changed according to the design of those skilled in the art.
  • a ground resonance hole may be formed between the first resonance hole 121 and the second resonance hole 122. The number and position of the ground resonant holes can be changed according to the design of those skilled in the art.
  • the second capacitance pattern 310 is formed on the first surface 111 of the dielectric block 110. Accordingly, the second capacitance pattern 310 is formed on the same surface of the first to third inductance patterns 230 and the dielectric block 110 of the low pass filter unit 200.
  • the second capacitance pattern 310 is formed so as not to be directly connected to the ground pattern 140.
  • the second capacitance pattern 310 is formed to be spaced apart from each other on the first surface 111 with the non-pattern region interposed therebetween.
  • the second capacitance pattern 310 may be connected to the ground pattern 140 at the second surface 112 through the inner pattern 132 of the second resonance hole 122. There is a number.
  • the second capacitance pattern 310 is formed on the first surface 111, is connected to the internal pattern 132 of the second resonance hole 122, and is grounded.
  • the pattern 140 is spaced apart from the second and third input / output patterns 152 and 153.
  • the second capacitance pattern 310 is formed around the opening surface of the first surface 111 side of the second resonance hole 122 to be electrically connected to the internal pattern 130.
  • the second capacitance pattern 310 is surrounded by the non-patterned area and spaced apart from the surrounding ground pattern 140.
  • the second capacitance pattern 310 may be formed in a predetermined shape, and may be spaced apart from the ground pattern 140 at a predetermined interval by the non-patterned region.
  • the capacitance between the inner pattern 132 of the second resonance hole 122 and the ground pattern 140 may be changed according to the shape and spacing interval of the second capacitance pattern 310.
  • the second capacitance pattern 310 is spaced apart from the second and third input / output patterns 153 on the first surface 111.
  • a non-pattern region may be formed between the second capacitance pattern 310 and the second and third input / output patterns 153 to be spaced apart from each other.
  • the capacitance between the internal pattern 132 of the second resonance hole 122 and the second and third input / output patterns 153 may be changed according to the shape of the second capacitance and the separation interval.
  • the internal pattern 130 on the second surface 112 side of the second resonance hole 122 may be electrically connected to the ground pattern 140 formed on the second surface 112. Is connected.
  • the band pass filter unit 300 including the second resonance hole 122 and the second capacitance pattern 310 may function as a band pass filter.
  • the band pass filter unit 300 may function as a band pass filter between the second input / output pattern 152 and the third input / output pattern 153. Detailed description thereof will be described later.
  • the metal cover 400 includes a coupling part 410 coupled to the ground pattern 140 and a bent part 420 formed by bending at one end of the coupling part 410.
  • the coupling part 410 may be coupled to the ground pattern 140 formed on the surface connecting the first surface 111 and the second surface 112 of the dielectric block 110.
  • the ground pattern 140 may be combined with the ground pattern 140 formed on the upper surface of the dielectric block 110.
  • the coupling part 410 and the ground pattern 140 may be coupled through solder.
  • the coupling part 410 may be coupled to the first surface 111 side of the top surface of the dielectric block 110, and one end of the coupling part 410 may extend beyond the top surface of the dielectric block 110.
  • the bent portion 420 is bent at one end of the coupling portion 410 extending beyond the upper surface of the dielectric block 110.
  • the bent portion 420 may be bent substantially vertically at the coupling portion 410 to face the first surface 111 of the dielectric block 110.
  • the bent portion 420 and the first surface 111 of the dielectric block 110 are spaced apart by a predetermined distance. Accordingly, the bent portion 420 is spaced apart from the first to third inductance pattern 230 and the first to second capacitance pattern 310 formed on the first surface 111 of the dielectric block 110 by a predetermined distance. Overlap in state.
  • the metal cover 400 may be formed of a conductive metal material.
  • the metal cover 400 may be stainless steel, copper, tin, lead, or the like. Since the metal cover 400 is coupled to the ground pattern 140, the metal cover 400 has a ground potential as a whole. Especially.
  • the bent portion 420 facing the first surface 111 in a state spaced apart has a ground potential so that the first to third inductance patterns 230 and the first to second capacitance patterns formed on the first surface 111. Unintentional coupling that can occur between 310 can be suppressed as much as possible. Without the metal cover 400, unintended coupling between components may occur between the first to third inductance patterns 230 and the first to second capacitance patterns 310 formed on the first surface 111. have. The occurrence of such coupling causes a lack of sufficient attenuation in non-pass band portions of the low pass filter and the band pass filter.
  • the metal cover 400 may include a tuning hole.
  • the tuning hole is an opening formed near a position corresponding thereto to adjust the shape of the first to third inductance patterns 230 and the first to second capacitance patterns 310.
  • FIG. 4 is an equivalent circuit diagram of a dielectric diplexer according to an embodiment of the present invention.
  • the low pass filter unit 200 and the band pass filter unit 300 will be described with reference to FIG. 4.
  • the equivalent circuit of FIG. 4 corresponds to the main inductance and capacitance of the low pass filter 200 and the band pass filter 300. Thus, some of the incidental inductance and capacitance that may occur between each component of the dielectric diplexer may not be shown in an equivalent circuit.
  • the low pass filter unit 200 is formed between the first input / output terminal port1 and the second input / output terminal port2 on an equivalent circuit.
  • the first input / output terminal port1 may correspond to the second input / output pattern 152 in the dielectric diplexer, and the second input / output terminal port2 may correspond to the first input / output pattern 151 in the dielectric diplexer. have.
  • the first input / output terminal port1 may be an antenna terminal. When a signal is input through the first input / output terminal port1, a low frequency signal may be filtered through the low pass filter unit 200 and output through the second input / output terminal port2.
  • the inductor L1 positioned between the second input / output terminal port2 and the internal pattern 130 of the first through hole may correspond to the first inductance pattern 210 of the dielectric diplexer.
  • the inductor L6 positioned between the first input / output terminal port1 and the inner pattern 130 of the second through hole may correspond to the second inductance pattern 220 of the dielectric diplexer.
  • the inductors L2, L3, L4, and L5 positioned between the internal patterns 131 of the first through holes 121 may correspond to the third inductance pattern 230 of the dielectric diplexer.
  • the capacitors C11, C12, C13, C14, and C15 positioned between the inner pattern 131 of the first through hole 121 and the ground may correspond to the first capacitance pattern 240 of the dielectric diplexer.
  • the capacitors C16, C17, C18, and C19 positioned between the internal patterns 131 of the first through holes 121 may have the internal patterns 131 of the first through holes 121 adjacent to each other in the dielectric diplexer. It may correspond to the capacitance generated between.
  • the capacitors C31 and C32 positioned between the first and second input / output terminals port1 and port2 and the ground may have a ground pattern 140 adjacent to the first and second input / output patterns 151 and 152 in the dielectric diplexer. It may correspond to the capacitance generated between.
  • the band pass filter is formed between the first input / output terminal port1 and the third input / output terminal port3 on an equivalent circuit.
  • the third input / output terminal port3 may correspond to the third input / output pattern 153 in the dielectric diplexer.
  • the capacitors C21, C22, C23, and C24 positioned between the inner pattern 132 of the second through hole 122 and the ground may be disposed between the second capacitance pattern 310 and the ground pattern 140 of the dielectric diplexer. It can correspond to the capacitance.
  • the capacitor C5 positioned between the internal pattern 132 of the through hole and the first input / output terminal port1 adjacent to the first input / output terminal port1 of the second through hole 122 may have a dielectric diplexer. Adjacent to the second input / output pattern 152 of the second through hole 122 to correspond to the capacitance between the second capacitance pattern 310 and the second input / output pattern 152 connected to the inner pattern 132 of the through hole. Can be.
  • the capacitor C1 positioned between the internal pattern 132 of the through hole and the third input / output terminal port3 adjacent to the third input / output terminal port3 of the second through hole 122 may have a dielectric diplexer.
  • the capacitance between the second capacitance pattern 310 and the third input / output pattern 153 connected to the internal pattern 132 of the through hole adjacent to the third input / output pattern 153 among the second through holes 122 may correspond to the capacitance. have.
  • the capacitors C2, C3, C4, and C5 positioned between the inner patterns 132 of the second through holes 122 are disposed between the inner patterns 132 of the second through holes 122 adjacent to each other in the dielectric diplexer. It may correspond to the capacitance generated in.
  • 5 is a graph illustrating frequency response characteristics of a dielectric diplexer according to an embodiment of the present invention. 5 is a result of measuring the second input / output pattern 152 of the dielectric diplexer by using the port 1 and the first input / output pattern 151 as the port 2 and the third input / output pattern 153 as the port 3.
  • one side of the dielectric diplexer is approximately 2.2. It can be seen that it functions as a low pass filter that passes signals that are in the lower frequency band than GHz.
  • the other side of the dielectric diplexer is It can be seen that it functions as a band pass filter that passes signals in the approximately 2.3 GHz to 2.4 GHz band.

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Abstract

A dielectric diplexer is disclosed. The dielectric diplexer according to the present invention comprises: a dielectric block having a plurality of resonance holes formed to penetrate from a first surface to a second surface, which faces the first surface; inner patterns formed on inner surfaces of the resonance holes, respectively; a grounding pattern formed on at least a part of the outer surface of the dielectric block; first to third input/output patterns formed on the dielectric block; a low pass filter unit; a band pass filter unit; and a metal cover, which is electrically connected to the grounding pattern, and which faces the first surface while being spaced therefrom, wherein the low pass filter unit comprises a first resonance hole positioned on one side of the dielectric block among the plurality of resonance holes, a first inductance pattern formed on the first surface and connected to the first input/output pattern and to the inner pattern of the first resonance hole, a second inductance pattern formed on the first surface and connected to the second input/output pattern and to the inner pattern of the first resonance hole, and a first capacitance pattern formed on the second surface, connected to the inner pattern of the first resonance hole, and spaced from the grounding pattern, and the band pass filter unit comprises a second resonance hole formed on the other side of the dielectric block among the plurality of resonance holes and a second capacitance pattern formed on the first surface, connected to the inner pattern of the second resonance hole, and spaced from the grounding pattern and from the second and third input/output patterns.

Description

유전체 다이플렉서Dielectric diplexer
본 발명은 유전체 다이플렉서에 관한 것으로, 더욱 상세하게는 입력된 신호를 주파수 대역에 따라 필터링하여 출력할 수 있는 유전체 다이플렉서에 관한 것이다.The present invention relates to a dielectric diplexer, and more particularly, to a dielectric diplexer capable of filtering and outputting an input signal according to a frequency band.
일반적인 무선 통신 시스템에서는 다양한 종류의 다이플렉서가 사용된다. 종래에는 주파수 선택성 필터로서, LC 집중소자나 마이크로 스트립 선호 등이 사용되었다. 그러나 이러한 종래의 구성은 삽입 손실이 크다든지 물리적으로 크기가 커서 제품의 소형화가 어렵다는 문제점을 가지고 있다.Various types of diplexers are used in general wireless communication systems. Conventionally, as the frequency selective filter, an LC concentrator or a micro strip preference is used. However, such a conventional configuration has a problem that it is difficult to miniaturize a product due to large insertion loss or physical size.
이러한 문제를 해결하기 위해 유전체 모노블록을 이용한 다이플렉서가 다양한 구조로 시도되고 있다. 일본국 공개특허공보 특개2001-136004호(2011년5월18일 공개)에는 이러한 유전체 모노블록 다이플렉서가 개시되어 있다. 유전체 모노블록을 이용한 다이플렉서의 경우 삽입 손실이 작으면서 물리적인 크기도 작아 소형화도 가능하다. 그러나 종래의 유전체 모노블록을 이용한 다이플렉서는 광대역 특성을 가지는 것이 어려웠고, 공진홀 사이의 기생 커패시턴스를 제어하는 것이 난해하다는 문제가 있었다. 이에 따라 이러한 문제를 해결할 수 있는 유전체 다이플렉서에 대한 요구가 존재하였다.In order to solve this problem, diplexers using dielectric monoblocks have been tried in various structures. Japanese Patent Laid-Open No. 2001-136004 (published May 18, 2011) discloses such a dielectric monoblock diplexer. In the case of a diplexer using a dielectric monoblock, the insertion loss is small and the physical size is small, so that it can be miniaturized. However, conventional diplexers using dielectric monoblocks have been difficult to have wideband characteristics, and it is difficult to control parasitic capacitances between resonance holes. Accordingly, there is a need for a dielectric diplexer that can solve this problem.
본 발명이 해결하려는 과제는, 크기가 소형이면서 삽입 손실이 작은 다이플렉서를 제공하는 것이다. The problem to be solved by the present invention is to provide a diplexer having a small size and low insertion loss.
본 발명이 해결하려는 다른 과제는, 유전체 모노블록에 형성된 공진홀 사이의 의도하지 않은 기생 커패시턴를 최대한 억제할 수 있는 구성을 가지는 다이플렉서를 제공하는 것이다.Another object of the present invention is to provide a diplexer having a configuration capable of maximally suppressing unintended parasitic capacitance between resonance holes formed in a dielectric monoblock.
본 발명이 해결하려는 또 다른 과제는, 넓은 대역폭을 확보할 수 있으면서 차단 대역의 감쇄 특성이 우수한 다이플렉서를 제공하는 것이다.Another object of the present invention is to provide a diplexer capable of securing a wide bandwidth and having excellent attenuation characteristics of a cutoff band.
상기 과제를 해결하기 위한 본 발명의 유전체 다이플렉서는, 제1 면에서 상기 제1 면에 대향하는 제2 면까지 관통하는 복수의 공진홀이 형성된 유전체 블록, 상기 공진홀 내부면에 형성된 내부 패턴, 상기 유전체 블록의 외부면의 적어도 일부에 형성된 접지 패턴, 상기 유전체 블록에 형성된 제1 내지 제3 입출력 패턴, 로우 패스 필터부, 밴드 패스 필터부, 및 상기 접지 패턴과 전기적으로 연결되고 상기 제1 면과 이격된 상태로 대향되는 금속 커버를 포함하고,상기 로우 패스 필터부는, 상기 복수의 공진홀 중 상기 유전체 블록의 일측에 위치하는 제1 공진홀, 상기 제1 면에 형성되고, 상기 제1 입출력 패턴 및 상기 제1 공진홀의 내부 패턴과 연결되는 제1 인덕턴스 패턴, 상기 제1 면에 형성되고, 상기 제2 입출력 패턴 및 상기 제1 공진홀의 내부 패턴과 연결되는 제2 인덕턴스 패턴 및 상기 제2 면에 형성되고, 상기 제1 공진홀의 내부 패턴과 연결되고, 상기 접지 패턴과 이격되는 제1 커패시턴스 패턴을 포함하고, 상기 밴드 패스 필터부는, 상기 복수의 공진홀 중 상기 유전체 블록의 타측에 위치하는 제2 공진홀 및 상기 제1 면에 형성되고, 상기 제2 공진홀의 내부 패턴과 연결되고, 상기 접지 패턴 및 상기 제2, 제3 입출력 패턴과 이격되는 제2 커패시턴스 패턴을 포함한다.Dielectric diplexer of the present invention for solving the above problems, a dielectric block formed with a plurality of resonant holes penetrating from the first surface to the second surface facing the first surface, the inner pattern formed on the inner surface of the resonance hole A ground pattern formed on at least a portion of an outer surface of the dielectric block, first to third input / output patterns formed on the dielectric block, a low pass filter part, a band pass filter part, and an electrical connection with the ground pattern; And a metal cover facing the surface and spaced apart from each other, wherein the low pass filter unit is formed on the first surface of the first resonance hole located on one side of the dielectric block among the plurality of resonance holes and on the first surface, A first inductance pattern connected to the input / output pattern and the inner pattern of the first resonance hole, and formed on the first surface, and connected to the second input / output pattern and the inner pattern of the first resonance hole. A second inductance pattern formed on the second surface and a first capacitance pattern connected to an inner pattern of the first resonance hole and spaced apart from the ground pattern, wherein the band pass filter part comprises the plurality of resonance holes A second resonant hole disposed on the other side of the dielectric block and the first surface, the second resonant hole being connected to an inner pattern of the second resonant hole and spaced apart from the ground pattern and the second and third input / output patterns A capacitance pattern.
본 발명의 일 실시예에 있어서, 상기 제1 내지 제3 입출력 패턴은 상기 유전체 블록에서 순차적으로 배열되고, 상기 제1 공진홀은 상기 제1 입출력 패턴과 상기 제2 입출력 패턴 사이에 위치하고, 상기 제2 공진홀은 상기 제2 입출력 패턴과 상기 제3 입출력 패턴 사이에 위치할 수 있다.In example embodiments, the first to third input / output patterns may be sequentially arranged in the dielectric block, and the first resonance hole may be disposed between the first input / output pattern and the second input / output pattern. The second resonance hole may be located between the second input / output pattern and the third input / output pattern.
본 발명의 일 실시예에 있어서, 상기 제1 공진홀은 일 방향으로 배열된 복수의 공진홀을 포함하고, 상기 로우 패스 필터부는, 상기 제1 면에 형성되고, 상기 복수의 제1 공진홀 사이에서 각각의 내부 패턴을 연결하는 제3 인덕턴스 패턴을 더 포함할 수 있다.In one embodiment of the present invention, the first resonance hole includes a plurality of resonance holes arranged in one direction, the low pass filter unit is formed on the first surface, between the plurality of first resonance holes In may further include a third inductance pattern connecting each of the internal patterns.
본 발명의 일 실시예에 있어서, 상기 제1 커패시턴스 패턴은 상기 복수의 제1 공진홀 각각의 내부 패턴과 연결되고, 서로 이격되는 복수의 패턴을 포함할 수 있다.In one embodiment of the present invention, the first capacitance pattern may include a plurality of patterns connected to the inner patterns of each of the plurality of first resonance holes and spaced apart from each other.
본 발명의 일 실시예에 있어서, 상기 제2 공진홀은 일 방향으로 배열된 복수의 공진홀을 포함하고, 상기 제2 커패시턴스 패턴은 상기 복수의 제2 공진홀 각각의 내부 패턴과 연결되고, 서로 이격되는 복수의 패턴을 포함할 수 있다.In one embodiment of the present invention, the second resonant hole includes a plurality of resonant holes arranged in one direction, the second capacitance pattern is connected to the internal patterns of each of the plurality of second resonant holes, It may include a plurality of patterns spaced apart.
본 발명의 일 실시예에 있어서, 상기 제2 공진홀의 내부 패턴은 상기 제2 면에 형성된 접지 패턴과 전기적으로 연결될 수 있다.In one embodiment of the present invention, the inner pattern of the second resonance hole may be electrically connected to the ground pattern formed on the second surface.
본 발명의 일 실시예에 있어서, 상기 금속 커버는, 상기 제1 면 및 상기 제2 면을 연결하는 면에 형성된 접지 패턴과 결합 되는 결합부 및 상기 결합부의 일단에서 절곡 되어 상기 제1 면과 이격된 상태로 대향 되는 절곡부를 포함할 수 있다.In one embodiment of the present invention, the metal cover, the coupling portion coupled to the ground pattern formed on the surface connecting the first surface and the second surface and bent at one end of the coupling portion spaced apart from the first surface It may include a bent portion facing the state.
본 발명의 일 실시예에 있어서, 상기 결합부는 상기 접지 패턴과 전도성 접착제를 통해 결합 될 수 있다.In one embodiment of the present invention, the coupling portion may be coupled to the ground pattern through a conductive adhesive.
본 발명의 일 실시예에 있어서, 상기 금속 커버는 상기 제1 면 및 상기 제2 면을 연결하는 면들 중 일면에 결합 되고, 상기 제1 내지 제3 입출력 패턴은 상기 제1 면 및 상기 제2 면을 연결하는 면들 중 상기 일면에 대향 하는 타면에 형성될 수 있다.In one embodiment of the present invention, the metal cover is coupled to one of the surfaces connecting the first surface and the second surface, the first to third input and output patterns are the first surface and the second surface It may be formed on the other surface facing the one of the surfaces connecting the.
본 발명의 일 실시예에 따른 유전체 다이플렉서는 크기가 소형이면서 삽입 손실이 작다.The dielectric diplexer according to the embodiment of the present invention is small in size and low in insertion loss.
또한, 본 발명의 일 실시예에 따른 유전체 다이플렉서는 유전체 모노블록에 형성된 공진홀 사이의 의도하지 않은 기생 커패시턴를 최대한 억제할 수 있다.In addition, the dielectric diplexer according to an embodiment of the present invention can suppress the unintended parasitic capacitance between resonance holes formed in the dielectric monoblock to the maximum.
또한, 본 발명의 일 실시예에 따른 유전체 다이플렉서는 넓은 대역폭을 확보할 수 있으면서 차단 대역의 감쇄 특성이 우수한 특징이 있다.In addition, the dielectric diplexer according to an embodiment of the present invention has a feature of excellent attenuation characteristic of the blocking band while ensuring a wide bandwidth.
도 1은 본 발명의 일 실시예에 따른 유전체 다이플렉서의 사시도이다.1 is a perspective view of a dielectric diplexer according to an embodiment of the present invention.
도 2는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 분해 사시도이다.2 is an exploded perspective view of a dielectric diplexer according to an embodiment of the present invention.
도 3은 본 발명의 일 실시예에 따른 유전체 다이플렉서를 도 1과 다른 방향에서 바라본 사시도이다.3 is a perspective view of the dielectric diplexer according to the exemplary embodiment viewed from a direction different from that of FIG. 1.
도 4는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 등가 회로도이다.4 is an equivalent circuit diagram of a dielectric diplexer according to an embodiment of the present invention.
도 5는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 주파수 응답 특성을 도시한 그래프이다. 5 is a graph illustrating frequency response characteristics of a dielectric diplexer according to an embodiment of the present invention.
이하, 첨부된 도면을 참조하여 본 발명의 실시예들을 상세히 설명한다. 본 발명을 설명하는데 있어서, 해당 분야에 이미 공지된 기술 또는 구성에 대한 구체적인 설명을 부가하는 것이 본 발명의 요지를 불분명하게 할 수 있다고 판단되는 경우에는 상세한 설명에서 이를 일부 생략하도록 한다. 또한, 본 명세서에서 사용되는 용어들은 본 발명의 실시예들을 적절히 표현하기 위해 사용된 용어들로서, 이는 해당 분야의 관련된 사람 또는 관례 등에 따라 달라질 수 있다. 따라서, 본 용어들에 대한 정의는 본 명세서 전반에 걸친 내용을 토대로 내려져야 할 것이다.Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; In describing the present invention, if it is determined that adding specific descriptions of techniques or configurations already known in the art may make the gist of the present invention unclear, some of them will be omitted from the detailed description. In addition, terms used in the present specification are terms used to properly express the embodiments of the present invention, which may vary according to related persons or customs in the art. Therefore, the definitions of the terms should be made based on the contents throughout the specification.
본 명세서에서 사용되는 “제1” 또는 “제2” 등의 기재는 다양한 구성요소를 서술하기 위해 사용될 수 있다. 그러나 구성요소는 상기와 같은 용어에 제한되지 않는다. 상기 용어는 하나의 구성요소를 다른 구성요소와 구별하기 위하여 사용될 수 있다. 따라서, 본 명세서에서 언급되는 제1 구성요소는 본 발명의 기술적 사상 내에서 제2 구성요소가 될 수도 있다.As used herein, a description such as “first” or “second” may be used to describe various components. However, the components are not limited to the above terms. The term may be used to distinguish one component from another. Therefore, the first component referred to herein may be a second component within the technical spirit of the present invention.
본 명세서에서 사용된 용어는 실시예를 설명하기 위한 것이며 본 발명을 제한하고자 하는 것은 아니다. 본 명세서에서, 단수형은 문구에서 특별히 언급하지 않는 한 복수형도 포함한다. 명세서에서 사용되는 "포함한다(comprises)" 또는 "이루어지다(made of)"는 언급된 구성요소 또는 단계가 하나 이상의 다른 구성요소 또는 단계의 존재 또는 추가를 배제하지 않는다는 의미를 내포한다.The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. In this specification, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, “comprises” or “made of” implies that the stated component or step does not exclude the presence or addition of one or more other components or steps.
이하, 첨부한 도 1 내지 도 3을 참조하여, 본 발명의 일 실시예에 따른 유전체 다이플렉서에 대해 설명한다.Hereinafter, a dielectric diplexer according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3.
도 1은 본 발명의 일 실시예에 따른 유전체 다이플렉서의 사시도이다. 도 2는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 분해 사시도이다. 도 3은 본 발명의 일 실시예에 따른 유전체 다이플렉서를 도 1과 다른 방향에서 바라본 사시도이다.1 is a perspective view of a dielectric diplexer according to an embodiment of the present invention. 2 is an exploded perspective view of a dielectric diplexer according to an embodiment of the present invention. 3 is a perspective view of the dielectric diplexer according to the exemplary embodiment viewed from a direction different from that of FIG. 1.
도 1 내지 도 3을 참조하면, 유전체 다이플렉서는 유전체 블록(110), 공진홀(120), 내부 패턴(130), 접지 패턴(140), 입출력 패턴(150), 로우 패스 필터부(200), 밴드 패스 필터부(300) 및 금속 커버(400)를 포함한다.1 to 3, the dielectric diplexer includes a dielectric block 110, a resonance hole 120, an internal pattern 130, a ground pattern 140, an input / output pattern 150, and a low pass filter unit 200. ), The band pass filter unit 300 and the metal cover 400.
유전체 블록(110)은 육면체 등과 같은 블록형으로 형성된다. 또한, 유전체 블록(110)은 세라믹 소재, 알루미나 소재 등으로 형성될 수 있다. 유전체 블록(110)은 비유전율이 3.5이상인 재질로 형성되는 것이 바람직하다. 첨부한 도면에는 유전체 블록(110)이 직육면체의 형상인 것으로 도시하였지만, 이에 한정되는 것은 아니다.The dielectric block 110 is formed in a block shape such as a cube. In addition, the dielectric block 110 may be formed of a ceramic material, an alumina material, or the like. The dielectric block 110 is preferably formed of a material having a relative dielectric constant of 3.5 or more. In the accompanying drawings, the dielectric block 110 is illustrated as having a rectangular parallelepiped shape, but is not limited thereto.
유전체 블록(110)은 서로 대향하는 제1 면(111)과 제2 면(112)을 포함할 수 있다. 또한, 유전체 블록(110)은 제1 면(111)과 제2 면(112)을 연결하는 면들을 포함할 수 있다. 유전체 블록(110)이 직육면체의 형상으로 형성된 경우, 제1 면(111)과 제2 면(112)은 유전체 블록(110)의 전면 및 후면이 될 수 있다. 이러한 경우, 제1 면(111)과 제2 면(112)을 연결하는 면들은 상면, 하면, 좌측면 및 우측면을 포함할 수 있다.The dielectric block 110 may include a first surface 111 and a second surface 112 facing each other. In addition, the dielectric block 110 may include surfaces connecting the first surface 111 and the second surface 112. When the dielectric block 110 is formed in the shape of a rectangular parallelepiped, the first surface 111 and the second surface 112 may be front and rear surfaces of the dielectric block 110. In this case, the surfaces connecting the first surface 111 and the second surface 112 may include an upper surface, a lower surface, a left side, and a right side.
유전체 블록(110)에는 공진홀(120)이 형성될 수 있다. 공진홀(120)은 유전체 블록(110)의 제1 면(111)에서 제2 면(112)까지 관통하는 것일 수 있다. 공진홀(120)은 단면이 원형이 원통형으로 형성될 수 있다. 공진홀(120)에 의해, 유전체 블록(110)에는 원통형의 캐비티(cavity)가 형성될 수 있다.The resonance hole 120 may be formed in the dielectric block 110. The resonance hole 120 may penetrate from the first surface 111 to the second surface 112 of the dielectric block 110. The resonance hole 120 may have a circular cross section. By the resonance hole 120, a cylindrical cavity may be formed in the dielectric block 110.
유전체 블록(110)에 공진홀(120)은 복수로 형성될 수 있다. 복수의 공진홀(120)은 유전체 블록(110)에서 일 방향으로 배열되어 형성될 수 있다. 구체적으로 복수의 공진홀(120)은 각각 평행한 형태로 유전체 블록(110)의 일측에서 타측까지 배열될 수 있다.A plurality of resonance holes 120 may be formed in the dielectric block 110. The plurality of resonance holes 120 may be arranged in one direction in the dielectric block 110. In detail, the plurality of resonance holes 120 may be arranged from one side to the other side of the dielectric block 110 in a parallel form, respectively.
복수의 공진홀(120) 중 유전체 블록(110)의 일측에 치우치게 위치한 일부는 제1 공진홀(121)이 될 수 있다. 또한, 복수의 공진홀(120) 중 유전체 블록(110)의 타측에 치우치게 위치한 다른 일부는 제2 공진홀(122)이 될 수 있다. 제1 공진홀(121) 및 제2 공진홀(122)을 각각 복수의 공진홀(120)을 포함할 수 있다. 복수의 공진홀(120) 중 제1 공진홀(121)도 아니고, 제2 공진홀(122)이 아닌 공진홀(120)도 존재할 수 있다.A portion of the plurality of resonance holes 120 biased to one side of the dielectric block 110 may be the first resonance hole 121. In addition, another portion of the plurality of resonant holes 120 which is biased to the other side of the dielectric block 110 may be the second resonant hole 122. The first resonance hole 121 and the second resonance hole 122 may include a plurality of resonance holes 120, respectively. Among the plurality of resonant holes 120, not the first resonant hole 121 but also the second resonant hole 122 other than the resonant hole 120 may exist.
유전체 블록(110)의 표면의 일부에 형성된 내부 패턴(130), 접지 패턴(140), 입출력 패턴(150), 후술할 인덕턴스 패턴들(210, 220, 230) 및 후술할 커패시턴스 패턴들(240, 310)은 유전체 블록(110)의 표면에 결합된 도전층일 수 있다. 이러한 패턴들(130, 140, 150, 210, 220, 230, 240, 310)은 전기가 통하는 도전성 재질로 형성될 수 있다. 구체적으로, 이러한 패턴들(130, 140, 150, 210, 220, 230, 240, 310)은 유전체 블록(110)의 표면에 결합된 도금층으로 형성될 수 있다. 첨부한 도면에서 이러한 패턴들(130, 140, 150, 210, 220, 230, 240, 310)의 두께가 별도로 표현되지는 않았지만, 이러한 패턴들(130, 140, 150, 210, 220, 230, 240, 310)은 유전체 블록(110)의 표면에서 수㎛ 내지 수백㎛의 두께의 박막으로 형성될 수 있다. Internal patterns 130, ground patterns 140, input / output patterns 150, inductance patterns 210, 220, and 230 to be described later, and capacitance patterns 240 to be described later, formed on a portion of the surface of the dielectric block 110. 310 may be a conductive layer bonded to the surface of the dielectric block 110. These patterns 130, 140, 150, 210, 220, 230, 240, and 310 may be formed of a conductive material through which electricity flows. In detail, the patterns 130, 140, 150, 210, 220, 230, 240, and 310 may be formed of a plating layer bonded to the surface of the dielectric block 110. Although the thicknesses of the patterns 130, 140, 150, 210, 220, 230, 240, and 310 are not separately expressed in the accompanying drawings, the patterns 130, 140, 150, 210, 220, 230, and 240 are not separately represented. , 310 may be formed of a thin film having a thickness of several μm to several hundred μm on the surface of the dielectric block 110.
내부 패턴(130)은 공진홀(120)의 내부면에 형성된다. 내부 패턴(130)은 공진홀(120)의 제1 면(111) 측 개구면에서 제2 면(112) 측 개구면까지 연장되어 형성될 수 있다. 각각의 개구면 측에 형성된 내부 패턴(130)은 각각의 개구면 주변의 제1 면(111) 및 제2 면(112)에 형성된 다른 패턴과 전기적으로 연결될 수도 있다. 이러한 전기적 연결에 대해서는 아래에서 상술하도록 한다.The inner pattern 130 is formed on the inner surface of the resonance hole 120. The inner pattern 130 may extend from the opening surface of the first surface 111 side of the resonance hole 120 to the opening surface of the second surface 112 side. The inner pattern 130 formed on each opening surface side may be electrically connected to other patterns formed on the first surface 111 and the second surface 112 around each opening surface. This electrical connection will be described in detail below.
접지 패턴(140)은 유전체 블록(110)의 외부면의 적어도 일부에 형성된다. 접지 패턴(140)은 후술할 입출력 패턴, 인덕턴스 패턴들(210, 220, 230) 및 커패시턴스 패턴들(240, 310)과 이격된 상태로 둘러싸는 형태로 형성될 수 있다. 접지 패턴(140)은 유전체 블록(110)의 외부면의 모든 면에 형성될 수도 있으나, 경우에 따라서 일부의 면에는 형성되지 않을 수도 있다. 구체적으로 접지 패턴(140)은 유전체 블록(110)의 좌측면 및/또는 우측면에 형성되지 않을 수 있다.The ground pattern 140 is formed on at least a portion of the outer surface of the dielectric block 110. The ground pattern 140 may be formed to surround the input / output pattern, inductance patterns 210, 220, and 230 and the capacitance patterns 240 and 310 to be described later. The ground pattern 140 may be formed on all surfaces of the outer surface of the dielectric block 110, but in some cases, the ground pattern 140 may not be formed. In more detail, the ground pattern 140 may not be formed on the left side and / or the right side of the dielectric block 110.
입출력 패턴(150)은 유전체 블록(110)의 외부면의 적어도 일부에 형성된다. 구체적으로 입출력 패턴(150)은 유전체 블록(110)의 제1 면(111) 또는 하면에 형성될 수 있다. 이러한 경우 유전체 다이플렉서는 하면이 실장되는 기판과 맞닿도록 배향되어 실장될 수 있다.The input / output pattern 150 is formed on at least a portion of an outer surface of the dielectric block 110. In detail, the input / output pattern 150 may be formed on the first surface 111 or the lower surface of the dielectric block 110. In this case, the dielectric diplexer may be mounted so as to be oriented so as to contact the substrate on which the bottom surface is mounted.
입출력 패턴(150)은 복수의 입출력 패턴을 포함할 수 있다. 구체적으로, 입출력 패턴(150)은 서로 구분되는 제1 내지 제3 입출력 패턴(151, 152, 153)을 포함할 수 있다. 제1 내지 제3 입출력 패턴(151, 152, 153)은 유전체 블록(110)에서 일 방향으로 배열되어 형성될 수 있다. 예를 들어, 도 1 및 도 2에 도시된 것과 같이 제1 입출력 패턴(151)은 유전체 블록(110)의 일측에 형성되고, 제2 입출력 패턴(152)은 유전체 블록(110)의 일측과 타측의 중간 부분에 형성되고, 제3 입출력 패턴(153)은 유전체 블록(110)의 타측에 형성될 수 있다.The input / output pattern 150 may include a plurality of input / output patterns. In detail, the input / output pattern 150 may include first to third input / output patterns 151, 152, and 153 that are distinguished from each other. The first to third input / output patterns 151, 152, and 153 may be formed in the dielectric block 110 in one direction. For example, as illustrated in FIGS. 1 and 2, the first input / output pattern 151 is formed on one side of the dielectric block 110, and the second input / output pattern 152 is on one side and the other side of the dielectric block 110. The third input / output pattern 153 may be formed on the other side of the dielectric block 110.
각각의 입출력 패턴(150)은 유전체 다이플렉서에 신호가 입력되거나 출력되는데 사용될 수 있다. 아래에서 더욱 상세하게 설명하겠지만, 제2 입출력 패턴(152)은 입력 단자로서 신호가 입력될 수 있고, 제1 및 제3 입출력 패턴(153)은 출력 단자로서 주파수 선택적으로 필터링된 신호가 출력될 수 있다.Each input / output pattern 150 may be used to input or output a signal to the dielectric diplexer. As will be described in more detail below, the second input / output pattern 152 may receive a signal as an input terminal, and the first and third input / output patterns 153 may output a frequency selective filtered signal as an output terminal. have.
유전체 다이플렉서는 각각 이격된 위치에 형성된 로우 패스 필터부(200) 및 밴드 패스 필터부(300)를 포함한다. 구체적으로, 로우 패스 필터부(200)는 유전체 블록(110)의 일측에 형성될 수 있고, 밴드 패스 필터부(300)는 유전체 블록(110)의 타측에 형성될 수 있다. 더욱 구체적으로, 로우 패스 필터부(200)는 유전체 블록(110)의 제1 입출력 패턴(151)와 제2 입출력 패턴(152) 사이 부분에 형성될 수 있다. 또한, 밴드 패스 필터부(300)는 유전체 블록(110)의 제2 입출력 패턴(152)와 제3 입출력 패턴(153) 사이 부분에 형성될 수 있다.The dielectric diplexer includes a low pass filter unit 200 and a band pass filter unit 300 formed at spaced positions, respectively. In detail, the low pass filter unit 200 may be formed at one side of the dielectric block 110, and the band pass filter unit 300 may be formed at the other side of the dielectric block 110. More specifically, the low pass filter unit 200 may be formed between a portion of the first input / output pattern 151 and the second input / output pattern 152 of the dielectric block 110. In addition, the band pass filter unit 300 may be formed between the second input / output pattern 152 and the third input / output pattern 153 of the dielectric block 110.
이하, 로우 패스 필터부(200)에 대해 먼저 설명하도록 하다.Hereinafter, the low pass filter unit 200 will be described first.
로우 패스 필터부(200)는 제1 공진홀(121), 제1 인덕턴스 패턴(210), 제2 인덕턴스 패턴(220), 제3 인덕턴스 패턴(230) 및 제1 커패시턴스 패턴(240)을 포함한다.The low pass filter unit 200 includes a first resonance hole 121, a first inductance pattern 210, a second inductance pattern 220, a third inductance pattern 230, and a first capacitance pattern 240. .
제1 공진홀(121)은 복수의 공진홀(120) 중 유전체 블록(110)의 일측에 치우치게 위치한 일부일 수 있다. 제1 공진홀(121)은 복수의 공진홀(121)을 포함할 수 있다. 도 2 및 도 3을 참조하면, 유전체 블록(110)의 일측에 형성된 5개의 공진홀(121)이 제1 공진홀(121)인 것으로 도시되어 있으나 제1 공진홀(121)의 개수 및 위치는 당업자의 설계에 따라 변경될 수 있다.The first resonant hole 121 may be a part of the plurality of resonant holes 120 biased to one side of the dielectric block 110. The first resonance hole 121 may include a plurality of resonance holes 121. 2 and 3, five resonance holes 121 formed at one side of the dielectric block 110 are illustrated as the first resonance holes 121, but the number and positions of the first resonance holes 121 are It can be changed according to the design of those skilled in the art.
제1 내지 제3 인덕턴스 패턴(210, 220, 230)은 유전체 블록(110)의 제1 면(111)에 형성된다. 그리고 제1 커패시턴스 패턴(240)은 유전체 블록(110)의 제2 면(112)에 형성된다. 따라서 제1 내지 제3 인덕턴스 패턴(210, 220, 230)과 제1 커패시턴스 패턴(240)은 서로 대향하는 면에 형성되게 된다.The first to third inductance patterns 210, 220, and 230 are formed on the first surface 111 of the dielectric block 110. In addition, the first capacitance pattern 240 is formed on the second surface 112 of the dielectric block 110. Accordingly, the first to third inductance patterns 210, 220, and 230 and the first capacitance pattern 240 are formed on surfaces facing each other.
제1 내지 제3 인덕턴스 패턴(210, 230, 230) 및 제1 커패시턴스 패턴(240)은 접지 패턴(140)과 직접 연결되지 않도록 형성된다. 구체적으로, 제1 내지 제3 인덕턴스 패턴(230) 및 제1 커패시턴스 패턴(240)과 접지 패턴(140) 사이에는 비도전성 영역인 비패턴 영역에 형성되어 서로 이격되게 된다. 비패턴 영역은 유전체 블록(110)에 형성된 도전성 패턴을 레이저 등을 이용하여 제거한 부분일 수 있다.The first to third inductance patterns 210, 230, and 230 and the first capacitance pattern 240 are formed so as not to be directly connected to the ground pattern 140. In detail, the first to third inductance patterns 230, the first capacitance pattern 240, and the ground pattern 140 may be formed in a non-pattern region, which is a non-conductive region, to be spaced apart from each other. The non-patterned region may be a portion where the conductive pattern formed on the dielectric block 110 is removed using a laser or the like.
도 2를 참조하여 예시적인 일 실시예를 설명하면, 제1 인덕턴스 패턴(210)은 제1 면(111)에 형성되고, 제1 입출력 패턴(151) 및 제1 공진홀(121)의 내부 패턴(131)과 연결된다. 또한, 제2 인덕턴스 패턴(220)은 제1 면(111)에 형성되고, 제2 입출력 패턴(152) 및 제1 공진홀(121)의 내부 패턴(131)과 연결된다. 또한, 제3 인덕턴스 패턴(230)은 제1 면(111)에 형성되고, 복수의 제1 공진홀(121) 사이에서 각각의 내부 패턴(130)을 연결한다.Referring to FIG. 2, a first inductance pattern 210 is formed on the first surface 111 and the internal patterns of the first input / output pattern 151 and the first resonance hole 121 are described. 131 is connected. In addition, the second inductance pattern 220 is formed on the first surface 111 and is connected to the second input / output pattern 152 and the inner pattern 131 of the first resonance hole 121. In addition, the third inductance pattern 230 is formed on the first surface 111 and connects the respective internal patterns 130 between the plurality of first resonance holes 121.
구체적으로 도 2를 참조하면, 제1 인덕턴스 패턴(210)은 제1 입출력 패턴(151)과 제1 공진홀(121) 중 일측 끝단에 위치한 공진홀(120)의 내부 패턴(130)과 연결된다. 제1 인덕턴스 패턴(210)은 제1 면(111) 상에서, 제1 입출력 패턴(151)에서 제1 공진홀(121) 중 일측 끝단에 위치한 공진홀(120)의 제1 면(111) 측 개구면 주변까지 연장된다. 그리고 제1 면(111) 측 개구면 주변의 제1 인덕턴스 패턴(210)과 공진홀(120)의 내부 패턴(130)이 전기적으로 연결된다. 제1 인덕턴스 패턴(210)은 소정의 두께를 가지는 선로 형태로 형성될 수 있다. 선로의 형태 및 선로의 두께에 따라 제1 입출력 패턴(151)과 제1 공진홀의 내부 패턴(131) 사이의 인덕턴스가 변경될 수 있다.Specifically, referring to FIG. 2, the first inductance pattern 210 is connected to the internal pattern 130 of the resonance hole 120 located at one end of the first input / output pattern 151 and the first resonance hole 121. . The first inductance pattern 210 is opened on the first surface 111 of the first surface 111 of the resonance hole 120 located at one end of the first resonance hole 121 in the first input / output pattern 151 on the first surface 111. It extends around the sphere. The first inductance pattern 210 around the opening surface of the first surface 111 and the internal pattern 130 of the resonance hole 120 are electrically connected to each other. The first inductance pattern 210 may be formed in a line shape having a predetermined thickness. The inductance between the first input / output pattern 151 and the inner pattern 131 of the first resonance hole may be changed according to the shape of the line and the thickness of the line.
또한, 제2 인덕턴스 패턴(220)은 제2 입출력 패턴(152)과 제1 공진홀(121) 중 타측 끝단에 위치한 공진홀(120)의 내부 패턴(130)과 연결된다. 제2 인덕턴스 패턴(220)은 제1 면(111) 상에서, 제2 입출력 패턴(152)에서 제1 공진홀(121) 중 타측 끝단에 위치한 공진홀(120)의 제1 면(111) 측 개구면 주변까지 연장된다. 그리고 제1 면(111) 측 개구면 주변의 제2 인덕턴스 패턴(220)과 공진홀(120)의 내부 패턴(130)이 전기적으로 연결된다. 제2 인덕턴스 패턴(220)은 소정의 두께를 가지는 선로 형태로 형성될 수 있다. 선로의 형태 및 선로의 두께에 따라 제2 입출력 패턴(152)과 제1 공진홀의 내부 패턴(131) 사이의 인덕턴스가 변경될 수 있다.In addition, the second inductance pattern 220 is connected to the internal pattern 130 of the resonance hole 120 located at the other end of the second input / output pattern 152 and the first resonance hole 121. The second inductance pattern 220 is opened on the first surface 111 side of the resonance hole 120 located at the other end of the first resonance hole 121 in the second input / output pattern 152 on the first surface 111. It extends around the sphere. The second inductance pattern 220 around the opening surface of the first surface 111 and the internal pattern 130 of the resonance hole 120 are electrically connected to each other. The second inductance pattern 220 may be formed in a line shape having a predetermined thickness. The inductance between the second input / output pattern 152 and the inner pattern 131 of the first resonance hole may be changed according to the shape of the line and the thickness of the line.
또한, 제3 인덕턴스 패턴(230)은 복수의 제1 공진홀(121)의 각각의 내부 패턴(130)을 일측에서 타측까지 연결한다. 제3 인덕턴스 패턴(230)은 제1 면(111) 상에서, 복수의 제1 공진홀(121) 각각의 제1 면(111) 측 개구면 주변의 내부 패턴(130)을 서로 연결한다. 구체적으로, 제3 인덕턴스 패턴(230)은 복수의 제1 공진홀(121) 중 인접하는 공진홀(120)들 사이에 위치하여 각각의 내부 패턴(130)을 연결할 수 있다. 제3 인덕턴스 패턴(230)은 소정의 두께를 가지는 선로 형태로 형성될 수 있다. 선로의 형태 및 선로의 두께에 따라 복수의 제1 공진홀의 내부 패턴(131) 사이의 인덕턴스가 변경될 수 있다.In addition, the third inductance pattern 230 connects the respective internal patterns 130 of the plurality of first resonance holes 121 from one side to the other side. The third inductance pattern 230 connects the internal patterns 130 around the opening surface on the side of the first surface 111 of each of the plurality of first resonance holes 121 on the first surface 111. In detail, the third inductance pattern 230 may be disposed between the adjacent resonance holes 120 among the plurality of first resonance holes 121 to connect the respective internal patterns 130. The third inductance pattern 230 may be formed in a line shape having a predetermined thickness. The inductance between the internal patterns 131 of the plurality of first resonance holes may be changed according to the shape of the line and the thickness of the line.
도 3을 참조하여 예시적인 일 실시예를 설명하면, 제1 커패시턴스 패턴(240)은 제2 면(112)에 형성되고, 제1 공진홀(121)의 내부 패턴(131)과 연결되고, 접지 패턴(140)과 이격된다. 제1 커패시턴스 패턴(240)은 복수의 제1 공진홀(121) 각각의 내부 패턴(130)과 연결되고, 서로는 이격되는 복수의 패턴을 포함할 수 있다.Referring to FIG. 3, the first capacitance pattern 240 is formed on the second surface 112, is connected to the internal pattern 131 of the first resonance hole 121, and is grounded. Spaced apart from the pattern 140. The first capacitance pattern 240 may be connected to the internal patterns 130 of each of the plurality of first resonance holes 121, and may include a plurality of patterns spaced apart from each other.
구체적으로 도 3을 참조하면, 제1 커패시턴스 패턴(240)은 제1 공진홀(121)의 제2 면(112) 측 개구면 주변에 형성되어 내부 패턴(130)과 전기적으로 연결된다. 제1 커패시턴스 패턴(240)은 비패턴 영역으로 둘러싸여 주변의 접지 패턴(140)과 이격된다. 제1 커패시턴스는 소정의 형태로 형성될 수 있고, 비패턴 영역에 의해 소정의 간격으로 접지 패턴(140)과 이격될 수 있다. 제1 커패시턴스 패턴(240)의 형태 및 이격 간격에 따라 제1 공진홀(121)의 내부 패턴(131)과 접지 패턴(140) 사이의 커패시턴스가 변경될 수 있다.Specifically, referring to FIG. 3, the first capacitance pattern 240 is formed around the opening surface of the second surface 112 side of the first resonance hole 121 to be electrically connected to the internal pattern 130. The first capacitance pattern 240 is surrounded by the non-patterned area and spaced apart from the surrounding ground pattern 140. The first capacitance may be formed in a predetermined shape, and may be spaced apart from the ground pattern 140 at a predetermined interval by the non-patterned region. The capacitance between the internal pattern 131 of the first resonance hole 121 and the ground pattern 140 may be changed according to the shape and the spacing interval of the first capacitance pattern 240.
이러한 제1 공진홀(121), 제1 인덕턴스 패턴(210), 제2 인덕턴스 패턴(220), 제3 인덕턴스 패턴(230) 및 제1 커패시턴스 패턴(240)을 포함하는 로우 패스 필터부(200)는 로우 패스 필터로 기능할 수 있다. 구체적으로, 이러한 로우 패스 필터부(200)는 제1 입출력 패턴(151)과 제2 입출력 패턴(152) 사이에서 로우 패스 필터로 기능할 수 있다. 이에 대한 상세한 설명은 후술하도록 한다.The low pass filter unit 200 including the first resonance hole 121, the first inductance pattern 210, the second inductance pattern 220, the third inductance pattern 230, and the first capacitance pattern 240. Can function as a low pass filter. In detail, the low pass filter 200 may function as a low pass filter between the first input / output pattern 151 and the second input / output pattern 152. Detailed description thereof will be described later.
이하, 밴드 패스 필터부(300)에 대해 설명하도록 한다.Hereinafter, the band pass filter 300 will be described.
밴드 패스 필터부(300)는 제2 공진홀(122) 및 제2 커패시턴스 패턴(310)을 포함한다.The band pass filter unit 300 includes a second resonance hole 122 and a second capacitance pattern 310.
제2 공진홀(122)은 복수의 공진홀(120) 중 유전체 블록(110)의 타측에 치우치게 위치한 일부일 수 있다. 제2 공진홀(122)은 복수의 공진홀(122)을 포함할 수 있다. 도 2 및 도 3을 참조하면, 유전체 블록(110)의 타측에 형성된 4개의 공진홀(122)이 제2 공진홀(122)인 것으로 도시되어 있으나 제2 공진홀(122)의 개수 및 위치는 당업자의 설계에 따라 변경될 수 있다. 본 예시적인 실시예에서 제1 공진홀(121)과 제2 공진홀(122) 사이에 접지 공진홀이 형성될 수 있다. 접지 공진홀의 개수 및 위치는 당업자의 설계에 따라 변경될 수 있다.The second resonator hole 122 may be a portion of the plurality of resonant holes 120 that are biased to the other side of the dielectric block 110. The second resonance hole 122 may include a plurality of resonance holes 122. 2 and 3, four resonance holes 122 formed on the other side of the dielectric block 110 are illustrated as second resonance holes 122, but the number and positions of the second resonance holes 122 are It can be changed according to the design of those skilled in the art. In the present exemplary embodiment, a ground resonance hole may be formed between the first resonance hole 121 and the second resonance hole 122. The number and position of the ground resonant holes can be changed according to the design of those skilled in the art.
제2 커패시턴스 패턴(310)은 유전체 블록(110)의 제1 면(111)에 형성된다. 따라서 제2 커패시턴스 패턴(310)은 로우 패스 필터부(200)의 제1 내지 제3 인덕턴스 패턴(230)과 유전체 블록(110)의 동일한 면에 형성되게 된다.The second capacitance pattern 310 is formed on the first surface 111 of the dielectric block 110. Accordingly, the second capacitance pattern 310 is formed on the same surface of the first to third inductance patterns 230 and the dielectric block 110 of the low pass filter unit 200.
제2 커패시턴스 패턴(310)은 접지 패턴(140)과 직접 연결되지 않도록 형성된다. 구체적으로, 제2 커패시턴스 패턴(310)은 제1 면(111) 상에서 비패턴 영역을 사이에 두고 이격되도록 형성된다. 그러나 제2 커패시턴스 패턴(310)은 접지 패턴(140)과 직접 연결되지는 않지만, 제2 공진홀(122)의 내부 패턴(132)을 통해 제2 면(112)에서 접지 패턴(140)과 연결될 수는 있다.The second capacitance pattern 310 is formed so as not to be directly connected to the ground pattern 140. In detail, the second capacitance pattern 310 is formed to be spaced apart from each other on the first surface 111 with the non-pattern region interposed therebetween. However, although the second capacitance pattern 310 is not directly connected to the ground pattern 140, the second capacitance pattern 310 may be connected to the ground pattern 140 at the second surface 112 through the inner pattern 132 of the second resonance hole 122. There is a number.
도 2를 참조하여 예시적인 일 실시예를 설명하면, 제2 커패시턴스 패턴(310)은 제1 면(111)에 형성되고, 제2 공진홀(122)의 내부 패턴(132)과 연결되고, 접지 패턴(140) 및 제2, 제3 입출력 패턴(152, 153)과 이격된다.2, the second capacitance pattern 310 is formed on the first surface 111, is connected to the internal pattern 132 of the second resonance hole 122, and is grounded. The pattern 140 is spaced apart from the second and third input / output patterns 152 and 153.
구체적으로 도 2를 참조하면, 제2 커패시턴스 패턴(310)은 제2 공진홀(122)의 제1 면(111) 측 개구면 주변에 형성되어 내부 패턴(130)과 전기적으로 연결된다. 제2 커패시턴스 패턴(310)은 비패턴 영역으로 둘러싸여 주변의 접지 패턴(140)과 이격된다. 제2 커패시턴스 패턴(310)은 소정의 형태로 형성될 수 있고, 비패턴 영역에 의해 소정의 간격으로 접지 패턴(140)과 이격될 수 있다. 제2 커패시턴스 패턴(310)의 형태 및 이격 간격에 따라 제2 공진홀(122)의 내부 패턴(132)과 접지 패턴(140) 사이의 커패시턴스가 변경될 수 있다.In detail, referring to FIG. 2, the second capacitance pattern 310 is formed around the opening surface of the first surface 111 side of the second resonance hole 122 to be electrically connected to the internal pattern 130. The second capacitance pattern 310 is surrounded by the non-patterned area and spaced apart from the surrounding ground pattern 140. The second capacitance pattern 310 may be formed in a predetermined shape, and may be spaced apart from the ground pattern 140 at a predetermined interval by the non-patterned region. The capacitance between the inner pattern 132 of the second resonance hole 122 and the ground pattern 140 may be changed according to the shape and spacing interval of the second capacitance pattern 310.
또한, 제2 커패시턴스 패턴(310)은 제1 면(111)에서 제2 및 제3 입출력 패턴(153)과 이격된다. 제2 커패시턴스 패턴(310)과 제2 및 제3 입출력 패턴(153) 사이에는 비패턴 영역이 형성되어 이격될 수 있다. 제2 커패시턴스의 형태 및 이격 간격에 따라 제2 공진홀(122)의 내부 패턴(132)과 제2 및 제3 입출력 패턴(153) 사이의 커패시턴스가 변경될 수 있다.In addition, the second capacitance pattern 310 is spaced apart from the second and third input / output patterns 153 on the first surface 111. A non-pattern region may be formed between the second capacitance pattern 310 and the second and third input / output patterns 153 to be spaced apart from each other. The capacitance between the internal pattern 132 of the second resonance hole 122 and the second and third input / output patterns 153 may be changed according to the shape of the second capacitance and the separation interval.
도 3을 참조하여 예시적인 일 실시예를 설명하면, 제2 공진홀(122)의 제2 면(112) 측 내부 패턴(130)은 제2 면(112)에 형성된 접지 패턴(140)과 전기적으로 연결된다.Referring to FIG. 3, the internal pattern 130 on the second surface 112 side of the second resonance hole 122 may be electrically connected to the ground pattern 140 formed on the second surface 112. Is connected.
이러한 제2 공진홀(122) 및 제2 커패시턴스 패턴(310)을 포함하는 밴드 패스 필터부(300)는 밴드 패스 필터로 기능할 수 있다. 구체적으로, 이러한 밴드 패스 필터부(300)는 제2 입출력 패턴(152)과 제3 입출력 패턴(153) 사이에서 밴드 패스 필터로 기능할 수 있다. 이에 대한 상세한 설명은 후술하도록 한다.The band pass filter unit 300 including the second resonance hole 122 and the second capacitance pattern 310 may function as a band pass filter. In detail, the band pass filter unit 300 may function as a band pass filter between the second input / output pattern 152 and the third input / output pattern 153. Detailed description thereof will be described later.
도 1 및 도 2를 참조하여, 금속 커버(400)에 대해서 설명하도록 한다.Referring to FIGS. 1 and 2, the metal cover 400 will be described.
금속 커버(400)는 접지 패턴(140)과 결합되는 결합부(410) 및 결합부(410)의 일단에서 절곡되어 형성되는 절곡부(420)를 포함한다.The metal cover 400 includes a coupling part 410 coupled to the ground pattern 140 and a bent part 420 formed by bending at one end of the coupling part 410.
결합부(410)는 유전체 블록(110)의 제1 면(111) 및 제2 면(112)을 연결하는 면에 형성된 접지 패턴(140)과 결합될 수 있다. 구체적으로, 도 1 및 도 2에 도시된 것과 같이 유전체 블록(110)의 상면에 형성된 접지 패턴(140)과 결합될 수 있다. 결합부(410)와 접지 패턴(140)은 솔더를 통해 결합될 수 있다. 결합부(410)는 유전체 블록(110)의 상면 중 제1 면(111) 측에 결합될 수 있고, 결합부(410)의 일단은 유전체 블록(110)의 상면을 초과하도록 연장된다.The coupling part 410 may be coupled to the ground pattern 140 formed on the surface connecting the first surface 111 and the second surface 112 of the dielectric block 110. In detail, as illustrated in FIGS. 1 and 2, the ground pattern 140 may be combined with the ground pattern 140 formed on the upper surface of the dielectric block 110. The coupling part 410 and the ground pattern 140 may be coupled through solder. The coupling part 410 may be coupled to the first surface 111 side of the top surface of the dielectric block 110, and one end of the coupling part 410 may extend beyond the top surface of the dielectric block 110.
절곡부(420)는 결합부(410) 중 유전체 블록(110)의 상면을 초과하도록 연장된 일단에서 절곡된다. 절곡부(420)는 유전체 블록(110)의 제1 면(111)에 대향하도록 결합부(410)에서 실질적으로 수직하게 절곡될 수 있다. 절곡부(420)와 유전체 블록(110)의 제1 면(111)은 소정의 거리로 이격된다. 이에 따라 절곡부(420)는 유전체 블록(110)의 제1 면(111)에 형성된 제1 내지 제3 인덕턴스 패턴(230) 및 제1 내지 제2 커패시턴스 패턴(310)에 소정의 거리로 이격된 상태에서 오버랩된다.The bent portion 420 is bent at one end of the coupling portion 410 extending beyond the upper surface of the dielectric block 110. The bent portion 420 may be bent substantially vertically at the coupling portion 410 to face the first surface 111 of the dielectric block 110. The bent portion 420 and the first surface 111 of the dielectric block 110 are spaced apart by a predetermined distance. Accordingly, the bent portion 420 is spaced apart from the first to third inductance pattern 230 and the first to second capacitance pattern 310 formed on the first surface 111 of the dielectric block 110 by a predetermined distance. Overlap in state.
금속 커버(400)는 도전성의 금속 재질로 형성될 수 있다. 예를 들어, 금속 커버(400)는 스테인리스 스틸, 구리, 주석, 납 등이 사용될 수 있다. 금속 커버(400)는 접지 패턴(140)과 결합되기 때문에 전체적으로 접지 전위를 가지게 된다. 특히. 제1 면(111)에 이격된 상태로 대향되는 절곡부(420)가 접지 전위를 가지게 되어 제1 면(111)에 형성된 제1 내지 제3 인덕턴스 패턴(230) 및 제1 내지 제2 커패시턴스 패턴(310) 사이에서 발생할 수 있는 의도적이지 않은 커플링을 최대한 억제할 수 있다. 금속 커버(400)가 없다면, 제1 면(111)에 형성된 제1 내지 제3 인덕턴스 패턴(230) 및 제1 내지 제2 커패시턴스 패턴(310) 사이에서 구성 요소 간 의도하지 않은 커플링이 발생할 수 있다. 이러한 커플링의 발생은 로우 패스 필터와 밴드 패스 필터에서 패스 대역이 아닌 부분의 감쇄가 충분하지 않게 되는 원인이 된다.The metal cover 400 may be formed of a conductive metal material. For example, the metal cover 400 may be stainless steel, copper, tin, lead, or the like. Since the metal cover 400 is coupled to the ground pattern 140, the metal cover 400 has a ground potential as a whole. Especially. The bent portion 420 facing the first surface 111 in a state spaced apart has a ground potential so that the first to third inductance patterns 230 and the first to second capacitance patterns formed on the first surface 111. Unintentional coupling that can occur between 310 can be suppressed as much as possible. Without the metal cover 400, unintended coupling between components may occur between the first to third inductance patterns 230 and the first to second capacitance patterns 310 formed on the first surface 111. have. The occurrence of such coupling causes a lack of sufficient attenuation in non-pass band portions of the low pass filter and the band pass filter.
금속 커버(400)는 튜닝홀을 포함할 수 있다. 튜닝홀은 제1 내지 제3 인덕턴스 패턴(230) 및 제1 내지 제2 커패시턴스 패턴(310)의 형상을 조절하기 위해 이에 대응되는 위치 부근에 형성된 개구이다.The metal cover 400 may include a tuning hole. The tuning hole is an opening formed near a position corresponding thereto to adjust the shape of the first to third inductance patterns 230 and the first to second capacitance patterns 310.
도 4는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 등가 회로도이다. 도 4를 참조하여, 로우 패스 필터부(200)와 밴드 패스 필터부(300)에 대해 설명하도록 한다. 도 4의 등가 회로는 로우 패스 필터부(200)와 밴드 패스 필터부(300)의 주된 인덕턴스 및 커패시턴스에 대응하는 것이다. 따라서 유전체 다이플렉서의 각 구성요소 간에 발생할 수 있는 부수적인 인덕턴스 및 커패시턴스 중 일부는 등가 회로에 도시되지 않을 수 있다.4 is an equivalent circuit diagram of a dielectric diplexer according to an embodiment of the present invention. The low pass filter unit 200 and the band pass filter unit 300 will be described with reference to FIG. 4. The equivalent circuit of FIG. 4 corresponds to the main inductance and capacitance of the low pass filter 200 and the band pass filter 300. Thus, some of the incidental inductance and capacitance that may occur between each component of the dielectric diplexer may not be shown in an equivalent circuit.
먼저, 로우 패스 필터부(200)는 등가 회로상에서 제1 입출력 단자(port1)와 제2 입출력 단자(port2) 사이에 형성된다. 제1 입출력 단자(port1)는 유전체 다이플렉서에서 제2 입출력 패턴(152)에 대응될 수 있고, 제2 입출력 단자(port2)는 유전체 다이플렉서에서 제1 입출력 패턴(151)에 대응될 수 있다. 제1 입출력 단자(port1)는 안테나 단자일 수 있다. 제1 입출력 단자(port1)를 통해 신호가 입력되면 로우 패스 필터부(200)를 통과하여 저주파수 신호가 필터링되어 제2 입출력 단자(port2)를 통해 출력될 수 있다.First, the low pass filter unit 200 is formed between the first input / output terminal port1 and the second input / output terminal port2 on an equivalent circuit. The first input / output terminal port1 may correspond to the second input / output pattern 152 in the dielectric diplexer, and the second input / output terminal port2 may correspond to the first input / output pattern 151 in the dielectric diplexer. have. The first input / output terminal port1 may be an antenna terminal. When a signal is input through the first input / output terminal port1, a low frequency signal may be filtered through the low pass filter unit 200 and output through the second input / output terminal port2.
제2 입출력 단자(port2)와 제1 관통홀의 내부 패턴(130) 사이에 위치하는 인덕터(L1)는 유전체 다이플렉서의 제1 인덕턴스 패턴(210)에 대응될 수 있다. 제1 입출력 단자(port1)와 제2 관통홀의 내부 패턴(130) 사이에 위치하는 인덕터(L6)는 유전체 다이플렉서의 제2 인덕턴스 패턴(220)에 대응될 수 있다. 제1 관통홀들(121)의 내부 패턴(131) 사이에 위치하는 인덕터들(L2, L3, L4, L5)은 유전체 다이플렉서의 제3 인덕턴스 패턴(230)에 대응될 수 있다. 제1 관통홀(121)의 내부 패턴(131)과 접지 사이에 위치하는 커패시터(C11, C12, C13, C14, C15)는 유전체 다이플렉서의 제1 커패시턴스 패턴(240)에 대응될 수 있다. 제1 관통홀들(121)의 내부 패턴(131) 사이에 위치하는 커패시터(C16, C17, C18, C19)는 유전체 다이플렉서에서 인접하는 제1 관통홀들(121)의 내부 패턴(131) 사이에 생성되는 커패시턴스에 대응될 수 있다. 제1 및 제2 입출력 단자(port1, port2)와 접지 사이에 위치하는 커패시터(C31, C32)는 유전체 다이플렉서에서 제1 및 제2 입출력 패턴(151, 152)과 인접하는 접지 패턴(140) 사이에 생성되는 커패시턴스에 대응될 수 있다.The inductor L1 positioned between the second input / output terminal port2 and the internal pattern 130 of the first through hole may correspond to the first inductance pattern 210 of the dielectric diplexer. The inductor L6 positioned between the first input / output terminal port1 and the inner pattern 130 of the second through hole may correspond to the second inductance pattern 220 of the dielectric diplexer. The inductors L2, L3, L4, and L5 positioned between the internal patterns 131 of the first through holes 121 may correspond to the third inductance pattern 230 of the dielectric diplexer. The capacitors C11, C12, C13, C14, and C15 positioned between the inner pattern 131 of the first through hole 121 and the ground may correspond to the first capacitance pattern 240 of the dielectric diplexer. The capacitors C16, C17, C18, and C19 positioned between the internal patterns 131 of the first through holes 121 may have the internal patterns 131 of the first through holes 121 adjacent to each other in the dielectric diplexer. It may correspond to the capacitance generated between. The capacitors C31 and C32 positioned between the first and second input / output terminals port1 and port2 and the ground may have a ground pattern 140 adjacent to the first and second input / output patterns 151 and 152 in the dielectric diplexer. It may correspond to the capacitance generated between.
밴드 패스 필터는 등가 회로상에서 제1 입출력 단자 (port1)와 제3 입출력 단자(port3) 사이에 형성된다. 제3 입출력 단자(port3)는 유전체 다이플렉서에서 제3 입출력 패턴(153)에 대응될 수 있다. 제1 입출력 단자(port1)를 통해 신호가 입력되면 밴드 패스 필터부(300)를 통과하여 제2 입출력 단자(port2)에서 출력되는 신호보다 고주파인 고주파수 신호가 필터링되어 제3 입출력 단자(port3)를 통해 출력될 수 있다.The band pass filter is formed between the first input / output terminal port1 and the third input / output terminal port3 on an equivalent circuit. The third input / output terminal port3 may correspond to the third input / output pattern 153 in the dielectric diplexer. When a signal is input through the first input / output terminal port1, a high frequency signal having a higher frequency than the signal output from the second input / output terminal port2 passes through the band pass filter unit 300 to filter the third input / output terminal port3. Can be output via
제2 관통홀(122)의 내부 패턴(132)과 접지 사이에 위치하는 커패시터(C21, C22, C23, C24)는 유전체 다이플렉서의 제2 커패시턴스 패턴(310)과 접지 패턴(140) 사이의 커패시턴스에 대응될 수 있다. 또한, 제2 관통홀(122) 중 제1 입출력 단자(port1)에 인접하여는 관통홀의 내부 패턴(132)과 제1 입출력 단자(port1) 사이에 위치하는 커패시터(C5)는 유전체 다이플렉서의 제2 관통홀(122) 중 제2 입출력 패턴(152)에 인접하여는 관통홀의 내부 패턴(132)과 연결되는 제2 커패시턴스 패턴(310)과 제2 입출력 패턴(152) 사이의 커패시턴스에 대응될 수 있다. 또한, 제2 관통홀(122) 중 제3 입출력 단자(port3)에 인접하여는 관통홀의 내부 패턴(132)과 제3 입출력 단자(port3) 사이에 위치하는 커패시터(C1)는 유전체 다이플렉서의 제2 관통홀(122) 중 제3 입출력 패턴(153)에 인접하는 관통홀의 내부 패턴(132)과 연결되는 제2 커패시턴스 패턴(310)과 제3 입출력 패턴(153) 사이의 커패시턴스에 대응될 수 있다. 제2 관통홀들(122)의 내부 패턴(132) 사이에 위치하는 커패시터(C2, C3, C4, C5)는 유전체 다이플렉서에서 인접하는 제2 관통홀(122)의 내부 패턴(132) 사이에 생성되는 커패시턴스에 대응될 수 있다.The capacitors C21, C22, C23, and C24 positioned between the inner pattern 132 of the second through hole 122 and the ground may be disposed between the second capacitance pattern 310 and the ground pattern 140 of the dielectric diplexer. It can correspond to the capacitance. In addition, the capacitor C5 positioned between the internal pattern 132 of the through hole and the first input / output terminal port1 adjacent to the first input / output terminal port1 of the second through hole 122 may have a dielectric diplexer. Adjacent to the second input / output pattern 152 of the second through hole 122 to correspond to the capacitance between the second capacitance pattern 310 and the second input / output pattern 152 connected to the inner pattern 132 of the through hole. Can be. In addition, the capacitor C1 positioned between the internal pattern 132 of the through hole and the third input / output terminal port3 adjacent to the third input / output terminal port3 of the second through hole 122 may have a dielectric diplexer. The capacitance between the second capacitance pattern 310 and the third input / output pattern 153 connected to the internal pattern 132 of the through hole adjacent to the third input / output pattern 153 among the second through holes 122 may correspond to the capacitance. have. The capacitors C2, C3, C4, and C5 positioned between the inner patterns 132 of the second through holes 122 are disposed between the inner patterns 132 of the second through holes 122 adjacent to each other in the dielectric diplexer. It may correspond to the capacitance generated in.
도 5는 본 발명의 일 실시예에 따른 유전체 다이플렉서의 주파수 응답 특성을 도시한 그래프이다. 도 5는 유전체 다이플렉서의 제2 입출력 패턴(152)은 포트 1, 제1 입출력 패턴(151)을 포트 2, 제3 입출력 패턴(153)을 포트 3으로 하여 측정한 결과이다.5 is a graph illustrating frequency response characteristics of a dielectric diplexer according to an embodiment of the present invention. 5 is a result of measuring the second input / output pattern 152 of the dielectric diplexer by using the port 1 and the first input / output pattern 151 as the port 2 and the third input / output pattern 153 as the port 3.
제2 입출력 패턴(152)에서 입력되어 제1 입출력 패턴(151)으로 출력되는 신호를 제1 입출력 패턴(151) 방향에서 바라본 주파수 응답 특성(S21)을 보면, 유전체 다이플렉서의 일측이 대략 2.2GHz보다 저주파 대역인 신호를 통과시키는 로우 패스 필터로 기능하고 있음을 알 수 있다.When the frequency response characteristic S21 of the signal input from the second input / output pattern 152 and output to the first input / output pattern 151 is viewed from the direction of the first input / output pattern 151, one side of the dielectric diplexer is approximately 2.2. It can be seen that it functions as a low pass filter that passes signals that are in the lower frequency band than GHz.
또한, 제2 입출력 패턴(152)에서 입력되어 제3 입출력 패턴(153)으로 출력되는 신호를 제3 입출력 패턴(153) 방향에서 바라본 주파수 응답 특성(S31)을 보면, 유전체 다이플렉서의 타측이 대략 2.3GHz 내지 2.4GHz 대역의 신호를 통과시키는 밴드 패스 필터로 기능하고 있음을 알 수 있다.In addition, when the frequency response characteristic S31 of the signal input from the second input / output pattern 152 and output to the third input / output pattern 153 is viewed from the direction of the third input / output pattern 153, the other side of the dielectric diplexer is It can be seen that it functions as a band pass filter that passes signals in the approximately 2.3 GHz to 2.4 GHz band.
이상, 본 발명의 유전체 다이플렉서의 실시예들에 대해 설명하였다. 본 발명은 상술한 실시예 및 첨부한 도면에 한정되는 것은 아니며, 본 발명이 속하는 분야에서 통상의 지식을 가진 자의 관점에서 다양한 수정 및 변형이 가능할 것이다. 따라서 본 발명의 범위는 본 명세서의 특허청구범위뿐만 아니라 이 특허청구범위와 균등한 것들에 의해 정해져야 한다.In the above, embodiments of the dielectric diplexer of the present invention have been described. The present invention is not limited to the above-described embodiment and the accompanying drawings, and various modifications and variations will be possible in view of those skilled in the art to which the present invention pertains. Therefore, the scope of the present invention should be defined not only by the claims of the present specification but also by the equivalents of the claims.

Claims (9)

  1. 제1 면에서 상기 제1 면에 대향하는 제2 면까지 관통하는 복수의 공진홀이 형성된 유전체 블록, 상기 공진홀 내부면에 형성된 내부 패턴, 상기 유전체 블록의 외부면의 적어도 일부에 형성된 접지 패턴, 상기 유전체 블록에 형성된 제1 내지 제3 입출력 패턴, 로우 패스 필터부, 밴드 패스 필터부, 및 상기 접지 패턴과 전기적으로 연결되고 상기 제1 면과 이격된 상태로 대향되는 금속 커버를 포함하고,A dielectric block having a plurality of resonance holes penetrating from a first surface to a second surface facing the first surface, an inner pattern formed on an inner surface of the resonance hole, a ground pattern formed on at least a portion of an outer surface of the dielectric block, First to third input / output patterns formed on the dielectric block, a low pass filter part, a band pass filter part, and a metal cover electrically connected to the ground pattern and spaced apart from the first surface;
    상기 로우 패스 필터부는,The low pass filter unit,
    상기 복수의 공진홀 중 상기 유전체 블록의 일측에 위치하는 제1 공진홀;A first resonance hole located at one side of the dielectric block among the plurality of resonance holes;
    상기 제1 면에 형성되고, 상기 제1 입출력 패턴 및 상기 제1 공진홀의 내부 패턴과 연결되는 제1 인덕턴스 패턴;A first inductance pattern formed on the first surface and connected to the first input / output pattern and the inner pattern of the first resonance hole;
    상기 제1 면에 형성되고, 상기 제2 입출력 패턴 및 상기 제1 공진홀의 내부 패턴과 연결되는 제2 인덕턴스 패턴; 및A second inductance pattern formed on the first surface and connected to the second input / output pattern and the inner pattern of the first resonance hole; And
    상기 제2 면에 형성되고, 상기 제1 공진홀의 내부 패턴과 연결되고, 상기 접지 패턴과 이격되는 제1 커패시턴스 패턴을 포함하고,A first capacitance pattern formed on the second surface and connected to an internal pattern of the first resonance hole and spaced apart from the ground pattern;
    상기 밴드 패스 필터부는,The band pass filter unit,
    상기 복수의 공진홀 중 상기 유전체 블록의 타측에 위치하는 제2 공진홀; 및A second resonance hole located on the other side of the dielectric block among the plurality of resonance holes; And
    상기 제1 면에 형성되고, 상기 제2 공진홀의 내부 패턴과 연결되고, 상기 접지 패턴 및 상기 제2, 제3 입출력 패턴과 이격되는 제2 커패시턴스 패턴을 포함하는 유전체 다이플렉서.A dielectric diplexer formed on the first surface and connected to an inner pattern of the second resonance hole and including a second capacitance pattern spaced apart from the ground pattern and the second and third input / output patterns.
  2. 제1 항에 있어서,According to claim 1,
    상기 제1 내지 제3 입출력 패턴은 상기 유전체 블록에서 순차적으로 배열되고,The first to third input and output patterns are sequentially arranged in the dielectric block,
    상기 제1 공진홀은 상기 제1 입출력 패턴과 상기 제2 입출력 패턴 사이에 위치하고,The first resonance hole is located between the first input and output pattern and the second input and output pattern,
    상기 제2 공진홀은 상기 제2 입출력 패턴과 상기 제3 입출력 패턴 사이에 위치하는 유전체 다이플렉서.The second resonance hole is a dielectric diplexer positioned between the second input and output pattern and the third input and output pattern.
  3. 제1 항에 있어서,According to claim 1,
    상기 제1 공진홀은 일 방향으로 배열된 복수의 공진홀을 포함하고,The first resonance hole includes a plurality of resonance holes arranged in one direction,
    상기 로우 패스 필터부는,The low pass filter unit,
    상기 제1 면에 형성되고, 상기 복수의 제1 공진홀 사이에서 각각의 내부 패턴을 연결하는 제3 인덕턴스 패턴을 더 포함하는 유전체 다이플렉서.And a third inductance pattern formed on the first surface and connecting the respective internal patterns between the plurality of first resonance holes.
  4. 제3 항에 있어서,The method of claim 3, wherein
    상기 제1 커패시턴스 패턴은 상기 복수의 제1 공진홀 각각의 내부 패턴과 연결되고, 서로 이격되는 복수의 패턴을 포함하는 유전체 다이플렉서.The first capacitance pattern includes a plurality of patterns connected to the internal patterns of each of the plurality of first resonance holes and spaced apart from each other.
  5. 제1 항에 있어서,According to claim 1,
    상기 제2 공진홀은 일 방향으로 배열된 복수의 공진홀을 포함하고,The second resonance hole includes a plurality of resonance holes arranged in one direction,
    상기 제2 커패시턴스 패턴은 상기 복수의 제2 공진홀 각각의 내부 패턴과 연결되고, 서로 이격되는 복수의 패턴을 포함하는 유전체 다이플렉서.The second capacitance pattern includes a plurality of patterns connected to the inner patterns of each of the plurality of second resonance holes and spaced apart from each other.
  6. 제1 항에 있어서,According to claim 1,
    상기 제2 공진홀의 내부 패턴은 상기 제2 면에 형성된 접지 패턴과 전기적으로 연결되는 유전체 다이플렉서.The dielectric pattern of the second resonance hole is electrically connected to the ground pattern formed on the second surface.
  7. 제1 항에 있어서,According to claim 1,
    상기 금속 커버는,The metal cover,
    상기 제1 면 및 상기 제2 면을 연결하는 면에 형성된 접지 패턴과 결합되는 결합부; 및A coupling part coupled to a ground pattern formed on a surface connecting the first surface and the second surface; And
    상기 결합부의 일단에서 절곡되어 상기 제1 면과 이격된 상태로 대향되는 절곡부를 포함하는 유전체 다이플렉서.And a bent portion bent at one end of the coupling portion and spaced apart from the first surface.
  8. 제7 항에 있어서,The method of claim 7, wherein
    상기 결합부는 상기 접지 패턴과 전도성 접착제를 통해 결합되는 유전체 다이플렉서.And the coupling portion is coupled to the ground pattern through a conductive adhesive.
  9. 제1 항에 있어서,According to claim 1,
    상기 금속 커버는 상기 제1 면 및 상기 제2 면을 연결하는 면들 중 일면에 결합되고,The metal cover is coupled to one of the surfaces connecting the first surface and the second surface,
    상기 제1 내지 제3 입출력 패턴은 상기 제1 면 및 상기 제2 면을 연결하는 면들 중 상기 일면에 대향하는 타면에 형성되는 유전체 다이플렉서.And the first to third input / output patterns are formed on the other surface of the first and third input / output surfaces facing each other.
PCT/KR2015/005277 2015-03-18 2015-05-27 Dielectric diplexer WO2016148340A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362705B1 (en) * 1998-09-28 2002-03-26 Murata Manufacturing Co., Ltd. Dielectric filter unit, duplexer, and communication apparatus
US20080055016A1 (en) * 2006-03-08 2008-03-06 Wispry Inc. Tunable impedance matching networks and tunable diplexer matching systems
US20080272855A1 (en) * 2007-05-02 2008-11-06 Syouji Ono Laminate type band pass filter and diplexer using the same
US20090295501A1 (en) * 2006-07-03 2009-12-03 Hitachi Metals, Ltd. Diplexer circuit, high-frequency circuit and high-frequency module
US20130271239A1 (en) * 2012-04-13 2013-10-17 Yu-Lin Liao Diplexer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362705B1 (en) * 1998-09-28 2002-03-26 Murata Manufacturing Co., Ltd. Dielectric filter unit, duplexer, and communication apparatus
US20080055016A1 (en) * 2006-03-08 2008-03-06 Wispry Inc. Tunable impedance matching networks and tunable diplexer matching systems
US20090295501A1 (en) * 2006-07-03 2009-12-03 Hitachi Metals, Ltd. Diplexer circuit, high-frequency circuit and high-frequency module
US20080272855A1 (en) * 2007-05-02 2008-11-06 Syouji Ono Laminate type band pass filter and diplexer using the same
US20130271239A1 (en) * 2012-04-13 2013-10-17 Yu-Lin Liao Diplexer

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