WO2012033274A1 - 태양광 발전장치 및 이의 제조방법 - Google Patents

태양광 발전장치 및 이의 제조방법 Download PDF

Info

Publication number
WO2012033274A1
WO2012033274A1 PCT/KR2011/003120 KR2011003120W WO2012033274A1 WO 2012033274 A1 WO2012033274 A1 WO 2012033274A1 KR 2011003120 W KR2011003120 W KR 2011003120W WO 2012033274 A1 WO2012033274 A1 WO 2012033274A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
light absorbing
holes
window
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2011/003120
Other languages
English (en)
French (fr)
Korean (ko)
Inventor
이진우
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Innotek Co Ltd
Original Assignee
LG Innotek Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Innotek Co Ltd filed Critical LG Innotek Co Ltd
Priority to EP11823707A priority Critical patent/EP2538454A1/en
Priority to US13/639,704 priority patent/US9818897B2/en
Priority to JP2013528101A priority patent/JP2013537364A/ja
Priority to CN2011800412097A priority patent/CN103081123A/zh
Publication of WO2012033274A1 publication Critical patent/WO2012033274A1/ko
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/10Semiconductor bodies
    • H10F77/16Material structures, e.g. crystalline structures, film structures or crystal plane orientations
    • H10F77/169Thin semiconductor films on metallic or insulating substrates
    • H10F77/1698Thin semiconductor films on metallic or insulating substrates the metallic or insulating substrates being flexible
    • H10F77/1699Thin semiconductor films on metallic or insulating substrates the metallic or insulating substrates being flexible the films including Group I-III-VI materials, e.g. CIS or CIGS on metal foils or polymer foils
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • H10F19/30Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
    • H10F19/31Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
    • H10F19/35Structures for the connecting of adjacent photovoltaic cells, e.g. interconnections or insulating spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/10Semiconductor bodies
    • H10F77/16Material structures, e.g. crystalline structures, film structures or crystal plane orientations
    • H10F77/169Thin semiconductor films on metallic or insulating substrates
    • H10F77/1694Thin semiconductor films on metallic or insulating substrates the films including Group I-III-VI materials, e.g. CIS or CIGS
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/541CuInSe2 material PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • Embodiment relates to a photovoltaic device and a method of manufacturing the same.
  • a CIGS solar photovoltaic device which is a pn heterojunction device having a substrate structure including a glass substrate, a metal back electrode layer, a p-type CIGS-based light absorbing layer, a high resistance buffer layer, an n-type window layer, and the like, is widely used.
  • the embodiment is to provide a photovoltaic device having a short circuit protection and improved photoelectric conversion efficiency and a method of manufacturing the same.
  • Photovoltaic device includes a substrate; A back electrode layer disposed on the substrate; A light absorbing layer disposed on the back electrode layer; And a window layer disposed on the light absorbing layer, wherein a third through hole having a first width is formed in the light absorbing layer, and a fourth through having a second width larger than the first width in the window layer. A groove is formed, and the fourth through groove corresponds to the third through groove.
  • Photovoltaic device includes a back electrode; A light absorbing part disposed on the back electrode; And a window on the light absorbing portion to form a step with the light absorbing portion.
  • Method of manufacturing a solar cell apparatus comprises the steps of forming a back electrode layer on a substrate; Forming a light absorbing layer on the back electrode layer; Forming a window layer on the light absorbing layer; Forming a mask pattern on the window layer; And etching the window layer and the light absorbing layer to form a third through groove having a first width in the light absorbing layer, and forming a fourth through groove having a second width greater than the first width in the window layer. Forming a step.
  • the solar cell apparatus includes a third through groove and a fourth through groove. At this time, the fourth through hole has a relatively large width, and the third through groove has a relatively small width.
  • the fourth through hole separates the window layer having a relatively low resistance
  • the third through groove separates the light absorbing layer having a relatively high resistance
  • the third through hole and the fourth through hole effectively separate the light absorbing layer and the window layer.
  • the third through fourth groove and the fourth through groove can separate each cell, and can effectively prevent a short between the cells.
  • the solar cell apparatus prevents short between cells and has improved photoelectric conversion efficiency.
  • the third through hole has a small width, the back electrode layer is less exposed. In addition, the part involved in power generation in the light absorbing layer can be effectively protected.
  • the solar cell apparatus according to the embodiment has improved durability and reliability.
  • FIG. 1 is a plan view illustrating a solar cell panel according to an embodiment.
  • FIG. 2 is a cross-sectional view illustrating a cross section taken along line AA ′ in FIG. 1.
  • 3 to 8 are views illustrating a process of manufacturing the solar cell panel according to the embodiment.
  • each substrate, layer, film, or electrode is described as being formed “on” or “under” of each substrate, layer, film, or electrode, etc.
  • "On” and “under” include both “directly” or “indirectly” formed through other components.
  • the criteria for the top or bottom of each component will be described with reference to the drawings. The size of each component in the drawings may be exaggerated for description, and does not mean a size that is actually applied.
  • FIG. 1 is a plan view illustrating a solar cell panel according to an embodiment.
  • FIG. 2 is a cross-sectional view taken along the line A-A 'of FIG. 1.
  • a solar cell panel includes a support substrate 100, a back electrode layer 200, a light absorbing layer 300, a buffer layer 400, a high resistance buffer layer 500, a window layer 600, and a plurality of substrates. Connections 700 are included.
  • the support substrate 100 has a plate shape, and the back electrode layer 200, the light absorbing layer 300, the buffer layer 400, the high resistance buffer layer 500, the window layer 600, and the connection portion ( 700).
  • the support substrate 100 may be an insulator.
  • the support substrate 100 may be a glass substrate, a plastic substrate, or a metal substrate.
  • the support substrate 100 may be a soda lime glass substrate.
  • the support substrate 100 may be transparent.
  • the support substrate 100 may be rigid or flexible.
  • the back electrode layer 200 is disposed on the support substrate 100.
  • the back electrode layer 200 is a conductive layer.
  • Examples of the material used for the back electrode layer 200 include a metal such as molybdenum.
  • the back electrode layer 200 may include two or more layers.
  • each of the layers may be formed of the same metal, or may be formed of different metals.
  • First through holes TH1 are formed in the back electrode layer 200.
  • the first through holes TH1 are open regions that expose the top surface of the support substrate 100.
  • the first through holes TH1 may have a shape extending in a first direction when viewed in a plan view.
  • the width of the first through holes TH1 may be about 80 ⁇ m to 200 ⁇ m.
  • the back electrode layer 200 is divided into a plurality of back electrodes by the first through holes TH1. That is, the back electrodes are defined by the first through holes TH1.
  • the back electrodes are spaced apart from each other by the first through holes TH1.
  • the back electrodes are arranged in a stripe shape.
  • the back electrodes may be arranged in a matrix form.
  • the first through holes TH1 may have a lattice shape when viewed in a plan view.
  • the light absorbing layer 300 is disposed on the back electrode layer 200.
  • the material included in the light absorbing layer 300 is filled in the first through holes TH1.
  • the light absorbing layer 300 includes a group I-III-VI compound.
  • the light absorbing layer 300 may be formed of a copper-indium-gallium-selenide-based (Cu (In, Ga) Se 2 ; CIGS-based) crystal structure, copper-indium-selenide-based, or copper-gallium-selenide It may have a system crystal structure.
  • the energy band gap of the light absorbing layer 300 may be about 1 eV to 1.8 eV.
  • the buffer layer 400 is disposed on the light absorbing layer 300.
  • the buffer layer 400 includes cadmium sulfide (CdS), and an energy band gap of the buffer layer 400 is about 2.2 eV to 2.4 eV.
  • the high resistance buffer layer 500 is disposed on the buffer layer 400.
  • the high resistance buffer layer 500 includes zinc oxide (i-ZnO) that is not doped with impurities.
  • the energy bandgap of the high resistance buffer layer 500 is about 3.1 eV to 3.3 eV.
  • Second through holes TH2 are formed in the light absorbing layer 300, the buffer layer 400, and the high resistance buffer layer 500.
  • the second through holes TH2 pass through the light absorbing layer 300.
  • the second through holes TH2 are open regions exposing the top surface of the back electrode layer 200.
  • the second through holes TH2 are formed adjacent to the first through holes TH1. That is, some of the second through holes TH2 are formed next to the first through holes TH1 when viewed in a plan view.
  • the second through holes TH2 have a shape extending in the first direction.
  • the width of the second through holes TH2 may be about 80 ⁇ m to about 200 ⁇ m.
  • Third through holes TH3 are formed in the light absorbing layer 300 and the buffer layer 400.
  • the third through holes TH3 pass through the light absorbing layer 300 and the buffer layer 400.
  • the third through holes TH3 expose the top surface of the back electrode layer 200.
  • the third through holes TH3 are adjacent to the second through holes TH2, respectively.
  • the second through holes TH2 are interposed between each of the first through holes TH1 and the third through holes TH3, respectively.
  • the third through holes TH3 have a shape extending in the first direction.
  • the width W1 of the third through holes TH3 may be about 30 ⁇ m to about 100 ⁇ m.
  • Inner surfaces of the third through holes TH3 may be inclined or perpendicular to an upper surface of the light absorbing layer 300.
  • the light absorbing layer 300 defines a plurality of light absorbing portions by the second through holes TH2 and the third through holes TH3. That is, the light absorbing layer 300 is divided into the light absorbing portions by the second through holes TH2 and the third through holes TH3.
  • the buffer layer 400 is defined as a plurality of buffers by the second through holes TH2 and the third through holes TH3. That is, the buffer layer 400 is divided into the buffers by the second through holes TH2 and the third through holes TH3.
  • the window layer 600 is disposed on the high resistance buffer layer 500.
  • the window layer 600 is transparent and is a conductive layer.
  • the resistance of the window layer 600 is higher than the resistance of the back electrode layer 200.
  • the window layer 600 includes an oxide.
  • an example of a material used as the window layer 600 may include aluminum doped zinc oxide (AZO) or gallium doped zinc oxide (GZO).
  • the fourth through holes TH4 are formed in the high resistance buffer layer 500 and the window layer 600.
  • the fourth through holes TH4 pass through the high resistance buffer layer 500 and the window layer 600.
  • the fourth through holes TH4 are formed at positions adjacent to the second through holes TH2, respectively.
  • the fourth through holes TH4 are disposed next to the second through holes TH2. That is, when viewed in a plan view, the fourth through holes TH4 are arranged side by side next to the second through holes TH2.
  • the fourth through holes TH4 may have a shape extending in the first direction.
  • the fourth through holes TH4 correspond to the third through holes TH3, respectively.
  • the fourth through holes TH4 are connected to the third through holes TH3.
  • the fourth through holes TH4 overlap the third through holes TH3 when viewed from the top.
  • the fourth through holes TH4 have a larger width W4 than the third through holes TH3.
  • the width W4 of the fourth through holes TH4 may be about 80 ⁇ m to about 120 ⁇ m.
  • the inner side surface 601 of the fourth through holes TH4 may be inclined with respect to the upper surface of the window layer 600.
  • the inner surface 601 of the fourth through holes TH4 may be inclined at an angle of about 0 ° to about 30 ° with respect to the direction perpendicular to the upper surface of the window layer 600.
  • the high resistance buffer layer 500 is defined as a plurality of high resistance buffers by the second through holes TH2 and the fourth through holes TH4. That is, the high resistance buffer layer 500 is divided into the high resistance buffers by the second through holes TH2 and the fourth through holes TH4.
  • the window layer 600 is divided into a plurality of windows by the fourth through holes TH4.
  • the windows are defined by the fourth through holes TH4.
  • the windows have a shape corresponding to the back electrodes. That is, the windows are arranged in a stripe shape. Alternatively, the windows may be arranged in a matrix form.
  • a plurality of cells C1, C2... are defined by the third through holes TH3 and the fourth through holes TH4.
  • the cells C1, C2... are defined by the second through holes TH2, the third through holes TH3, and the fourth through holes TH4. That is, according to the second through holes TH2, the third through holes TH3, and the fourth through holes TH4, the solar cell apparatus according to the embodiment includes the cells C1 and C2. Separated by ..)
  • the cells C1, C2... Are connected to each other in a second direction crossing the first direction. That is, current may flow in the second direction through the cells C1, C2...
  • the cells C1, C2 ... each include a back electrode, a light absorbing part, a buffer, a high resistance buffer, and a window.
  • the cells C1, C2 ... have a structure in which the back electrode, the light absorbing part, the buffer, the high resistance buffer, and the window are sequentially stacked.
  • the window forms a step with the light absorbing portion.
  • the second cell C2 also includes a back electrode 210, a light absorbing part 310, a buffer 410, a high resistance buffer 510, and a window 610. do.
  • the window 610 is disposed on the light absorbing part 310.
  • the window 610 is disposed to form a step with the light absorbing part 310.
  • the side surface 311 of the light absorbing part 310 may further protrude laterally with respect to the side surface 611 of the window 610. That is, the side surface 311 of the light absorbing part 310 may be disposed on a plane different from the side surface 611 of the window 610. In this case, the side surface 611 of the window 610 may be inclined with respect to the top surface of the back electrode layer 200.
  • the side surface 311 of the light absorbing part 310 may be an inner side surface of the third through hole TH3.
  • the side surface 611 of the window 610 may be an inner side surface of the fourth through hole TH4.
  • the high resistance buffer 510 may form a step with the buffer 410.
  • the buffer 410 may have a planar shape corresponding to the light absorbing part 310.
  • one outer side of the high resistance buffer 510 may coincide with one outer side of the window 610.
  • connection parts 700 are disposed inside the second through holes TH2.
  • the connection parts 700 extend downward from the window layer 600 and are connected to the back electrode layer 200.
  • the connection parts 700 extend from the window of the first cell C1 and are connected to the back electrode of the second cell C2.
  • connection parts 700 connect adjacent cells to each other.
  • the connection parts 700 connect the windows and the back electrodes included in the cells C1 and C2... Adjacent to each other.
  • connection part 700 is formed integrally with the window layer 600. That is, the material used as the connection part 700 is the same as the material used as the window layer 600.
  • the solar cell panel according to the embodiment includes the third through holes TH3 having a relatively small width W1 and the fourth through holes TH4 having a relatively large width W2.
  • the fourth through holes TH4 separate the window layer 600 having a relatively low resistance
  • the third through holes TH3 have the relatively high resistance to the light absorbing layer 300. To separate.
  • the third through holes TH3 and the fourth through holes TH4 effectively separate the light absorbing layer 300 and the window layer 600.
  • the third through holes TH3 and the fourth through holes TH4 separate respective cells C1 and C2... And a short between the cells C1 and C2. Can be prevented efficiently.
  • the light absorbing layer 300 and the window layer 600 forms a step (SC). That is, the window layer 600 is stacked on the light absorbing layer 300 in a step shape.
  • SC a phenomenon in which external foreign matter flows into the third through holes TH3 may be reduced. That is, external foreign matter may be caught in the step SC.
  • the solar cell panel according to the embodiment prevents short between the cells C1, C2 ... and has an improved photoelectric conversion efficiency.
  • the solar cell panel according to the embodiment may effectively protect the light absorbing layer 300 corresponding to a region (hereinafter, referred to as an active region) for converting sunlight into electrical energy in the light absorbing layer 300.
  • the third through holes TH3 separate the light absorbing layer 300 having a high resistance, the third through holes TH3 are formed to have a narrow width W1 and are disposed in the active region. 200 is effectively protected.
  • the solar cell apparatus according to the embodiment has improved durability and reliability.
  • 3 to 10 are cross-sectional views illustrating a method of manufacturing the solar cell apparatus according to the embodiment.
  • the present manufacturing method refer to the description of the photovoltaic device described above.
  • the description of the photovoltaic device described above may be essentially combined with the description of the present manufacturing method.
  • the back electrode layer 200 is formed on the support substrate 100, and the back electrode layer 200 is patterned to form first through holes TH1. Accordingly, a plurality of back electrodes are formed on the support substrate 100.
  • the back electrode layer 200 is patterned by a laser.
  • Examples of the material used as the back electrode layer 200 include molybdenum and the like.
  • the back electrode layer 200 may be formed of two or more layers under different process conditions.
  • the first through holes TH1 may expose an upper surface of the support substrate 100 and have a width of about 80 ⁇ m to about 200 ⁇ m.
  • an additional layer such as a diffusion barrier may be interposed between the support substrate 100 and the back electrode layer 200, wherein the first through holes TH1 expose the top surface of the additional layer.
  • a light absorbing layer 300, a buffer layer 400, and a high resistance buffer layer 500 are formed on the back electrode layer 200.
  • the light absorbing layer 300 may be formed by a sputtering process or an evaporation method.
  • the light absorbing layer 300 For example, copper, indium, gallium, selenide-based (Cu (In, Ga) Se 2 ; CIGS-based) while evaporating copper, indium, gallium, and selenium simultaneously or separately to form the light absorbing layer 300.
  • the method of forming the light absorbing layer 300 and the method of forming the metal precursor film by the selenization process are widely used.
  • a metal precursor film is formed on the back electrode 200 by a sputtering process using a copper target, an indium target, and a gallium target.
  • the metal precursor film is formed of a copper-indium-gallium-selenide-based (Cu (In, Ga) Se 2 ; CIGS-based) light absorbing layer 300 by a selenization process.
  • the sputtering process and the selenization process using the copper target, the indium target, and the gallium target may be simultaneously performed.
  • the CIS-based or CIG-based light absorbing layer 300 may be formed by using only a copper target and an indium target, or by a sputtering process and a selenization process using a copper target and a gallium target.
  • cadmium sulfide is deposited by a sputtering process or a chemical bath depositon (CBD) or the like, and the buffer layer 400 is formed.
  • zinc oxide is deposited on the buffer layer 400 by a sputtering process, and the high resistance buffer layer 500 is formed.
  • the buffer layer 400 and the high resistance buffer layer 500 are deposited to a low thickness.
  • the thickness of the buffer layer 400 and the high resistance buffer layer 500 is about 1 nm to about 80 nm.
  • the second through holes TH2 may be formed by a mechanical device such as a tip or a laser device.
  • the light absorbing layer 300 and the buffer layer 400 may be patterned by a tip having a width of about 40 ⁇ m to about 180 ⁇ m.
  • the width of the second through holes TH2 may be about 100 ⁇ m to about 200 ⁇ m.
  • the second through holes TH2 are formed to expose a portion of the top surface of the back electrode layer 200.
  • a transparent conductive layer 600a is formed on the light absorbing layer 300 and inside the second through holes TH2. That is, the transparent conductive layer 600a is formed by depositing a transparent conductive material on the high resistance buffer layer 500 and inside the second through holes TH2.
  • the transparent conductive layer 600a may be formed by depositing zinc oxide doped with aluminum by a sputtering process on an upper surface of the high resistance buffer layer 500 and inside the second through holes TH2. have.
  • the transparent conductive material is filled in the second through holes TH2, and the transparent conductive layer 600a is in direct contact with the back electrode layer 200.
  • a mask pattern 800 is formed on the transparent conductive layer 600a.
  • the mask pattern 800 includes exposure holes 801 exposing the top surface of the transparent conductive layer 600a.
  • the exposure holes 801 are formed adjacent to the second through holes TH2, respectively.
  • the exposure holes 801 extend in a first direction.
  • the mask pattern 800 includes a first mask part 810 and a second mask part 820.
  • the first mask part 810 is adjacent to the first exposure holes 801. That is, the first exposure holes 801 may be formed through the first mask part 810.
  • the first mask part 810 has a thickness T1 that is thinner than the second mask part 820.
  • the thickness T1 of the first mask part 810 may be about 20 ⁇ m to about 40 ⁇ m.
  • the second mask portion 820 has a thickness T2 that is thicker than the first mask portion 810.
  • the thickness T2 of the second mask part 820 may be about 50 ⁇ m to about 90 ⁇ m.
  • An example of a material used as the mask pattern 800 may be a photoresist film.
  • the light absorbing layer 300, the buffer layer 400, the high resistance buffer layer 500, and the transparent conductive layer are etched using the mask pattern 800 as an etching mask. Accordingly, a plurality of third through holes TH3 are formed in the light absorbing layer 300 and the buffer layer 400.
  • the third through holes TH3 correspond to the exposure holes 801, respectively.
  • the third through holes TH3 may be formed to match the exposure holes 801.
  • a wet etching process or a dry etching process may be applied.
  • An etchant such as an etchant may be used in the wet etching process for forming the third through holes TH3.
  • a dry etching process for forming the third through holes TH3 may be used.
  • the first mask part 810 may be removed, and the thickness of the second mask part 820 may be reduced.
  • an O 2 plasma or the like may be sprayed downward on the mask pattern 800.
  • the entirety of the first mask portion 810 and a portion of the second mask portion 820 may be removed at the same time.
  • the high resistance buffer layer 500 and the window layer 600 are patterned through the mask pattern 821 from which the first mask part 810 is removed. Accordingly, fourth through holes TH4 are formed in the high resistance buffer layer 500 and the window layer 600.
  • the fourth through holes TH4 may be formed by an etchant that selectively etches the window layer 600 and the high resistance buffer layer 500.
  • the fourth through holes TH4 may be formed to correspond to an area where the first mask part 810 is removed.
  • the mask pattern 821 may be removed, a short may be prevented, and a solar cell panel having improved reliability and durability may be provided.
  • the solar cell panel according to the embodiment corresponds to a photovoltaic device for converting sunlight into electrical energy. Therefore, the present embodiment can be applied not only to solar panels but also to various photovoltaic devices.
  • Photovoltaic device is used in the field of photovoltaic power generation.

Landscapes

  • Photovoltaic Devices (AREA)
PCT/KR2011/003120 2010-09-10 2011-04-27 태양광 발전장치 및 이의 제조방법 Ceased WO2012033274A1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP11823707A EP2538454A1 (en) 2010-09-10 2011-04-27 Device for generating solar power and method for manufacturing same
US13/639,704 US9818897B2 (en) 2010-09-10 2011-04-27 Device for generating solar power and method for manufacturing same
JP2013528101A JP2013537364A (ja) 2010-09-10 2011-04-27 太陽光発電装置及びその製造方法
CN2011800412097A CN103081123A (zh) 2010-09-10 2011-04-27 用于太阳能发电的装置及其制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020100089133A KR101262455B1 (ko) 2010-09-10 2010-09-10 태양광 발전장치 및 이의 제조방법
KR10-2010-0089133 2010-09-10

Publications (1)

Publication Number Publication Date
WO2012033274A1 true WO2012033274A1 (ko) 2012-03-15

Family

ID=45810845

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2011/003120 Ceased WO2012033274A1 (ko) 2010-09-10 2011-04-27 태양광 발전장치 및 이의 제조방법

Country Status (6)

Country Link
US (1) US9818897B2 (enExample)
EP (1) EP2538454A1 (enExample)
JP (1) JP2013537364A (enExample)
KR (1) KR101262455B1 (enExample)
CN (1) CN103081123A (enExample)
WO (1) WO2012033274A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090293955A1 (en) * 2007-11-07 2009-12-03 Qualcomm Incorporated Photovoltaics with interferometric masks
WO2010044901A1 (en) * 2008-10-16 2010-04-22 Qualcomm Mems Technologies, Inc. Monolithic imod color enhanced photovoltaic cell
KR20140142416A (ko) * 2013-06-03 2014-12-12 삼성에스디아이 주식회사 태양 전지 및 이의 제조 방법
KR102042026B1 (ko) * 2013-06-20 2019-11-27 엘지이노텍 주식회사 태양전지
KR20150041929A (ko) * 2013-10-10 2015-04-20 엘지이노텍 주식회사 태양광 발전장치
NL2014040B1 (en) * 2014-12-23 2016-10-12 Stichting Energieonderzoek Centrum Nederland Method of making a curent collecting grid for solar cells.
CN108183088B (zh) * 2017-12-27 2020-06-12 武汉华星光电技术有限公司 一种膜层套孔及阵列基板制备方法
JP2022085070A (ja) * 2020-11-27 2022-06-08 株式会社リコー 光電変換モジュール、電子機器、及び電源モジュール

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20070004787A (ko) * 2004-03-31 2007-01-09 로무 가부시키가이샤 적층형 박막 태양전지 및 그 방법
JP2008140920A (ja) * 2006-11-30 2008-06-19 Sanyo Electric Co Ltd 太陽電池モジュール及び太陽電池モジュールの製造方法
WO2009150654A2 (en) * 2008-06-12 2009-12-17 Yissum Research Development Company Solar volumetric structure
KR20100112826A (ko) * 2009-04-10 2010-10-20 주성엔지니어링(주) 박막형 태양전지의 제조방법 및 제조장치

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5538902A (en) * 1993-06-29 1996-07-23 Sanyo Electric Co., Ltd. Method of fabricating a photovoltaic device having a three-dimensional shape
AU766727B2 (en) * 1999-06-14 2003-10-23 Kaneka Corporation Method of fabricating thin-film photovoltaic module
US20050056312A1 (en) * 2003-03-14 2005-03-17 Young David L. Bifacial structure for tandem solar cells
JP4695850B2 (ja) * 2004-04-28 2011-06-08 本田技研工業株式会社 カルコパイライト型太陽電池
US20060036230A1 (en) 2004-08-13 2006-02-16 Mills Michael W Shaped frontal patch
US7235736B1 (en) * 2006-03-18 2007-06-26 Solyndra, Inc. Monolithic integration of cylindrical solar cells
US20090084425A1 (en) * 2007-09-28 2009-04-02 Erel Milshtein Scribing Methods for Photovoltaic Modules Including a Mechanical Scribe
JP2009135337A (ja) * 2007-11-30 2009-06-18 Showa Shell Sekiyu Kk Cis系太陽電池の積層構造、cis系薄膜太陽電池の集積構造及び製造方法
KR101460580B1 (ko) * 2008-02-20 2014-11-12 주성엔지니어링(주) 박막형 태양전지 및 그 제조방법
KR20100030944A (ko) * 2008-09-11 2010-03-19 엘지이노텍 주식회사 태양전지의 제조방법
WO2010044738A1 (en) * 2008-10-13 2010-04-22 Solibro Research Ab A method for manufacturing a thin film solar cell module
JP2010177463A (ja) * 2009-01-29 2010-08-12 Mitsubishi Electric Corp 薄膜太陽電池およびその製造方法並びに溝形成装置
KR101081095B1 (ko) 2009-06-30 2011-11-07 엘지이노텍 주식회사 태양전지 및 이의 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20070004787A (ko) * 2004-03-31 2007-01-09 로무 가부시키가이샤 적층형 박막 태양전지 및 그 방법
JP2008140920A (ja) * 2006-11-30 2008-06-19 Sanyo Electric Co Ltd 太陽電池モジュール及び太陽電池モジュールの製造方法
WO2009150654A2 (en) * 2008-06-12 2009-12-17 Yissum Research Development Company Solar volumetric structure
KR20100112826A (ko) * 2009-04-10 2010-10-20 주성엔지니어링(주) 박막형 태양전지의 제조방법 및 제조장치

Also Published As

Publication number Publication date
CN103081123A (zh) 2013-05-01
US9818897B2 (en) 2017-11-14
KR20120026925A (ko) 2012-03-20
KR101262455B1 (ko) 2013-05-08
EP2538454A1 (en) 2012-12-26
US20130037099A1 (en) 2013-02-14
JP2013537364A (ja) 2013-09-30

Similar Documents

Publication Publication Date Title
WO2011119001A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2012033274A1 (ko) 태양광 발전장치 및 이의 제조방법
WO2011053077A2 (ko) 태양전지 및 이의 제조방법
WO2011040781A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2011122853A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2015041470A1 (ko) 태양전지
WO2011002230A2 (ko) 태양전지 및 이의 제조방법
WO2011040782A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2011055946A2 (ko) 태양전지 및 이의 제조방법
WO2011043610A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2011040780A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2012015151A2 (ko) 태양전지 및 이의 제조방법
WO2011040778A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2015056934A1 (ko) 태양전지 모듈
WO2017043805A1 (ko) 박막형 태양전지 및 그 제조 방법
WO2011002211A2 (ko) 태양전지 및 이의 제조방법
WO2015046845A1 (ko) 태양전지
WO2012015286A2 (ko) 태양광 발전장치 및 이의 제조방법
WO2012046934A1 (ko) 태양광 발전장치 및 이의 제조방법
WO2012015150A1 (ko) 태양광 발전장치 및 이의 제조방법
WO2013147517A1 (en) Solar cell and method of fabricating the same
WO2012057490A2 (en) Solar cell apparatus and method for manufacturing the same
WO2014021617A1 (en) Solar cell apparatus and method of fabricating the same
WO2012036364A1 (ko) 태양광 발전장치 및 이의 제조방법
WO2011083995A2 (ko) 태양광 발전장치 및 이의 제조방법

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 201180041209.7

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 11823707

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2011823707

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 13639704

Country of ref document: US

ENP Entry into the national phase

Ref document number: 2013528101

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE