WO2012012984A1 - 液晶显示器 - Google Patents

液晶显示器 Download PDF

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Publication number
WO2012012984A1
WO2012012984A1 PCT/CN2010/078698 CN2010078698W WO2012012984A1 WO 2012012984 A1 WO2012012984 A1 WO 2012012984A1 CN 2010078698 W CN2010078698 W CN 2010078698W WO 2012012984 A1 WO2012012984 A1 WO 2012012984A1
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WO
WIPO (PCT)
Prior art keywords
pixel
sub
data
transistor
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2010/078698
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English (en)
French (fr)
Inventor
张勇
廖良展
郭东胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US12/997,495 priority Critical patent/US8416170B2/en
Publication of WO2012012984A1 publication Critical patent/WO2012012984A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134345Subdivided pixels, e.g. for grey scale or redundancy
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/13624Active matrix addressed cells having more than one switching element per pixel
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0443Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations

Definitions

  • the present invention relates to a liquid crystal display, and more particularly to a liquid crystal display which can realize pixel driving and dot inversion without bridging. Dragon
  • FIG. 1 is a schematic diagram of a liquid crystal display conventionally using a half data driver (HSD) technology.
  • the liquid crystal display 10 includes a pixel matrix 12, a gate driver 14, and a source driver 16.
  • the pixel group 12 includes a plurality of sub-pixels respectively representing three primary colors of red, green and blue (RGB).
  • the scan driver 14 outputs the scan signals through the scan lines G1-Gn so that each column is sequentially turned on, and the data driver 16 outputs the corresponding data signals to the entire column of pixels through the data lines D1-Dm to charge them to the respective desired displays. Voltage to show different gray levels. This is continued until all the pixels of the pixel group 12 are fully charged, and charging starts from the first column.
  • Each sub-pixel of the conventional scan driving technology is electrically connected to one data line and one scan.
  • the present invention provides a liquid crystal display including a plurality of broom lines and a plurality of data lines, each of two adjacent broom lines including a first scan line and a second scan line, each two adjacent The data line includes a first data line and a second data line, the liquid crystal display includes a plurality of pixel groups, and at least one pixel group is located at the first scan line, the second scan line, the first data line, and Between the second data lines, and the pixel group includes a first sub-pixel, a first transistor, a second sub-pixel, a second transistor, a third sub-pixel, a third transistor, a fourth sub-pixel, and a fourth transistor
  • the first transistor is electrically connected to the first scan line and the first data line
  • the second transistor is electrically connected to the first scan line and the second data line
  • the third transistor is electrically connected to the second scan line and the first data line
  • the fourth transistor is electrically connected to the second scan line and the second data line.
  • the first and second transistors are turned on according to the first scan line transmitting scan signals, and the first and second sub-pixels are respectively transmitted according to the first and second data lines.
  • Data signals of opposite polarity show gray scale.
  • the third and fourth transistors are turned on according to the second scan line transmitting scan signals, and the third and fourth sub-pixels are respectively displayed according to data signals of opposite polarities transmitted by the first and second data lines. Grayscale.
  • a liquid crystal display includes a plurality of broom lines and a plurality of data lines, each of two adjacent broom lines including a first scan line and a second scan line; each two adjacent The data line includes a first data line and a second data line, the liquid crystal display includes a plurality of pixel groups, and at least one pixel group is located at the first scan line, the second scan line, the first data line, and Between the second data lines, and the pixel group includes a first sub-pixel, a first transistor, a second sub-pixel, a second transistor, a third sub-pixel, a third transistor, a fourth sub-pixel, and a fourth crystal a first transistor is electrically connected to the second scan line and the first data line, and the second transistor is electrically connected to the second scan line and the second data line
  • the third transistor is electrically connected to the first scan line and the first data line
  • the fourth transistor is electrically connected to the first scan line and the second data line.
  • a liquid crystal display includes a plurality of broom lines and a plurality of data lines, each of two adjacent broom lines including a first scan line and a second scan line; each of four adjacent lines
  • the data line includes a first data line, a second data line, a third data line, and a fourth data line
  • the liquid crystal display includes a plurality of first pixel groups and a plurality of second pixel groups.
  • At least one first pixel group is located between the first scan line, the second scan line, the first data line, and the second data line, and the first pixel group includes a first sub-pixel, a first transistor, a second sub-pixel, a second transistor, a third sub-pixel, a third transistor, a fourth sub-pixel, and a fourth transistor; the first transistor and the second scan line and the first data line Electrically connecting, the second transistor is electrically connected to the second scan line and the second data line, and the third transistor is electrically connected to the first scan line and the first data line, The fourth transistor is electrically connected to the first scan line and the second data line.
  • At least one second pixel group is located between the first scan line, the second scan line, the third data line, and the fourth data line, and the second pixel group includes a fifth sub-pixel, a fifth transistor, a sixth sub-pixel, a sixth transistor, a seventh sub-pixel, a seventh transistor, an eighth sub-pixel, and an eighth transistor; the fifth transistor and the first scan
  • the sixth transistor is electrically connected to the third data line
  • the sixth transistor is electrically connected to the first scan line and the fourth data line
  • the seventh transistor and the second scan line are
  • the third data line is electrically connected
  • the eighth transistor is electrically connected to the second scan line and the fourth data line.
  • the data signal transmitted by the third and fourth data lines indicates that the gray scale transmits the scan signal according to the second scan line to turn on the first, second, seventh, and eighth transistors, the first and second And the seventh and eighth sub-pixels respectively display gray scales according to the data signals transmitted by the first, second, third, and fourth data lines.
  • the pixel unit of the pixel group includes two sub-pixels respectively displaying different gray levels (ie, one bright and one dark), so the pixel array of the present invention can improve the effect of color shift.
  • Figure 1 is a schematic diagram of a conventional liquid crystal display using half of the data driver technology.
  • Fig. 2 is a view showing a scanning driver, a data driver and a pixel array of the first embodiment of the liquid crystal display of the present invention.
  • FIG. 3 is a schematic diagram of a pixel array in accordance with a second embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a pixel array of a third embodiment of the present invention.
  • Figure 5 is a schematic illustration of a pixel array in accordance with a fourth embodiment of the present invention.
  • Figure 6 is a schematic illustration of a pixel array in accordance with a fifth embodiment of the present invention.
  • FIG. 7 is a schematic illustration of a pixel array in accordance with a sixth embodiment of the present invention.
  • 2 is a schematic diagram of a gate driver 104 and a data driver 106 of the liquid crystal display 100 of the present invention and a pixel matrix 102 of the first embodiment.
  • the liquid crystal display 100 includes a pixel array 102, a scan driver 104, and a data driver 106.
  • the pixel array 102 is composed of a plurality of pixel groups 111, each of which includes a first pixel unit 111a and a second pixel unit 111b.
  • the scan driver 104 outputs the scan signal, and sequentially turns on the pixel units of each column sequentially through the scan lines G1-Gn, and the data driver 106 outputs the corresponding data signals to the pixels of the entire column through the data lines D1-Dm to charge them. Go to the desired display voltage to display different gray levels.
  • the sub-pixels of pixel array 102 are driven using half of the data driver technology. For convenience of explanation, only a part of the pixel group 111 is captured on the pixel array 102 as the embodiment.
  • the pixel array 102 includes adjacent first scan lines G1, second scan lines G2, and adjacent first data lines D1 and second data lines D2 intersecting the first and second scan lines G1, G2. .
  • the first pixel unit 111a includes the first sub-pixel P11 and the second sub-pixel.
  • the second pixel unit 111b includes a third sub-pixel P13 and a fourth sub-pixel P14.
  • the first sub-pixel P11 includes a first transistor P1a electrically connected to the first scan line G1 and the first data line D1.
  • the second sub-pixel P12 includes a second transistor P2a electrically connected to the first scan line G1 and the second data line D2.
  • the third sub-pixel P13 includes a third transistor P3a electrically connected to the second scan line G2 and the first data line D1.
  • the fourth sub-pixel P14 includes a fourth transistor P4a electrically connected to the second scan line G2 and the second data line D2.
  • the scan driver 104 first transmits the scan signal through the scan line G1, so that the transistors P1a, P2a of the pixel group 111 are turned on.
  • the data driver 106 respectively transmits the data signals of opposite polarities through the turned-on transistors P1a, P2a through the data lines D1, D2. Transmitting to the first sub-pixel P11 and the second sub-pixel P12, the first sub-pixel P11 and the second sub-pixel P12 display the first gray level and the second gray level according to the data signals of opposite polarities, the first gray level and The second gray scales are not the same, so that the first sub-pixel P11 and the second sub-pixel P12 respectively have a light-dark effect. For example, the first sub-pixel P11 and the second sub-pixel P12 respectively exhibit bright red and dark red. Visually, the observer can see the average grayscale effect of the first grayscale and the second grayscale blend.
  • the scan signal is transmitted through the scan line G2, so that the transistors P3a and P4a are turned on.
  • the data driver 106 respectively transmits the data of the opposite polarity through the data lines D1 and D2.
  • the signal is sent to the third sub-pixel P13 and the fourth sub-pixel P14 via the turned-on transistors P3a and P4a.
  • the third sub-pixel P13 and the fourth sub-pixel P14 display the third gray level and the fourth gray level according to the data signals of opposite polarities, and the third gray level and the fourth gray level are not the same, so that the third sub-pixel P13 And the fourth sub-pixel P13 respectively presents a bright-dark effect, and visually, the observer can see the average gray-scale effect after the third grayscale and the fourth grayscale are mixed.
  • the scan driver 104 sequentially transmits the scan signals through the scan line G3, so that the pixel group 111 of the next column operates according to the foregoing mechanism until all the pixels of the pixel array 102 are charged, and then the next scan is started from the first column. . Please refer to FIG. 3.
  • FIG. 3 Please refer to FIG. 3.
  • the pixel array 112 includes a first pixel unit 112a and a second pixel unit 112b.
  • the first pixel unit 112a includes a first sub-pixel P11 and a second sub-pixel P12
  • the second pixel unit 112b includes a third sub-pixel P13 and a fourth sub-pixel P14.
  • the connection relationship between the pixel array 112 and the data lines D1-Dm and the scanning lines G1-Gn shown in FIG. 3 is the same as that of the pixel array 111 shown in FIG. 2, and therefore will not be described again.
  • the combined area of the first sub-pixel P11 and the second sub-pixel P12, and the combined area of the third sub-pixel P13 and the fourth sub-pixel P14 are complementary rectangles.
  • the shape of any one of the sub-pixels P1 l, P12, P13, and P14, or the combination of the sub-pixels P11 and P12, or the combination of the sub-pixels P13 and P14 is not limited to a rectangle, and may be a triangle or other polygon. Or any irregular shape.
  • FIG. 4 is a schematic diagram of a pixel array 202 according to a third embodiment of the present invention.
  • the pixel array 202 is composed of a number of pixel groups 211. Taking the pixel group 211 located between the first scan line G2, the second scan line G2, the first data line D1, and the second data line D2 as an example, the pixel group 211 includes a first pixel unit 211a and a second pixel unit 211b.
  • the first pixel unit 211a includes a first sub-pixel P21 and a second sub-pixel P22, and the second pixel unit 211b includes a third sub-pixel P23 and a fourth sub-pixel P24.
  • the first sub-pixel P21 includes a first transistor P1b that is electrically connected to the second scan line G2 and the first data line D1.
  • the second sub-pixel P22 includes a second transistor P2b electrically connected to the second scan line G2 and the second data line D2.
  • the third sub-pixel P23 includes a third transistor P3b electrically connected to the first scan line G1 and the first data line D1.
  • the fourth sub-pixel P24 includes a fourth transistor P4b electrically connected to the first scan line G1 and the second data line D2.
  • the scan line G1 transmits the scan signal so that the transistors P3b, P4b of the pixel group 211 are turned on
  • the data lines D1, D2 respectively transmit the data signals of opposite polarities to the third sub-pixel P23 through the turned-on transistors P3b, P4b.
  • the fourth sub-pixel P24, the third sub-pixel P23 and the fourth sub-pixel P24 respectively display the third gray level and the fourth gray level according to the data signals of opposite polarities, and the third gray level and the fourth gray level are not the same.
  • the third sub-pixel P23 and the fourth sub-pixel P24 respectively have a bright-dark effect, and visually, the observer can see the average gray-scale effect after the third grayscale and the fourth grayscale are mixed.
  • the scan signal is transmitted through the scan line G2, so that the transistors P1b and P2b are turned on.
  • the data lines D1 and D2 respectively transmit the data signals of opposite polarities to the first sub-pixel P21 and the second sub-pixel through the turned-on transistors P1b and P2b.
  • Pixel P22 at this time, the first sub-pixel P21 and the second sub-pixel P22 are based on data of opposite polarities
  • the signals respectively display the first gray level and the second gray level, and the first gray level and the second gray level are different, so that the first sub-pixel P21 and the second sub-pixel P22 respectively appear one bright and one dark (or one dark and one bright) ) Effect.
  • FIG. 5 is a schematic diagram of a pixel array 212 according to a fourth embodiment of the present invention.
  • the pixel array 212 includes a first pixel unit 212a and a second pixel unit 212b.
  • the first pixel unit 211a includes a first sub-pixel P21 and a second sub-pixel P22
  • the second pixel unit 211b includes a third sub-pixel P23 and a fourth sub-pixel P24.
  • the connection relationship between the pixel array 212 and the data lines D1-D4 and the scanning lines G1-G2 shown in FIG. 5 is the same as that of the pixel array 211 shown in FIG. 4, and therefore will not be described again.
  • the combination of the first sub-pixel P21 and the second sub-pixel P22 has a complementary rectangle
  • the combination of the third sub-pixel P23 and the fourth sub-pixel P24 has a complementary rectangle.
  • any of the sub-pixels P21, P22, P23, and P24, or the combination of the sub-pixels P21 and P22, or the combination of the sub-pixels P23 and P24 is not limited to a rectangle, and may be a triangle, another polygon, or It is an arbitrary irregular shape.
  • the areas of the sub-pixels P21, P22, P23, and P24 may be equal or unequal.
  • FIG. 6 is a schematic diagram of a pixel array 302 according to a fifth embodiment of the present invention.
  • the pixel array 302 is composed of a plurality of first pixel groups 311 and second pixel groups 312.
  • the pixel group 311 is located between the first scan line G1, the second scan line G2, the first data line D1, and the second data line D2.
  • the pixel group 311 includes a first pixel unit 311a and a second pixel unit 311b, and the first pixel unit 311a
  • the first sub-pixel P31 and the second sub-pixel P32 are included, and the second pixel unit 311b includes a third sub-pixel P33 and a fourth sub-pixel P34.
  • the pixel group 312 is located between the first scan line G2, the second scan line G2, the third data line D3, and the fourth data line D4.
  • the pixel group 312 includes a third pixel unit 312a and a fourth pixel unit 312b, the third pixel unit 312a includes a fifth sub-pixel P35 and a sixth sub-pixel P36, and the fourth pixel unit 312b includes a seventh sub-pixel P37 and an eighth sub-pixel P38.
  • the first transistor Pic of the pixel group 311 is electrically connected to the second scan line G2 and the first data line D1.
  • the second transistor P2c of the pixel group 311 is electrically connected to the second scan line G2 and the second data line D2.
  • the third transistor P3c of the pixel group 311 is electrically connected to the first scan line G1 and the first data line D1.
  • the fourth transistor P4c of the pixel group 311 is electrically connected to the first scan line G1 and the second data line D2.
  • the fifth transistor P5c of the pixel group 312 is electrically connected to the first scan line G1 and the third data line D3.
  • the sixth transistor P6c of the pixel group 312 is electrically connected to the first scan line G1 and the fourth data line D4.
  • the seventh transistor P7c of the pixel group 312 is electrically connected to the second scan line G2 and the third data line D3.
  • the eighth transistor P8c of the pixel group 312 is electrically connected to the second scan line G2 and the fourth data line D4.
  • the data lines D1, D3 transmit the positive polarity data signals through the turned-on transistors P3c, P5c. And transmitting to the third sub-pixel P33 and the fifth sub-pixel P35, and transmitting the negative polarity data signal through the data lines D2, D4 to the fourth sub-pixel P34 and the sixth sub-pixel P36 through the turned-on transistors P4c, P6c, Time
  • the third sub-pixel P33 and the fifth sub-pixel P35 respectively display the third gray scale and the fifth gray scale according to the positive polarity data signal
  • the fourth sub-pixel P34 and the sixth sub-pixel P36 respectively display the fourth according to the negative polarity data signal.
  • Grayscale and sixth grayscale are examples of the fourth grayscale and sixth grayscale.
  • the third gray level and the fourth gray level are not the same, and the fifth gray level and the sixth gray level are not the same, so that the third sub-pixel P33 and the fourth sub-pixel P34 respectively have a bright-dark effect, and the fifth sub-pixel P35 and the sixth sub-pixel P36 respectively exhibit a bright-dark effect.
  • the observer sees the average grayscale effect of the third grayscale and the fourth grayscale blending from the third subpixel P33 and the fourth subpixel P34, and from the fifth subpixel P35 and the sixth subpixel P36.
  • the average grayscale effect after mixing the fifth grayscale and the sixth grayscale.
  • the scan signal is transmitted through the scan line G2, so that the transistors Plc, P2c of the pixel group 311 and the transistors P7c, P8c of the pixel group 312 are turned on.
  • the data lines D1, D3 transmit the positive polarity data signals through the turned-on transistors Plc, P7c.
  • the first sub-pixel P31 and the seventh sub-pixel P37 respectively display the first gray scale and the seventh gray scale according to the positive polarity data signal
  • the second sub-pixel P32 and the eighth sub-pixel P38 respectively display according to the negative polarity data signal.
  • the second gray level and the eighth gray level are the first gray scale and the seventh gray scale according to the positive polarity data signal
  • the second sub-pixel P32 and the eighth sub-pixel P38 respectively display according to the negative polarity data signal.
  • the first grayscale and the second grayscale are not the same, and the seventh grayscale and the eighth grayscale are not the same, so that the first subpixel P31 and the second subpixel P32 respectively exhibit a bright and a dark effect, and the seventh subpixel P37 and the eighth sub-pixel P38 respectively exhibit a bright-dark effect.
  • the observer can see the average grayscale effect of the first grayscale and the second grayscale blending from the first subpixel P31 and the second subpixel P32, and from the seventh subpixel P37 and the eighth subpixel P38 can see the average gray after mixing the seventh grayscale and the eighth grayscale Order effect.
  • the scan driver 104 sequentially transmits the scan signals through the scan line G3, so that the pixel groups 311, 312 of the next column operate according to the foregoing mechanism until all the pixels of the pixel array 302 are charged, and then start from the first column. Scanning.
  • the data lines D1 and D2 output the opposite polarity.
  • the data lines D1 and D3 output positive polarity
  • the data lines D2 and D4 output negative polarity.
  • the data lines D1 and D3 output negative polarity
  • the data lines D2 and D4 output positive polarity. In this way, the purpose of achieving dot inversion for each pixel can be achieved.
  • FIG. 7 is a schematic diagram of a pixel array 313 according to a sixth embodiment of the present invention.
  • the pixel array 313 is composed of a plurality of first pixel groups 321 and second pixel groups 322.
  • the pixel group 322 is located between the first scan line G2, the second scan line G2, the first data line D1, and the second data line D2.
  • the pixel group 321 includes a first pixel unit 321a including a first sub-pixel P31 and a second sub-pixel P32, and a second pixel unit 321b including a third sub-pixel P33 and a fourth sub-pixel P34.
  • the pixel group 322 is located between the first scan line G2, the second scan line G2, the third data line D3, and the fourth data line D4.
  • the pixel group 322 includes a third pixel unit 322a and a fourth pixel unit 322b, the third pixel unit 322a includes a fifth sub-pixel P35 and a sixth sub-pixel P36, and the fourth pixel unit 322b includes a seventh sub-pixel P37 and an eighth sub-pixel. P38.
  • the connection relationship between the pixel groups 321 and 322 of FIG. 7 and the data lines and the scan lines is the same as the connection relationship between the pixel groups 311 and 312 and the data lines D1-D4 and the scan lines G1-G2 of FIG. 6, and details are not described herein again.
  • the combination of the first sub-pixel P31 and the second sub-pixel P32, the combination of the third sub-pixel P33 and the fourth sub-pixel P34, and the fifth sub-pixel are all complementary rectangles. However, whether it is any sub-pixel P31-P38, or a combination of sub-pixels P31 and P32, or a combination of sub-pixels P33 and P34, or a combination of sub-pixels P35 and P36, or sub-pixels P37 and P38
  • the shape of the combination is not limited to a rectangle, but may be a triangle, another polygon, or any irregular shape.
  • the areas of the sub-pixels P31-P38 may be equal or unequal.
  • the pixel group is provided with four sub-pixels P1 l-P14, P21-P24, P31-P34, P, so that the data line required for the liquid crystal display of the present invention is halved, and in addition, no bridge wiring is required for each sub-pixel.
  • the dot inversion function can also be achieved, so there is no problem that the bridge wires are interleaved to each other to generate additional parasitic capacitance.
  • the pixel unit of the pixel group includes two sub-pixels respectively displaying different gray levels (ie, one bright and one dark), so the pixel array of the present invention can improve the effect of color shift.
  • the present invention has been disclosed in the above preferred embodiments, the preferred embodiments are not intended to limit the invention, and those skilled in the art can, without departing from the spirit and scope of the invention, Various modifications and refinements are made, and the scope of the invention is defined by the scope of the claims.

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Description

技术领域
本发明是有关一种液晶显示器, 更具体来说, 是关于一种不需要桥接 就可以实现像素驱动与点反转的液晶显示器。 龍
功能先进的显示器渐成为现今消费电子产品的重要特色, 其中液晶显示 器已经逐渐成为各种电子设备如电视、行动电话、个人数字助理 (PDA)、数字 相机、 计算机屏幕或笔记型计算机屏幕所广泛应用具有高分辨率彩色屏幕的 显不器。 请参阅图 1, 图 1传统使用半数数据驱动器 (Half Source Driver, HSD)技 术的液晶显示器的示意图。 液晶显示器 10包含像素组 (pixel matrix) 12、 扫描 驱动器 (gate driver)14以及数据驱动器 (source driver)16。像素组 12包含复数个 分别代表红绿蓝 (RGB)三原色的亚像素构成。 以一个 1024 X 768分辨率的像 素组 12来说,共需要 1024 X 768 X 3个亚像素组合而成。扫描驱动器 14通过 扫描线 Gl-Gn输出扫描讯号使得每一列的依序开启, 同时数据驱动器 16则 通过数据线 Dl-Dm输出对应的数据讯号至一整列的像素使其充电到各自所 需的显示电压, 以显示不同的灰阶。 如此依序下去, 直到像素组 12的所有像 素都充电完成, 再从第一列开始充电。 传统的扫描驱动技术的每一个亚像素电性连接一条数据线及一条扫描 线, 但是数据驱动器的价格昂贵于扫描驱动器, 因此目前采用一种 2G-hD技 术, 也就是一个亚像素搭配两条扫描线及 1/2条数据线来取代传统扫描技术。 但是该技术必须利用桥接线才能实现点反转 (dot reverSe)。 如图 1所示, 以像 素对应的晶体管 T1-T4为例, 晶体管 T2、 Τ3会因为桥接线交叉而产生寄生 电容, 甚至引起其它寄生效应。
另一方面, 使用者在不同角度观看传统的液晶显示器时, 会看到不同灰 阶的影像。 举例来说, 假若使用者站在偏斜的角度 (例如 60度)观看液晶显示 器的影像时, 看到的灰阶相较于站在正视角度 (亦即 90度)会偏白。 这种因观 看角度不同而看到不同灰阶的现象称之为色偏(color shift) ,色偏现象在大尺 寸液晶显示器中影响尤为明显。 为降低色偏影响, 通常的做法是将每一个像 素分成两个子像素,其中一个子像素会显示较高 (亮)灰阶的色彩,另一种呈现 较低 (暗)灰阶的色彩。使用者在不同角度观看两个子像素的色彩迭加时,就不 会有明显的视觉差异。 传统控制该子像素呈现一亮一暗的方法有两种: 一种 是电容耦合; 另一种是调整公共电压 VCOM、 扫描线、 数据线上的信号。 前 一种方法的缺点是两个子像素上的压差固定, 降低色偏的效果有限; 后一种 方法的缺点是需采用特别设计的公共电压产生电路、扫描驱动器(Gate driver) 和数据驱动器 (Source driver) , 增加额外的设计成本。 因此, 如何让两个子 像素送上理想的电压对一亮一暗两个子像素进行精确控制, 同时改进桥接线 产生的寄生电容效应, 并实现点反转的像素排列方式, 是业界的一个目标。 发明内容
有鉴于此, 本发明提供一种液晶显示器, 其包括若干条扫喵线和若干条 数据线, 每两条相邻的扫喵线包括第一扫描线以及第二扫描线, 每两条相邻 的数据线包括第一数据线和第二数据线,所述液晶显示器包括若干个像素组, 至少一像素组位于所述第一扫描线、 所述第二扫描线、 所述第一数据线以及 所述第二数据线之间, 且所述像素组包括第一子像素、 第一晶体管、 第二 子像素、 第二晶体管、 第三子像素、 第三晶体管、 第四子像素及第四晶 体管; 所述第一晶体管与所述第一扫描线以及所述第一数据线电性连接, 所 述第二晶体管与所述第一扫描线以及所述第二数据线电性连接, 所述第三晶 体管与所述第二扫描线及所述第一数据线电性连接, 所述第四晶体管与该第 二扫描线及所述第二数据线电性连接。
依据本发明的实施例, 因应所述第一扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述第一、 第二子像素分别依据所述第一、 第二数据线传送的 相反极性的数据信号显示灰阶。 因应所述第二扫喵线传送扫描信号开启所述 第三、 第四晶体管, 所述第三、 第四子像素分别依据所述第一、 第二数据线 传送的相反极性的数据信号显示灰阶。
依据本发明的另一实施例, 一种液晶显示器包括若干条扫喵线和若干条 数据线, 每两条相邻的扫喵线包括第一扫描线以及第二扫描线; 每两条相邻 的数据线包括第一数据线和第二数据线,所述液晶显示器包括若干个像素组, 至少一像素组位于所述第一扫描线、 所述第二扫描线、 所述第一数据线以及 所述第二数据线之间, 且所述像素组包括第一子像素、 第一晶体管、 第二 子像素、 第二晶体管、 第三子像素、 第三晶体管、 第四子像素及第四晶 体管; 所述第一晶体管与所述第二扫描线以及所述第一数据线电性连接, 所 述第二晶体管与所述第二扫描线以及所述第二数据线电性连接, 所述第三晶 体管与所述第一扫描线及所述第一数据线电性连接, 所述第四晶体管与所述 第一扫描线及所述第二数据线电性连接。 因应所述第一扫喵线传送扫描信号 开启所述第三、 第四晶体管, 所述第三、 第四子像素分别依据所述第一、 第 二数据线传送的相反极性的数据信号显示灰阶。 因应所述第二扫喵线传送扫 描信号开启所述第一、 第二晶体管, 所述第一、 第二子像素分别依据所述第 一、 第二数据线传送的相反极性的数据信号显示灰阶。
依据本发明的又一实施例, 一种液晶显示器包括若干条扫喵线和若干条 数据线, 每两条相邻的扫喵线包括第一扫描线以及第二扫描线; 每四条相邻 的数据线包括第一数据线、 第二数据线、 第三数据线和第四数据线, 所述液 晶显示器包括若干个第一像素组和若干个第二像素组。 至少一第一像素组位 于所述第一扫描线、 所述第二扫描线、 所述第一数据线以及所述第二数据线 之间, 且所述第一像素组包括第一子像素、 第一晶体管、 第二子像素、 第 二晶体管、 第三子像素、 第三晶体管、 第四子像素及第四晶体管; 所述 第一晶体管与所述第二扫描线以及所述第一数据线电性连接, 所述第二晶体 管与所述第二扫描线以及所述第二数据线电性连接, 所述第三晶体管与所述 第一扫描线及所述第一数据线电性连接, 所述第四晶体管与所述第一扫描线 及所述第二数据线电性连接。 至少一第二像素组位于所述第一扫描线、 所述 第二扫描线、所述第三数据线以及所述第四数据线之间, 且所述第二像素组 包括第五子像素、 第五晶体管、 第六子像素、 第六晶体管、 第七子像素、 第七晶体管、 第八子像素及第八晶体管; 所述第五晶体管与所述第一扫描 线以及所述第三数据线电性连接, 所述第六晶体管与所述第一扫描线以及所 述第四数据线电性连接, 所述第七晶体管与所述第二扫描线及所述第三数据 线电性连接, 所述第八晶体管与该第二扫描线及所述第四数据线电性连接。 因应所述第一扫喵线传送扫描信号开启所述第三、第四、第五、第六晶体管, 所述第三、 第四、 第五、 第六子像素分别依据所述第一、 第二、 第三、 第四 数据线传送的数据信号显示灰阶因应所述第二扫喵线传送扫描信号开启所述 第一、 第二、 第七、 第八晶体管, 所述第一、 第二、 第七、 第八子像素分别 依据所述第一、 第二、 第三、 第四数据线传送的数据信号显示灰阶。
所述第一、 第三数据线传送给所述第三、 第五子像素的数据信号的极性, 相反于所述第二、 第四数据线传送给所述第四、 第六子像素的数据信号的极 性; 所述第一、 第三数据线传送给所述第一、 第七子像素的数据信号的极性, 相反于所述第二、 第四数据线传送给所述第二、 第八子像素的数据信号的极 性。
相较于先前技术的像素阵列在两条数据线和两条扫描线之间的每一像素 组只设置两个子像素, 而本发明在两条数据线和两条扫描线之间的像素组设 置了四个子像素, 因此本发明液晶显示器所需使用的数据线减半, 而且无需 使用桥接线也可以达到点反转的功能, 因此可减少设置桥接线导致寄生电容 的影响。 此外, 该像素组的像素单元包含两个分别显示不同灰阶 (亦即一亮一 暗)的子像素, 所以本发明的像素阵列可以改善色偏的效果。
为让本发明的上述内容能更明显易懂, 下文特举一较佳实施例, 并配合 所附图式, 作详细说明如下: 附图说明
图 1传统使用半数数据驱动器技术的液晶显示器的示意图。
图 2是本发明液晶显示器的扫描驱动器、 数据驱动器和第一实施例的像素阵 列的示意图。
图 3是本发明第二实施例的像素阵列的示意图。
图 4是本发明第三实施例的像素阵列的示意图。
图 5是本发明第四实施例的像素阵列的示意图。
图 6是本发明第五实施例的像素阵列的示意图。
图 7是本发明第六实施例的像素阵列的示意图。 具体实施方式 请参阅图 2, 图 2是本发明液晶显示器 100的扫描驱动器 (gate driver)104 以及数据驱动器 (source driver)106和第一实施例的像素阵列 (pixel matrix)102 的示意图。 液晶显示器 100包含像素阵列 102、 扫描驱动器 104以及数据驱 动器 106。像素阵列 102由若干个像素组 111组成, 每一像素组 111包含第一 像素单元 111a和第二像素单元 lllb。扫描驱动器 104输出扫描讯号, 通过扫 描线 Gl-Gn使得依序开启每一列的像素单元依序开启, 同时数据驱动器 106 则通过数据线 Dl-Dm输出对应的数据讯号至一整列的像素使其充电到各自 所需的显示电压, 以显示不同的灰阶。 在本实施例中, 像素阵列 102的亚像 素采用半数数据驱动器技术来驱动。 为便于说明,像素阵列 102上仅撷取部份像素组 111作为本实施例说明。 像素阵列 102包括平行设置的相邻的第一扫描线 Gl、 第二扫描线 G2以 及相交于该第一、 第二扫描线 Gl、 G2的相邻的第一数据线 D1和第二 数据线 D2。 以位于第一扫描线 G2、 第二扫描线 G2、 第一数据线 D1和 第二数据线 D2之间的像素组 111为例, 第一像素单元 111a包括第一子 像素 P11和第二子像素 P12, 第二像素单元 111b包括第三子像素 P13与 第四子像素 P14。
第一子像素 P11包括第一晶体管 Pla, 与第一扫描线 G1 以及第一 数据线 D1 电性连接。 第二子像素 P12包括第二晶体管 P2a, 与第一扫 描线 G1以及第二数据线 D2电性连接。第三子像素 P13包括第三晶体管 P3a, 与第二扫描线 G2及第一数据线 D1 电性连接。 第四子像素 P14包 括第四晶体管 P4a, 与第二扫描线 G2及第二数据线 D2电性连接。 扫描驱动器 104首先通过扫描线 G1传送扫描信号,使得像素组 111 的晶体管 Pla、 P2a开启, 此时数据驱动器 106经过数据线 Dl、 D2分别 传送相反极性的数据信号经过开启的晶体管 Pla、 P2a 而传送至第一子 像素 P11和第二子像素 P12 , 此时第一子像素 P11和第二子像素 P12依 据相反极性的数据信号显示第一灰阶和第二灰阶, 第一灰阶和第二灰阶 并不相同, 使得第一子像素 P11和第二子像素 P12分别呈现一亮一暗的 效果。 举例来说, 第一子像素 P11和第二子像素 P12分别呈现亮红与暗 红色。 在视觉上, 观察者可以看到第一灰阶和第二灰阶混合后的平均灰 阶效果。 接着通过扫描线 G2传送扫描讯号, 使得晶体管 P3a和 P4a开 启, 此时数据驱动器 106经过数据线 Dl、 D2分别传送相反极性的数据 信号经过开启的晶体管 P3a和 P4a而送至第三子像素 P13、 第四子像素 P14。 此时第三子像素 P13和第四子像素 P14依据相反极性的数据信号 显示第三灰阶和第四灰阶, 第三灰阶和第四灰阶并不相同, 使得第三子 像素 P13和第四子像素 P13分别呈现一亮一暗的效果, 在视觉上, 观察 者可以看到第三灰阶和第四灰阶混合后的平均灰阶效果。 接着, 扫描驱 动器 104再依序通过扫描线 G3传送扫描讯号,使得下一列的像素组 111 依据前述的机制操作, 直到像素阵列 102的所有像素都充电完成, 再从 第一列开始下一次的扫描。 请参阅图 3, 图 3是本发明第二实施例的像素阵列 112的示意图。 为简 化图面, 液晶显示器装置 100包含的扫描驱动器 (gate driver)104以及数据驱 动器 (source driver)106不再绘示,其功能与运作方式与图 2实施例相同,故不 再赘述。 在图 3 中, 像素阵列 112包含第一像素单元 112a和第二像素单元 112b。第一像素单元 112a包括第一子像素 P11和第二子像素 P12 , 第二像 素单元 112b包括第三子像素 P13与第四子像素 P14。 图 3所示的像素阵 列 112与资料线 Dl-Dm和扫描线 Gl-Gn的连接关系与图 2所示的像素阵列 111相同, 因此不再赘述。 较佳实施例中, 第一子像素 P11和第二子像素 P12组合后的面积, 以及第三子像素 P13和第四子像素 P14组合后的面 积皆是呈互补的矩形。 然而, 不论是任一子像素 Pl l、 P12、 P13和 P14, 或是子像素 P11和 P12的组合, 或是子像素 P13和 P14的组合的形状也 不限于矩形, 也可以是三角形、 其它多边形或是任意不规则形。 子像素 Pl l、 P12、 P13和 P14的面积可相等或是不等。 请参阅图 4, 图 4是本发明第三实施例的像素阵列 202示意图。 像素阵 列 202由若干个像素组 211组成。 以位于第一扫描线 G2、 第二扫描线 G2、 第一数据线 D1 和第二数据线 D2之间的像素组 211 为例, 像素组 211 包括第一像素单元 211a和第二像素单元 211b,第一像素单元 211a包括第一 子像素 P21和第二子像素 P22, 第二像素单元 211b包括第三子像素 P23 与第四子像素 P24。
第一子像素 P21包括第一晶体管 Plb, 与第二扫描线 G2 以及第一 数据线 D1 电性连接。 第二子像素 P22包括第二晶体管 P2b, 与第二扫 描线 G2以及第二数据线 D2电性连接。第三子像素 P23包括第三晶体管 P3b, 与第一扫描线 G1及第一数据线 D1电性连接。 第四子像素 P24包 括第四晶体管 P4b, 与第一扫描线 G1及第二数据线 D2电性连接。 当扫描线 G1传送扫描信号使得像素组 211的晶体管 P3b、 P4b开启, 此时数据线 Dl、 D2 分别传送相反极性的数据信号经过开启的晶体管 P3b、 P4b而传送至第三子像素 P23和第四子像素 P24, 此时第三子像素 P23和第四子像素 P24依据相反极性的数据信号分别显示第三灰阶和第 四灰阶, 第三灰阶和第四灰阶并不相同, 使得第三子像素 P23和第四子 像素 P24分别呈现一亮一暗的效果, 在视觉上, 观察者可以看到第三灰 阶和第四灰阶混合后的平均灰阶效果。接着通过扫描线 G2传送扫描讯号, 使得晶体管 Plb和 P2b开启, 此时数据线 Dl、 D2分别传送相反极性的 数据信号经过开启的晶体管 Plb和 P2b而送至第一子像素 P21、 第二子 像素 P22 , 此时第一子像素 P21和第二子像素 P22依据相反极性的数据 信号分别显示第一灰阶和第二灰阶, 第一灰阶和第二灰阶并不相同, 使 得第一子像素 P21和第二子像素 P22分别呈现一亮一暗 (或是一暗一亮) 的效果。 在视觉上, 观察者可以看到第一灰阶和第二灰阶混合后的平均 灰阶效果。 接着, 再依序通过扫描线 G3传送扫描讯号, 使得下一列的像素 组 211依据前述的机制操作, 直到像素阵列 202的所有像素都充电完成, 再从第一列开始下一次的扫描。 请参阅图 5, 图 5是本发明第四实施例的像素阵列 212的示意图。在图 5 中,像素阵列 212包含第一像素单元 212a和第二像素单元 212b。第一像素单 元 211a包括第一子像素 P21和第二子像素 P22 , 第二像素单元 211b包括 第三子像素 P23与第四子像素 P24。 图 5所示的像素阵列 212与资料线 D1-D4和扫描线 G1-G2的连接关系与图 4所示的像素阵列 211相同, 因此不 再赘述。 较佳实施例中, 第一子像素 P21和第二子像素 P22的组合呈互 补的矩形,以及第三子像素 P23和第四子像素 P24的组合呈互补的矩形。 然而, 不论是任一子像素 P21、 P22、 P23和 P24, 或是子像素 P21和 P22 的组合, 或是子像素 P23和 P24的组合的形状也不限于矩形, 也可以是 三角形、 其它多边形或是任意不规则形。 子像素 P21、 P22、 P23和 P24 的面积可相等或是不等。
请参阅图 6, 图 6是本发明第五实施例的像素阵列 302的示意图。 像素 阵列 302由若干个第一像素组 311和第二像素组 312组成。像素组 311位于 第一扫描线 G1、第二扫描线 G2、第一数据线 D1和第二数据线 D2之间。 像素组 311包括第一像素单元 311a和第二像素单元 311b,第一像素单元 311a 包括第一子像素 P31和第二子像素 P32 , 第二像素单元 311b包括第三子 像素 P33与第四子像素 P34。像素组 312位于第一扫描线 G2、 第二扫描 线 G2、 第三数据线 D3和第四数据线 D4之间。 像素组 312包括第三像 素单元 312a和第四像素单元 312b,第三像素单元 312a包括第五子像素 P35 和第六子像素 P36, 第四像素单元 312b包括第七子像素 P37与第八子像 素 P38。
像素组 311的第一晶体管 Pic与第二扫描线 G2以及第一数据线 D1 电性连接。 像素组 311 的第二晶体管 P2c与第二扫描线 G2以及第二数 据线 D2电性连接。像素组 311的第三晶体管 P3c与第一扫描线 G1及第 一数据线 D1电性连接。像素组 311的第四晶体管 P4c与第一扫描线 G1 及第二数据线 D2电性连接。
像素组 312的第五晶体管 P5c与第一扫描线 G1以及第三数据线 D3 电性连接。 像素组 312的第六晶体管 P6c与第一扫描线 G1 以及第四数 据线 D4电性连接。像素组 312的第七晶体管 P7c与第二扫描线 G2及第 三数据线 D3电性连接。像素组 312的第八晶体管 P8c与第二扫描线 G2 及第四数据线 D4电性连接。 首先通过扫描线 G1传送扫描信号,使得像素组 311的晶体管 P3c、 P4c 和像素组 312的晶体管 P5c、 P6c开启, 此时数据线 Dl、 D3传送正极性 的数据信号经过开启的晶体管 P3c、 P5c而传送至第三子像素 P33和第 五子像素 P35 , 并经过数据线 D2、 D4传送负极性的数据信号经过开启 的晶体管 P4c、 P6c而传送至第四子像素 P34和第六子像素 P36, 此时第 三子像素 P33和第五子像素 P35依据正极性的数据信号分别显示第三灰 阶和第五灰阶, 而第四子像素 P34和第六子像素 P36依据负极性的数据 信号分别显示第四灰阶和第六灰阶。 第三灰阶和第四灰阶并不相同, 第 五灰阶和第六灰阶并不相同, 使得第三子像素 P33和第四子像素 P34分 别呈现一亮一暗的效果, 第五子像素 P35和第六子像素 P36分别呈现一 亮一暗的效果。 在视觉上, 观察者从第三子像素 P33和第四子像素 P34 看到第三灰阶和第四灰阶混合后的平均灰阶效果, 以及从第五子像素 P35和第六子像素 P36第五灰阶和第六灰阶混合后的平均灰阶效果。 接着通过扫描线 G2传送扫描讯号,使得像素组 311的晶体管 Plc、P2c 和像素组 312的晶体管 P7c、 P8c开启, 此时数据线 Dl、 D3传送正极性 的数据信号经过开启的晶体管 Plc、 P7c而传送至第一子像素 P31 和第 七子像素 P37 , 并经过数据线 D2、 D4传送负极性的数据信号经过开启 的晶体管 P2c、 P8c而传送至第二子像素 P32和第八子像素 P38 , 此时第 一子像素 P31和第七子像素 P37依据正极性的数据信号分别显示第一灰 阶和第七灰阶, 而第二子像素 P32和第八子像素 P38依据负极性的数据 信号分别显示第二灰阶和第八灰阶。 第一灰阶和第二灰阶并不相同, 第 七灰阶和第八灰阶并不相同, 使得第一子像素 P31和第二子像素 P32分 别呈现一亮一暗的效果, 第七子像素 P37和第八子像素 P38分别呈现一 亮一暗的效果。 在视觉上, 观察者从第一子像素 P31和第二子像素 P32 可以看到第一灰阶和第二灰阶混合后的平均灰阶效果, 以及从第七子像 素 P37和第八子像素 P38可以看到第七灰阶和第八灰阶混合后的平均灰 阶效果。 接着, 扫描驱动器 104再依序通过扫描线 G3传送扫描讯号, 使得 下一列的像素组 311、 312依据前述的机制操作,直到像素阵列 302的所有 像素都充电完成, 再从第一列开始下一次的扫描。 请注意, 在先后两次的扫描中, 数据线 Dl、 D2输出的数据极性会 相反, 例如, 第一次扫描时, 数据线 Dl、 D3输出正极性, 而数据线 D2、 D4输出负极性。 但第二次扫描时, 数据线 Dl、 D3输出负极性, 而数据 线 D2、 D4输出正极性。 如此一来, 就可以达到各个像素实现点反转的 目的。 请参阅图 7, 图 7是本发明第六实施例的像素阵列 313的示意图。 像素 阵列 313由若干个第一像素组 321和第二像素组 322组成。像素组 322位于 第一扫描线 G2、第二扫描线 G2、第一数据线 D1和第二数据线 D2之间。 像素组 321包括第一像素单元 321a和第二像素单元 321b,第一像素单元 321a 包括第一子像素 P31和第二子像素 P32 , 第二像素单元 321b包括第三子 像素 P33与第四子像素 P34。像素组 322位于第一扫描线 G2、 第二扫描 线 G2、 第三数据线 D3和第四数据线 D4之间。 像素组 322包括第三像 素单元 322a和第四像素单元 322b,第三像素单元 322a包括第五子像素 P35 和第六子像素 P36 , 第四像素单元 322b包括第七子像素 P37与第八子像 素 P38。 由于图 7的像素组 321和 322和数据线、 扫描线的连接关系与 图 6的像素组 311和 312和数据线 Dl-D4、扫描线 G1-G2的连接关系一 致, 在此不再赘述。 然而在较佳实施例中, 第一子像素 P31和第二子像 素 P32的组合、 第三子像素 P33和第四子像素 P34的组合、 第五子像素 P35和第六子像素 P36的组合、 第七子像素 P37和第八子像素 P38的组 合皆是呈互补的矩形。 然而, 不论是任一子像素 P31-P38 , 或是子像素 P31和 P32的组合, 或是子像素 P33和 P34的组合, 或是子像素 P35和 P36的组合, 或是子像素 P37和 P38的组合的形状也不限于矩形, 也可 以是三角形、 其它多边形或是任意不规则形。 子像素 P31-P38 的面积可 相等或是不等。 相较于先前技术的像素阵列在两条数据线和两条扫描线之间的每 一像素组只设置两个子像素, 而本发明在两条数据线 Dl、 D2和两条扫 描线 Gl、 G2 之间的像素组设置了四个子像素 Pl l-P14、 P21-P24 , P31-P34, P, 因此本发明液晶显示器所需使用的数据线减半, 此外, 每 一子像素也毋须使用桥接线来连接数据线也可以达到点反转的功能, 因 此不会有桥接线彼此交错而产生额外寄生电容的問題。 此外, 该像素组 的像素单元包含两个分别显示不同灰阶 (亦即一亮一暗)的子像素, 所以 本发明的像素阵列可以改善色偏的效果。 综上所述, 虽然本发明已以较 佳实施例揭露如上, 但该较佳实施例并非用以限制本发明, 该领域的普 通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰, 因此本发明的保护范围以权利要求界定的范围为准。

Claims

权 利 要 求
1. 一种液晶显示器, 其包括若干条扫喵线和若干条数据线, 每两条相 邻的扫喵线包括第一扫描线以及第二扫描线,每两条相邻的数据线 包括第一数据线和第二数据线, 其特征在于:
所述液晶显示器包括若干个像素组, 至少一像素组位于所述第一扫 描线、 所述第二扫描线、 所述第一数据线以及所述第二数据线之间, 且所述像素组包括第一子像素、第一晶体管、 第二子像素、 第二晶 体管、第三子像素、第三晶体管、第四子像素及第四晶体管; 所述 第一晶体管与所述第一扫描线以及所述第一数据线电性连接, 所述 第二晶体管与所述第一扫描线以及所述第二数据线电性连接, 所述 第三晶体管与所述第二扫描线及所述第一数据线电性连接, 所述第 四晶体管与该第二扫描线及所述第二数据线电性连接。
2. 根据权利要求 1所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述 第一、 第二子像素分别依据所述第一、 第二数据线传送的数据信号 显示灰阶; 及
当所述第二扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述 第三、 第四子像素分别依据所述第一、 第二数据线传送的数据信号 显示灰阶。
3. 根据权利要求 2所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述 第一、 第二子像素分别依据所述第一、 第二数据线传送的相反极性 的数据信号显示灰阶;
当所述第二扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述 第三、 第四子像素分别依据所述第一、 第二数据线传送的相反极性 的数据信号显示灰阶。
4. 一种液晶显示器, 其包括若干条扫喵线和若干条数据线, 每两条相 邻的扫喵线包括第一扫描线以及第二扫描线; 每两条相邻的数据 线包括第一数据线和第二数据线, 其特征在于: 所述液晶显示器 包括:
若干个像素组,至少一像素组位于所述第一扫描线、所述第二扫描线、 所述第一数据线以及所述第二数据线之间,且所述像素组包括第一子 像素、第一晶体管、 第二子像素、 第二晶体管、第三子像素、第三晶 体管、第四子像素及第四晶体管; 所述第一晶体管与所述第二扫描线 以及所述第一数据线电性连接,所述第二晶体管与所述第二扫描线以 及所述第二数据线电性连接,所述第三晶体管与所述第一扫描线及所 述第一数据线电性连接,所述第四晶体管与所述第一扫描线及所述第 二数据线电性连接。
5. 根据权利要求 4所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述第 三、第四子像素分别依据所述第一、第二数据线传送的数据信号显 示灰阶; 及
当所述第二扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述第 一、 第二子像素分别依据所述第一、 第二数据线传送的数据信号显示 灰阶。
6. 根据权利要求 5所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述第 三、 第四子像素分别依据所述第一、 第二数据线传送的相反极性的数 据信号显示灰阶; 及 当所述第二扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述第 一、 第二子像素分别依据所述第一、 第二数据线传送的相反极性的数 据信号显示灰阶。
7. 一种液晶显示器, 其包括若干条扫喵线和若干条数据线, 每两条相邻 的扫喵线包括第一扫描线以及第二扫描线,每两条相邻的数据线包括 第一数据线和第二数据线, 其特征在于:
所述液晶显示器包括若干个像素组, 至少一像素组位于所述第一扫描 线、 所述第二扫描线、 所述第一数据线以及所述第二数据线之间, 且 所述像素组包括:
第一像素单元, 包括第一子像素、 第一晶体管、 第二子像素和第二晶 体管, 所述第一晶体管与所述第一扫描线以及所述第一数据线电性连 接,所述第二晶体管与所述第一扫描线以及所述第二数据线电性连接, 所述第一、 第二子像素分别依据所述第一、 第二数据线传送的数据信 号显示第一灰阶和第二灰阶,其中所述第一灰阶不同于所述第二灰阶; 以及
第二像素单元, 包括第三子像素、 第三晶体管、 第四子像素及第四晶 体管,所述第三晶体管与所述第二扫描线及所述第一数据线电性连接, 所述第四晶体管与该第二扫描线及所述第二数据线电性连接, 所述第 三、 第四子像素分别依据所述第一、 第二数据线传送的数据信号显示 第三灰阶和第四灰阶, 其中所述第三灰阶不同于所述第四灰阶。
8. 根据权利要求 7所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述第 一、 第二子像素分别依据所述第一、 第二数据线传送的数据信号显示 所述第一灰阶和所述第二灰阶; 及
当所述第二扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述第 三、 第四子像素分别依据所述第一、 第二数据线传送的数据信号显示 所述第三灰阶和所述第四灰阶。
9. 根据权利要求 8所述的液晶显示器, 其特征在于:
当所述第一扫喵线传送扫描信号开启所述第一、 第二晶体管, 所述第 一、 第二子像素分别依据所述第一、 第二数据线传送的相反极性的数 据信号显示所述第一灰阶和所述第二灰阶;
当所述第二扫喵线传送扫描信号开启所述第三、 第四晶体管, 所述第 三、 第四子像素分别依据所述第一、 第二数据线传送的相反极性的数 据信号显示所述第三灰阶和所述第四灰阶。
10.根据权利要求 8所述的液晶显示器, 其特征在于:
所述第一、第二、第三、第四子像素呈矩形。
11. 根据权利要求 8所述的液晶显示器, 其特征在于:
所述第一子像素和所述第二子像素的组合呈互补的矩形,和所述第三 子像素和所述第四子像素的组成组合分别呈互补的矩形。
12.根据权利要求 7至 11中任一项所述的液晶显示器, 其特征在于:
所述第一子像素和第二子像素的面积相等。
13.根据权利要求 7至 11中任一项所述的液晶显示器, 其特征在于:
所述第三子像素和所述第四子像素的面积相等。
PCT/CN2010/078698 2010-07-28 2010-11-12 液晶显示器 Ceased WO2012012984A1 (zh)

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