WO2011144112A2 - 语音信号处理方法、装置和接入网系统 - Google Patents

语音信号处理方法、装置和接入网系统 Download PDF

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Publication number
WO2011144112A2
WO2011144112A2 PCT/CN2011/074801 CN2011074801W WO2011144112A2 WO 2011144112 A2 WO2011144112 A2 WO 2011144112A2 CN 2011074801 W CN2011074801 W CN 2011074801W WO 2011144112 A2 WO2011144112 A2 WO 2011144112A2
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WIPO (PCT)
Prior art keywords
substream
decoding
base station
result
crc
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PCT/CN2011/074801
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English (en)
French (fr)
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WO2011144112A3 (zh
Inventor
魏岳军
唐欣
朱佥
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP11783029.9A priority Critical patent/EP2706709B1/en
Priority to RU2013158324/08A priority patent/RU2546321C1/ru
Priority to JP2014511701A priority patent/JP5881818B2/ja
Priority to KR1020137034254A priority patent/KR101568921B1/ko
Priority to BR112013030371A priority patent/BR112013030371A2/pt
Priority to PCT/CN2011/074801 priority patent/WO2011144112A2/zh
Priority to CN2011800005315A priority patent/CN102907030A/zh
Publication of WO2011144112A2 publication Critical patent/WO2011144112A2/zh
Priority to JP2014511711A priority patent/JP5827743B2/ja
Priority to PCT/CN2012/070658 priority patent/WO2012163099A1/zh
Priority to EP12793985.8A priority patent/EP2709280A4/en
Priority to BR112013030548-7A priority patent/BR112013030548A2/pt
Priority to CN201280025927.XA priority patent/CN103782518B/zh
Priority to RU2013158335/08A priority patent/RU2543944C1/ru
Priority to KR1020137034285A priority patent/KR101611018B1/ko
Priority to CN201710084493.5A priority patent/CN106788904A/zh
Publication of WO2011144112A3 publication Critical patent/WO2011144112A3/zh
Priority to US14/092,319 priority patent/US9171540B2/en
Priority to US14/092,236 priority patent/US9177548B2/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • GPHYSICS
    • G10MUSICAL INSTRUMENTS; ACOUSTICS
    • G10LSPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L15/00Speech recognition
    • G10L15/08Speech classification or search
    • G10L15/14Speech classification or search using statistical models, e.g. Hidden Markov Models [HMMs]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/155Ground-based stations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0059Convolutional codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • H04L1/0065Serial concatenated codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/007Unequal error protection

Definitions

  • the embodiments of the present invention relate to the field of communications, and in particular, to a voice signal processing method, apparatus, and access network system. Background technique
  • FIG. 1 is a schematic diagram of a system architecture of a voice coding process in the prior art.
  • AMR Speech Encoder an uplink rate adaptive (Adaptive Muti-Rate, AMR) voice signal processing process is a user.
  • AMR Speech Encoder AMR Speech Encoder
  • UE User Equipment
  • CC Encoder Convolutional Code Encoder
  • the AMR voice signal encoded by the CC Encoder is sent to the base station (hereinafter referred to as NodeB) through an air interface, and the CC decoder in the NodeB (hereinafter referred to as CC Decoder) can decode the AMR voice signal, and the CC Decoder includes Two-way output, one channel sends the decoded bit stream to the radio network controller (Radio Network Controller, hereinafter referred to as RNC) through the Iub port, and the RNC sends the core network through the Iu port to the core network (hereinafter referred to as CN)
  • the AMR speech decoder (hereinafter referred to as AMR Speech Decoder), the other way through the Iub port will be a circular convolution check (Cyclic R
  • the CRC indicator CRC indicator
  • CRCI bad frame indication to the AMR Speech
  • CC Decoder also sends the CRCI to the outer loop power control in the RNC (hereinafter referred to as: Outer-Loop Power) Control ).
  • Outer-Loop Power the outer loop power control in the RNC
  • the AMR Speech Decoder can perform decoding processing.
  • the Outer-Loop Power Control can adjust the target block error rate (BLER) according to the CRCI, and send the inner loop power control (hereinafter referred to as Inner-Loop Power Control) in the NodeB according to the adjusted BLER.
  • BLER target block error rate
  • Target SINR Target signal-to-noise ratio
  • Inner-Loop Power Control sends power commands to the UE's power transmitter (hereinafter referred to as Power Transmitter) according to the measured signal-to-noise ratio (hereinafter referred to as Measured SINR) and Target SINR ( Hereinafter referred to as: Power Commander), to adjust the UE's transmit power.
  • Measured SINR the measured signal-to-noise ratio
  • Power Commander Target SINR
  • AMR voice signals can be divided into three substreams A, B, and C, that is, Class A, Class B and Class C, where A substream has the greatest impact on voice quality, and most importantly, its data block is followed by a 12-bit CRC check.
  • the importance of B and C substreams is relatively low, and there is no data block.
  • the CC Decoder in the NodeB uses the Viterbi Algorithm (hereinafter referred to as VA) decoder, and in the decoding result of the VA decoder, only the A substream has the CRCI.
  • VA Viterbi Algorithm
  • Embodiments of the present invention provide a voice signal processing method, apparatus, and access network system to improve decoding performance of a convolutional code for an A substream.
  • the embodiment of the invention provides a voice signal processing method, including:
  • the encoded voice signal receives, by the user equipment UE, the encoded voice signal, where the encoded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a cyclic convolution check CRC;
  • the algorithm performs decoding processing on the first substream, the second substream, and the third substream, where the decoding process is performed on the first substream by using a decoding algorithm based on a CRC auxiliary decision; Transmitting the decoding result of the first substream, the second substream, and the third substream,
  • the decoding result of the first substream includes a decoded bit stream and a CRC check result.
  • An embodiment of the present invention provides another voice signal processing method, including:
  • the decoding result of the first substream is performed by using a decoding algorithm based on a cyclic convolution check CRC auxiliary decision Decoding result obtained after decoding processing, and the decoding result includes a decoding bit stream and a CRC check result;
  • An embodiment of the present invention provides a base station, including:
  • a first receiving module configured to receive a coded voice signal sent by the user equipment UE, where the coded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a cyclic convolutional school CRC
  • a decoding processing module configured to decode, by using a decoding algorithm, the first substream, the second substream, and the third substream, where the decoding algorithm based on the CRC auxiliary decision is used a substream is decoded;
  • a first sending module configured to send, to the base station controller, a decoding result of the first substream, the second substream, and the third substream, where the decoding result of the first substream includes a decoded bit stream and CRC check result.
  • An embodiment of the present invention provides a base station controller, including:
  • a second receiving module configured to receive a decoding result of the first substream, the second substream, and the third substream sent by the base station, where the decoding result of the first substream is a loop-based convolution check CRC a decoding result obtained by the decoding algorithm of the auxiliary decision after the decoding process, and the decoding result includes a decoded bit stream and a CRC check result;
  • An embodiment of the present invention provides an access network system, including: a base station and a base station controller; wherein, the base station uses the foregoing base station, and the base station controller uses the foregoing base station controller.
  • the base station may perform decoding processing on the first substream by using a decoding algorithm based on a CRC auxiliary decision, compared to the prior art, using a common VA decoding algorithm for decoding processing. It can be said that the decoding performance of the first substream can be improved, and the importance of the first substream in the voice quality is higher. Therefore, the embodiment of the present invention can improve the decoding performance of the first substream and improve the voice. Quality, to meet the higher requirements of users for voice quality.
  • FIG. 1 is a schematic diagram of a system architecture of a speech coding process in the prior art
  • FIG. 2 is a schematic structural diagram of processing three substreams in the system architecture shown in FIG. 1;
  • Embodiment 3 is a flowchart of Embodiment 1 of a method for processing a voice signal according to the present invention
  • FIG. 4 is a schematic structural diagram of a PLVA used in an embodiment of a method for processing a voice signal according to the present invention
  • FIG. 5 is a schematic structural diagram of another PLVA decoder used in an embodiment of a method for processing a voice signal according to the present invention
  • Embodiment 6 is a flowchart of Embodiment 2 of a method for processing a voice signal according to the present invention
  • Embodiment 7 is a flowchart of Embodiment 3 of a method for processing a voice signal according to the present invention.
  • Embodiment 8 is a flowchart of Embodiment 4 of a method for processing a voice signal according to the present invention.
  • FIG. 9 is a schematic structural diagram of processing three substreams in Embodiment 4 of the method shown in FIG. 8;
  • FIG. 10 is a flowchart of Embodiment 5 of a voice signal processing method according to the present invention.
  • FIG. 1 is a flowchart of Embodiment 6 of a method for processing a voice signal according to the present invention
  • FIG. 12 is a schematic structural diagram of Embodiment 1 of a base station according to the present invention
  • 13 is a schematic structural diagram of Embodiment 2 of a base station according to the present invention
  • Embodiment 3 of a base station according to the present invention is a schematic structural diagram of Embodiment 3 of a base station according to the present invention.
  • Embodiment 4 of a base station according to the present invention is a schematic structural diagram of Embodiment 4 of a base station according to the present invention.
  • Embodiment 16 is a schematic structural diagram of Embodiment 1 of a base station controller according to the present invention.
  • Embodiment 17 is a schematic structural diagram of Embodiment 2 of a base station controller according to the present invention.
  • Embodiment 3 of a base station controller is a schematic structural diagram of Embodiment 3 of a base station controller according to the present invention.
  • FIG. 19 is a schematic structural diagram of Embodiment 4 of a base station controller according to the present invention.
  • FIG. 20 is a schematic structural diagram of an embodiment of an access network system according to the present invention. detailed description
  • GSM Global System for Mobile Communications
  • CDMA Code Division Multiple Access
  • WCDMA Wideband Code Division Multiple Access
  • LTE Long Term Evolution
  • the base station may be a base station (Base Transceiver Station, hereinafter referred to as BTS) in CDMA, or may be a base station NodeB in WCDMA, or may be an evolved Node B (hereinafter referred to as an eNB or an eNodeB) in LTE.
  • BTS Base Transceiver Station
  • NodeB base station NodeB
  • eNB evolved Node B
  • LTE Long Term Evolution
  • the present invention is not limited, but for convenience of description, the following embodiments are described by taking a NodeB as an example.
  • the base station controller may be a base station controller (hereinafter referred to as BSC) in CDMA, or may be an RNC in WCDMA, but the invention is not limited, but For convenience of description, the following embodiments are described by taking an RNC as an example.
  • BSC base station controller
  • RNC radio network controller
  • FIG. 3 is a flowchart of Embodiment 1 of a method for processing a voice signal according to the present invention. As shown in FIG. 3, the method in this embodiment is an improvement on a method performed by the CC Decoder of the NodeB in FIG. 1. The method in this embodiment may include :
  • Step 301 Receive an encoded voice signal sent by the UE, where the encoded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a cyclic convolution check CRC.
  • the NodeB specifically, the CC Decoder in the NodeB receives the encoded speech signal sent by the UE, and the encoded speech signal can be the AMR speech signal processed by the CC Encoder in FIG.
  • the AMR voice signal may include three substreams A, B, and C in FIG. 2, corresponding to the first substream, the second substream, and the third substream, respectively.
  • the first substream that is, the A substream contains a CRC.
  • Step 302 Perform decoding processing on the first substream, the second substream, and the third substream by using a decoding algorithm, where the first substream is performed by using a decoding algorithm based on a CRC auxiliary decision Decoding processing.
  • the NodeB may specifically be a CC Decoder in the NodeB, and the first substream, the second substream, and the third substream may be decoded by using a decoding algorithm.
  • the decoding algorithm based on the CRC auxiliary decision is used to translate the first substream, that is, the A substream. Code processing.
  • the decoding algorithm based on the CRC auxiliary decision requires the CRC auxiliary decision, and the second substream and the third substream do not contain the CRC, the second substream and the third substream, that is, the B substream and the C substream
  • the stream can be decoded using a VA decoder in the prior art.
  • the decoding algorithm based on CRC-assisted decision can effectively improve the decoding performance of convolutional codes.
  • the basic principle is: Output the global optimal multiple candidate paths through Viterbi algorithm, and pass CRC.
  • the CRC check is performed on the decoding results corresponding to the paths, and the correct decoding result of the CRC check is selected as the final result. If the decoding results corresponding to all the paths fail to pass the CRC check, the decoding of the best path is output. The result is the final result. Since this decoding algorithm can choose between multiple paths including the best path, This performance is better than the normal Viterbi algorithm that only selects the best path.
  • the CRC-assisted decision-based decoding algorithm is a parallel enumeration Viterbi decoding algorithm for four candidate paths (Parallel List Viterbi Algoriyhm-4, hereinafter referred to as PLVA-4)
  • PLVA-4 Parallel List Viterbi Algoriyhm-4
  • the decoding performance is approximately 0.2 to 0.8 dB higher than the VA decoding performance.
  • Step 303 Send a decoding result of the first substream, the second substream, and the third substream to the base station controller, where the decoding result of the first substream includes a decoding bit stream and a CRC check result.
  • the NodeB After completing the decoding process performed in step 302, the NodeB, specifically the CC Decoder in the NodeB, can send the decoding result to the base station controller, such as the RNC, so that the RNC can use the
  • the method sends the decoding result to the AMR Speech Decoder in the CN, and the CRC check result included in the decoding result of the first substream can be sent to the Outer-Loop Power ControL in the RNC, and the subsequent implementation process and the prior art The same, no longer repeat here.
  • the base station may use the decoding algorithm based on the CRC auxiliary decision to decode the first substream, which is compared with the prior art in the conventional VA decoding algorithm.
  • the decoding performance of the first substream can be improved. Since the importance of the first substream in the voice quality is high, the present embodiment can improve the voice quality by improving the decoding performance of the first substream. Meet the higher requirements of users for voice quality.
  • the decoding algorithm based on the CRC-assisted decision used in the above embodiments may be a List Viterbi Algorithm (LVA), or a bit-reversed decoding algorithm.
  • the above embodiment may preferably be a PLVA, or a serial LVA (Serial LVA, hereinafter referred to as SLVA).
  • the PLVA decoder includes a VA decoder and a CRC Check&Choose module.
  • the VA decoder includes K candidate paths, namely Path1 ⁇ PathK.
  • the A substream is input to the VA decoder, and the VA decoder can output K global optimal candidate paths Path1 ⁇ PathK by using the Viterbi algorithm.
  • the CRC Check&Choose module can correspond to the Pathl ⁇ PathK corresponding to the CRC included in the A substream. Decoding result CRC check, and select the correct decoding result of the CRC check result as the final decoding result.
  • the decoding result corresponding to Path2 is selected as the final result. If the decoding results corresponding to Path1 ⁇ PathK cannot pass the CRC check, That is, if all the decoding results are erroneous, the decoding result of the best path is output as the final decoding result, and the optimal path may be, for example, a preset Path1, and the optimal path is the maximum determined by the VA algorithm. Likelihood path.
  • the CRC Check&Choose module can output a PLVA CRC Indicator (PLVA CRCI) and a PLVA decoded bit stream to the RNC.
  • PLVA CRC Indicator PLVA CRCI
  • the above embodiment may preferably include PLVA-4.
  • PL PLVA-4 is a compromise between current performance gain and complexity tradeoff. When the number of candidate paths is K>4, the performance gain does not increase much, and the larger the ⁇ , the higher the probability of CRC miss detection.
  • PLVA-2, PLVA-6, PLVA-8, PLVA-12 or PLVA-16 can also be utilized in the above embodiments.
  • the decoding algorithm based on the CRC-assisted decision can also use other algorithms, such as SLVA, bit-reversed decoding algorithm, etc., and the implementation principle is similar, and details are not described herein.
  • the inventors have found that it is indeed possible to directly replace a conventional VA decoder in a base station with a decoder based on a CRC-assisted decision, for example, directly replacing it with a PLVA decoder.
  • the first substream that is, the decoding performance of the A substream, but reduces the average subjective score of the speech (Mean Opinion Score, hereinafter referred to as MOS).
  • Target BLER a same target BLER (hereinafter referred to as: Target BLER) is preset for the A substream, the B substream, and the C substream, and once the decoding performance of the A substream becomes better, The BLER of the Bay 1 JA substream is different from the Target BLER set by the Outer-Loop Power Control. Therefore, the Outer-Loop Power Control needs to reduce the AMR power. However, once the AMR power is reduced, the final result is that the BLER of the A substream remains unchanged, but the BLER of the ⁇ C substream will increase, resulting in a decrease in the voice MOS score. Experiments show that the AMR power is reduced by 0.3 dB, MOS points. Decrease by about 0.1.
  • Solution 1 Reduce the target block error rate of the outer loop power control.
  • the Outer-Loop Power Control can reduce the Target SINR of the A substream, while the BLER of the B and C substreams can remain unchanged. Therefore, the scheme does not require Outer-Loop Power Control.
  • the AMR power is reduced, so the MOS score of the speech is not reduced.
  • the channel resources occupied by the first substream are reduced, and the channel resources occupied by the second substream and the third substream are increased.
  • the B substream can be increased by reducing the rate matching parameter of the A substream.
  • the rate matching parameter of the C substream is used to reduce the channel resources occupied by the first substream, and the channel resources occupied by the second substream and the third substream are increased, and other methods may be used by those skilled in the art.
  • the channel resources between the three substreams are reconfigured as long as the channel resources occupied by the first substream are reduced, and the channel resources occupied by the second substream and the third substream are increased.
  • the scheme can reconfigure the rate matching parameters of the A, B, and C substreams, so that the rate matching parameter of the A substream is reduced, and the rate matching parameters of the B substream and the C substream are increased, thereby forming a part of the A substream.
  • the transmission resources are transferred to the B and C substreams, so that the three substreams reach a new balance under the PLVA, thereby avoiding the reduction of the MOS score.
  • the base station may use a decoding algorithm based on the CRC auxiliary decision to obtain decoding results on multiple candidate paths, and apply the CRC included in the first substream to perform decoding results on multiple candidate paths.
  • CRC check obtain the decoding result on the correct path of the CRC check result, and the CRC check result of the correct path and the CRC check result of the best path; then, the base station can send the decoding on the correct path to the base station controller Result, CRC checksum of the correct path And the verification result of the best path, so that the base station controller sends the verification result of the best path to the outer loop power control module, sends the decoding result on the correct path to the core network, and CRC according to the correct path
  • the test result sends a bad frame indication to the core network.
  • FIG. 5 is a schematic structural diagram of another PLVA decoder used in the voice signal processing method embodiment of the present invention.
  • the PLVA decoder is shown in FIG.
  • three outputs may be included, and the three outputs include VA CRCI, PLVA CRCI and PLVA decoded bit stream, and the VA CRCI is the CRC check result of the optimal path.
  • the best path is a preset path, such as Pathl, and the VA CRCI is equivalent to the CRCI output by the VA decoder.
  • the PLVA CRCI is the CRC check result of the correct path, and the correct path may be optimal.
  • the path is the same, for example, the correct path and the best path are Pathl.
  • the PLVA CRCI is the same as the VA CRCI, and the correct path may be different from the best path.
  • the correct path is Path2
  • the PLVA CRCI is the result of the Path2 check.
  • the PLVA decoding bit stream is the decoding result of the correct path.
  • the CRC Check&Choose module of the PLVA decoder also outputs the CRC check result of the best path, that is, the three outputs of the PLVA decoder are: As a result, the CRC check result of the best path and the CRC check result of the best path, at this time the PLVA decoder is equivalent to the VA decoder.
  • Outer-Loop Power Control still uses VA CRCI, while PLVA CRCI gives AMR Speech Decoder to indicate if a voice frame is available.
  • the decoding result corresponding to the best path is correct, the result of the VA decoding is the same as the result of the PLVA decoding, and both CRC check results are correct; if the best path corresponds to the translation If the code result is incorrect, the decoding result corresponding to the other candidate paths is correct, the VA CRC check result is wrong, the PLVA CRC check result is correct, and the PLVA outputs the correct decoding result; if the decoding results corresponding to all candidate paths are wrong, PLVA The decoding result corresponding to the optimal path is output.
  • the NodeB can pass the VA CRCI and the PLVA CRCI to the RNC.
  • the RNC can use the VA CRCI for outer loop power control.
  • the BFI can be sent to the CN to indicate whether the corresponding voice frame is correct.
  • the NodeB can also use the PL sub-decoded A substream and the VA decoded B and C.
  • the substream is framing and sent to the AMR Speech Decoder.
  • the AMR Speech Decoder can perform speech decoding based on receiving an AMR speech signal including three substreams and a corresponding BFI indication.
  • RNC's Outer-Loop Power Control module can be used for power control based on the VA CRCI output from the PLVA. It can be implemented using existing technology and will not be described here.
  • FIG. 6 is a flowchart of the second embodiment of the voice signal processing method of the present invention. As shown in FIG. 6, the method in this embodiment is used to implement the foregoing solution 1. The method in this embodiment may include:
  • Step 601 Receive an encoded voice signal sent by the UE, where the encoded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a CRC.
  • Step 602 Perform decoding processing on the first substream, the second substream, and the third substream by using a decoding algorithm, where the first substream is performed by using a decoding algorithm based on a CRC auxiliary decision Decoding processing.
  • Step 603 Send a decoding result of the first substream, the second substream, and the third substream to a base station controller, where the decoding result of the first substream includes a decoded bitstream and a CRC check result. .
  • steps 601 to 603 are similar to the implementations of steps 301 to 303 in the method embodiment shown in FIG. 3, and details are not described herein again.
  • Step 604 Receive a reduced target signal to noise ratio sent by the base station controller.
  • Step 605 Perform inner loop power control according to the target signal to noise ratio.
  • Steps 604 and 605 can be performed specifically for the Inner-Loop Power Control module in the NodeB.
  • the Outer-Loop Power Control can reduce the Target SINR of the first substream, and the second and the second The BLER of the three substreams can be kept unchanged. Therefore, the scheme does not require Outer-Loop Power Control to reduce the AMR power, and therefore, does not reduce the MOS score of the voice. Moreover, this embodiment does not need to modify the product code, and only needs to modify the Target BLER of the Outer-Loop Power Control, which is easy to implement.
  • FIG. 7 is a flowchart of Embodiment 3 of a method for processing a voice signal according to the present invention. As shown in FIG. 7, the method in this embodiment may include:
  • Step 701 Receive an encoded voice signal sent by the UE, where the encoded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a CRC.
  • Step 702 Perform decoding processing on the first substream, the second substream, and the third substream by using a decoding algorithm, where the first substream is performed by using a decoding algorithm based on a CRC auxiliary decision Decoding processing.
  • Step 703 Send a decoding result of the first substream, the second substream, and the third substream to a base station controller, where the decoding result of the first substream includes a decoded bitstream and a CRC check result. .
  • steps 701 to 703 are similar to the implementations of steps 301 to 303 in the method embodiment shown in FIG. 3, and details are not described herein again.
  • Step 704 Decrease a rate matching parameter of the first substream, and increase a rate matching parameter of the second substream and the third substream.
  • the rate matching parameter of the first substream is decreased, and the rate matching parameters of the second substream and the third substream are increased, thereby A part of the transmission resources are transferred to the second and third substreams, so that the three substreams reach a new balance under the PLVA, thereby avoiding the reduction of the MOS score.
  • the technical solution has small changes to the product and is simple to implement.
  • FIG. 8 is a flowchart of Embodiment 4 of a method for processing a voice signal according to the present invention
  • FIG. 9 is a schematic structural diagram of processing three substreams in Embodiment 4 of the method shown in FIG. 8.
  • the method in this embodiment may be Includes:
  • Step 801 Receive an AMR voice signal sent by the UE.
  • the AMR voice signal includes three substreams A, B, and C, namely Class A, Class B, and Class. C, where the data block of Class A is followed by a CRC check, and the data block of the B and C substreams is not followed by a CRC check.
  • Step 802 Decode the A substream by using an LVA decoder, and decode the B substream and the C substream by using a VA decoder.
  • Step 803 the outer loop power control of the LVA decoder to the RNC (Outer-Loop Power)
  • Step 804 The LVA decoder sends the LVA CRCI to the AMR Speech Decoder through the RNC.
  • Step 805 The decoding result of the A substream decoded by the LVA decoder and the decoding result of the B and C substreams decoded by the two VA decoders are sent to the AMR speech decoder through the RNC.
  • PLVA-4 has a performance gain of about 0.3 dB with respect to VA.
  • a voice processing system with power control such as a WCDMA system, does not need to modify the Target BLER of the Outer-Loop Power Control, and does not need to modify the A, B, and C substreams.
  • the rate matching parameter is used to directly convert the performance gain brought by LVA into the gain of the speech MOS. Since the A substream is of the highest importance in AMR speech, this method can maximize speech performance while minimizing the impact on existing systems.
  • FIG. 10 is a flowchart of Embodiment 5 of a method for processing a voice signal according to the present invention. As shown in FIG. 10, the method in this embodiment may include:
  • Step 101 Receive a decoding result of the first substream, the second substream, and the third substream sent by the base station, where the decoding result of the first substream is decoded by using a decoding algorithm based on a CRC auxiliary decision a decoding result obtained after processing and including a decoded bit stream and a CRC check in the decoding result Result
  • Step 102 Send the verification result of the optimal path to the outer loop power control module, and send the decoding result and the CRC check result on the correct path to the core network.
  • the embodiment is a technical solution executed by the base station controller corresponding to the technical solution executed by the base station shown in FIG. 3, and the implementation principle thereof is described in detail in the description of the foregoing technical solution, and details are not described herein again.
  • the base station controller of this embodiment may be an RNC or a BSC.
  • the decoding algorithm based on the CRC auxiliary decision in this embodiment may include PLVA, SLVA, etc., and details are not described herein again.
  • the base station controller may receive the decoded bit stream and the CRC check result after the base station decodes the first substream by using a decoding algorithm based on the CRC auxiliary decision, compared to the prior art.
  • the decoding performance of the first substream can be improved, and the first substream is highly important in the speech quality. Therefore, the embodiment is By improving the decoding performance of the first substream, the voice quality can be improved, and the user's higher requirements for voice quality can be met.
  • the method further includes: instructing the base station to reduce channel resources occupied by the first substream, and adding the second substream And the channel resources occupied by the third substream.
  • the method of this embodiment corresponds to the method described in the foregoing solution 1. The implementation principle and the technical effect are similar, and details are not described herein again.
  • the method further includes: reducing a target block error rate of the outer loop power control module, so that the outer loop power control module is The base station transmits the reduced target signal to noise ratio.
  • the method in this embodiment corresponds to the method described in the foregoing solution 2. The implementation principle and the technical effect are similar, and details are not described herein again.
  • FIG. 11 is a flowchart of Embodiment 6 of a method for processing a voice signal according to the present invention. As shown in FIG. 11, the method in this embodiment may include:
  • Step 201 Receive a decoding result of the first substream, the second substream, and the third substream sent by the base station, where the decoding result of the first substream is decoded by using a decoding algorithm based on a CRC auxiliary decision a decoding result obtained after processing and including a decoded bit stream and a CRC check in the decoding result The result.
  • the CRC check result may include a CRC check result of the correct path and a CRC check result of the best path, and the decoded bit stream is a decoded bit stream on the correct path.
  • Step 202 Send a CRC check result of the best path to the outer loop power control module.
  • Step 203 Send the decoded bit stream on the correct path and the CRC check result of the correct path to the core network.
  • Step 204 Send the decoding result of the second substream and the third substream to the core network.
  • steps 202 to 204 There may be no sequential execution order between steps 202 to 204.
  • a voice processing system with power control such as a WCDMA system, does not need to modify the Target BLER of the Outer-Loop Power Control, and does not need to modify the rate matching between the three substreams.
  • the parameter but directly converts the performance gain brought by the decoding algorithm based on the CRC auxiliary decision into the gain of the speech MOS. Since the first substream is of the highest importance in AMR speech, this embodiment can maximize speech performance while minimizing the impact on existing systems.
  • the wideband AMR voice and the partial narrowband AMR voice have a bit number of 0 in the C substream.
  • the foregoing embodiment is only described by taking the narrowband AMR voice whose bit number of the C substream is not 0 as an example, those skilled in the art can understand that the technical solution of the embodiment of the present invention is also applicable to the broadband AMR voice and the C subframe.
  • the narrow-band AMR voice with a bit number of 0 is similar to the foregoing embodiment, and details are not described herein again.
  • FIG. 12 is a schematic structural diagram of Embodiment 1 of a base station according to the present invention.
  • the base station in this embodiment may include: a first receiving module 1 1 , a decoding processing module 12 , and a first sending module 13 , where The receiving module 1 1 is configured to receive the encoded voice signal sent by the UE, where the encoded voice signal includes a first substream, a second substream, and a third substream, where the first substream includes a CRC; 12: decoding, by using a decoding algorithm, the first substream, the second substream, and the third substream, where the first substream is performed by using a decoding algorithm based on a CRC auxiliary decision a decoding process; the first sending module 13 is configured to send, to the base station controller, a decoding result of the first substream, the second substream, and the third substream, where the decoding result of the first substream includes translation Code bit Stream and CRC check results.
  • the base station in this embodiment may be used to perform the method in the method embodiment shown in FIG. 3, and the implementation principle and the technical effect are similar.
  • the base station in this embodiment may be a BTS, a NodeB, or an eNB.
  • FIG. 13 is a schematic structural diagram of Embodiment 2 of a base station according to the present invention. As shown in FIG. 13, the base station in this embodiment is based on the base station shown in FIG. 12, and further, the first receiving module 11 may include: a first receiving unit 111.
  • the decoding processing module 12 may include: a first decoding processing unit 121, a second decoding processing unit 122, and a third decoding processing unit 123, where the first translation
  • the code processing unit 121 is configured to perform decoding processing on the first substream by using a parallel enumeration Viterbi decoding algorithm, obtain decoding results on multiple candidate paths, and apply the CRC to translation on multiple candidate paths.
  • the code result is subjected to CRC check, and the decoding result on the correct path of the CRC check result and the CRC check result of the correct path and the CRC check result of the best path are obtained, and the best path is the translation of the Viterbi.
  • the maximum likelihood path determined by the algorithm; the second decoding processing unit 122 is configured to perform decoding processing on the second substream by using a Viterbi decoding algorithm to obtain a decoding result; and the third decoding processing unit 123 is configured to: Decoding the third substream with a Viterbi decoding algorithm to obtain a decoding result.
  • the first sending module 13 may include: a first sending unit 131, a second sending unit 132, and a third sending unit 133.
  • the first sending unit 131 is configured to send, to the base station, the decoding result on the correct path, the CRC check result of the correct path, and the check result of the best path acquired by the first decoding processing unit. a controller, so that the base station controller sends the verification result of the best path to the outer loop power control module, and sends the decoding result and the CRC check result on the correct path to the core network;
  • the sending unit 132 is configured to send the decoding result obtained by the second decoding processing unit to the base station controller, and the third sending unit 133 is configured to use the translation obtained by the third decoding processing unit.
  • the code result is sent to the base station controller.
  • the base station in this embodiment may be used to implement the technical solution described in the foregoing solution 3.
  • the method of the method embodiment shown in FIG. 8 can be performed, and the implementation principle and the technical effect are similar, and details are not described herein again.
  • FIG. 14 is a schematic structural diagram of Embodiment 3 of a base station according to the present invention.
  • the base station of the present embodiment further includes: a channel resource control module 14 for reducing a base station, based on the base station shown in FIG. The channel resources occupied by the first substream are increased, and the channel resources occupied by the second substream and the third substream are increased.
  • the base station in this embodiment may be used to perform the technical solution described in the foregoing solution 1.
  • the method in the embodiment of the method shown in FIG. 6 may be specifically implemented. The implementation principle and technical effects are similar, and details are not described herein again.
  • FIG. 15 is a schematic structural diagram of Embodiment 4 of a base station according to the present invention.
  • the base station of the present embodiment further includes: an inner loop power control module 15 for receiving on the basis of the base station shown in FIG. The reduced target signal to noise ratio sent by the base station controller, and performing inner loop power control according to the target signal to noise ratio.
  • the base station of this embodiment may be used to perform the technical solution described in the foregoing solution 2.
  • the method of the method embodiment shown in FIG. 7 may be specifically implemented, and the implementation principle and the technical effect are similar, and details are not described herein again.
  • FIG. 16 is a schematic structural diagram of Embodiment 1 of a base station controller according to the present invention.
  • the base station controller of this embodiment may include: a second receiving module 21 and a second sending module 22, where the second receiving module 21 is used.
  • the second sending module 22 is configured to send the CRC check result to the outer loop power control module,
  • the decoding bit stream and the CRC check result of the first substream and the decoding result of the second substream and the third substream are sent to the core network.
  • the base station controller of this embodiment may be used to perform the technical solution of the method embodiment shown in FIG. 10, and the implementation principle and technical effects are similar, and details are not described herein again.
  • Embodiment 17 is a schematic structural diagram of Embodiment 2 of a base station controller according to the present invention, as shown in FIG. 17, CRC
  • the verification result includes a CRC check result of the correct path and a CRC check result of the best path, and the decoded bit stream is a decoded bit stream on the correct path, and the optimal path is determined by using a Viterbi decoding algorithm.
  • the maximum likelihood path; the base station controller of this embodiment is based on the base station controller shown in FIG.
  • the second sending module 22 includes: a fourth sending unit 221 and a fifth sending unit 222, where The fourth sending unit 221 is configured to send the CRC check result of the best path to the outer loop power control module; the fifth sending unit 222 is configured to use the decoded bit stream on the correct path and the correct The CRC check result of the path is sent to the core network, and the decoding result of the second substream and the third substream is sent to the core network.
  • the base station controller of this embodiment may be used to perform the technical solution described in the foregoing solution 3.
  • the specific implementation of the technical solution shown in FIG. 1 is similar to that of the technical solution shown in FIG.
  • FIG. 18 is a schematic structural diagram of Embodiment 3 of a base station controller according to the present invention.
  • the base station controller of this embodiment further includes: an indication module 23, based on the base station controller shown in FIG. Instructing the base station to reduce channel resources occupied by the first substream, and increasing channel resources occupied by the second substream and the third substream.
  • the base station controller of this embodiment may be used to perform the technical solution described in the foregoing solution 1.
  • the implementation principle and technical effects are similar, and details are not described herein again.
  • FIG. 19 is a schematic structural diagram of Embodiment 4 of a base station controller according to the present invention.
  • the base station controller of this embodiment further includes: a parameter control module 24, based on the base station controller shown in FIG. And a method for reducing a target block error rate of the outer loop power control module, so that the outer loop power control module sends the reduced target signal to noise ratio to the base station.
  • the base station controller of this embodiment may be used to perform the technical solution described in the foregoing solution 2.
  • the implementation principle and technical effects are similar, and details are not described herein again.
  • FIG. 20 is a schematic structural diagram of an embodiment of an access network system according to the present invention.
  • the access network system of this embodiment may include a base station 1 and a base station controller 2, where the base station 1 may use FIG. 12 to FIG.
  • the configuration of any of the base stations shown in FIG. 15 can correspondingly implement the technical solution described in any one of FIG. 3 and FIG. 6 to FIG. 8 , and the base station controller 2 can use any of the methods shown in FIG. 16 to FIG. 19 .
  • the structure of the base station can be implemented in the technical solution shown in FIG. 10 or FIG. 11 , and the implementation principle and technical effects are similar, and details are not described herein again.

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Abstract

本发明实施例提供一种语音信号处理方法、装置和接入网系统。一种语音信号处理方法,包括:接收用户设备UE发送的编码语音信号,所述编码语音信号包括第一子流、第二子流和第三子流,所述第一子流中包含循环卷积校验CRC(301);采用编码算法对所述第一子流、第二子流和第三子流进行译码处理,其中,采用基于CRC辅助判决的译码算法对所述第一子流进行译码处理(302);向基站控制发送所述第一子流、第二子流和第三子流的译码结果,所述第一子流的译码结果中包括译码比特流和CRC校验结果(303)。本发明的实施例可以通过提高第一子流的译码性能,提高语音质量,满足用户对语音质量的更高要求。

Description

语音信号处理方法、 装置和接入网系统 技术领域
本发明实施例涉及通信领域, 尤其涉及一种语音信号处理方法、 装置 和接人网系统。 背景技术
在现有通信系统, 例如通用移动通讯系统 ( Universal Mobile Telecommunications System, 以下简称: UMTS ) 中, 语音编码大量釆用卷 积码作为信道编码, 并利用功率控制机制保障其语音质量。 图 1为现有技 术中语音编码过程的系统架构示意图, 如图 1所示, 以 UMTS网络举例来 说, 上行速率自适应 (Adaptive Muti-Rate, 以下简称: AMR )语音信号处 理过程为, 用户设备( User Equipment, 以下简称: UE ) 中的 AMR语音 编码器 (以下简称: AMR Speech Encoder ) 的语音编码经过卷积码编码器 ( Convolutional Code Encoder, 以下简称: CC Encoder ) 釆用卷积码进行 编码处理, CC Encoder编码后的 AMR语音信号通过空口发送给基站 (以 下简称: NodeB ) , NodeB中的 CC译码器 (以下简称: CC Decoder ) 可 以对 AMR语音信号进行译码,该 CC Decoder包括两路输出,一路通过 Iub 口将译码后的比特流发送给无线网络控制器 (Radio Network Controller, 以下简称: RNC ) , RNC再通过 Iu口发送到核心网 ( Core Network, 以下 简称: CN ) 中的 AMR语音译码器 (以下简称: AMR Speech Decoder ) , 另一路通过 Iub口将循环卷积校验 ( Cyclic Redundancy Check, 以下简称: CRC )校验结果, 即 CRC指示 (CRC Indicator, 以下简称: CRCI )发送 给 RNC , RNC即可根据该 CRCI通过 Iu口向 CN中的 AMR Speech Decoder 发送坏帧指示 ( Bad Frame Indicator, 以下简称: BFI ) , CC Decoder还将 该 CRCI发送给 RNC 中的外环功率控制 (以下简称: Outer-Loop Power Control ) 。 AMR Speech Decoder在接收到译码后的比特流以及 BFI之后, 即可进行译码处理。 而 Outer-Loop Power Control可以根据 CRCI调整目标 块误码率 (Block Error Ratio , 以下简称: BLER ) , 并根据调整的 BLER 向 NodeB中的内环功率控制 (以下简称: Inner-Loop Power Control )发送 目标信噪比 (以下简称: Target SINR ) , Inner-Loop Power Control根据测 量的信噪比 (以下简称: Measured SINR ) 和 Target SINR向 UE的功率发 射器 (以下简称: Power Transmitter ) 发送功率指令 (以下简称: Power Commander ) , 以调整 UE的发射功率。 图 2为在图 1所示系统架构中处 理三个子流的结构示意图, 如图 2所示, 在现有技术中, AMR语音信号可 以分为 A、 B、 C三个子流, 即 Class A、 Class B和 Class C , 其中, A子 流对语音质量影响最大,也最重要, 其数据块后附有 12比特的 CRC校验, B、 C子流的重要性相对较低,数据块之后没有 CRC校验。 NodeB中的 CC Decoder均釆用维特比算法 ( Viterbi Algorithm, 以下简称: VA )译码器, 而 VA译码器的译码结果中, 只有 A子流存在 CRCI。
但是,在实现本发明过程中,发明人发现现有技术中 NodeB对 A子流 的卷积码译码性能较低, 对语音质量的影响较大, 无法满足用户对语音质 量的更高要求。 发明内容
本发明实施例提供一种语音信号处理方法、 装置和接入网系统, 以提 高对 A子流的卷积码译码性能。
本发明实施例提供一种语音信号处理方法, 包括:
接收用户设备 UE发送的编码语音信号, 所述编码语音信号包括第一 子流、 第二子流和第三子流, 所述第一子流中包含循环卷积校验 CRC; 釆用译码算法对所述第一子流、 第二子流和第三子流进行译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流进行译码处理; 向基站控制器发送所述第一子流、 第二子流和第三子流的译码结果, 所述第一子流的译码结果中包括译码比特流和 CRC校验结果。
本发明实施例提供另一种语音信号处理方法, 包括:
接收基站发送的第一子流、 第二子流和第三子流的译码结果, 其中, 第一子流的译码结果为釆用基于循环卷积校验 CRC 辅助判决的译码算法 进行译码处理后获取的译码结果且该译码结果中包括译码比特流和 CRC 校验结果;
将所述 CRC校验结果发送给外环功率控制模块,将所述第一子流的译 码比特流和 CRC 校验结果以及所述第二子流和第三子流的译码结果发送 给核心网。
本发明实施例提供一种基站, 包括:
第一接收模块, 用于接收用户设备 UE发送的编码语音信号, 所述编 码语音信号包括第一子流、 第二子流和第三子流, 所述第一子流中包含循 环卷积校验 CRC;
译码处理模块, 用于釆用译码算法对所述第一子流、 第二子流和第三 子流进行译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一 子流进行译码处理;
第一发送模块, 用于向基站控制器发送所述第一子流、 第二子流和第 三子流的译码结果,所述第一子流的译码结果中包括译码比特流和 CRC校 验结果。
本发明实施例提供一种基站控制器, 包括:
第二接收模块, 用于接收基站发送的第一子流、 第二子流和第三子流 的译码结果, 其中, 第一子流的译码结果为釆用基于循环卷积校验 CRC辅 助判决的译码算法进行译码处理后获取的译码结果且该译码结果中包括译 码比特流和 CRC校验结果;
第二发送模块, 用于将所述 CRC校验结果发送给外环功率控制模块, 将所述第一子流的译码比特流和 CRC 校验结果以及所述第二子流和第三 子流的译码结果发送给核心网。 本发明实施例提供一种接入网系统, 包括: 基站和基站控制器; 其中, 基站釆用上述的基站, 基站控制器釆用上述的基站控制器。
本发明实施例中,基站可以釆用基于 CRC辅助判决的译码算法对所述 第一子流进行译码处理, 相比于现有技术中釆用普通的 VA译码算法进行 译码处理来说, 可以提高对第一子流的译码性能, 而由于第一子流在语音 质量中的重要性较高, 因此, 本发明实施例可以通过提高第一子流的译码 性能, 提高语音质量, 满足用户对语音质量的更高要求。 附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案, 下面将对 实施例或现有技术描述中所需要使用的附图作一简单地介绍,显而易见地, 下面描述中的附图是本发明的一些实施例,对于本领域普通技术人员来讲, 在不付出创造性劳动性的前提下, 还可以根据这些附图获得其他的附图。
图 1为现有技术中语音编码过程的系统架构示意图;
图 2为在图 1所示系统架构中处理三个子流的结构示意图;
图 3为本发明语音信号处理方法实施例一的流程图;
图 4为本发明语音信号处理方法实施例中所使用的 PLVA的一种结构 示意图;
图 5为本发明语音信号处理方法实施例所使用的另一种 PLVA译码器 的结构示意图;
图 6为本发明语音信号处理方法实施例二的流程图;
图 7为本发明语音信号处理方法实施例三的流程图;
图 8为本发明语音信号处理方法实施例四的流程图;
图 9为图 8所示方法实施例四中处理三个子流的结构示意图; 图 10为本发明语音信号处理方法实施例五的流程图;
图 1 1为本发明语音信号处理方法实施例六的流程图;
图 12为本发明基站实施例一的结构示意图; 图 13为本发明基站实施例二的结构示意图;
图 14为本发明基站实施例三的结构示意图;
图 15为本发明基站实施例四的结构示意图;
图 16为本发明基站控制器实施例一的结构示意图
图 17为本发明基站控制器实施例二的结构示意图
图 18为本发明基站控制器实施例三的结构示意图
图 19为本发明基站控制器实施例四的结构示意图
图 20为本发明接入网系统实施例的结构示意图。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本 发明实施例中的附图, 对本发明实施例中的技术方案进行清楚、 完整地描 述, 显然, 所描述的实施例是本发明一部分实施例, 而不是全部的实施例。 基于本发明中的实施例, 本领域普通技术人员在没有作出创造性劳动前提 下所获得的所有其他实施例, 都属于本发明保护的范围。
本发明的技术方案, 可以应用于各种通信系统, 例如: 全球移动通信 系统 ( Global System for Mobile Communications , 以下简称: GSM ) , 码 分多址 ( Code Division Multiple Access , 以下简称: CDMA ) 系统, 宽带 码分多址( Wideband Code Division Multiple Access , 以下简称: WCDMA ) 系统, 长期演进(Long Term Evolution, 以下简称: LTE ) 系统等。 但为 描述方便 , 下述实施例以 WCDMA为例进行说明。
基站, 可以是 CDMA中的基站 ( Base Transceiver Station, 以下简称: BTS ) , 也可以是 WCDMA中的基站 NodeB , 还可以是 LTE中的演进型 基站 ( Evolutional Node B , 以下简称: eNB或 eNodeB ) , 本发明并不限 定, 但为描述方便, 下述实施例以 NodeB为例进行说明。
基站控制器, 可以是 CDMA中的基站控制器( Base Station Controller, 以下简称: BSC ) , 也可以是 WCDMA 中的 RNC , 本发明并不限定, 但 为描述方便, 下述实施例以 RNC为例进行说明。
图 3为本发明语音信号处理方法实施例一的流程图, 如图 3所示, 本 实施例的方法是对图 1中 NodeB的 CC Decoder所执行的方法的改进, 本 实施例的方法可以包括:
步骤 301、 接收 UE发送的编码语音信号, 所述编码语音信号包括第 一子流、 第二子流和第三子流, 所述第一子流中包含循环卷积校验 CRC。
举例来说, NodeB, 具体来说, 可以是 NodeB中的 CC Decoder接收 UE发送的编码语音信号, 该编码语音信号即可为图 1中经过 CC Encoder 编码处理后的 AMR语音信号。该 AMR语音信号即可包括图 2中的 A、 B、 C三个子流, 分别对应第一子流、 第二子流和第三子流。 其中第一子流, 即 A子流中包含 CRC。
步骤 302、 釆用译码算法对所述第一子流、 第二子流和第三子流进行 译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流进行 译码处理。
NodeB , 具体地可以是 NodeB中的 CC Decoder, 可以釆用译码算法分 别对所述第一子流、 第二子流和第三子流进行译码处理。 为了提升现有技 术中 NodeB对第一子流, 即 A子流的卷积码译码性能,本实施例釆用基于 CRC辅助判决的译码算法对第一子流, 即 A子流进行译码处理。 由于基于 CRC辅助判决的译码算法需要 CRC的辅助判决, 而第二子流和第三子流 中均不包含 CRC , 因此, 第二子流和第三子流, 即 B子流和 C子流可以 釆用现有技术中的 VA译码器进行译码处理。
具体来说,发明人经过研究发现,基于 CRC辅助判决的译码算法可以 有效提高卷积码的译码性能, 其基本原理是: 通过 Viterbi算法输出全局最 优的多条候选的路径,通过 CRC对这些路径对应的译码结果分别进行 CRC 校验, 选择 CRC校验正确的译码结果作为最终结果, 如果所有路径对应的 译码结果都无法通过 CRC 校验, 则输出最佳路径的译码结果作为最终结 果。 由于这种译码算法可以在包括最佳路径在内的多条路径间做选择, 因 此性能比只选择最佳路径的普通 Viterbi算法性能更好。 通过研究和仿真, 在 1%的 BLER条件下, 以基于 CRC辅助判决的译码算法为 4条候选路径 的并行列举维特比译码算法 ( Parallel List Viterbi Algoriyhm-4 , 以下简称: PLVA-4 ) 为例来说, 译码性能比 VA译码性能大致高 0.2〜0.8dB。
步骤 303、 向基站控制器发送第一子流、 第二子流和第三子流的译码 结果, 该第一子流的译码结果中包括译码比特流和 CRC校验结果。
在完成步骤 302所执行的译码处理后, NodeB , 具体地可以是 NodeB 中的 CC Decoder即可将译码结果发送给基站控制器, 例如 RNC , 从而使 的 RNC可以釆用图 2所示的方式将译码结果发送给 CN中的 AMR Speech Decoder, 而第一子流的译码结果中包含的 CRC 校验结果则可以发送到 RNC中的 Outer-Loop Power ControL 后续的实现过程与现有技术相同, 此 处不再赘述。
本实施例中,基站可以釆用基于 CRC辅助判决的译码算法对所述第一 子流进行译码处理, 相比于现有技术中釆用普通的 VA译码算法进行译码 处理来说, 可以提高对第一子流的译码性能, 而由于第一子流在语音质量 中的重要性较高, 因此, 本实施例可以通过提高第一子流的译码性能, 提 高语音质量, 满足用户对语音质量的更高要求。
进一步的,上述实施例中所使用的基于 CRC辅助判决的译码算法可以 为列举维特比译码算法( List Viterbi Algorithm, 以下简称: LVA ) , 或者 比特反转译码算法等。 进一步地, 上述实施例可以优选 PLVA, 或者, 串 行 LVA ( Serial LVA, 以下简称: SLVA ) 。
图 4为本发明语音信号处理方法实施例中所使用的 PLVA的一种结构 示意图,如图 4所示, 该 PLVA译码器包括 VA译码器和 CRC校验和选择 ( CRC Check&Choose )模块, 其中 VA译码器包括 K 个候选路径, 即 Pathl〜PathK。 A子流输入到 VA译码器中, VA译码器釆用 Viterbi算法可 以输出 K条全局最优的候选路径 Pathl〜PathK, CRC Check&Choose模块 可以通过 A子流中包含的 CRC对 Pathl〜PathK对应的译码结果分别进行 CRC校验, 并选择 CRC校验结果正确的译码结果作为最终译码结果, 例 如选择 Path2对应的译码结果作为最终结果, 如果 Pathl〜PathK对应的译 码结果都不能通过 CRC校验, 也即所有译码结果都是错误的, 则输出最佳 路径的译码结果作为最终译码结果, 该最佳路径例如可以为预先设定的 Pathl , 最佳路径即为釆用 VA 算法确定的最大似然路径。 最后, CRC Check&Choose模块可以将 PLVA CRC指示 ( PLVA CRC Indicator, 以下 简称: PLVA CRCI ) 和 PLVA译码比特流输出给 RNC。
更进一步地, 上述实施例可以优选釆用包括 PLVA-4。 釆用 PLVA-4 是当前性能增益和复杂度权衡的一个折中, 当候选路径的条数 K>4以后, 性能增益增加不多, 而 Κ越大, 意味着 CRC漏检概率增加。 本领域技术 人员可以理解的是, PLVA-2 , PLVA-6 , PLVA-8、 PLVA-12或者 PLVA-16 也可以利用到上述实施例中。 另外, 本领域技术人员可以理解的是, 基于 CRC辅助判决的译码算法还可以釆用其它算法, 例如 SLVA, 比特反转译 码算法等, 其实现原理类似, 此处不再赘述。
在上述图 3所示实施例的基础上,发明人发现,在将基站中普通的 VA 译码器直接替换成基于 CRC 辅助判决的译码器, 例如直接替换成 PLVA 译码器, 确实能够提高第一子流, 即 A子流的译码性能, 但是会降低语音 的平均主观分 (Mean Opinion Score , 以下简称: MOS ) 。 具体来说, Outer-Loop Power Control中针对 A子流、 B子流和 C子流均预先设定一相 同的目标 BLER (以下简称: Target BLER ) , 一旦 A子流的译码性能变好, 贝1 J A子流的 BLER 氐于 Outer-Loop Power Control设定的 Target BLER, 因 此, Outer-Loop Power Control需要将 AMR功率降下去。 但是, 一旦 AMR 功率降低,其最终结果是 A子流的 BLER保持不变,但^ C子流的 BLER 则会升高, 从而导致语音 MOS分下降, 实验表明, AMR功率降低 0.3dB , MOS分约降低 0.1分。
为了在釆用图 3所示实施例的技术方案时, 避免降低 MOS分, 本发 明实施例提供了三种解决方案, 下面对这三种方案进行详细说明。 方案一、 降低外环功率控制的目标块误码率。
通过降低 Outer-Loop Power Control 的 Target BLER , 可以使得 Outer-Loop Power Control降低 A子流的 Target SINR,而 B、C子流的 BLER 则可维持不变, 因此, 该方案无需 Outer-Loop Power Control降低 AMR功 率, 因此, 不会降低语音的 MOS分。
本方案的优点在于:不用修改产品代码,只需要修改 Outer-Loop Power Control的 Target BLER。
方案二、 减少第一子流所占用的信道资源, 增加第二子流和第三子流 所占用的信道资源。
在具体实现时, 可以通过减小 A子流的速率匹配参数, 增大 B子流和
C子流的速率匹配参数来减少所述第一子流所占用的信道资源, 增加所述 第二子流和第三子流所占用的信道资源, 本领域技术人员也可以釆用其它 手段来重新配置三个子流之间的信道资源, 只要能够达到减少所述第一子 流所占用的信道资源, 增加所述第二子流和第三子流所占用的信道资源的 目的即可。
本方案可以通过重新配置 A、 B、 C子流的速率匹配参数, 使得 A子 流的速率匹配参数减小, B子流和 C子流的速率匹配参数增大, 从而将 A 子流的一部分传输资源转移到 B、 C子流, 从而使得三个子流在 PLVA下 达到新的平衡, 从而避免降低 MOS分。
本方案的优点在于: 对产品改动小。 本发明实施例还提供另一个技术 方案:
方案三: 釆用双 CRC上报的技术方案。
在该技术方案中,基站可以釆用基于 CRC辅助判决的译码算法, 获取 多条候选路径上的译码结果,应用第一子流中包含的 CRC对多条候选路径 上的译码结果进行 CRC校验, 获取 CRC校验结果正确路径上的译码结果 以及该正确路径的 CRC校验结果和最佳路径的 CRC校验结果; 然后, 基 站可以向基站控制器发送正确路径上的译码结果、正确路径的 CRC校验结 果以及最佳路径的校验结果, 以使基站控制器将最佳路径的校验结果发送 给外环功率控制模块、 将正确路径上的译码结果发送给核心网并根据正确 路径的 CRC校验结果向核心网发送坏帧指示。
以基于 CRC辅助判决的译码算法为 PLVA举例来说, 图 5为本发明 语音信号处理方法实施例所使用的另一种 PLVA译码器的结构示意图, 如 图 5所示, PLVA译码器相对于图 4所示的 PLVA译码器来说, 可以包括 三路输出 , 这三路输出包括 VA CRCI, PLVA CRCI以及 PLVA译码比特 流, 该 VA CRCI即为最佳路径的 CRC校验结果, 该最佳路径为预先设定 的路径, 例如 Pathl , 而该 VA CRCI与 VA译码器输出的 CRCI是等同的, 该 PLVA CRCI即为正确路径的 CRC校验结果, 正确路径可能与最佳路径 相同 , 例如正确路径和最佳路径均为 Pathl , 此时 PLVA CRCI与 VA CRCI 相同, 正确路径也可能与最佳路径不同, 例如, 正确路径为 Path2 , 则该 PLVA CRCI为 Path2的校验结果 , PLVA译码比特流则为正确路径的译码 结果。 如果候选路径中所有路径都不正确, 则 PLVA 译码器的 CRC Check&Choose模块也输出最佳路径的 CRC校验结果, 也即, PLVA译码 器的三路输出分别为: 最佳路径的译码结果, 最佳路径的 CRC校验结果以 及最佳路径的 CRC 校验结果, 此时 PLVA译码器等价于 VA译码器。 Outer-Loop Power Control仍然使用 VA CRCI,而 PLVA CRCI则送给 AMR Speech Decoder, 用于指示语音帧是否可用。
由上述 PLVA的原理描述可知, 如果最佳路径对应的译码结果正确, 则 VA译码的结果和 PLVA译码的结果相同,两个 CRC校验结果均为正确; 如果最佳路径对应的译码结果错误, 其他候选路径对应的译码结果正确, 则 VA CRC校验结果错误, PLVA CRC校验结果正确, PLVA输出正确的 译码结果; 如果所有候选路径对应的译码结果均错误, PLVA输出最佳路 径对应的译码结果。 因此, VA CRC校验结果正确的时候 , PLVA的 CRC 校验结果必然正确; 反之, PLVA CRC校验结果正确, 但 VA CRC校验结 果不一定正确。 然后, 通过 NodeB和 RNC之间的 Iub接口, NodeB可以将 VA CRCI 和 PLVA CRCI传给 RNC。 RNC可以利用 VA CRCI进行外环功率控制 , 根据 PLVA CRCI, 则可以向 CN发送 BFI指示对应的语音帧是否正确, NodeB还可以将 PLVA译码后的 A子流和 VA译码得到的 B、 C子流进行 组帧, 送给 AMR Speech Decoder。
AMR Speech Decoder可以才艮据收到包括三个子流的 AMR语音信号、 以及对应的 BFI指示进行语音解码。 而 RNC的 Outer-Loop Power Control 模块则可以根据 PLVA输出的 VA CRCI进行功率控制, 此处可釆用现有 技术实现, 不再赘述。
下面釆用三个具体实施例, 对上述三个技术方案进行详细说明。
图 6为本发明语音信号处理方法实施例二的流程图, 如图 6所示, 本 实施例的方法用于实现上述方案一, 本实施例的方法可以包括:
步骤 601、 接收 UE发送的编码语音信号, 所述编码语音信号包括第 一子流、 第二子流和第三子流, 所述第一子流中包含 CRC。
步骤 602、 釆用译码算法对所述第一子流、 第二子流和第三子流进行 译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流进行 译码处理。
步骤 603、 向基站控制器发送所述第一子流、 第二子流和第三子流的 译码结果, 所述第一子流的译码结果中包括译码比特流和 CRC校验结果。
上述步骤 601〜步骤 603与图 3所示方法实施例中的步骤 301〜步骤 303 的实现原理类似, 此处不再赘述。
步骤 604、 接收基站控制器发送的降低后的目标信噪比。
步骤 605、 根据所述目标信噪比, 进行内环功率控制。
步骤 604和步骤 605具体来说可以为 NodeB 中的 Inner-Loop Power Control模块执行的。
本实施例, 通过降低 Outer-Loop Power Control的 Target BLER, 可以 使得 Outer-Loop Power Control降低第一子流的 Target SINR, 而第二、 第 三子流的 BLER则可维持不变,因此,该方案无需 Outer-Loop Power Control 降低 AMR功率, 因此, 不会降低语音的 MOS分。 而且, 本实施例不用修 改产品代码, 只需要修改 Outer-Loop Power Control的 Target BLER , 实现 容易。
图 7为本发明语音信号处理方法实施例三的流程图, 如图 7所示, 本 实施例的方法可以包括:
步骤 701、 接收 UE发送的编码语音信号, 所述编码语音信号包括第 一子流、 第二子流和第三子流, 所述第一子流中包含 CRC。
步骤 702、 釆用译码算法对所述第一子流、 第二子流和第三子流进行 译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流进行 译码处理。
步骤 703、 向基站控制器发送所述第一子流、 第二子流和第三子流的 译码结果, 所述第一子流的译码结果中包括译码比特流和 CRC校验结果。
上述步骤 701〜步骤 703与图 3所示方法实施例中的步骤 301〜步骤 303 的实现原理类似, 此处不再赘述。
步骤 704、 减小第一子流的速率匹配参数, 增大第二子流和第三子流 的速率匹配参数。
本实施例可以通过重新配置三个子流的速率匹配参数, 使得第一子流 的速率匹配参数减小, 第二子流和第三子流的速率匹配参数增大, 从而将 第一子流的一部分传输资源转移到第二、 第三子流, 从而使得三个子流在 PLVA下达到新的平衡,从而避免降低 MOS分。 该技术方案对产品的改动 较小, 实现简单。
图 8为本发明语音信号处理方法实施例四的流程图, 图 9为图 8所示 方法实施例四中处理三个子流的结构示意图, 如图 8和 9所示, 本实施例 的方法可以包括:
步骤 801、 接收 UE发送的 AMR语音信号。
该 AMR语音信号包括 A、 B、 C三个子流,即 Class A、 Class B和 Class C, 其中 Class A的数据块后附有 CRC校验, B、 C子流的数据块之后没有 CRC校验。
步骤 802、 釆用 LVA译码器对 A子流进行译码处理, 釆用 VA译码器 对 B子流和 C子流进行译码处理。
步骤 803、 LVA译码器向 RNC中的外环功率控制 ( Outer-Loop Power
Control )发送 VA CRCI。
步骤 804、 LVA译码器通过 RNC向 AMR语音译码器 (AMR Speech Decoder )发送 LVA CRCI。
步骤 805、 LVA译码器译码后的 A子流的译码结果和两个 VA译码器 译码后的 B、 C子流的译码结果通过 RNC发送给 AMR语音译码器。
需要说明的是, 步骤 803〜步骤 804之间可以没有先后顺序。
发明人釆用上述技术方案了系统仿真, 从仿真结果可知, 对于 AMR 12.2k业务的 A子流, PLVA-4相对于 VA, 大约有 0.3dB的性能增益。 通 过双 CRC上报的方案, 在 BLER=1%的时候, 可以得到 0.1分的 MOS分 增益, 在 BLER=10%的时候, 可以获得 0.35分的 MOS分增益。 当系统中 BLER越大, 由 PLVA带来的 MOS分增益也越大。
本实施例,通过釆用双 CRC的方案,使得带有功率控制的语音处理系 统,例如 WCDMA系统等,不需要修改 Outer-Loop Power Control的 Target BLER, 也不需要修改 A、 B、 C子流间的速率匹配参数, 而是直接将 LVA 带来的性能增益转化为语音 MOS分的增益。 由于 A子流在 AMR语音中 重要性最高, 该方法能在最大程度上提升语音性能, 同时对现有系统影响 最小。
图 10为本发明语音信号处理方法实施例五的流程图, 如图 10所示, 本实施例的方法可以包括:
步骤 101、 接收基站发送的第一子流、 第二子流和第三子流的译码结 果, 其中, 第一子流的译码结果为釆用基于 CRC辅助判决的译码算法进行 译码处理后获取的译码结果且该译码结果中包括译码比特流和 CRC 校验 结果;
步骤 102、 将所述最佳路径的校验结果发送给外环功率控制模块, 将 所述正确路径上的译码结果和 CRC校验结果发送给核心网。
本实施例是图 3所示基站执行的技术方案相应的基站控制器执行的技 术方案, 其实现原理已在上述技术方案的描述中详细说明, 此处不再赘述。 本实施例的基站控制器可以为 RNC或者 BSC。 本实施例中的基于 CRC辅 助判决的译码算法可以包括 PLVA、 SLVA等, 此处不再赘述。
本实施例中,基站控制器可以接收基站釆用基于 CRC辅助判决的译码 算法对第一子流进行译码处理后的译码比特流和 CRC校验结果,相比于现 有技术中釆用普通的 VA译码算法进行译码处理来说, 本实施例可以提高 对第一子流的译码性能, 而由于第一子流在语音质量中的重要性较高, 因 此, 本实施例可以通过提高第一子流的译码性能, 提高语音质量, 满足用 户对语音质量的更高要求。
在本发明另一个实施例中,在图 10所示方法实施例的步骤 102之后还 可以包括: 指示所述基站减少所述第一子流所占用的信道资源, 并增加所 述第二子流和第三子流所占用的信道资源。 该实施例的方法对应上述方案 一所述的方法, 其实现原理和技术效果类似, 此处不再赘述。
在本发明再一个实施例中,在图 10所示方法实施例的步骤 102之后还 可以包括: 降低所述外环功率控制模块的目标块误码率, 以使所述外环功 率控制模块向所述基站发送降低后的目标信噪比。 该实施例的方法对应上 述方案二所述的方法, 其实现原理和技术效果类似, 此处不再赘述。
下面对上述方案三的具体实现过程进行详细说明。
图 11为本发明语音信号处理方法实施例六的流程图, 如图 11所示, 本实施例的方法可以包括:
步骤 201、 接收基站发送的第一子流、 第二子流和第三子流的译码结 果, 其中, 第一子流的译码结果为釆用基于 CRC辅助判决的译码算法进行 译码处理后获取的译码结果且该译码结果中包括译码比特流和 CRC 校验 结果。
其中, CRC校验结果可以包括正确路径的 CRC校验结果和最佳路径 的 CRC校验结果, 所述译码比特流为正确路径上的译码比特流。
步骤 202、将最佳路径的 CRC校验结果发送给所述外环功率控制模块。 步骤 203、将正确路径上的译码比特流和正确路径的 CRC校验结果发 送给核心网。
步骤 204、 将第二子流和第三子流的译码结果发送给核心网。
步骤 202〜步骤 204之间可以没有先后的执行顺序。
本实施例,通过釆用双 CRC的方案,使得带有功率控制的语音处理系 统,例如 WCDMA系统等,不需要修改 Outer-Loop Power Control的 Target BLER, 也不需要修改三个子流间的速率匹配参数, 而是直接将基于 CRC 辅助判决的译码算法带来的性能增益转化为语音 MOS 分的增益。 由于第 一子流在 AMR语音中重要性最高, 本实施例可以在最大程度上提升语音 性能, 同时对现有系统影响最小。
需要说明的是, 宽带 AMR语音与部分窄带 AMR语音, 其 C子流的 比特数为 0。 尽管上述实施例仅以 C子流的比特数不为 0的窄带 AMR语 音为例进行说明, 本领域技术人员可以理解的是, 本发明实施例的技术方 案也同样适用于宽带 AMR语音以及 C子流的比特数为 0的窄带 AMR语 音, 其实现原理与上述实施例类似, 此处不再赘述。
图 12为本发明基站实施例一的结构示意图, 如图 12所示, 本实施例 的基站可以包括: 第一接收模块 1 1、译码处理模块 12和第一发送模块 13 , 其中, 第一接收模块 1 1 , 用于接收 UE发送的编码语音信号, 所述编码语 音信号包括第一子流、 第二子流和第三子流, 所述第一子流中包含 CRC; 译码处理模块 12用于釆用译码算法对所述第一子流、第二子流和第三子流 进行译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流 进行译码处理; 第一发送模块 13用于向基站控制器发送所述第一子流、第 二子流和第三子流的译码结果, 所述第一子流的译码结果中包括译码比特 流和 CRC校验结果。
本实施例的基站可以用于执行图 3所示方法实施例的方法, 其实现原 理和技术效果类似,此处不再赘述,本实施例中的基站可以为 BTS、 NodeB 或者 eNB。
图 13为本发明基站实施例二的结构示意图, 如图 13所示, 本实施例 的基站在图 12所示基站的基础上, 进一步地, 第一接收模块 11可以包括: 第一接收单元 111、 第二接收单元 1 12和第三接收单元 1 13 , 其中, 第一接 收单元 111用于接收所述第一子流; 第二接收单元 1 12用于接收所述第二 子流; 第三接收单元 113用于接收所述第三子流; 译码处理模块 12可以包 括: 第一译码处理单元 121、 第二译码处理单元 122和第三译码处理单元 123 , 其中, 第一译码处理单元 121用于釆用并行列举维特比译码算法对所 述第一子流进行译码处理, 获取多条候选路径上的译码结果, 应用所述 CRC对多条候选路径上的译码结果进行 CRC校验, 获取 CRC校验结果正 确路径上的译码结果以及该正确路径的 CRC校验结果和最佳路径的 CRC 校验结果, 所述最佳路径为釆用维特比译码算法确定的最大似然路径; 第 二译码处理单元 122用于釆用维特比译码算法对所述第二子流进行译码处 理, 获取译码结果; 第三译码处理单元 123用于釆用维特比译码算法对所 述第三子流进行译码处理, 获取译码结果; 第一发送模块 13可以包括: 第 一发送单元 131、 第二发送单元 132和第三发送单元 133 , 其中, 第一发送 单元 131 用于将所述第一译码处理单元获取的所述正确路径上的译码结 果、所述正确路径的 CRC校验结果以及最佳路径的校验结果发送给基站控 制器, 以使所述基站控制器将所述最佳路径的校验结果发送给外环功率控 制模块、将所述正确路径上的译码结果和 CRC校验结果发送给核心网; 第 二发送单元 132用于将所述第二译码处理单元获取的译码结果发送给所述 基站控制器; 第三发送单元 133用于将所述第三译码处理单元获取的译码 结果发送给所述基站控制器。
本实施例的基站可以用于执行上述方案三所描述的技术方案, 其具体 可以执行图 8所示方法实施例的方法, 其实现原理和技术效果类似, 此处 不再赘述。
图 14为本发明基站实施例三的结构示意图, 如图 14所示, 本实施例 的基站在图 12所示基站的基础上, 进一步地, 还包括: 信道资源控制模块 14 , 用于减少所述第一子流所占用的信道资源, 增加所述第二子流和第三 子流所占用的信道资源。
本实施例的基站可以用于执行上述方案一所描述的技术方案, 其具体 可以执行图 6所示方法实施例的方法, 其实现原理和技术效果类似, 此处 不再赘述。
图 15为本发明基站实施例四的结构示意图, 如图 15所示, 本实施例 的基站在图 12所示基站的基础上, 进一步地, 还包括: 内环功率控制模块 15 , 用于接收所述基站控制器发送的降低后的目标信噪比, 并根据所述目 标信噪比, 进行内环功率控制。
本实施例的基站可以用于执行上述方案二所描述的技术方案, 其具体 可以执行图 7所示方法实施例的方法, 其实现原理和技术效果类似, 此处 不再赘述。
图 16为本发明基站控制器实施例一的结构示意图, 如图 16所示, 本 实施例的基站控制器可以包括: 第二接收模块 21和第二发送模块 22 , 第 二接收模块 21用于接收基站发送的第一子流、第二子流和第三子流的译码 结果, 其中, 第一子流的译码结果为釆用基于循环卷积校验 CRC辅助判决 的译码算法进行译码处理后获取的译码结果且该译码结果中包括译码比特 流和 CRC校验结果;第二发送模块 22用于将所述 CRC校验结果发送给外 环功率控制模块,将所述第一子流的译码比特流和 CRC校验结果以及所述 第二子流和第三子流的译码结果发送给核心网。
本实施例的基站控制器可以用于执行上述图 10 所示方法实施例的技 术方案, 其实现原理和技术效果类似, 此处不再赘述。
图 17为本发明基站控制器实施例二的结构示意图,如图 17所示, CRC 校验结果包括正确路径的 CRC校验结果和最佳路径的 CRC校验结果, 译 码比特流为正确路径上的译码比特流, 所述最佳路径为釆用维特比译码算 法确定的最大似然路径;本实施例的基站控制器在图 16所示的基站控制器 的基础上, 进一步, 所述第二发送模块 22包括: 第四发送单元 221和第五 发送单元 222 , 其中, 第四发送单元 221用于将所述最佳路径的 CRC校验 结果发送给所述外环功率控制模块; 第五发送单元 222用于将所述正确路 径上的译码比特流和所述正确路径的 CRC校验结果发送给核心网,将所述 第二子流和第三子流的译码结果发送给所述核心网。
本实施例的基站控制器可以用于执行上述方案三所述的技术方案, 其 具体可以执行图 1 1所示的技术方案, 其实现原理和技术效果类似,此处不 再赘述。
图 18为本发明基站控制器实施例三的结构示意图, 如图 17所示, 本 实施例的基站控制器在图 16所示的基站控制器的基础上, 进一步地包括: 指示模块 23 , 用于指示所述基站减少所述第一子流所占用的信道资源, 并 增加所述第二子流和第三子流所占用的信道资源。
本实施例的基站控制器可以用于执行上述方案一所述的技术方案, 其 实现原理和技术效果类似, 此处不再赘述。
图 19为本发明基站控制器实施例四的结构示意图, 如图 18所示, 本 实施例的基站控制器在图 16所示的基站控制器的基础上, 进一步地包括: 参数控制模块 24, 用于降低所述外环功率控制模块的目标块误码率, 以使 所述外环功率控制模块向所述基站发送降低后的目标信噪比。
本实施例的基站控制器可以用于执行上述方案二所述的技术方案, 其 实现原理和技术效果类似, 此处不再赘述。
图 20为本发明接入网系统实施例的结构示意图, 如图 20所示, 本实 施例的接入网系统可以包括基站 1和基站控制器 2 , 其中, 基站 1可以釆 用图 12〜图 15任一所示的基站的结构, 其对应地可以执行图 3、 图 6〜8中 任一实施例所述的技术方案,基站控制器 2可以釆用图 16〜图 19任一所示 的基站的结构, 其可以执行图 10或图 11所示的技术方案, 其实现原理和 技术效果类似, 此处不再赘述。
本领域普通技术人员可以理解: 实现上述方法实施例的全部或部分步 骤可以通过程序指令相关的硬件来完成, 前述的程序可以存储于一计算机 可读取存储介质中, 该程序在执行时, 执行包括上述方法实施例的步骤; 而前述的存储介质包括: ROM、 RAM , 磁碟或者光盘等各种可以存储程序 代码的介质。
最后应说明的是: 以上实施例仅用以说明本发明的技术方案, 而非对 其限制; 尽管参照前述实施例对本发明进行了详细的说明, 本领域的普通 技术人员应当理解: 其依然可以对前述各实施例所记载的技术方案进行修 改, 或者对其中部分技术特征进行等同替换; 而这些修改或者替换, 并不 使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims

权 利 要 求
1、 一种语音信号处理方法, 其特征在于, 包括:
接收用户设备 UE发送的编码语音信号, 所述编码语音信号包括第一 子流、 第二子流和第三子流, 所述第一子流中包含循环卷积校验 CRC; 釆用译码算法对所述第一子流、 第二子流和第三子流进行译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一子流进行译码处理; 向基站控制器发送所述第一子流、 第二子流和第三子流的译码结果, 所述第一子流的译码结果中包括译码比特流和 CRC校验结果。
2、 根据权利要求 1所述的方法, 其特征在于, 所述基于 CRC辅助判 决的译码算法为列举维特比译码算法或者比特反转译码算法。
3、 根据权利要求 2所述的方法, 其特征在于, 所述列举维特比译码算 法为并行列举维特比译码算法或者串行列举维特比译码算法。
4、 根据权利要求 3所述的方法, 其特征在于, 所述并行列举维特比译 码算法为包括 2条、 4条、 6条、 8条、 12条或者 16条候选路径的并行列 举维特比译码算法。
5、 根据权利要求 1〜4 中任一权利要求所述的方法, 其特征在于, 所 述釆用基于 CRC 辅助判决的译码算法对所述第一子流进行译码处理, 包 括:
釆用基于 CRC 辅助判决的译码算法, 获取多条候选路径上的译码结 果,应用所述 CRC对多条候选路径上的译码结果进行 CRC校验,获取 CRC 校验结果正确路径上的译码结果以及该正确路径的 CRC 校验结果和最佳 路径的 CRC校验结果,所述最佳路径为釆用维特比译码算法确定的最大似 然路径;
向基站控制器发送所述第一子流的译码结果, 包括:
向所述基站控制器发送所述正确路径上的译码结果、 所述正确路径的
CRC校验结果以及最佳路径的校验结果, 以使所述基站控制器将所述最佳 路径的校验结果发送给外环功率控制模块、 将所述正确路径上的译码结果 和 CRC校验结果发送给核心网。
6、 根据权利要求 1〜4 中任一权利要求所述的方法, 其特征在于, 还 包括:
减少所述第一子流所占用的信道资源, 增加所述第二子流和第三子流 所占用的信道资源。
7、 根据权利要求 6所述的方法, 其特征在于, 所述减少所述第一子流 所占用的信道资源, 增加所述第二子流和第三子流所占用的信道资源, 包 括:
减小所述第一子流的速率匹配参数, 增大所述第二子流和第三子流的 速率匹配参数。
8、 根据权利要求 1〜4 中任一权利要求所述的方法, 其特征在于, 还 包括:
接收所述基站控制器发送的降低后的目标信噪比, 并根据所述目标信 噪比, 进行内环功率控制。
9、 一种语音信号处理方法, 其特征在于, 包括:
接收基站发送的第一子流、 第二子流和第三子流的译码结果, 其中, 第一子流的译码结果为釆用基于循环卷积校验 CRC 辅助判决的译码算法 进行译码处理后获取的译码结果且该译码结果中包括译码比特流和 CRC 校验结果;
将所述 CRC校验结果发送给外环功率控制模块,将所述第一子流的译 码比特流和 CRC 校验结果以及所述第二子流和第三子流的译码结果发送 给核心网。
10、 根据权利要求 9所述的方法, 其特征在于, 所述 CRC校验结果包 括正确路径的 CRC校验结果和最佳路径的 CRC校验结果, 所述译码比特 流为正确路径上的译码比特流, 所述最佳路径为釆用维特比译码算法确定 的最大似然路径;
将所述 CRC校验结果发送给外环功率控制模块, 包括: 将所述最佳路径的 CRC校验结果发送给所述外环功率控制模块; 将所述第一子流的译码比特流和 CRC校验结果发送给核心网, 包括: 将所述正确路径上的译码比特流和所述正确路径的 CRC 校验结果发 送给核心网。
11、 根据权利要求 9所述的方法, 其特征在于, 还包括:
指示所述基站减少所述第一子流所占用的信道资源, 并增加所述第二 子流和第三子流所占用的信道资源。
12、 根据权利要求 9所述的方法, 其特征在于, 还包括:
降低所述外环功率控制模块的目标块误码率, 以使所述外环功率控制 模块向所述基站发送降低后的目标信噪比。
13、 一种基站, 其特征在于, 包括:
第一接收模块, 用于接收用户设备 UE发送的编码语音信号, 所述编 码语音信号包括第一子流、 第二子流和第三子流, 所述第一子流中包含循 环卷积校验 CRC;
译码处理模块, 用于釆用译码算法对所述第一子流、 第二子流和第三 子流进行译码处理, 其中, 釆用基于 CRC辅助判决的译码算法对所述第一 子流进行译码处理;
第一发送模块, 用于向基站控制器发送所述第一子流、 第二子流和第 三子流的译码结果,所述第一子流的译码结果中包括译码比特流和 CRC校 验结果。
14、 根据权利要求 13所述的基站, 其特征在于, 所述第一接收模块, 包括:
第一接收单元, 用于接收所述第一子流;
第二接收单元, 用于接收所述第二子流;
第三接收单元, 用于接收所述第三子流;
所述译码处理模块, 包括:
第一译码处理单元, 用于釆用并行列举维特比译码算法对所述第一子 流进行译码处理, 获取多条候选路径上的译码结果,应用所述 CRC对多条 候选路径上的译码结果进行 CRC校验, 获取 CRC校验结果正确路径上的 译码结果以及该正确路径的 CRC校验结果和最佳路径的 CRC校验结果, 所述最佳路径为釆用维特比译码算法确定的最大似然路径;
第二译码处理单元, 用于釆用维特比译码算法对所述第二子流进行译 码处理, 获取译码结果;
第三译码处理单元, 用于釆用维特比译码算法对所述第三子流进行译 码处理, 获取译码结果;
所述第一发送模块, 包括:
第一发送单元, 用于将所述第一译码处理单元获取的所述正确路径上 的译码结果、所述正确路径的 CRC校验结果以及最佳路径的校验结果发送 给基站控制器, 以使所述基站控制器将所述最佳路径的校验结果发送给外 环功率控制模块、将所述正确路径上的译码结果和 CRC校验结果发送给核 心网;
第二发送单元, 用于将所述第二译码处理单元获取的译码结果发送给 所述基站控制器;
第三发送单元, 用于将所述第三译码处理单元获取的译码结果发送给 所述基站控制器。
15、 根据权利要求 13所述的基站, 其特征在于, 还包括:
信道资源控制模块, 用于减少所述第一子流所占用的信道资源, 增加 所述第二子流和第三子流所占用的信道资源。
16、 根据权利要求 13所述的基站, 其特征在于, 还包括:
内环功率控制模块, 用于接收所述基站控制器发送的降低后的目标信 噪比, 并根据所述目标信噪比, 进行内环功率控制。
17、 一种基站控制器, 其特征在于, 包括:
第二接收模块, 用于接收基站发送的第一子流、 第二子流和第三子流 的译码结果, 其中, 第一子流的译码结果为釆用基于循环卷积校验 CRC辅 助判决的译码算法进行译码处理后获取的译码结果且该译码结果中包括译 码比特流和 CRC校验结果;
第二发送模块, 用于将所述 CRC校验结果发送给外环功率控制模块, 将所述第一子流的译码比特流和 CRC 校验结果以及所述第二子流和第三 子流的译码结果发送给核心网。
18、 根据权利要求 17所述的基站控制器, 其特征在于, 所述 CRC校 验结果包括正确路径的 CRC校验结果和最佳路径的 CRC校验结果, 所述 译码比特流为正确路径上的译码比特流, 所述最佳路径为釆用维特比译码 算法确定的最大似然路径; 所述第二发送模块, 包括:
第四发送单元,用于将所述最佳路径的 CRC校验结果发送给所述外环 功率控制模块;
第五发送单元, 用于将所述正确路径上的译码比特流和所述正确路径 的 CRC校验结果发送给核心网,将所述第二子流和第三子流的译码结果发 送给所述核心网。
19、 根据权利要求 17所述的基站控制器, 其特征在于, 还包括: 指示模块, 用于指示所述基站减少所述第一子流所占用的信道资源, 并增加所述第二子流和第三子流所占用的信道资源。
20、 根据权利要求 17所述的基站控制器, 其特征在于, 还包括: 参数控制模块, 用于降低所述外环功率控制模块的目标块误码率, 以 使所述外环功率控制模块向所述基站发送降低后的目标信噪比。
21、 一种接入网系统, 其特征在于, 包括: 基站和基站控制器, 所述 基站釆用权利要求 13〜16中任一项所述的基站, 所述基站控制器釆用权利 要求 17〜20中任一项所述的基站控制器。
PCT/CN2011/074801 2011-05-27 2011-05-27 语音信号处理方法、装置和接入网系统 WO2011144112A2 (zh)

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