WO2011113291A1 - 基于jpeg2000标准的高速实时处理算术熵编码系统 - Google Patents

基于jpeg2000标准的高速实时处理算术熵编码系统 Download PDF

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WO2011113291A1
WO2011113291A1 PCT/CN2010/080593 CN2010080593W WO2011113291A1 WO 2011113291 A1 WO2011113291 A1 WO 2011113291A1 CN 2010080593 W CN2010080593 W CN 2010080593W WO 2011113291 A1 WO2011113291 A1 WO 2011113291A1
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probability
value
symbol
normalization
type
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French (fr)
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刘凯
王柯俨
李云松
曾伟
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西安电子科技大学
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91—Entropy coding, e.g. variable length coding [VLC] or arithmetic coding

Definitions

  • the invention belongs to the technical field of image processing, and relates to compression coding, in particular to an arithmetic entropy coding system involving high-speed real-time processing, which is used for image compression coding of various digital devices, especially high-speed real-time satellite image compression coding.
  • Background technique
  • the existing still image compression standard JPEG can no longer meet the requirements of current practical applications, for which the International Organization for Standardization In November 2000, a new still image compression standard JPEG2000 was developed.
  • One of the core technologies of the standard is to use the arithmetic entropy coding method to encode the wavelet transformed data to achieve image data compression processing.
  • the basic encoding process of JPEG2000 can be simply described as follows: First, the input image is subjected to discrete wavelet transform, and the wavelet transformed data is called wavelet coefficient; then the wavelet coefficients are quantized and encoded in units of code blocks, and the size of the code block is usually 32x32. Or 64x64; in the encoding process, the corresponding context model is established in the order of the wavelet coefficient bit plane, and the context symbol pair is provided to the arithmetic entropy encoder for encoding processing, thereby obtaining the encoded data of the corresponding code block; finally, according to the preset compression ratio , selectively outputting the encoded data corresponding to each code block, and completing the encoding process of the single image.
  • the input of the arithmetic entropy encoder is a context symbol pair CXD, including a context label CX and a context decision D, and the output thereof is a corresponding compressed code stream, where CX represents a context label generated by the current encoded pixel, and the value ranges from 0-18. D represents the decision of the corresponding context, and the value ranges from 0-1.
  • the arithmetic entropy encoder adaptively selects the probability of the corresponding decision D according to the input context label CX, and prepares the encoded symbol value according to the value of the decision D, that is, the large probability symbol MPS and the small probability symbol LPS, and the small probability symbol LPS.
  • the probability Qe then adjust the corresponding probability interval value, and output the encoded value to the code value register.
  • the probability interval value is represented by a 16-bit unsigned integer
  • the code value register is 32 bits, and is divided into 5 different fields, that is, the 31st to 28th bits represent 4 Bit zero data, the 27th bit represents the "carry" bit, the 26th to 19th bits represent the coded output bit, the 18th to 16th bits represent the 3-bit split bit used to block the carry propagation, and the 15th to the 0th bit represent the decimal of the code value. Bit.
  • the arithmetic entropy coder is implemented as an array of 47 indices, called the probability estimate table PET, where each entry corresponds to a Qe value of a 16-bit LPS symbol.
  • the context label CX corresponding to the current coding symbol is used as an address to access an array of size 19 X 6 to obtain an entry index Index of the probability estimation table PET, and then the corresponding LPS in the PET table is read by using the Index as the address.
  • the symbol probability value Qe is combined with the current probability interval value and the code value to determine the specific coding process. If the current probability interval value is less than or equal to 0.75, the value corresponds to 0x8000 in hexadecimal.
  • the probability interval value and the code value need to be normalized, and the probability is made by shifting the probability interval value and the code value to the left.
  • the interval is greater than 0x8000.
  • the code stream in the code value constitutes an entire byte
  • the code stream output process is performed, that is, the final coded output code stream is obtained.
  • the transfer of the carry is truncated by setting a specific bit fill.
  • the second and third are Chinese Taiwanese scholars K.-K. Ong and Jen-Shiun Chiang respectively in 2002 Int. Conf. Image Process. (ICIP, 02) and 2004 IEEE Int. Symp. Circuits and Systems International "A high throughput low cost context-based adaptive arithmetic codec for multiple standards” (2002, vol.1, pp.1872 - 1875) and "High-speeds EBCOT with dual context-modeling coding architecture for JPEG2000"
  • the high-speed arithmetic entropy coding structure proposed in (2004, vol. 3, pp. 865-868.) has a throughput rate of one context symbol pair for a single clock.
  • the sixth is a domestic article by some scholars such as Hualin et al. in the 2003 issue of Solid State Electronics Research and Progress, "VLSI Implementation of a High-Speed MQ Encoder for JPEG2000" (Vol. 23, 2003)
  • the structure adopts dynamic pipeline technology, and the processing speed is 0.625 context symbol pairs for a single clock, and the encoding speed is low.
  • the seventh is the article "VLSI Design of a High-Speed and Area-Efficient JPEG2000 Encoder" published by Mei Kuizhi et al. in the IEEE Trans, on Circuits and System for Video Technology 2007 (Vol. 17, 2007)
  • the arithmetic entropy coding structure given in the 8th issue, pages 1065-1078) uses the multi-input synchronous pipeline technology to implement arithmetic entropy coding.
  • the processing speed is 0.625 context symbol pairs processed by a single clock, and the coding speed is low.
  • the above seven high-speed arithmetic entropy coding hardware implementation structures have the following drawbacks: If the implementation complexity is low, the processing speed is also low, such as structures six and seven; if the processing speed is increased, the implementation complexity increases sharply, such as a structure. One to five. Summary of the invention
  • the object of the present invention is to avoid the above-mentioned deficiencies of the prior art and to provide a high-speed real-time processing arithmetic entropy coding system based on the JPEG2000 standard, so as to improve the processing speed of the coding system while maintaining the same complexity.
  • the high-speed real-time processing arithmetic entropy coding system based on the JPEG2000 standard of the present invention comprises: a probability interval value predictor, determining a coding symbol type according to a double context symbol pair formed by a context label and a context decision in parallel input, And according to the coding symbol type, the probability interval value and the coding necessary parameter are updated and output; the code value predictor, according to the above code character The number type updates the code value, determines the current normalization type according to the updated probability interval value and the encoding parameter, and performs normalization processing, and outputs the normalized code stream and the empty code stream; the code stream buffer And classifying and buffering the normalized code stream and the empty code stream according to the output sequence of the normalized code stream and the empty code stream according to the sequence of outputting the code stream, and outputting in parallel; and outputting The selector sequentially serially outputs the normalized code stream and the empty code stream output in parallel in the code stream buffering step in a pre
  • the coding necessary parameters in the above probability interval value predictor include symbol probability, normalization process identification, and two shift count values required to calculate the output code value.
  • the probability interval value predictor includes: a dual port index memory for storing an index table; and a processing unit selector for reading, from the index table, a double probability symbol identifier respectively corresponding to the double context label of the dual context symbol pair; And determining, according to the double-high probability symbol identifier and the double context decision of the dual context symbol pair, a probability type of the double context symbol pair; the context label determiner, determining the similarity and difference of the context label according to the input double context label; and processing And jointly determining the type of the pair of double context symbols according to the similarities and differences of the context labels and the probability types of the pair of double context symbols, and respectively updating the probability interval values according to the types of the pair of double context symbols.
  • the probability interval value predictor further includes an index storage address generator, the index storage address generator receiving an index update signal generated by the processor during the encoding process and input through the data input bus, generating an updated index value for providing to the dual port index memory And updating and writing the location corresponding to the context address inside the dual port index memory.
  • the dual-port index memory uses an on-chip dual-port memory, and the address of the dual-port index memory is an input first context label and a second context label, and the first corresponding to the context label is obtained according to an index table generated by the index storage address generator.
  • a large probability label and a second largest probability label, and corresponding first index value and second index value, are connected to the processor through the data input bus.
  • the probability interval value predictor further includes a PET memory, the PET memory adopts a read-only memory, and the probability value and the auxiliary information of the required index are read according to the input first index value and the second index value, and are transmitted through the data input bus. Give the processor.
  • the processor has a plurality of processing units corresponding to types of dual context symbol pairs; the input ends of the processing units are respectively connected to the processing unit selector, the context label determiner, and the output signal of the PET memory through a data input bus.
  • the coding probability interval value, the code value shift count value, the symbol probability calculation, and the normalization process identification are independently performed, and the result is output through the data output bus.
  • the code value predictor includes: leading zero decision logic that determines the number of zeros included in the highest bit of the current probability interval value based on the probability interval value input from the probability interval value predictor, and provides parameters for subsequent calculation.
  • the normalization type determiner determines the current normalization type according to the probability interval value and the necessary parameters input from the probability interval value predictor; the code value update calculator, according to the probability interval value input from the probability interval value predictor And the necessary parameters, updating and outputting the current code value stored in the code value register; and the plurality of normalizers respectively performing normalization processing according to the current normalization type determined by the normalization type determiner, And outputting the normalized code stream; and draining the processor, when there is no input signal, performing the emptying process, and outputting the empty code stream.
  • the code stream buffer includes a byte output checker and a plurality of first-in first-out buffers, and the byte output checker sequentially writes the bytes outputted by the input normalized code stream and the empty code stream into multiple The first-in first-out buffer and the byte output are output, and the byte output is output to the output selector through the first-in first-out buffer.
  • the output selector reads the encoded code stream in each of the first-in first-out buffers according to the priority order of the first-in first-out buffers in the code stream buffer and performs serial output.
  • the invention adopts a plurality of different processing units in the probability interval value predictor to perform effective double context coding symbol predictive coding, so that each possible double context coding symbol input condition is enumerated one by one, making full use of the double
  • the degree of parallelism of the context coding symbol processing completely avoids the coding system stall caused by the same context label; and because the invention adopts different types of normalization processors, parallel processing of different forms of normalization operations is realized, thereby Overcome complex operations and serialization operations due to different types of normalization operations.
  • the present invention realizes the arithmetic entropy coding of the double-context symbol pair in a single clock, and ensures the continuous stream processing of the double context symbol, the coding speed and efficiency are significant under the condition that the implementation complexity is not increased. Improvement, in the field of high-speed real-time image coding, such as high-speed digital cameras, image retrieval, high-speed satellite remote sensing image coding, battlefield monitoring and other civil and military applications have great application value.
  • Figure 1 is a block diagram of the system of the present invention
  • 2 is a structural diagram of a probability interval value predictor in the system of the present invention
  • Figure 3 is a structural diagram of a code value predictor in the system of the present invention.
  • FIG. 4 is a structural diagram of a code stream buffer in the system of the present invention.
  • FIG. 5 is an overall timing diagram of the present invention. detailed description
  • the key to the technology of the present invention is to predict the coding symbols of the arithmetic entropy coding system, and implement a two-symbol parallel coding by using a specific probability prediction table structure to improve the coding speed and efficiency.
  • the encoding system is implemented on Xilinx's XC2V3000-6BG728 FPGA using Xilinx ISE 9.1 integrated development software and VHDL, Verilog HDL language.
  • the high-speed real-time processing arithmetic entropy coding system based on the JPEG2000 standard proposed by the present invention includes: a probability interval value predictor, a code value predictor, a code stream buffer and an output selector.
  • the probability interval value predictor first determines the coded symbol type according to the first context symbol pair (CX0, DO) and the second context symbol pair (CX1, D1) input in parallel, and uses different processing units for different types of coded symbols.
  • the code value predictor determines the type of the current normalization according to the input probability interval value and the coding necessary parameter; in the case of the double coded symbol, the normalized type is divided into a single normalization and a second-order normalization. And the second-class double-order normalization, and correspondingly update the code values according to different coding symbol types; for different normalization types, respectively adopt the corresponding normalization processor pair probability region values and code values Normalization operation, in the normalization process, the shift values NumSLAO and NumSLAl are used to determine the number of times the code value is shifted to the left; after the normalization operation, a single normalized code stream is formed correspondingly, A double normalized code stream and a second type of double normalized code stream.
  • the encoded code stream retained in the code value register forms the last empty code stream.
  • the three normalized code streams are output to the code stream buffer together with the empty code stream.
  • the double-encoded symbol pair is edited once.
  • the code is to generate an output stream of at least 0 bytes and at most 4 bytes.
  • the code stream buffer according to the output byte count value of the input four-way coded stream, respectively writes each code stream into four FIFO buffers for buffering, respectively forming a byte output 0.
  • byte output 1 byte output 2 and byte output 3 are four output code streams, and the four output code streams are output to the output selector in parallel.
  • Output selector complete parallel-to-serial conversion of the input code stream, that is, according to the empty state of four independent first-in first-out buffers in the code stream buffer, sequentially read the codes in the corresponding buffers according to a specific priority order flow Stream, which forms the final stream of serial output.
  • the specific output process is as follows: The output selector sequentially queries the empty state of each FIFO buffer according to the order from the first to the fourth buffers. If an output buffer is not empty, that is, there is internal data, the output is output. The data in the buffer is then subjected to the query output process of the next buffer state until all the buffers have been queried for output.
  • the probability interval value predictor of the present invention includes a dual port index memory, an index memory address generator, a processing unit selector, a context label determiner, a processor, a PET memory, and a checker.
  • the index storage address generator is unidirectionally connected with the dual port index memory; the input end of the processing unit selector is respectively connected with the context decision and the high probability label generated by the dual port index memory, and the output enable signal is output through the data input bus.
  • the processor; the context label determiner and the output of the PET memory are both connected to the processor via a data bus; the processor is coupled to the selector via a data output bus. among them:
  • the dual-port index memory is an on-chip dual-port memory for storing an index table generated by an index storage address generator.
  • the context ranges from 0 to 18, and the index ranges from 0 to 46. It can be represented by 6 bits, which is used for adaptive probability state transition.
  • the value of the large probability symbol MPS decision of the context is 0-1, which can be expressed by 1 bit, which is used to represent the value of the current large probability symbol, so the dual port index memory
  • the storage space size is 19x7 bits, where the upper 6 bits represent the context index and the lowest bit represents the MPS symbol decision.
  • the dual-port index memory uses the input first context label CX0 and the second context label CX1 as addresses, and respectively reads the first index value IndexO and the second index value Index1 corresponding to the context label according to the index table, and the corresponding A large probability label MPS-CX0 and a second high probability label MPS-CX1, and the two values are passed to the processor through the data input bus, and the two large probability labels are output to the processing unit selector.
  • the processing unit selector determines the probability type of the pair of double context symbols based on the two large probability labels input and the first context decision DO and the second context decision D1.
  • the probability types include a double probability symbol MPSMPS, a large probability/small probability symbol MPSLPS, a small probability/large probability symbol LPSMPS, and a double small probability symbol LPSLPS, which are represented by a 2-bit binary bit string.
  • the probability type of the dual context symbol pair is determined to be a double probability symbol MPSMPS;
  • the probability type of the dual context symbol pair is determined to be a large probability/small probability Symbol MPSLPS;
  • the probability type of the dual context symbol pair is determined to be a small probability/high probability symbol LPSMPS ;
  • Type enable signals corresponding to the above four probability types include double probability enable MpsMps-En, high probability/small probability enable MpsLps-En, small probability/high probability LpsMps-En and double small probability enable LpsLps-En These enable signals are coupled to the processor through a data input bus for controlling a particular processing unit in the strobe processor for prediction of probability interval values.
  • the context label determiner determines whether the input first context label CX0 and the second context label CX1 are the same, and outputs the distinct indication signal DIFF and the same indication signal SAME as a result of the determination to the processor through the data bus. Also used to control a particular processing unit in the gating processor for prediction of probability interval values. Specifically, if the first context label CX0 is equal to the second context label CX1, it is determined that the double context label is the same, and is represented by the same indication signal SAME. Otherwise, it is determined that the double context label is different, and the distinct indication signal DIFF is used. To represent.
  • the processor comprises 8 processing units, which are a small probability/large probability symbol dissimilar processing unit, a double small probability symbol dissimilar processing unit, a double large probability symbol dissimilar processing unit, and a large probability/small probability symbol dissimilar processing unit. , small probability / large probability symbol same processing unit, double small probability symbol same processing The unit, the double-high probability symbol, the same processing unit, and the large probability/small probability symbol, the same processing unit; the 8 processing units respectively correspond to 8 types of double-encoded symbols. That is, the processor performs update calculation of the probability interval value according to different coding symbol types, and the probability interval value is stored in a register.
  • the processor validates the corresponding processing unit according to the type of the encoded symbol obtained by the similarity and difference of the context label and the probability type of the pair of double context symbols.
  • the double context symbol pair type is small probability/high probability symbol is different, making the small probability/high probability symbol
  • the distinct processing unit is effective to process it;
  • the double context symbol pair type is a double small probability symbol, so that the double small probability symbol dissimilar processing unit is effective. Make it processed;
  • the double context symbol pair type is a large probability/small probability symbol, which makes the large probability/small probability symbol
  • the distinct processing unit is effective to process it;
  • the double context symbol pair type is the same as the small probability/large probability symbol, so that the small probability/large probability symbol is treated the same
  • the unit is valid for processing
  • the double context symbol pair type is the same as the double small probability symbol, so that the double small probability symbol is the same as the processing unit is valid deal with;
  • the double context symbol pair type is the same as the large probability/small probability symbol, so that the large probability/small probability symbol is treated the same.
  • the unit is valid for processing
  • the processor also calculates a first small probability symbol probability value Qe0 corresponding to the first index value Index0 corresponding to the first context label CX0, and a second small probability symbol probability corresponding to the second index value Index1 corresponding to the second context label CX1.
  • the processing unit predicts the probability interval value, according to the input first index value Index0 and the second index value Index1, the probability value of the required corresponding small probability symbol LPS and the auxiliary information are read out from the PET memory through the input data bus. .
  • the processor sends an index update signal update_index to the index storage address generator through the data input bus to generate an updated index value new_index, and controls the dual port index memory to receive the The update index value is written to the corresponding location in the memory.
  • the output probability interval value A the normalization process identifier RenormTag.
  • the first probability interval value shift count value NumSLAO, the second probability interval value shift count value NumSLAl, the first small probability symbol probability The value QeO and the second small probability symbol probability value Qel are connected to the selector through the data output bus and output to the code value predictor by the checker.
  • the normalization process identifier RenormTag represents a probability type of a pair of double context symbols, that is, 0 represents a double small probability symbol, 1 represents a double large probability symbol, 2 represents a large probability/small probability symbol, and 3 represents a small probability/large probability symbol.
  • the code value predictor of the present invention includes leading zero decision logic, normalized type determiner, code (C) value update calculator, single normalizer, one type of double normalizer, two Class double-homogenizers, checkers, code value registers, and drain processors.
  • the input data of the code value predictor is connected to the leading zero decision logic, the normalization type determiner, the code value update calculator and the checker via the data input bus.
  • the normalization type judging device judges the current normalization type, and selects the corresponding normalization processor for encoding output.
  • the normalization types include zero normalization, single normalization, one type of double normalization, and two types of double normalization. For zero-order normalized type code values, no normalization processing, no corresponding code stream output; code values for single normalization, one-class double-order normalization, and two-class double-normalization type , normalized separately.
  • the present invention simultaneously encodes pairs of double-encoded symbols, the corresponding number of normalizations should be one or two times, and according to the probability type of the encoded symbols, the two normalization processes can be further divided into two categories. Therefore, in the code value predictor, three different types of normalizers, a single normalizer, a second-order normalizer, and a second-class double-homalizer, are respectively processed.
  • the code value update calculator controls the checker to select the input symbol probability value Qe or 0 value, and then accumulates with the code value register to realize the update operation of the code value register, and the updated code value is respectively sent to three Normalizers and emptying processors.
  • the leading zero decision logic is respectively connected to the input ends of the three normalizers for determining the number of zeros included in the highest bit of the current probability interval value, and providing parameters for subsequent calculations.
  • the selected normalizer then performs an operational judgment on the code stream position that should be output in the code value, and outputs the arithmetically encoded code stream from the corresponding normalizer.
  • the valid code stream remaining in the code value register is output by the emptying processor.
  • the code value update calculator updates the code value and determines the code value to shift the count value to the left.
  • the RenormTag is identified according to the input normalization process. If the first context symbol pair is a large probability symbol, that is, the RenormTag is 1 or 2, the sum of the second small probability symbol probability value Qel and the current code value C is calculated. , and update the code value C to the sum value; otherwise, keep the code value C unchanged.
  • determining the code value left shift count value CT in the following manner, that is, if the code value normalization process is performed on the context symbol pair for the first time, the CT is assigned according to the initialization method given by the JPEG2000 standard, otherwise, the CT is maintained. The value does not change.
  • the process of determining the current normalization type by the normalization type determiner is as follows.
  • Step S11 If the probability interval value A is less than twice the first small probability symbol probability value QeO, step S12 is performed; otherwise, step S14 is performed;
  • Step S12 Adjusting the first small probability symbol probability value QeO, that is, shifting Qe0 to the left until QeO is greater than or equal to the hexadecimal value 0x8000, if the adjusted first small probability symbol probability value SHIFT_V(Qe0) is smaller than The second small probability symbol probability value Qel is twice, then the normalization type is a class of double normalization, otherwise, step S13 is performed;
  • Step S13 If the difference between the adjusted first small probability symbol probability value SHIFT_V(Qe0) and the second small probability symbol probability value Qel is less than the hexadecimal value 0x8000, the normalization type is the second type double Secondary normalization, otherwise, the normalization type is single normalization;
  • Step S14 If the difference between the probability interval value A and the first small probability symbol probability value QeO is less than the hexadecimal value 0x8000, step S15 is performed; otherwise, step S17 is performed;
  • Step S15 adjusting the difference between the probability interval value A and the first small probability symbol probability value QeO, if the adjusted difference SHIFT_V(A-QeO) is less than twice the first small probability symbol probability value QeO, Then the normalization type is a type of double normalization; otherwise, step S16 is performed;
  • Step S16 If the adjusted difference SHIFT_V(A-QeO) is smaller than the sum of the second small probability symbol probability value Qel and the hexadecimal value 0x8000, the normalization type is the second class double normalization; Otherwise, the normalization type is a single normalization;
  • Step S17 If the difference between the probability interval value A and the first small probability symbol probability value QeO is less than twice the second small probability symbol probability value Qel, the normalization type is a single normalization; otherwise, step S18 is performed. ;
  • Step S18 If the difference between the probability interval value A and the first small probability symbol probability value QeO is smaller than the sum of the second small probability symbol probability value Qel and the hexadecimal value 0x8000, the normalization type is a single normalization Otherwise, the normalized type is zero normalized.
  • Step S21 If the probability interval value A is less than twice the first small probability symbol probability value QeO, then step S22 is performed; otherwise, step S23 is performed;
  • Step S22 Adjust the first small probability symbol probability value QeO, that is, shift Qe0 to the left until QeO is greater than or equal to the hexadecimal value 0x8000. If the adjusted first small probability symbol probability value SHIFT_V(Qe0) is less than twice the second small probability symbol probability value Qel, the normalization type is a second type of double normalization; otherwise, the normalization type is one Class double normalization;
  • Step S23 If the difference between the probability interval value A and the first small probability symbol probability value QeO is less than the hexadecimal value 0x8000, step S24 is performed; otherwise, the normalization type is single normalization;
  • Step S24 adjusting the difference between the probability interval value A and the first small probability symbol probability value QeO, if the adjusted difference SHIFT_V(A-QeO) is less than twice the first small probability symbol probability value QeO,
  • the normalized type is a type of double normalization; otherwise, the normalized type is a second-class double normalization.
  • Step S31 If the probability interval value A is less than twice the first small probability symbol probability value QeO, step S32 is performed; otherwise, step S34 is performed;
  • Step S32 If the difference between the probability interval value A and the first small probability symbol probability value QeO is adjusted to be less than twice the second small probability symbol probability value Qel, the normalization type is a type of double normalization; Otherwise, step S33 is performed;
  • Step S33 adjusting the difference between the probability interval value A and the first small probability symbol probability value QeO, if the adjusted difference SHIFT_V(A-QeO) is smaller than the second small probability symbol probability value Qel and the hexadecimal
  • the normalized type is a second-class double normalization; otherwise, the normalization type is a single normalization;
  • Step S34 Adjusting the first small probability symbol probability value QeO, if the adjusted first small probability symbol probability value SHIFT_V(Qe0) is less than twice the second small probability symbol probability value Qel, the normalization type For the second type of double normalization; otherwise, step S35;
  • Step S35 If the difference between the adjusted first small probability symbol probability value SHIFT_V (Qe0) and the second small probability symbol probability value Qel is less than the hexadecimal value 0x8000, the normalization type is a class of double normalization Normalization; otherwise, the normalization type is a class of double normalization.
  • Each normalization processor performs corresponding normalization processing on the code values under the single normalization type, the first-class normalization type, and the second-class double-normalization type according to the normalization type. And generate a corresponding normalized code stream.
  • the code value is subjected to a single normalization process by a single normalizer, and the specific implementation is as follows with reference to FIG.
  • Step 41 If the first probability interval value shift count value NumSLAO or the second probability interval value shift count value NumSLAl is smaller than the code value left shift count CT, the code value C is shifted to the left by NumSLAO or NumSLAl times, and there is no corresponding single-time normalization. Streaming the stream output, ending the current normalization process; otherwise, performing step 42;
  • Step 42 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set the code value temporary left shift count value NewCT to 7, and then perform step 45; otherwise, execute Step 43; Step 43: If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value OxFE, perform step 44; otherwise, set the code value temporary left shift count value NewCT to 8, and then perform the step Step 45;
  • Step 44 If the current code value C is greater than or equal to the hexadecimal value 0x8000000, set the code value temporary left shift count value NewCT to 7, otherwise set NewCT to 8; then perform step S45; Step 45: shift the code value C to the left NumSLAO-CT times, then perform step 46;
  • Step 46 If the difference between the first probability interval value shift count value NumSLAO or the second probability interval value shift count value NumSLAl and the code value left shift count value CT is greater than or equal to 0, and is less than the code value temporary left shift count value NewCT, single byte output; otherwise two bytes output.
  • Step S51 If NumSLAO-CT is less than zero, step S52 is performed; otherwise, steps are performed.
  • Step S52 If NumSLAl-(CT-NumSLAO) is less than zero, shift the code value C to the left by NumSLAO+NumSLAl times, and then end the current normalization process; otherwise, execute step S521;
  • Step S521 shift the code value C to the left by NumSLAO times, and update the NewCT with NewCT-NumSLAO, and then perform step S522;
  • Step S522 If NumSLAl-NewCT is greater than or equal to zero, shift the code value C to the left by NewCT times, and then perform step S523; otherwise, end the current normalization process;
  • Step S523 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set NewCT to 7, and then execute step S526; otherwise, execute step S524;
  • Step S524 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFE, step S525 is performed; otherwise, setting NewCT to 8, step S526;
  • Step S525 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then execute step S526;
  • Step S526 If the difference between NumSLAl and CT is smaller than NewCT, then a single byte output is performed, and then the current normalization process is ended; otherwise, two byte outputs are performed, and then the current normalization process is ended; Step S53: shifting the code value C to the left by CT times, and executing step S531;
  • Step S531 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, setting NewCT to 7, performing step S534; otherwise, executing step S532;
  • Step S532 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFE, step S533 is performed; otherwise, setting NewCT to 8, step S534 is performed;
  • Step S533 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; and execute step S534;
  • Step S534 If the difference between the shift count NumSLAO and the CT is less than NewCT, step S535 is performed, otherwise step S5310 is performed;
  • Step S535 If the difference between the NumSLAl and the CT is less than zero, the single byte output is performed, and then the current normalization process is ended; otherwise, step S536 is performed;
  • Step S536 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set NewCT to 7, and then execute step S539; otherwise, execute step S537;
  • Step S537 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFE, step S538 is performed; otherwise, NewCT is set to 8, and then step S539 is performed;
  • Step S538 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then perform step S539;
  • Step S539 If the difference between the shift count NumSLAl and the CT is smaller than NewCT, the byte output is performed twice, and then the current normalization process is ended; otherwise, the three-byte output is performed, and then the current normalization process is ended;
  • Step S5310 If the difference between the NumSLAl and the CT is less than zero, the byte output is performed twice, and then the current normalization process is ended; otherwise, step S5311 is performed;
  • Step S5311 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set NewCT to 7, and then execute step S5314; otherwise, execute step S5312;
  • Step S5312 If the last double context symbol pair is the last of the normalized code stream generated One byte is hexadecimal value 0xFE, step S5313 is performed; otherwise, NewCT is set to 8, and then step S5314 is performed;
  • Step S5313 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set
  • NewCT is 7, otherwise, set NewCT to 8; then perform step S5314;
  • Step S5314 If the difference between NumSLAl and CT is smaller than NewCT, the output is three bytes, and then the current normalization process is ended; otherwise, the fourth byte output is performed, and then the current normalization process is ended.
  • the second-class double-normalization is performed by the second-class double-normalization.
  • the specific implementation is as follows:
  • Step S61 If NumSLAO-CT is less than zero, step S62 is performed; otherwise, steps are performed.
  • Step S62 If NumSLAl-(CT-NumSLAO) is less than zero, first shift the code value C to the left by NumSLAO times, and add the left shifted code value to Qel, then shift the sum value to the left by NumSLAl times, and then end the current Normalization process; otherwise, step S621 is performed;
  • Step S621 First shift the code value C to the left by NumSLAO times, and then update the code value C with the left-shifted code value and the Qel sum value, and update the NewCT with NewCT-NumSLAO, and execute step S622;
  • Step S622 If NumSLAl-NewCT is greater than or equal to zero, the code value C is shifted left by NewCT times, and then step S623 is performed; otherwise, the current normalization process is ended;
  • Step S623 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set NewCT to 7, and then execute step S626; otherwise, execute step S624;
  • Step S624 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFE, step S625 is performed; otherwise, NewCT is set to 8, and then step S626 is performed;
  • Step S625 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then execute step S626;
  • Step S626 If NumSLAl-CT is smaller than NewCT, perform single byte output, and then end the current normalization process, otherwise perform two byte output, and then end the current normalization process; Step S63: shift the code value C to the left by CT times, and then perform step S631;
  • Step S631 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value OxFF, set NewCT to 7, and then execute step S634; otherwise, execute step S632;
  • Step S632 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value OxFE, step S633 is performed; otherwise, NewCT is set to 8, and then step S634 is performed;
  • Step S633 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then execute step S634;
  • Step S634 If the difference between the NumSLAO and the CT is smaller than the NewCT, first update the code value C with the sum of the code values C and Qel, and then perform step S635; otherwise, first update the code value C with the sum of the code value C and Qel, Then performing step S6310;
  • Step S635 If NumSLAl-CT is less than zero, perform single byte output, and then end the current normalization process; otherwise, perform step S636;
  • Step S636 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFF, set NewCT to 7, and then execute step S639; otherwise, execute step S637;
  • Step S637 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value OxFE, step S638 is performed; otherwise, setting NewCT to 8, and then performing step S639;
  • Step S638 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then execute step S639;
  • Step S639 If the difference between NumSLAl and CT is smaller than NewCT, perform two byte output, and then end the current normalization process; otherwise, perform three-byte output, and then end the current normalization process;
  • Step S6310 If NumSLAl-CT is less than zero, perform two byte output, and then end the current normalization process; otherwise, execute step S6311;
  • Step S6311 If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value OxFF, set NewCT to 7, and then perform step S6314; otherwise, execute step S6312; Step S6312: If the last byte of the normalized code stream generated by the previous double context symbol pair is a hexadecimal value of 0xFE, step S6313 is performed; otherwise, NewCT is set to 8, and then step S6314 is performed;
  • Step S6313 If the code value C is greater than or equal to the hexadecimal value 0x8000000, set NewCT to 7, otherwise, set NewCT to 8; then execute step S6314;
  • Step S6314 If the difference between NumSLAl and CT is smaller than NewCT, the output is three bytes, and then the current normalization process is ended; otherwise, the fourth byte output is performed, and then the current normalization process is ended.
  • SHIFT-V(X) indicates that the operand X is shifted to the left until the X value after the left shift is greater than or equal to the hexadecimal value 0x8000.
  • the "previous code stream byte” represents the last byte of the normalized code stream produced by the previous double context symbol pair.
  • the code stream buffer of the present invention includes a byte output selector and four independent first in first out buffers. Since the double coded symbol produces up to four bytes of output code stream, four separate FIFO buffers are used to hold the individual bytes of the input code stream.
  • the byte output checker switches the input single normalized code stream, the second type of normalized code stream, the second type of double normalized code stream and the empty code stream in byte order. Enter the corresponding FIFO buffer, that is, the first byte of the input code stream is written into the first first-in first-out buffer, the second byte is written into the second first-in first-out buffer, and the third byte is written into the first byte.
  • the third FIFO buffer the fourth byte is written to the fourth FIFO buffer.
  • the four output streams of byte output 0, byte output 1, byte output 2, and byte output 3 are sent to the output selector in parallel.
  • the dual context symbol pairs are sequentially input according to a clock cycle, that is, a pair of double context symbol pairs are input in one clock cycle, and the delay unit delays the input signal by one clock cycle, shifting
  • the unit indicates that the first small probability symbol probability value Qe0 corresponding to the first index value IndexO and the second small probability symbol probability value Qel corresponding to the second index value Index1 are calculated, and the A value calculation indicates the probability interval value calculation, the C value.
  • the calculation represents the code value calculation, and NumSLAO and NumSLAl respectively indicate the number of left shifts of the corresponding probability interval value in the normalization process.
  • the first small probability symbol probability value QeO and the shift unit are completed.
  • the number of left shifts of the probability interval values NumSLAO and NumSLAl is performed according to the calculation result in the second clock cycle CC2; in the fourth clock cycle CC4, the completion byte Output; In the fifth clock cycle CC5, the output is delayed by one clock cycle. Accordingly, the arithmetic entropy encoding process of the second pair of dual context symbol pairs (CX3, D3) and (CX4, D4) is processed in the second clock cycle CC2 to the sixth clock cycle CC6. It can be seen that it takes 5 clock cycles to complete the arithmetic entropy coding of a pair of double context symbol pairs. That is to say, the pipeline establishment time of the system is 5 clock cycles.
  • the data stream flows linearly from the pipeline, so that the double context symbol pair can be processed under a single clock. Moreover, since the data flow flows linearly, even if the context labels are the same, there is no need to stop the pipeline, thereby realizing the goal of double-symbol throughput without gaps.
  • Table 1 shows the main technical specifications of the coding system implemented by the Xilinx FPGA chip XC2V3000 and Altera's FPGA chip STRATX, including the FPGA resource utilization, ie the number of slices and LCs used, the number of internally occupied memory bits, and the processing. Speed related clock frequency and throughput.
  • the present invention achieves arithmetic entropy coding of dual context symbol pairs in a single clock, with a significant increase in coding speed and efficiency.
  • Table 2 gives a qualitative comparison of the present invention with the prior art in terms of coding speed and implementation complexity. It can be seen that, in terms of processing speed, the processing speed of the present invention and the existing fifth coding structure are the highest, both of which achieve 2 context/clock, but in terms of complexity, the implementation complexity of the fifth coding structure Significantly higher than the present invention, the internal storage capacity of the structure is 8192 bits, and the internal storage capacity of the present invention is only 1509 bits, wherein the probability valuation table is 1350 bits, and the encoding index table is 159 bits.
  • the present invention significantly improves the encoding speed, enables high-speed real-time encoding processing, and achieves low complexity.

Abstract

本发明的基于JPEG2000标准的高速实时处理算术熵编码系统，包括：概率区间值预测器，根据并行输入的由上下文标号和上下文判决构成的双上下文符号对，判断编码符号类型，并根据编码符号类型，对概率区间值与编码必要参数进行更新并输出；码值预测器，根据编码符号类型对码值进行更新，根据更新后的概率区间值及编码参数，判断当前归一化类型并进行归一化处理，并且，输出归一化码流和排空码流；码流缓存器，按照码流输出的先后顺序，根据归一化码流和排空码流的输出字节数，对归一化码流和排空码流分别进行分类缓存，并且并行输出；以及输出选择器，将在码流缓存步骤中并行输出的归一化码流和排空码流按照规定的优先级顺序依次串行输出。

Description

基于 JPEG2000标准的髙速实时处理算术熵编码系统 技术领域
本发明属于图像处理技术领域， 涉及压缩编码， 特别是一种涉及高速实 时处理的算术熵编码系统， 用于各种数字设备的图像压缩编码， 特别是高速 实时卫星图像压缩编码。 背景技术
随着多媒体和网络技术的发展及其在医学影像、 遥感图像和数字图像 / 视频传输等方面的应用， 已有的静止图像压缩标准 JPEG已不能满足当前实 际应用的要求， 为此国际标准化组织于 2000年 11月制定了新的静止图像压 缩标准 JPEG2000。 该标准的核心技术之一就是采用算术熵编码方法对小波 变换后的数据进行编码， 实现图像数据的压缩处理。
JPEG2000 的基本编码流程可以简单描述为： 首先对输入图像进行离散 小波变换， 小波变换后的数据称为小波系数； 然后以码块为单位对小波系数 进行量化、 编码， 码块的大小通常为 32x32或者 64x64; 在编码过程中， 按 小波系数位平面顺序建立相应上下文模型， 并将上下文符号对提供给算术熵 编码器进行编码处理， 从而得到对应码块的编码数据； 最后根据预设的压缩 比， 有选择地输出各个码块对应的编码数据， 完成对单幅图像的编码处理。
所述的算术熵编码器的编码原理叙述如下：
算术熵编码器的输入为上下文符号对 CXD，包括上下文标号 CX和上下 文判决 D， 其输出则是对应的压缩码流， 其中 CX表示由当前编码像素生成 的上下文标号，取值范围为 0-18， D表示对应上下文的判决，取值范围为 0-1。 算术熵编码器根据输入的上下文标号 CX自适应地选择相应判决 D的概率， 依据判决 D的值得出准备进行编码的符号值， 即大概率符号 MPS和小概率 符号 LPS, 以及小概率符号 LPS对应的概率 Qe， 然后调整相应的概率区间 值， 并输出编码值到码值寄存器。 该概率区间值采用 16位无符号整数表示， 该码值寄存器为 32位， 并且划分为 5个不同的字段， 即第 31到 28位表示 4 位零数据， 第 27位表示 "进位"位， 第 26到 19位表示编码输出位， 第 18 到 16位表示用于隔断进位传播的 3位分割位， 第 15到 0位表示码值的小数 位。 对于编码符号的概率 Qe， 算术熵编码器采用一个具有 47个索引的数组 实现， 该数组称为概率估计表 PET， 表中每一项对应一个 16位的 LPS符号 的 Qe值。 依据 JPEG2000标准的规定， 将当前编码符号对应的上下文标号 CX作为地址来访问一个大小为 19 X 6的数组， 得到概率估计表 PET的入口 索引 Index, 然后以 Index为地址读取 PET表中对应 LPS符号概率值 Qe， 并 结合当前概率区间值和码值判定具体编码的过程。 如果当前概率区间值小于 等于 0.75， 该值对应于十六进制下为 0x8000, 为了防止溢出， 需要对概率区 间值和码值进行归一化处理， 通过左移概率区间值和码值使概率区间大于 0x8000。 在归一化的同时， 如果码值中码流组成整字节， 则进行码流输出过 程， 即得到最终的编码输出码流。 为了防止进位传递， 通过设置特定的比特 位填充以截断进位的传递。
虽然在 JPEG2000标准中给出了算术熵编码的编码方法描述，但是针对硬 件实现部分则没有任何相关说明， 因此不少学者和公司致力于高速算术熵编 码硬件结构的研究和设计工作， 提出了各种算术熵编码器硬件实现体系结构， 其中具有代表性的硬件结构包括以下七种：
第一种是美国学者 Gupta 在 2004 年 Midwest Symp.Circuits Syst. (MWSCAS'04) 国际会议上发表的文章 "High speed VLSI architecture for bit plane encoder of JPEG2000" (2004, vol. 2, pp. II233-II236) 中提出的高速算术 熵编码结构， 该结构的吞吐率为平均单个时钟处理 1.2个上下文符号对。
第二种和第三种是中国台湾学者 K.-K. Ong和 Jen-Shiun Chiang分别在 2002年 Int. Conf. Image Process. (ICIP，02)和 2004年 IEEE Int. Symp.Circuits and Systems 国际会议上发表的文章 "A high throughput low cost context-based adaptive arithmetic codec for multiple standards" (2002, vol.1, pp.1872— 1875 ) 禾口 " High-speeds EBCOT with dual context-modeling coding architecture for JPEG2000" (2004， vol. 3， pp. 865-868.) 中提出的高速算术熵编码结构， 其吞 吐率均为单个时钟处理 1个上下文符号对。
第四种是许超在 2005年 Int. Conf. Image Process. (ICIP'05) 国际会议上发 表的文章 "A Dual-Symbol Coding Arithmetic Coder Architecture Design for High Speed EBCOT Coding Engine in JPEG2000"中给出的算术熵编码结构，该编码 结构在不同上下文输入时可达到单个时钟处理 2个上下文符号对， 但是当相 同上下文输入时编码结构则不能同时处理。
第五种是澳大利亚学者 M. Dyer在 2006年 IEEE Transactions on Circuits and Systems-I: Regular Papers期干 lj发表的文章 "Concurrency Techniques for Arithmetic Coding in JPEG2000" (vol. 53, no. 6, pp. 1203-1213, June 2006) 中 描述的高速算术熵编码结构。 虽然该结构可以实现双上下文符号对并行处理， 但是相应结构中存储位较多， 对芯片设计造成一定困难， 实现复杂度过高。
第六种是国内的一些学者如华林等人在 2003年《固体电子学研究与进展》 期刊上发表的文章"一种适用于 JPEG2000的高速 MQ编码器的 VLSI实现" (2003年第 23卷， 第 4期， 第 421-426页） 中给出的算术熵编码结构， 该结 构采用动态流水技术， 处理速度为单个时钟处理 0.625个上下文符号对，编码 速度低。
第七种是梅魁志等人在 2007年 IEEE Trans, on Circuits and System for Video Technology 期刊上发表的文章 " VLSI Design of a High-Speed and Area-Efficient JPEG2000 Encoder" (2007年第 17卷， 第 8期， 第 1065-1078 页） 中给出的算术熵编码结构， 该结构采用多输入同步流水技术实现算数熵 编码， 处理速度为单个时钟处理 0.625个上下文符号对， 编码速度低。
上述七种高速算术熵编码硬件实现结构具有以下缺陷： 若实现复杂度较 低， 则处理速度也较低， 如结构六和七； 若提高处理速度， 则实现复杂度随 之急剧增加， 如结构一至五。 发明内容
本发明的目的在于避免上述已有技术的不足，提供一种基于 JPEG2000标 准的高速实时处理算术熵编码系统， 以实现在保持复杂度不变的条件下提高 编码系统的处理速度。
为实现上述目的，本发明的基于 JPEG2000标准的高速实时处理算术熵编 码系统， 包括： 概率区间值预测器， 根据并行输入的由上下文标号和上下文 判决构成的双上下文符号对， 判断编码符号类型， 并根据编码符号类型， 对 概率区间值与编码必要参数进行更新并输出； 码值预测器， 根据上述编码符 号类型对码值进行更新， 根据更新后的概率区间值以及编码参数， 判断当前 归一化类型并进行归一化处理， 并且， 输出归一化码流和排空码流； 码流缓 存器， 按照码流输出的先后顺序， 根据上述归一化码流和排空码流的输出字 节数， 对上述归一化码流和排空码流分别进行分类缓存， 并且并行输出； 以 及输出选择器， 将在上述码流缓存步骤中并行输出的上述归一化码流和排空 码流按照规定的优先级顺序依次串行输出。
上述概率区间值预测器中的编码必要参数包括符号概率、 归一化过程标 识和计算输出编码值所需的两个移位计数值。
上述概率区间值预测器包括： 双端口索引存储器， 用于存储索引表； 处 理单元选择器， 从上述索引表中读取分别与上述双上下文符号对的双上下文 标号对应的双大概率符号标识； 并根据上述双大概率符号标识和上述双上下 文符号对的双上下文判决， 确定双上下文符号对的概率类型； 上下文标号判 断器， 根据所输入的上述双上下文标号， 确定上下文标号的异同； 以及处理 器， 根据上下文标号的异同和上述双上下文符号对的概率类型， 联合确定双 上下文符号对的类型，并按照双上下文符号对的类型，分别更新概率区间值。
上述概率区间值预测器还包括索引存储地址产生器， 该索引存储地址产 生器接收处理器在编码过程中产生并通过数据输入总线输入的索引更新信 号， 产生更新的索引值提供给双端口索引存储器， 以对该双端口索引存储器 内部的上下文地址对应的位置进行更新写入。
上述双端口索引存储器采用片内双端口存储器， 该双端口索引存储器的 地址为输入的第一上下文标号和第二上下文标号， 根据索引存储地址产生器 产生的索引表得到与上述上下文标号对应的第一大概率标号和第二大概率标 号， 以及对应的第一索引值和第二索引值， 并通过数据输入总线与处理器相 连。
上述概率区间值预测器还包括 PET存储器， 该 PET存储器采用只读存 储器， 根据输入的第一索引值和第二索引值将所需索引的概率值及辅助信息 读出， 并通过数据输入总线传输给处理器。
上述处理器具有对应于双上下文符号对的类型的多个处理单元； 各处理 单元的输入端通过数据输入总线分别与上述处理单元选择器、 上述上下文标 号判断器以及上述 PET存储器的输出信号相连， 根据不同的编码符号类型， 独立进行编码概率区间值、 码值移位计数值、 符号概率的计算以及归一化过 程标识的判别， 并通过数据输出总线输出结果。
上述码值预测器包括： 前导零判断逻辑， 根据从上述概率区间值预测器 输入的概率区间值， 判断当前概率区间值的最高位所包含的零的个数， 为后 续的计算提供参数。 归一化类型判断器， 根据从上述概率区间值预测器输入 的概率区间值和必要参数， 判断当前归一化类型； 码值更新计算器， 根据从 上述概率区间值预测器输入的概率区间值和必要参数， 对码值寄存器中存储 的当前码值进行更新并输出； 多个归一化器， 按照由上述归一化类型判断器 判断的当前归一化类型， 分别进行归一化处理， 并输出归一化码流； 以及排 空处理器， 在没有输入信号时， 进行排空处理， 输出排空码流。
上述码流缓存器包括字节输出复选器和多个先入先出缓存器， 上述字节 输出复选器将输入归一化码流和排空码流而输出的字节依次写入多个先入先 出缓存器并形成字节输出， 通过先入先出缓存器将字节输出输出给输出选择 器。
上述输出选择器根据码流缓存器中的多个先入先出缓存器的状态， 按照 其优先级顺序读取各个先入先出缓存器中的编码码流并进行串行输出。
本发明由于在概率区间值预测器中采用了多个不同的处理单元进行有效 的双上下文编码符号预测编码， 使得每一种可能出现的双上下文编码符号输 入情况都逐一枚举， 充分利用了双上下文编码符号处理的并行度， 完全避免 了由于上下文标号相同而导致的编码系统停顿； 同时由于本发明采用了不同 类型的归一化处理器， 实现了不同形式归一化操作的并行处理， 从而克服了 由于不同类型归一化操作带来的复杂运算以及串行化操作。 此外由于本发明 实现了在单个时钟处理双上下文符号对的算术熵编码， 并保证了双上下文符 号对不间断的流水处理， 因此在实现复杂度没有增长的条件下， 编码速度和 效率有了显著提高， 在高速实时图像编码领域， 如高速数码相机、 图像检索、 高速卫星遥感图像编码、 战场监控等多个民用及军用场合具有巨大的应用价 值。 附图说明
图 1是本发明的系统结构图； 图 2是本发明系统中的概率区间值预测器结构图；
图 3是本发明系统中的码值预测器结构图；
图 4是本发明系统中的码流缓存器结构图；
图 5是本发明的整体时序图。 具体实施方式
本发明的技术关键是对算术熵编码系统的编码符号进行预测处理， 采用 特定的概率预测表结构实现双符号并行编码， 以提高编码速度和效率。 其编 码系统是采用 Xilinx ISE 9.1集成开发软件和 VHDL、 Verilog HDL语言， 在 Xilinx公司的型号为 XC2V3000-6BG728的 FPGA上实现。
参照图 1， 本发明提出的基于 JPEG2000标准的高速实时处理算术熵编 码系统包括： 概率区间值预测器， 码值预测器， 码流缓存器和输出选择器。 其中- 概率区间值预测器，首先根据并行输入的第一上下文符号对（CX0， DO) 和第二上下文符号对 （CX1， D1 ) 判断编码符号类型， 对不同类型的编码符 号采用不同的处理单元对概率区间值进行预测更新，同时计算编码必要参数， 包括第一上下文标号 CX0对应的第一索引值 IndexO对应的第一小概率符号 概率值 QeO以及第二上下文标号 CX1对应的第二索引值 Indexl对应的第二 小概率符号概率值 Qel、 归一化过程标识和计算输出编码值所需的两个移位 计数值 NumSLAO和 NumSLAl ; 然后将这些更新后的参数通过总线输出给 码值预测器进行对码值的预估判断。
码值预测器， 根据输入的概率区间值和编码必要参数判断当前进行归一 化的类型； 在双编码符号情况下， 将归一化类型分为单次归一化、 一类双次 归一化和二类双次归一化， 同时根据不同的编码符号类型， 对码值进行相应 的更新； 对不同的归一化类型， 分别采用对应的归一化处理器对概率区值和 码值进行归一化操作， 在归一化过程中， 移位值 NumSLAO和 NumSLAl用 来确定码值进行左移的次数； 经过归一化操作后， 相应地形成单次归一化码 流、 一类双次归一化码流和二类双次归一化码流。 当编码结束时， 码值寄存 器中保留的编码码流形成最后的排空码流。 这三种归一化码流和排空码流一 起输出给码流缓存器。 根据算术熵编码的原理， 对双编码符号对进行一次编 码， 以产生至少 0字节、 至多 4字节的输出码流。
码流缓存器， 根据输入的四路编码码流的输出字节计数值， 分别将各路码 流按字节切换写入到 4个先进先出缓存器中进行缓存，分别形成字节输出 0、 字节输出 1、 字节输出 2和字节输出 3四种输出码流， 这四种输出码流并行 地输出给输出选择器。
输出选择器， 完成对输入码流的并串转换， 即根据码流缓存器中 4个独 立的先入先出缓存器的空满状态， 按特定优先级顺序流依次读出对应缓存器 中的码流， 形成一路串行输出的最终码流。 具体输出过程为： 输出选择器按 照从第 1到第 4缓存器的顺序， 依次查询各个先进先出缓存器的空状态， 如 果某一个输出缓存器为不空状态，即内部有数据，则输出该缓存器内的数据， 然后进行下一个缓存器状态的査询输出过程， 直到所有的缓存器都査询输出 完毕。
参照图 2， 本发明的概率区间值预测器包括双端口索引存储器、索引存储 地址产生器、 处理单元选择器、 上下文标号判断器、 处理器、 PET存储器和 复选器。 其中， 索引存储地址产生器与双端口索引存储器单向连接； 处理单 元选择器的输入端分别与上下文判决和双端口索引存储器产生的大概率标号 相连， 其输出的使能信号通过数据输入总线输出给处理器； 上下文标号判断 器和 PET存储器的输出端均通过数据总线与处理器相连； 处理器通过数据输 出总线与复选器相连。 其中：
该双端口索引存储器为片内双端口存储器， 用于存储由索引存储地址产 生器产生的索引表； 根据算术熵编码算法， 上下文取值范围为 0-18， 索引取 值范围为 0-46， 可用 6比特表示， 用于自适应概率状态转移， 上下文的大概 率符号 MPS判决的取值范围为 0-1 , 可以 1比特表示， 用于表示当前大概率 符号的取值， 因此双端口索引存储器的存储空间大小为 19x7比特， 其中高 6 比特位表示上下文索引，最低比特位表示 MPS符号判决。该双端口索引存储 器以输入的第一上下文标号 CX0和第二上下文标号 CX1作为地址， 根据索 引表分别读出与上述上下文标号对应的第一索引值 IndexO 和第二索引值 Indexl，以及对应的第一大概率标号 MPS— CX0和第二大概率标号 MPS一 CX1， 并将这两个索弓 I值通过数据输入总线传递给处理器， 同时将这两个大概率标 号输出给处理单元选择器。 该处理单元选择器根据输入的两个大概率标号以及第一上下文判决 DO和 第二上下文判决 Dl， 判断双上下文符号对的概率类型。 该概率类型包括双大 概率符号 MPSMPS、大概率 /小概率符号 MPSLPS、小概率 /大概率符号 LPSMPS 和双小概率符号 LPSLPS这四种情况， 采用 2位二进制位串表示。
如果第一大概率符号标识 MPS—CX0与第一判决 DO相等， 并且第二大概 率符号标识 MPS— CX1与第二判决 Dl相等，则双上下文符号对的概率类型确 定为双大概率符号 MPSMPS;
如果第一大概率符号标识 MPS— CX0与第一判决 DO相等， 而第二大概率 符号标识 MPS— CX1与第二判决 Dl不相等，则双上下文符号对的概率类型确 定为大概率 /小概率符号 MPSLPS;
如果第一大概率符号标识 MPS— CX0与第一判决 DO不相等， 而第二大概 率符号标识 MPS_CX1与第二判决 Dl相等，则双上下文符号对的概率类型确 定为小概率 /大概率符号 LPSMPS;
如果第一大概率符号标识 MPS— CX0与第一判决 DO不相等， 并且第二 大概率符号标识 MPS— CX1与第二判决 D1不相等， 则双上下文符号对的概 率类型确定为双小概率符号 LPSLPS。
与上述四种概率类型对应的类型使能信号包括双大概率使能 MpsMps—En、大概率 /小概率使能 MpsLps— En、 小概率 /大概率 LpsMps— En和 双小概率使能 LpsLps— En， 这些使能信号通过数据输入总线与处理器相连， 用于控制选通处理器中特定的处理单元进行概率区间值的预测。
同时， 该上下文标号判断器对输入的第一上下文标号 CX0和第二上下文 标号 CX1是否相同进行判断， 并将作为判断结果的相异指示信号 DIFF和相 同指示信号 SAME通过数据总线输出给处理器， 同样用于控制选通处理器中 特定的处理单元进行概率区间值的预测。具体而言，如果第一上下文标号 CX0 与第二上下文标号 CX1相等， 则判定为双上下文标号相同， 用相同指示信号 SAME来表示， 否则， 判定为双上下文标号相异， 用相异指示信号 DIFF来表 示。
该处理器包括 8个处理单元， 分别为小概率 /大概率符号相异处理单元、 双小概率符号相异处理单元、双大概率符号相异处理单元、大概率 /小概率符 号相异处理单元、小概率 /大概率符号相同处理单元、双小概率符号相同处理 单元、 双大概率符号相同处理单元和大概率 /小概率符号相同处理单元； 这 8 个处理单元分别对应双编码符号的 8种类型。 即， 处理器根据不同的编码符 号类型， 釆用对应的处理单元进行概率区间值的更新计算， 该概率区间值采 用寄存器存储。
具体而言， 处理器根据由上下文标号的异同和双上下文符号对的概率类 型得到的编码符号类型， 使对应的处理单元有效。
( 1 )如果两个上下文标号相异，且双上下文符号对的概率类型为小概率 /大概率符号， 则双上下文符号对类型为小概率 /大概率符号相异， 使小概率 / 大概率符号相异处理单元有效而使其进行处理；
( 2 )如果两个上下文标号相异，且双上下文符号对的概率类型为双小概 率符号， 则双上下文符号对类型为双小概率符号相异， 使双小概率符号相异 处理单元有效而使其进行处理；
(3 )如果两个上下文标号相异，且双上下文符号对的概率类型为双大概 率符号， 则双上下文符号对类型为双大概率符号相异， 使双大概率符号相异 处理单元有效而使其进行处理；
(4 )如果两个上下文标号相异，且双上下文符号对的概率类型为大概率 /小概率符号， 则双上下文符号对类型为大概率 /小概率符号相异， 使大概率 / 小概率符号相异处理单元有效而使其进行处理；
( 5 )如果两个上下文标号相同，且双上下文符号对的概率类型为小概率 /大概率符号， 则双上下文符号对类型为小概率 /大概率符号相同， 使小概率 / 大概率符号相同处理单元有效而使其进行处理；
( 6)如果两个上下文标号相同，且双上下文符号对的概率类型为双小概 率符号， 则双上下文符号对类型为双小概率符号相同， 使双小概率符号相同 处理单元有效而使其进行处理；
( 7)如果两个上下文标号相同，且双上下文符号对的概率类型为大概率 /小概率符号， 则双上下文符号对类型为大概率 /小概率符号相同， 使大概率 / 小概率符号相同处理单元有效而使其进行处理；
( 8 )如果两个上下文标号相同，且双上下文符号对的概率类型为双大概 率符号， 则双上下文符号对类型为双大概率符号相同， 使双大概率符号相同 处理单元有效而使其进行处理。 另外，处理器同时还计算第一上下文标号 CX0对应的第一索引值 IndexO 对应的第一小概率符号概率值 Qe0、第二上下文标号 CX1对应的第二索引值 Indexl对应的第二小概率符号概率值 Qel和用于码值计算的两个移位计数值 NumSLAO和 NumSLAl， 其中第一概率区间值 NumSLAO表示输入第一上下 文标号 CX0 时概率区间值在归一化过程中需左移的次数， 第二概率区间值 NumSLAl表示输入第二上下文标号 CXI时概率区间值在归一化过程中需左 移的次数， 并对归一化过程标识进行判别。 处理单元对概率区间值进行预测 时， 根据输入的第一索引值 IndexO和第二索引值 Indexl , 将所需的相应小概 率符号 LPS的概率值以及辅助信息通过输入数据总线从 PET存储器中读出。 当编码符号类型发生改变时， 处理器通过数据输入总线将索引更新信号 update— index送给索引存储地址产生器， 用以产生更新的索引值 new— index, 并控制双端口索引存储器将接收到的更新索引值写入到存储器内对应的位 置。 经过处理器的预测处理， 其输出的概率区间值 A、 归一化过程标识 RenormTag.第一概率区间值移位计数值 NumSLAO、第二概率区间值移位计 数值 NumSLAl、第一小概率符号概率值 QeO以及第二小概率符号概率值 Qel 通过数据输出总线连接到复选器， 由复选器输出给码值预测器。 其中， 归一 化过程标识 RenormTag表示双上下文符号对的概率类型， 即 0表示双小概率 符号、 1表示双大概率符号、 2表示大概率 /小概率符号、 3表示小概率 /大概 率符号。
参照图 3， 本发明的码值预测器包括前导零判断逻辑、 归一化类型判断 器、 码 （C) 值更新计算器、 单次归一化器、 一类双次归一化器、 二类双次 归一化器、 复选器、 码值寄存器和排空处理器。 该码值预测器的输入数据通 过数据输入总线分别与前导零判断逻辑、 归一化类型判断器、 码值更新计算 器和复选器相连。 首先由归一化类型判断器判断当前的归一化类型， 并选择 对应的归一化处理器进行编码输出。 该归一化类型包括零次归一化、 单次归 一化、 一类双次归一化和二类双次归一化。 对零次归一化类型的码值， 不进 行归一化处理， 没有对应码流输出； 对单次归一化、 一类双次归一化和二类 双次归一化类型的码值， 分别进行归一化处理。
由于本发明同时对双编码符号对进行编码， 对应的归一化次数应为一次 或者两次，而根据编码符号的概率类型，两次归一化过程可进一步分为两类， 因此在码值预测器中分别采用单次归一化器、 一类双次归一化器和二类双次 归一化器这三种不同类型的归一化器进行处理。 同时码值更新计算器控制复 选器对输入的符号概率值 Qe或者 0值进行选择后， 与码值寄存器进行累加 处理， 实现对码值寄存器的更新运算， 更新后的码值分别送给三个归一化器 和排空处理器。 该前导零判断逻辑分别与三个归一化器的输入端相连， 用于 判断当前概率区间值的最高位所包含的零的个数， 为后续的计算提供参数。 然后由选定的归一化器对码值中应该输出的码流位置进行运算判断， 并将算 术编码的码流从对应的归一化器中输出。 当结束上下文编码后， 由排空处理 器将残留在码值寄存器内的有效码流输出。
以下， 对码 （C) 值更新计算器、 归一化类型判断器、 各归一化器的动 作进行详细的说明。
码值更新计算器对码值进行更新，并确定码值左移计数值 CT。具体而言， 根据输入的归一化过程标识 RenormTag, 如果第一上下文符号对是大概率符 号， 即 RenormTag为 1或 2， 则计算第二小概率符号概率值 Qel与当前码值 C的和值， 并将码值 C更新为该和值； 否则， 保持码值 C不变。 并且， 按以 下方式确定码值左移计数值 CT， 即如果是第一次对上下文符号对进行码值 归一化处理， 则按照 JPEG2000标准给出的初始化方法对 CT进行赋值， 否 则， 保持 CT值不变。
归一化类型判断器判断当前归一化类型的过程如下。
( 1 ) 归一化过程标识 RenormTag为 1的情况
在该情况下， 进行双大概率符号码值归一化类型判断。 其详细过程表示 在图 4中。
步骤 S11 : 如果概率区间值 A小于第一小概率符号概率值 QeO的两倍， 则执行步骤 S12; 否则， 执行步骤 S14;
步骤 S12: 对第一小概率符号概率值 QeO进行调整， 即左移 Qe0， 直至 QeO 大于或等于十六进制值 0x8000， 如果调整后的第一小概率符号概率值 SHIFT— V(Qe0)小于第二小概率符号概率值 Qel的两倍，则归一化类型为一类 双次归一化， 否则， 执行步骤 S13;
步骤 S13:如果调整后的第一小概率符号概率值 SHIFT— V(Qe0)与第二小 概率符号概率值 Qel的差值小于十六进制值 0x8000，则归一化类型为二类双 次归一化， 否则， 归一化类型为单次归一化；
步骤 S14: 如果概率区间值 A与第一小概率符号概率值 QeO的差值小于 十六进制值 0x8000， 执行步骤 S15; 否则， 执行步骤 S17;
步骤 S15: 对概率区间值 A与第一小概率符号概率值 QeO的差值进行调 整， 如果调整后的差值 SHIFT— V(A-QeO)小于第一小概率符号概率值 QeO的 两倍， 则归一化类型为一类双次归一化； 否则， 执行步骤 S16;
步骤 S16:如果调整后的差值 SHIFT— V(A-QeO)小于第二小概率符号概率 值 Qel与十六进制值 0x8000的和， 则归一化类型为二类双次归一化； 否则， 归一化类型为单次归一化；
步骤 S17: 如果概率区间值 A与第一小概率符号概率值 QeO的差值小于 第二小概率符号概率值 Qel的两倍， 则归一化类型为单次归一化； 否则， 执 行步骤 S18;
步骤 S18: 如果概率区间值 A与第一小概率符号概率值 QeO的差值小于 第二小概率符号概率值 Qel与十六进制值 0x8000的和， 则归一化类型为单 次归一化； 否则， 归一化类型为零次归一化。
(2) 归一化过程标识 RenormTag为 2的情况
在该情况下， 进行大概率 /小概率符号码值归一化类型判断。其详细过程 表示在图 5中。
步骤 S21 : 如果概率区间值 A小于第一小概率符号概率值 QeO的两倍， 那么， 执行步骤 S22; 否则， 执行步骤 S23;
步骤 S22: 对第一小概率符号概率值 QeO进行调整， 即左移 Qe0， 直至 QeO 大于或等于十六进制值 0x8000。 如果调整后的第一小概率符号概率值 SHIFT_V(Qe0)小于第二小概率符号概率值 Qel的两倍，则归一化类型为二类 双次归一化； 否则， 归一化类型为一类双次归一化；
步骤 S23: 如果概率区间值 A与第一小概率符号概率值 QeO的差值小于 十六进制值 0x8000， 执行步骤 S24; 否则， 归一化类型为单次归一化；
步骤 S24: 对概率区间值 A与第一小概率符号概率值 QeO的差值进行调 整， 如果调整后的差值 SHIFT— V(A-QeO)小于第一小概率符号概率值 QeO的 两倍， 则归一化类型为一类双次归一化； 否则， 归一化类型为二类双次归一 化。 (3 ) 归一化过程标识 RenormTag为 3的情况
在该情况下， 进行小概率 /大概率符号码值归一化类型判断。其详细过程 表示在图 6中。
步骤 S31 : 如果概率区间值 A小于第一小概率符号概率值 QeO的两倍， 执行步骤 S32; 否则， 执行步骤 S34;
步骤 S32: 如果概率区间值 A与第一小概率符号概率值 QeO的差值经调 整后小于第二小概率符号概率值 Qel的两倍， 则归一化类型为一类双次归一 化； 否则， 执行步骤步骤 S33;
步骤 S33: 对概率区间值 A与第一小概率符号概率值 QeO的差值进行调 整， 如果调整后的差值 SHIFT— V(A-QeO)小于第二小概率符号概率值 Qel与 十六进制值 0x8000的和， 则归一化类型为二类双次归一化； 否则， 归一化类 型为单次归一化；
步骤 S34: 对第一小概率符号概率值 QeO进行调整， 如果调整后的第一 小概率符号概率值 SHIFT— V(Qe0)小于第二小概率符号概率值 Qel的两倍， 则归一化类型为二类双次归一化； 否则， 执行步骤 S35;
步骤 S35:如果调整后的第一小概率符号概率值 SHIFT_V(Qe0)与第二小 概率符号概率值 Qel的差值小于十六进制值 0x8000，则归一化类型为一类双 次归一化； 否则， 归一化类型为一类双次归一化。
各归一化处理器根据归一化类型， 分别对单次归一化类型、 一类双次归 一化类型和二类双次归一化类型下的码值进行相应的归一化处理， 并产生对 应的归一化码流。
( 1 )在归一化类型为单次归一化的情况下， 由单次归一化器对码值进行 单次归一化处理， 参照图 7， 具体实现如下：
步骤 41 : 如果第一概率区间值移位计数值 NumSLAO或第二概率区间值 移位计数值 NumSLAl小于码值左移计数 CT,将码值 C左移 NumSLAO或者 NumSLAl次， 没有对应单次归一化码流输出， 结束当前归一化过程； 否则， 执行步骤 42;
步骤 42:如果上一个双上下文符号对产生的归一化码流的最后一个字节 为十六进制值 0xFF， 设置码值临时左移计数值 NewCT为 7， 然后执行步骤 45； 否则， 执行步骤 43; 步骤 43 : 如果上一个双上下文符号对产生的归一化码流的最后一个字节 为十六进制值 OxFE, 执行步骤 44; 否则设置码值临时左移计数值 NewCT为 8, 然后执行步骤步骤 45;
步骤 44: 如果当前码值 C 大于或等于十六进制值 0x8000000，设置码值 临时左移计数值 NewCT为 7， 否则设置 NewCT为 8; 然后执行步骤 S45; 步骤 45: 将码值 C左移 NumSLAO-CT次， 然后执行步骤 46;
步骤 46: 如果第一概率区间值移位计数值 NumSLAO或第二概率区间值 移位计数值 NumSLAl与码值左移计数值 CT的差值大于或等于 0，并且小于 码值临时左移计数值 NewCT,则进行单次字节输出；否则进行两次字节输出。
(2)在归一化类型为一类双次归一化类型的情况下， 由一类双次归一化 器进行一类双次归一化处理， 参照图 8， 具体实现如下：
步骤 S51 : 如果 NumSLAO-CT小于零， 执行步骤 S52; 否则， 执行步骤
S53 ;
步骤 S52 : 如果 NumSLAl-(CT-NumSLAO) 小于零， 将码值 C 左移 NumSLAO+NumSLAl次， 然后结束当前归一化过程； 否则， 执行步骤 S521 ;
步骤 S521 : 将码值 C左移 NumSLAO次， 并用 NewCT-NumSLAO 更新 NewCT, 然后执行步骤 S522;
步骤 S522: 如果 NumSLAl-NewCT大于或等于零， 将码值 C左移 NewCT次， 然后执行步骤 S523 ; 否则， 结束当前归一化过程；
步骤 S523 :如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFF， 设置 NewCT为 7， 然后执行步骤 S526; 否则， 执行步骤 S524;
步骤 S524:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFE， 执行步骤 S525 ; 否则， 设置 NewCT为 8， 执行 步骤 S526;
步骤 S525: 如果码值 C大于或等于十六进制值 0x8000000， 设置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S526;
步骤 S526: 如果 NumSLAl与 CT的差值小于 NewCT, 那么进行单 次字节输出， 然后结束当前归一化过程， 否则， 进行两次字节输出， 然后结 束当前归一化过程； 步骤 S53 : 将码值 C左移 CT次， 执行步骤 S531 ;
步骤 S531 :如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFF， 设置 NewCT为 7， 执行步骤 S534; 否则， 执行 步骤 S532;
步骤 S532:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFE， 执行步骤 S533 ; 否则， 设置 NewCT为 8， 执行 步骤 S534;
步骤 S533 : 如果码值 C大于或等于十六进制值 0x8000000， 设置 NewCT为 7， 否则， 设置 NewCT为 8; 执行步骤 S534;
步骤 S534: 如果移位计数 NumSLAO与 CT的差值小于 NewCT,执 行步骤 S535 , 否则执行步骤 S5310;
步骤 S535: 如果 NumSLAl减去 CT的差值小于零， 则进行单次字 节输出， 然后结束当前归一化过程； 否则， 执行步骤 S536;
步骤 S536:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFF， 设置 NewCT为 7， 然后执行步骤 S539; 否则， 执行步骤 S537;
步骤 S537:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFE， 执行步骤 S538; 否则， 设置 NewCT为 8， 然后 执行步骤 S539;
步骤 S538: 如果码值 C大于或等于十六进制值 0x8000000， 设置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S539;
步骤 S539: 如果移位计数 NumSLAl与 CT的差值小于 NewCT, 则 进行两次字节输出， 然后结束当前归一化过程； 否则进行三次字节输出， 然 后结束当前归一化过程；
步骤 S5310:如果 NumSLAl减去 CT的差值小于零，则进行两次字 节输出， 然后结束当前归一化过程； 否则， 执行步骤 S5311 ;
步骤 S5311 : 如果上一个双上下文符号对产生的归一化码流的最后 一个字节为十六进制值 0xFF， 设置 NewCT为 7, 然后执行步骤 S5314; 否 则， 执行步骤 S5312;
步骤 S5312: 如果上一个双上下文符号对产生的归一化码流的最后 一个字节为十六进制值 0xFE， 执行步骤 S5313; 否则， 设置 NewCT为 8， 然后执行步骤 S5314;
步骤 S5313: 如果码值 C大于或等于十六进制值 0x8000000， 设置
NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S5314;
步骤 S5314: 如果 NumSLAl与 CT的差值小于 NewCT, 则进行三 次字节输出， 然后结束当前归一化过程； 否则进行四次字节输出， 然后结束 当前归一化过程。
(3 )在归一化类型为二类双次归一化类型的情况下， 由二类双次归一化 器进行二类双次归一化处理， 参照图 9， 具体实现如下：
步骤 S61 : 如果 NumSLAO-CT小于零， 执行步骤 S62; 否则， 执行步骤
S63;
步骤 S62: 如果 NumSLAl- (CT-NumSLAO) 小于零， 先将码值 C左移 NumSLAO次， 并将左移后的码值与 Qel相加， 再将该和值左移 NumSLAl 次， 然后结束当前归一化过程； 否则， 执行步骤 S621 ;
步骤 S621 : 先将码值 C左移 NumSLAO次， 然后用左移后的码值与 Qel的和值更新码值 C, 同时用 NewCT-NumSLAO更新 NewCT, 执行步骤 S622;
步骤 S622: 如果 NumSLAl-NewCT大于或等于零， 则将码值 C左 移 NewCT次， 然后执行步骤 S623; 否则， 结束当前归一化过程；
步骤 S623:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFF， 设置 NewCT为 7， 然后执行步骤 S626; 否则， 执行步骤 S624;
步骤 S624:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFE， 执行步骤 S625; 否则， 设置 NewCT为 8， 然 后执行步骤 S626;
步骤 S625: 如果码值 C大于或等于十六进制值 0x8000000， 则设置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S626;
步骤 S626: 如果 NumSLAl-CT小于 NewCT, 进行单次字节输出， 然后结束当前归一化过程， 否则进行两次字节输出， 然后结束当前归一化过 程； 步骤 S63: 将码值 C左移 CT次， 然后执行步骤 S631 ;
步骤 S631 :如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 OxFF, 设置 NewCT为 7， 然后执行步骤 S634; 否则， 执行步骤 S632;
步骤 S632:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 OxFE, 执行步骤 S633; 否则， 设置 NewCT为 8， 然后 执行步骤 S634;
步骤 S633: 如果码值 C大于或等于十六进制值 0x8000000， 则设置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S634;
步骤 S634: 如果 NumSLAO与 CT的差值小于 NewCT, 首先用码值 C与 Qel的和值更新码值 C, 然后执行步骤 S635; 否则， 先用码值 C与 Qel 的和值更新码值 C， 然后执行步骤 S6310;
步骤 S635: 如果 NumSLAl-CT小于零， 则进行单次字节输出， 然 后结束当前归一化过程； 否则， 执行步骤 S636;
步骤 S636:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 0xFF， 则设置 NewCT为 7，然后执行步骤 S639;否则， 执行步骤 S637;
步骤 S637:如果上一个双上下文符号对产生的归一化码流的最后一 个字节为十六进制值 OxFE, 执行步骤 S638; 否则， 设置 NewCT为 8， 然后 执行步骤 S639;
步骤 S638: 如果码值 C大于或等于十六进制值 0x8000000， 则设置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S639;
步骤 S639: 如果 NumSLAl与 CT的差值小于 NewCT, 则进行两次 字节输出， 然后结束当前归一化过程； 否则， 进行三次字节输出， 然后结束 当前归一化过程；
步骤 S6310: 如果 NumSLAl-CT小于零， 则进行两次字节输出， 然 后结束当前归一化过程； 否则， 执行步骤 S6311 ;
步骤 S6311 : 如果上一个双上下文符号对产生的归一化码流的最后 一个字节为十六进制值 OxFF, 则设置 NewCT为 7, 然后执行步骤 S6314; 否则， 执行步骤 S6312; 步骤 S6312: 如果上一个双上下文符号对产生的归一化码流的最后 一个字节为十六进制值 0xFE， 执行步骤 S6313; 否则， 设置 NewCT为 8， 然后执行步骤 S6314;
步骤 S6313: 如果码值 C大于或等于十六进制值 0x8000000， 则设 置 NewCT为 7， 否则， 设置 NewCT为 8; 然后执行步骤 S6314;
步骤 S6314: 如果 NumSLAl与 CT的差值小于 NewCT, 则进行三 次字节输出， 然后结束当前归一化过程； 否则进行四次字节输出， 然后结束 当前归一化过程。
在图 4、 图 5和图 6中 SHIFT—V(X)， 表示对操作数 X进行左移， 直至 左移后的 X值大于或等于十六进制值 0x8000。
在图 7、 图 8和图 9中， "前一个码流字节"表示的是上一个双上下文符 号对产生的归一化码流的最后一个字节。
参照图 10，本发明的码流缓存器包括字节输出复选器和四个独立的先进 先出缓存器。 由于双编码符号最多产生四个字节的输出码流， 因此采用四个 独立的先进先出缓存器分别保存输入码流的各个字节。 该字节输出复选器将 输入的单次归一化码流、 一类双次归一化码流、 二类双次归一化码流和排空 码流分别按照字节顺序依次切换写入到对应的先进先出缓存器， 即输入码流 的第一字节写入第一先入先出缓存器， 第二字节写入第二先入先出缓存器， 第三字节写入第三先入先出缓存器， 第四字节写入第四先入先出缓存器。 通 过这四个先入先出缓存器， 分别将字节输出 0、字节输出 1、字节输出 2和字 节输出 3这四路输出码流并行地送给输出选择器。
参照图 11， 本发明的整体时序图中， 双上下文符号对是按照时钟周期依 次输入的， 即一个时钟周期输入一对双上下文符号对， 延迟单元对输入信号 进行一个时钟周期的延迟，移位单元表示计算第一索引值 IndexO对应的第一 小概率符号概率值 QeO和第二索引值 Indexl对应的第二小概率符号概率值 Qel 的移位值， A值计算表示概率区间值计算， C 值计算表示码值计算， NumSLAO、NumSLAl分别表示对应概率区间值在归一化过程中的左移次数。 如图所示， 当输入第一对双上下文符号对 （CX0， DO) 和 （CXI , D1 ) 后， 在第一个时钟周期 CC1内，由移位单元完成第一小概率符号概率值 QeO和第 二小概率符号概率值 Qel的移位值的计算， 同时将输入的双上下文符号对延 迟一个时钟周期； 在第二个时钟周期 CC2 内， 首先根据在第一个时钟周期 CC1内计算得到的移位值和延迟后的双上下文符号对，进行概率区间值计算， 然后分别计算两个概率区间值的左移次数 NumSLAO和 NumSLAl ; 在第三 个时钟周期 CC3内， 根据在第二个时钟周期 CC2内的计算结果， 进行码值 计算； 在第四个时钟周期 CC4 内， 完成字节输出； 在第五个时钟周期 CC5 内， 对输出结果延迟一个时钟周期。 相应地， 第二对双上下文符号对（CX3， D3 ) 和 （CX4， D4) 的算术熵编码过程则在第二个时钟周期 CC2到第六个 时钟周期 CC6内处理完成。可见完成一对双上下文符号对的算术熵编码需要 5个时钟周期。 也就是说， 该系统的流水线建立时间为 5个时钟周期， 当流 水线建立后， 数据流线性地从流水线流过， 这样一来， 就能够在单时钟下处 理双上下文符号对。 而且由于数据流线性流动， 即使上下文标号相同， 也不 需要停止流水线， 从而真正实现了双符号吞吐无间隔的目标。
本发明的效果可以通过以下实验数据进一步说明。
表 1给出了本发明分别采用 Xilinx的 FPGA芯片 XC2V3000以及 Altera 的 FPGA芯片 STRATIX实现的编码系统的主要技术指标， 包括 FPGA资源 利用情况即 Slice和 LC使用数目、内部占用的存储位数目以及与处理速度相 关的时钟频率和吞吐率。
本发明实现的编码系统的主要技术指标
Figure imgf000021_0001
从表 1可见， 本发明实现了在单个时钟处理双上下文符号对的算术熵编 码， 编码速度和效率显著提高。
表 2 给出了本发明与现有技术在编码速度和实现复杂度方面的定性比 较。 可以看出， 就处理速度而言， 本发明与现有的第五种编码结构的处理速 度最高， 均达到了 2上下文 /时钟， 但是就复杂度而言， 第五种编码结构的实 现复杂度明显高于比本发明，该结构内部存储容量为 8192位，而本发明的内 部存储容量仅为 1509位， 其中概率估值表 1350位， 编码索引表 159位。
表 2本发明与现有技术在编码速度和实现复杂度方面的比较 第四 第五 本发 各种结构
种 种 种 种 种 种 明 速度 （上下文 / 小于
1.2 1 2 0.625 0.625 2 时钟） 2
复杂度 中 中 高 高 低 低 中 从表 2可见，本发明显著地改善了编码速度，可进行高速实时编码处理， 同时实现复杂度较低。
以上描述仅是本发明的一个具体实例，显然对于本领域的专业人员来说， 在了解了本发明内容和原理后，都可能在不背离本发明原理、结构的情况下， 进行形式和细节上的各种修正和改变， 但是这些基于本发明思想的修正和改 变仍在本发明的权利要求保护范围之内。

Claims

权 利 要 求 书
1、 一种基于 JPEG2000标准的高速实时处理算术熵编码系统， 其特征在 于， 包括：
概率区间值预测器， 根据并行输入的由上下文标号和上下文判决构成的 双上下文符号对， 判断编码符号类型， 并根据编码符号类型， 对概率区间值 与编码必要参数进行更新并输出；
码值预测器， 根据上述编码符号类型对码值进行更新， 根据更新后的概 率区间值以及编码参数， 判断当前归一化类型并进行归一化处理， 并且， 输 出归一化码流和排空码流；
码流缓存器， 按照码流输出的先后顺序， 根据上述归一化码流和排空码 流的输出字节数， 对上述归一化码流和排空码流分别进行分类缓存， 并且并 行输出； 以及
输出选择器， 将在上述码流缓存步骤中并行输出的上述归一化码流和排 空码流按照规定的优先级顺序依次串行输出。
2、根据权利要求 1所述的高速实时处理算术熵编码器系统，其特征在于， 概率区间值预测器中的编码必要参数包括符号概率、 归一化过程标识和 计算输出编码值所需的两个移位计数值。
3、 根据权利要求 1所述的高速实时处理算术熵编码系统， 其特征在于， 上述概率区间值预测器包括：
双端口索引存储器， 用于存储索引表；
处理单元选择器， 从上述索引表中读取分别与上述双上下文符号对的双 上下文标号对应的双大概率符号标识； 并根据上述双大概率符号标识和上述 双上下文符号对的双上下文判决， 确定双上下文符号对的概率类型；
上下文标号判断器， 根据所输入的上述双上下文标号， 确定上下文标号 的异同； 以及
处理器， 根据上下文标号的异同和上述双上下文符号对的概率类型， 联 合确定双上下文符号对的类型， 并按照双上下文符号对的类型， 分别更新概 率区间值。
4、 根据权利要求 3所述的高速实时处理算术熵编码系统， 其特征在于， 上述概率区间值预测器还包括索引存储地址产生器， 该索引存储地址产 生器接收处理器在编码过程中产生并通过数据输入总线输入的索引更新信 号， 产生更新的索引值提供给双端口索引存储器， 以对该双端口索引存储器 内部的上下文地址对应的位置进行更新写入。
5、 根据权利要求 3所述的高速实时处理算术熵编码系统， 其特征在于， 上述双端口索引存储器采用片内双端口存储器， 该双端口索引存储器的 地址为输入的第一上下文标号和第二上下文标号， 根据索引存储地址产生器 产生的索引表得到与上述上下文标号对应的第一大概率标号和第二大概率标 号， 以及对应的第一索引值和第二索引值， 并通过数据输入总线与处理器相 连。
6、 根据权利要求 3所述的高速实时处理算术熵编码系统， 其特征在于， 上述概率区间值预测器还包括 PET存储器， 该 PET存储器采用只读存 储器， 根据输入的第一索引值和第二索引值将所需索引的概率值及辅助信息 读出， 并通过数据输入总线传输给处理器。
7、 根据权利要求 3所述的高速实时处理算术熵编码系统， 其特征在于， 上述处理器具有对应于双上下文符号对的类型的多个处理单元； 各处理 单元的输入端通过数据输入总线分别与上述处理单元选择器、 上述上下文标 号判断器以及上述 PET存储器的输出信号相连， 根据不同的编码符号类型， 独立进行编码概率区间值、 码值移位计数值、 符号概率的计算以及归一化过 程标识的判别， 并通过数据输出总线输出结果。
8、 根据权利要求 1所述的高速实时处理算术熵编码系统， 其特征在于， 上述码值预测器包括：
前导零判断逻辑， 根据从上述概率区间值预测器输入的概率区间值， 判 断当前概率区间值的最高位所包含的零的个数， 为后续的计算提供参数。 归一化类型判断器， 根据从上述概率区间值预测器输入的概率区间值和 必要参数， 判断当前归一化类型；
码值更新计算器， 根据从上述概率区间值预测器输入的概率区间值和必 要参数， 对码值寄存器中存储的当前码值进行更新并输出；
多个归一化器， 按照由上述归一化类型判断器判断的当前归一化类型， 分别进行归一化处理， 并输出归一化码流； 以及
排空处理器， 在没有输入信号时， 进行排空处理， 输出排空码流。
9、 根据权利要求 8所述的高速实时处理算术熵编码系统， 其特征在于， 上述归一化类型判断器在双上下文符号对的概率类型为双大概率符号的 情况下，
如果概率区间值小于第一小概率符号概率值的两倍， 则调整第一小概率 符号概率值； 若调整后的第一小概率符号概率值小于第二小概率符号概率值 的两倍， 则当前归一化类型为一类双次归一化， 否则， 计算调整后的第一小 概率符号概率值与第二小概率符号概率值之间的差值， 若该差值小于十六进 制值 0x8000， 则当前归一化类型为二类双次归一化， 否则为单次归一化； 如果概率区间值大于或等于第一小概率符号概率值的两倍， 计算概率区 间值与第一小概率符号概率值的差值， 并比较该差值与十六进制值 0x8000的 关系： 若该差值小于十六进制值 0x8000， 则调整概率区间值与第一小概率符 号概率值的差值； 若调整后的差值小于第二小概率符号概率值的两倍， 则当 前归一化类型为一类双次归一化， 否则， 比较该调整后的差值与第二小概率 符号概率值， 若该调整后的差值与第二小概率符号概率值之间的差值小于十 六进制值 0x8000， 则当前归一化类型为二类双次归一化， 否则为单次归一化； 若该差值大于或等于十六进制值 0x8000， 则比较概率区间值和第一小概率符 号概率值的差值与第二小概率符号概率值的关系： 若概率区间值与第一小概 率符号概率值的差值小于第二小概率符号概率值的两倍， 则当前归一化类型 为单次归一化， 否则计算概率区间值与第一小概率符号概率值的差值， 若该 差值小于第二小概率符号概率值与十六进制值 0x8000的和值， 则当前归一化 类型为单次归一化， 否则为零次归一化。
10、根据权利要求 8所述的高速实时处理算术熵编码系统，其特征在于， 上述归一化类型判断器在双上下文符号对的概率类型为大概率 /小概率符 号的情况下，
如果概率区间值小于第一小概率符号概率值的两倍， 则调整第一小概率 符号概率值， 若调整后的第一小概率符号概率值小于第二小概率符号概率值 的两倍， 则当前归一化类型为二类双次归一化， 否则为一类双次归一化； 如果概率区间值大于或等于第一小概率符号概率值的两倍， 且概率区间 值与第一小概率符号概率值的差值大于或等于十六进制值 0x8000， 则当前归 一化类型为单次归一化， 否则， 调整概率区间值与第一小概率符号概率值的 差值， 若调整后的差值大于或等于第二小概率符号概率值的两倍， 则当前归 一化类型为一类双次归一化， 否则为二类双次归一化。
11、根据权利要求 8所述的高速实时处理算术熵编码系统，其特征在于， 上述归一化类型判断器在双上下文符号对的概率类型为小概率 /大概率符 号的情况下，
如果概率区间值大于或等于第一小概率符号概率值的两倍， 则调整第一 小概率符号概率值， 若调整后的第一小概率符号概率值小于第二小概率符号 概率值的两倍， 则当前归一化类型为二类双次归一化， 否则， 计算该调整后 的第一小概率符号概率值与第二小概率符号概率值的差值， 如果该差值小于 十六进制值 0x8000， 则当前归一化类型为二类双次归一化， 否则为单次归一 化；
如果概率区间值小于第一小概率符号概率值的两倍， 则调整概率区间值 与第一小概率符号概率值的差值， 若该调整后的差值小于第二小概率符号概 率值的两倍， 则当前归一化类型为一类双次归一化， 否则， 比较该调整后的 差值与第二小概率符号概率值， 如果该调整后的差值与第二小概率符号概率 值之间的差值小于十六进制值 0x8000，则当前归一化类型为二类双次归一化， 否则为单次归一化。
12、根据权利要求 8所述的高速实时处理算术熵编码系统，其特征在于， 上述归一化类型判断器在双上下文符号对的概率类型为双小概率符号的 情况下， 将归一化类型判断为一类双次归一化。
13、根据权利要求 1所述的高速实时处理算术熵编码系统，其特征在于， 上述码流缓存器包括字节输出复选器和多个先入先出缓存器，
上述字节输出复选器将输入归一化码流和排空码流而输出的字节依次写 入多个先入先出缓存器并形成多个字节输出， 通过先入先出缓存器将多个字 节输出输出给输出选择器。
14、根据权利要求 1所述的高速实时处理算术熵编码系统，其特征在于， 上述输出选择器根据码流缓存器中的多个先入先出缓存器的状态， 按照 其优先级顺序读取各个先入先出缓存器中的编码码流并进行串行输出。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108391129A (zh) * 2018-04-25 2018-08-10 西安万像电子科技有限公司 数据编码方法及装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101820549B (zh) * 2010-03-19 2011-10-19 西安电子科技大学 基于jpeg2000标准的高速实时处理算术熵编码系统
WO2011113290A1 (zh) * 2010-03-19 2011-09-22 西安电子科技大学 基于联合图象专家组（jpeg）2000标准的高速实时处理算术熵编码方法
CN101968876B (zh) * 2010-09-17 2012-11-14 航天恒星科技有限公司 一种地面系统遥感图像的自适应实时处理方法
CN104811706B (zh) * 2011-01-06 2017-10-27 三星电子株式会社 视频的编码方法和装置及视频的解码方法和装置
CN102740075B (zh) * 2012-06-05 2015-02-11 沙基昌 一种视频数据的压缩/解压缩方法及系统
US10097833B2 (en) * 2014-12-26 2018-10-09 Intel Corporation Method and system of entropy coding using look-up table based probability updating for video coding
CN104683806B (zh) * 2015-02-28 2017-12-26 中国科学院长春光学精密机械与物理研究所 基于深度流水的mq算术编码器高速fpga实现方法
CN110365346B (zh) * 2019-07-22 2021-07-06 浙江大华技术股份有限公司 一种算术熵编码方法及系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1564196A (zh) * 2004-04-07 2005-01-12 西安交通大学 同步流水算术编码器的vlsi实现方法
CN1610265A (zh) * 2003-10-22 2005-04-27 松下电器产业株式会社 算术解码/编码装置、携带终端、活动图像摄影及记录/重放装置
CN1964496A (zh) * 2006-12-12 2007-05-16 北京中星微电子有限公司 编码器及自适应算术编码的实现方法及装置
US20080258947A1 (en) * 2007-04-19 2008-10-23 James Wilson Programmable compute system for executing an H.264 binary decode symbol instruction
CN101820549A (zh) * 2010-03-19 2010-09-01 西安电子科技大学 基于jpeg2000标准的高速实时处理算术熵编码系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1241391C (zh) * 2004-04-07 2006-02-08 西安交通大学 Jpeg2000列关联模式下位平面编码器的通道并行实现方法
CN101335897B (zh) * 2007-06-28 2010-08-25 联想(北京)有限公司 图像压缩/解码方法及系统

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1610265A (zh) * 2003-10-22 2005-04-27 松下电器产业株式会社 算术解码/编码装置、携带终端、活动图像摄影及记录/重放装置
CN1564196A (zh) * 2004-04-07 2005-01-12 西安交通大学 同步流水算术编码器的vlsi实现方法
CN1964496A (zh) * 2006-12-12 2007-05-16 北京中星微电子有限公司 编码器及自适应算术编码的实现方法及装置
US20080258947A1 (en) * 2007-04-19 2008-10-23 James Wilson Programmable compute system for executing an H.264 binary decode symbol instruction
CN101820549A (zh) * 2010-03-19 2010-09-01 西安电子科技大学 基于jpeg2000标准的高速实时处理算术熵编码系统

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108391129A (zh) * 2018-04-25 2018-08-10 西安万像电子科技有限公司 数据编码方法及装置
CN108391129B (zh) * 2018-04-25 2019-09-27 西安万像电子科技有限公司 数据编码方法及装置

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