WO2011112129A1 - A decomposition transmitting system and method for improving efficiency and linearity - Google Patents

A decomposition transmitting system and method for improving efficiency and linearity Download PDF

Info

Publication number
WO2011112129A1
WO2011112129A1 PCT/SE2010/050279 SE2010050279W WO2011112129A1 WO 2011112129 A1 WO2011112129 A1 WO 2011112129A1 SE 2010050279 W SE2010050279 W SE 2010050279W WO 2011112129 A1 WO2011112129 A1 WO 2011112129A1
Authority
WO
WIPO (PCT)
Prior art keywords
block
signal
digital processing
transmitting system
amplifying
Prior art date
Application number
PCT/SE2010/050279
Other languages
English (en)
French (fr)
Inventor
Paul Gareth Lloyd
Original Assignee
Zte Wistron Telecom Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zte Wistron Telecom Ab filed Critical Zte Wistron Telecom Ab
Priority to PCT/SE2010/050279 priority Critical patent/WO2011112129A1/en
Priority to RU2012142252/08A priority patent/RU2012142252A/ru
Priority to CN2010800653807A priority patent/CN102906996A/zh
Priority to EP10847574.0A priority patent/EP2545644A4/en
Publication of WO2011112129A1 publication Critical patent/WO2011112129A1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3209Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the amplifier comprising means for compensating memory effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3212Using a control circuit to adjust amplitude and phase of a signal in a signal path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3224Predistortion being done for compensating memory effects
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2201/00Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3233Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21106An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21142Output signals of a plurality of power amplifiers are parallel combined to a common output

Definitions

  • the present invention relates to communication system and especially to a transmitting system in the communication system.
  • Transmitting system in the communication system comprises a number of different subsystems.
  • the performance of the transmitting system can be measured according to various metrics, including efficiency and linearity.
  • efficiency and linearity Usually, the primary performance of the transmitting system is limited by a power amplifier.
  • Linearity requirements for the transmitting system are usually defined in the specification of the transmitting system.
  • Efficiency requirements for the transmitting system are usually, and increasingly, influenced by the market.
  • the goal for improving the performance of the transmitting system is to achieve the minimum required signal quality (linearity) with the minimum wasted power (efficiency).
  • FIG. 1 A typical architecture for improving the efficiency of the transmitting system is showed in figure 1.
  • This architecture is called "fixed RF input split Doherty-type amplifier with pre-distortion", in which the system is linearized by digital pre-distortion (or, DPD).
  • efficiency-improving techniques e.g. Doherty
  • Doherty require amplifiers to output amplified signals to a combiner with the characteristic required by the combiner.
  • These characteristic required by the combiner are well defined in theory, but in practice, they are difficult to produce and maintain.
  • the system is used to realize amplifiers (e.g. Doherty amplifier) that are not able to auto-generate the complex characteristic required by the combiner.
  • amplifiers e.g. Doherty amplifier
  • the present invention provides a decomposition transmitting system and method, which can simultaneously improve efficiency and linearity of the transmitting system, as well as improve featurebility and stability of the transmitting system, compared with the prior art.
  • efficiency is the ratio of the useful signal level generated by the transmitting system to the signal level input into the transmitting system
  • linearity is generally the ratio of the useful signal level to unwanted or distorted signal level
  • featurebility means the suitability for manufacturing the transmitting system, while meeting the specification at lower or lowest cost
  • stability means the capability to maintain specified performance of the transmitting system throughout the lifetime of the product and/or in various operating conditions of the product.
  • An object of the present invention is to provide a decomposition transmitting system comprising a data source block, a digital processing block, an amplifying block, a combining block, and an outputting
  • the digital processing block comprises: one or more digital processing sub-blocks, each digital processing sub-block being configured to perform a mathematical transformation on its input signal, to decompose a signal from the data source block into a plurality of transformed signals, and each of the plurality of transformed signals being output to a corresponding input of the amplifying block, whereby the efficiency and linearity of the decomposition transmitting system are improved.
  • the mathematical transformation is designed to realize desired characteristics of amplifiers in the amplifying block.
  • some or all of the one or more digital processing sub-blocks in the digital processing block perform the mathematical transformation by using a feedback signal from the outputting block/monitor.
  • the amplifying block and the combining block are designed for Doherty type operation.
  • the plurality of transformed signals comprise the signal from the data source block.
  • the amplifying block comprises one or more splitters, each splitter is configured to split one of the plurality of transformed signals from the digital processing block.
  • one of the one or more splitters is configured to split the signal from the data source block into more than one split signals and output one of the split signals to a main amplifier in the amplifying block and the other split signai(s) to corresponding peaking amplifier(s) in the amplifying block.
  • each of the one or more splitters are configured to split one of the plurality of transformed signals except the signal from the data source block into more than one split signals and output the split signals to corresponding peaking amplifiers in the amplifying block.
  • one of the one or more digital processing sub-blocks is a digital pre-distortion sub-block
  • the digital pre-distortion sub-block is configured to receive the signal from the data source block and output a digital pre-distorted signal to other digital processing sub-blocks and the amplifying block.
  • the amplifying block comprises one or more splitters, each splitter is configured to split one of the plurality of transformed signals from the digital processing block.
  • one of the one or more splitters is configured to split the digital pre-distorted signal from the digital pre-distortion sub-block into more than one split signals and output one of the split signals to a main amplifier in the amplifying block and the other split signal(s) to corresponding peaking amplifier(s) in the amplifying block.
  • each of the one or more splitters are configured to split one of the plurality of transformed signals except the digital pre-distorted signal from the digital pre-distortion sub-block into more than one split signals and output the split signals to corresponding peaking amplifiers in the amplifying block.
  • An object of the present invention is to provide a decomposition transmitting method, the method comprises: performing a mathematical transformation on an input signal of each digital processing sub-block of a digital processing block in a transmitting system, to decompose a signal from a data source block in the transmitting system into a plurality of transformed signals; outputting each of the plurality of transformed signals to a
  • the mathematical transformation is designed to realize desired characteristics of amplifiers in the amplifying block.
  • the step of performing a mathematical transformation further comprises: performing the mathematical transformation by using a feedback signal from an outputting block/monitor in the transmitting system.
  • the method further comprises: designing the amplifying block and a combining block in the transmitting system for Doherty type operation.
  • the plurality of transformed signals comprise the signal from the data source block.
  • the method further comprises: splitting one or more of the plurality of transformed signals from the digital processing block.
  • the method further comprises: splitting the signal from the data source block into more than one split signals; and outputting one of the split signals to a main amplifier in the amplifying block and the other split signal(s) to corresponding peaking amplifier(s) in the amplifying block.
  • the method further comprises: splitting respectively one or more of the plurality of transformed signals except the signal from the data source block into more than one split signals; and outputting the split signals to corresponding peaking amplifiers in the amplifying block.
  • one of the digital processing sub-blocks is a digital pre-distortion sub-block
  • the method further comprises: pre-distorting the signal from the data source block into a digital pre-distorted signal; and outputting the digital pre-distorted signal to other digital processing sub-blocks and the amplifying block.
  • the method further comprises: splitting one or more of the plurality of transformed signals from the digital processing block.
  • the method further comprises: splitting the digital pre-distorted signal from the digital pre- distortion sub-block into more than one split signals; and outputting one of the split signals to a main amplifier in the amplifying block and the other split signal(s) to corresponding peaking amplifier(s) in the amplifying block.
  • the method further comprises: splitting respectively one or more of the plurality of transformed signals except the digital pre-distorted signal from the digital pre- distortion sub-block into more than one split signals; and outputting the split signals to corresponding peaking amplifiers in the amplifying block.
  • Figure 1 shows a system of the prior art which comprises a digital pre- distortion sub-block
  • Figure 2 shows a decomposition transmitting system for improve efficiency and linearity of the system
  • Figure 3(a) shows a "3-way Doherty-type amplifier with two channel inputs" decomposition transmitting system with pre-distortion function according to one embodiment of the present invention
  • Figure 3(b) shows a "3-way Doherty-type amplifier with two channel inputs" decomposition transmitting system with pre-distortion function according to another embodiment of the present invention
  • Figure 4 shows a "2-way Doherty-type amplifier with two channel inputs" decomposition transmitting system with pre-distortion function according to one embodiment of the present invention
  • Figure 5 shows a flow chart with which the embodiments of figure 3(a), 3(b) and 4 operate;
  • Figure 6(a) shows a "3-way Doherty-type Amplifier with two channel inputs" decomposition transmitting system without pre-distortion function according to one embodiment of the present invention
  • Figure 6(b) shows a "3-way Doherty-type Amplifier with two channel inputs" decomposition transmitting system without pre-distortion function according to another embodiment of the present invention
  • Figure 7 shows a "2-way Doherty-type amplifier with two channel inputs" decomposition transmitting system without pre-distortion function according to one embodiment of the present invention
  • Figure 8 shows a flow chart with which the embodiments of figure 6(a), 6(b) and 7 operate.
  • the improved transmitting system can solve the intrinsic problems of the prior art by introducing a concept of "decomposition".
  • the improved transmitting system of the present invention can be called a decomposition transmitting system.
  • the reference output from the data source block or (optional) digital pre-distortion sub-block is copied into two or more paths, which in turn are modified independently and differently in the digital processing block.
  • the individual outputs from the digital processing block (which have of course been converted into analog form and undergone any necessary frequency conversion, as per the prior art), passed to the amplifying block and combining block, usually exhibit little correlation with the desired output.
  • one or more digital processing sub-blocks are included in the digital processing block. It is noted that one of the one or more digital processing sub-blocks may be a digital pre-distortion sub-block as in the prior art.
  • the function of the digital pre-distortion sub-block is the same with that in the prior art.
  • the digital pre-distortion sub-block can ensure that the whole transmitting system is linear.
  • the digital pre-distortion sub-block has two inputs, that is, a signal from the data source block and a signal fed back from the outputting block/monitor. The digital pre-distortion sub-block will attempt to correlate these two inputs.
  • the overall characteristic of the amplifier can be modified by other digital processing sub-blocks except the digital pre-distortion sub-block.
  • the extent, to which the characteristic of the amplifier is modified depends on the algorithm used, which will be discussed in detail.
  • the characteristic of the amplifier might be modified by the other digital processing sub-blocks to increase the efficiency of the amplifier.
  • the resultant, modified amplifier characteristic is automatically and subsequently linearized by the digital pre-distortion sub-block.
  • the other digital processing sub-blocks might be used to reduce the level of distortion from the amplifier, that is, improve the linearity together with the digital pre-distortion sub-block, in still another example, the other digital processing sub-blocks might actually add distortion to the amplifier, but in such a way that
  • the digital pre-distortion sub-block linearization is more easily achieved by the digital pre-distortion sub-block.
  • the other digital processing sub-blocks might actually be used to completely linearize the system by itself, thus removing the need for the digital pre-distortion sub-block.
  • the function of the digital processing sub- blocks depends on actual application needs.
  • the efficiency and linearity of the transmitting system can be improved by the one or more digital processing sub-blocks with or without the digital pre-distortion sub-block.
  • the specific embodiments for improving the efficiency and linearity of the transmitting system which comply with the principle of the present invention will be discussed in detail below.
  • the decomposition transmitting system sequentially comprises a data source block, a digital processing block, an amplifying block, a
  • the reference signal is output from the data source block.
  • This reference signal enters the digital processing block where the signal is processed to produce a number of outputs.
  • These outputs are passed to an amplifying block with two or more independent amplifying channels.
  • the signals are subsequently passed to a combining block which combines the signals output from the amplifying block, so as to reconstruct an amplified version of the reference input, with a high signal level suitable for transmission.
  • the data source block is the source of the reference signal for the system.
  • the digital processing block receives the reference signal from the data source block, and optionally, receives feedback signal from the outputting block/monitor (which itself might be frequency shifted, but anyway is digitized and processed, as known to those skilled in the art).
  • the feedback signal from the outputting block/monitor may be used by none, some or all of the digital processing sub-blocks in the digital processing block.
  • the feedback signal from the outputting block/monitor can be used by the training
  • the reference signal is processed in the digital processing block, and the processed signal is output to the amplifying block.
  • the digital processing block comprises one or more digital processing sub-blocks. Each digital processing sub-block may perform a fixed or adaptable transformation on the signal input to it. Specifically, each digital processing sub-block transforms its own input signal by applying a mathematical transformation.
  • transformation applied might be adapted according to the feedback signal from the outputting block/monitor. The transformation will be discussed in detail with reference to figures 5 and 8.
  • the first input digital processing block which receives the signal from the data source block, may be a digital pre- distortion (DPD) sub-block, which usually performs a linearization function.
  • DPD digital pre- distortion
  • signals are passed between the digital processing sub-blocks according to the connection relationship between the digital processing sub-blocks.
  • the digital processing sub-blocks can be connected in various manners according to actual needs.
  • the digital processing sub-blocks may be, for example, linear or non-linear, time- dependent or time-independent, and implemented as mathematical formula or look up tables (LUTs) or other means, which are well known to those skilled in the art.
  • the amplifying block may contain one or more "linear input splitter" sub-blocks, which will be discussed hereinafter. There are two or more interfaces between the digital processing block and the amplifying block. There are two or more interfaces between the amplifying block and the combining block.
  • the combining block combines the signals from the amplifying block according to the design of the combining block.
  • the combining block has at least two inputs from the amplifier block and one output to the output/monitor.
  • the combining block is Doherty type.
  • the Doherty type combining block demands particular signals from the amplifying block.
  • Other types of combining block will place different demands on signals from the amplifying block.
  • the outputting block/monitor is a subsystem for further transmitting the amplified signal.
  • the outputting block/monitor can be used to take a sample of output signal back to the digital processing block, and the signal fed back to the digital processing block is distributed to one or more sub-blocks of digital processing blocks for adaptation.
  • the outputting block/monitor can also be used by the system for other monitoring purposes, before passing the signal into the transmission medium.
  • m is equal to 1 or equal to n (n>1). While in the present invention, in certain embodiments, m is larger than 1 and m may be equal to or less than n. Ideally, m is equal to 2 for minimum complexity.
  • a person skill in the art can easily construct a "n-way Doherty-type amplifier with m channel inputs (m ⁇ n)" decomposition transmitting system. In fact, efficiency increases as n increases, but in a rapidly diminishing manner. In some applications, higher values of n are advantageous; for example, where very high output signal levels are required from the transmitter.
  • a "3-way Doherty-type amplifier with two channel inputs" decomposition transmitting system with pre-distortion function is showed.
  • the digital pre-distortion sub-block performs a pre- distortion on the reference signal, which is common to all channels in the amplifying block.
  • the digital processing sub-block performs a transformation on the pre-distorted signal, so as to improve the performances of the decomposition transmitting system, for example, linearity, linearizability, efficiency or combination of these or other performances.
  • embodiments have corresponding advantages, such as improved efficiency, linearity, featurebility and stability.
  • the output from the digital pre-distortion sub-block is input into a linear input splitter, the output from which is input into a first peaking amplifier and a main amplifier; the output from the digital processing sub-block is input into a second peaking amplifier.
  • the output from the digital pre-distortion sub-block is input into a main amplifier; the output from the digital processing sub-block is input into a linear input splitter, the output from which is input into a first peaking amplifier and a second peaking amplifier.
  • the output from the digital pre-distortion sub-block is also input into the digital processing sub- block.
  • Figures 3(a) and 3(b) are the same in that there being two different outputs from the digital processing block compared with the prior art.
  • the feedback signal from the outputting block/monitor is fed back to the digital processing block. In this way, the signal from the digital processing sub-block is fed back to the digital pre-distortion sub-block.
  • a "2-way Doherty-type amplifier with two channel inputs" system with pre- distortion function is showed.
  • the digital processing block is the same with that in figures 3(a) and 3(b).
  • figures 3(a) and 3(b) there is no linear input splitter in the amplifying block. Therefore, the number of the inputs to the amplifying block equals to the number of the outputs to the combining block.
  • the signal output from the digital pre-distortion sub-block is also input into the digital processing sub-block.
  • the combining block and the outputting block/monitor in figure 4 are the same with those in figures 3(a) and 3(b).
  • a digital processing sub-block which is unique to one channel in the amplifying block, applies a transformation to the pre-distorted signal, so as to improve the performances of the decomposition transmitting system, for example, linearity, linearizability, efficiency or combination of these or other
  • This embodiment has corresponding advantages, such as improved efficiency, linearity, featurebility and stability, as discussed before.
  • the digital processing sub-blocks in the digital processing block implement a procedure showed by the flow chart of figure 5.
  • Figure 5 describes a flow chart that the digital processing sub-blocks in the digital processing block of figure 3(a), 3(b) and 4 might operate with.
  • step 501 the procedure starts, then the procedure proceeds to step
  • step 502 select a training frequency and target_gain, which may be a scalar or a vector, a relative value or an absolute value. Then set the signal output from the digital pre-distortion sub-block to a low level, and set the multiplier (which may be a scalar or a vector) of another digital processing sub-block to 0. And monitor the signal output from the outputting
  • a maximum value for the small signal "gain" may be
  • the target_gain is usually decided by a designer when designing the system. The designer decides the target_gain according to the desired result and the type and characteristic (which will never be ideal) of the amplifier. Then the procedure proceeds to step 503.
  • step 503 increase the level of the signal output from the digital pre- distortion sub-block by a fixed amount or ratio, and monitor the signal output from the outputting block/monitor. Then calculate a gain which is a ratio of the level of the signal output from the outputting block/monitor to the level of the signal output from the pre-distortion sub-block. Then the procedure proceeds to step 504.
  • the procedure assesses whether the absolute value of the calculated gain is less than the absolute value of target_cjain. If the absolute value of the calculated gain is less than the absolute value of target_gain, then the procedure proceeds to step 505; otherwise, the procedure returns to step 503.
  • step 505 increase the level of the signal output from the digital pre- distortion sub-block by a fixed amount or ratio. Then the procedure proceeds to step 506.
  • step 506 adjust/search the multiplier of the digital processing sub- block. Then monitor the signal output from the outputting block/monitor and calculate the gain. Then the procedure proceeds to step 507.
  • the procedure decides whether the calculated gain is equal to target_gain. If the gain is equal to target_gain, then the procedure proceeds to step 508; otherwise, the procedure proceeds to step 510.
  • the procedure decides whether the desired appropriate multiplier of the digital processing sub-block has been found. It should be noted that the desired appropriate multiplier is predetermined according to the desired result and the characteristic the amplifier. In one example, the desired appropriate multiplier is chosen to have the lowest magnitude. In another example, the desired appropriate multiplier is chosen to give the desired output signal level with the highest efficiency. If the appropriate multiplier of the digital processing sub-block has been found, then the procedure proceeds to step 509; otherwise, the procedure returns to step 506.
  • step 509 store e.g. the signal level output from the digital pre- distortion sub-block, the training frequency etc. (the independent variables) and the corresponding multiplier of the digital processing sub-block (the dependent variable) in a look up table, for example. Then the procedure returns to step 505.
  • the procedure decides whether maximum output level of any of the sub-blocks in the digital processing block or the amplifying block has been reached. Typically, when no more output level can be extracted, i.e. the decomposition transmitting system has reached its "saturated output level", the maximum output level is reached. If the maximum output level of any of the sub-blocks in the digital processing block and the amplifying block has been reached, then the procedure proceeds to step 511 ; otherwise, the procedure returns to step 506.
  • the procedure decides whether training has completed. The decision depends on the characteristics of the actual system. In most cases, training would take place over a number of discrete frequencies and perhaps also temperature. A first frequency and/or temperature are
  • step 512 If training has completed, then the procedure ends at step 512; otherwise, the procedure returns to step 502.
  • the distortion exhibited by the amplifier may have different effects on the different signal being transmitted.
  • An amplifier which exhibits some distortion may not actually distort a signal being transmitted. For example, if the signal being transmitted has only large signal levels, and the amplifier only exhibits distortion on small signal, then the large signal will not experience any distortion; and vice versa.
  • AM-AM means “amplitude modulation to amplitude modulation conversion”
  • AM-PM means “amplitude modulation to phase modulation conversion”.
  • Table 1 target_gain is a constant and a scalar
  • pre-distortion & pre-distortion & signal transformation performed by transformation other digital processing sub- performed by other biock(s) digital processing sub-block(s) target_gain is a constant and a vector
  • the decomposition transmitting system will have both higher efficiency and better linearity than the transmitting system in the prior art. This is primarily because the Doherty (prior art) amplifiers in the prior art system are not able to reproduce (i.e. output to the combiner) the precise signals required to operate as a true Doherty amplifier. With the invention, the precise output signals from the amplifiers, required for Doherty operation, can be created in an arbitrarily accurate manner.
  • the digital processing sub-blocks do not comprise a digital pre-distortion sub-block.
  • a "3-way Doherty-type Amplifier with two channel inputs" decomposition transmitting system without digital pre-distortion function is showed.
  • the amplifying block in figure 6(a) is the same with that in figure 3(a)
  • the amplifying block in figure 6(b) is the same with that in figure 3(b).
  • the digital processing sub-block implements a procedure showed by the flow chart of figure 8.
  • Figure 8 describes a flow chart the digital processing sub-blocks in the digital processing block of figure 6(a), 6(b) and 7 operate with. Variations to the flow chart are obvious to those skilled in the art. Alternatively, other procedures for realize the same purpose can be used. The procedure is as follows.
  • step 801 the procedure starts, then the procedure proceeds to step
  • step 802 select a training frequency and target gain, which may be a scalar or a vector, and an absolute value. Then set the signal output from the data source block to a specific level, and set the multiplier (which may be a scalar or vector) of the digital processing sub-block to 0.
  • the target_gain should usually be set to a lower magnitude value.
  • the target_gain is usually decided by a designer when designing the system. The designer decides the target_gain according to the desired result and the type and characteristic (which will never be ideal) of the amplifier. Then the procedure proceeds to step 803.
  • step 803 increase the level of the signal output from the data source block by a fixed amount or ratio, and monitor the signal output from the outputting block/monitor. Then calculate a gain which is a ratio of the level of the signal output from the outputting block/monitor to the level of the signal output from the data source block. Then the procedure proceeds to step 804.
  • step 804 adjust/search the multiplier of the digital processing sub- block. Then monitor the signal output from the data source block and calculate the gain. Then the procedure proceeds to step 807.
  • the procedure decides whether the calculated gain is equal to target_gain. If the gain is equal to target__gain, then the procedure proceeds to step 806; otherwise, the procedure proceeds to step 808.
  • the procedure decides whether the desired appropriate multiplier of the digital processing sub-block has been found.
  • the desired appropriate multiplier is chosen to have the lowest magnitude.
  • the desired appropriate multiplier is chosen to give the desired output signal level with the highest efficiency. If the appropriate multiplier of the digital processing sub-block has been found, then the procedure proceeds to step 807; otherwise, the procedure returns to step 804.
  • step 807 store e.g. the signal level output from the data source block, the training frequency etc. (the independent variables) and the corresponding multiplier of the digital processing sub-block (the dependent variable) in a look up table, for example. Then the procedure returns to step 803.
  • the procedure decides whether maximum output level of any of the sub-blocks in the digital processing block and the amplifying block has been reached. Typically, when no more output level can be extracted, i.e. the decomposition transmitting system has reached its "saturated output level", the maximum output level is reached. If the maximum output level of any of the sub-blocks in the digital processing block and the amplifying block has been reached, then the procedure proceeds to step 809; otherwise, the procedure returns to step 804.
  • the procedure decides whether training has completed. The decision depends on the characteristics of the actual system. In most cases, training would take place over a number of discrete frequencies and perhaps also temperature. A first frequency and/or temperature are
  • step 810 If training has completed, then the procedure ends at step 810; otherwise, the procedure returns to step 802.
  • the digital processing sub-block will simultaneously improve the overall efficiency and linearity of the decomposition transmitting system and reduce the complexity of the digital pre-distortion sub-block.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)
PCT/SE2010/050279 2010-03-12 2010-03-12 A decomposition transmitting system and method for improving efficiency and linearity WO2011112129A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/SE2010/050279 WO2011112129A1 (en) 2010-03-12 2010-03-12 A decomposition transmitting system and method for improving efficiency and linearity
RU2012142252/08A RU2012142252A (ru) 2010-03-12 2010-03-12 Передающая система и способ повышения кпд и линейности на принципах декомпозиции
CN2010800653807A CN102906996A (zh) 2010-03-12 2010-03-12 用于改善效率和线性度的分解发射系统及方法
EP10847574.0A EP2545644A4 (en) 2010-03-12 2010-03-12 DECOMMISSION TRANSFER SYSTEM AND METHOD FOR IMPROVING EFFICIENCY AND LINEARITY

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SE2010/050279 WO2011112129A1 (en) 2010-03-12 2010-03-12 A decomposition transmitting system and method for improving efficiency and linearity

Publications (1)

Publication Number Publication Date
WO2011112129A1 true WO2011112129A1 (en) 2011-09-15

Family

ID=44563719

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE2010/050279 WO2011112129A1 (en) 2010-03-12 2010-03-12 A decomposition transmitting system and method for improving efficiency and linearity

Country Status (4)

Country Link
EP (1) EP2545644A4 (ru)
CN (1) CN102906996A (ru)
RU (1) RU2012142252A (ru)
WO (1) WO2011112129A1 (ru)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013086658A1 (en) 2011-12-15 2013-06-20 Telefonaktiebolaget L M Ericsson (Publ) Doherty power amplification apparatus and method
EP2779436A1 (en) * 2013-03-15 2014-09-17 HBC Solutions, Inc. Linearization of heterogeneous power amplifier systems
EP2882097A1 (en) * 2013-12-09 2015-06-10 Alcatel Lucent Method for optimizing operation of a doherty amplifier and doherty amplifier
WO2020148094A1 (de) * 2019-01-20 2020-07-23 IAD Gesellschaft für Informatik, Automatisierung und Datenverarbeitung mbH Sende- und empfangsvorrichtung mit einem breitband-hf-leistungsverstärker, insbesondere n-wege-doherty verstarker mit aktiver lastmodulation
US11218118B2 (en) 2020-03-30 2022-01-04 Analog Devices International Unlimited Company Linearity optimizer for a millimeter-wave beamforming system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552059A1 (en) * 1992-01-16 1993-07-21 Japan Radio Co., Ltd Power amplifier device
EP1758242A1 (en) * 2004-06-18 2007-02-28 Mitsubishi Electric Corporation High-efficiency amplifier
US20080111622A1 (en) * 2006-11-14 2008-05-15 Roland Sperlich Hybrid Doherty Amplifier System and Method
US20080238544A1 (en) * 2007-03-30 2008-10-02 Nortel Networks Limited Amplifier pre-distortion systems and methods

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6472934B1 (en) * 2000-12-29 2002-10-29 Ericsson Inc. Triple class E Doherty amplifier topology for high efficiency signal transmitters
US20060001485A1 (en) * 2004-07-02 2006-01-05 Icefyre Semiconductor Corporation Power amplifier
US7619468B1 (en) * 2008-09-30 2009-11-17 Nortel Networks Limited Doherty amplifier with drain bias supply modulation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0552059A1 (en) * 1992-01-16 1993-07-21 Japan Radio Co., Ltd Power amplifier device
EP1758242A1 (en) * 2004-06-18 2007-02-28 Mitsubishi Electric Corporation High-efficiency amplifier
US20080111622A1 (en) * 2006-11-14 2008-05-15 Roland Sperlich Hybrid Doherty Amplifier System and Method
US20080238544A1 (en) * 2007-03-30 2008-10-02 Nortel Networks Limited Amplifier pre-distortion systems and methods

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PARK I.-S. ET AL: "Parallel adaptive predistortion for RF power amplifier linearization", IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE, 1997. GLOBECOM '97, vol. 1, 1997, pages 82 - 86, XP010254580 *
See also references of EP2545644A4 *

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2751926A4 (en) * 2011-12-15 2015-07-29 Ericsson Telefon Ab L M APPARATUS AND METHOD FOR POWER AMPLIFICATION DOHERTY
CN104054260B (zh) * 2011-12-15 2016-11-09 爱立信(中国)通信有限公司 Doherty功率放大设备和方法
CN104054260A (zh) * 2011-12-15 2014-09-17 爱立信(中国)通信有限公司 Doherty功率放大设备和方法
WO2013086658A1 (en) 2011-12-15 2013-06-20 Telefonaktiebolaget L M Ericsson (Publ) Doherty power amplification apparatus and method
US9374041B2 (en) 2011-12-15 2016-06-21 Telefonaktiebolaget Lm Ericsson (Publ) Doherty power amplification apparatus and method
JP2014241576A (ja) * 2013-03-15 2014-12-25 エイチビーシー ソリューションズ, インコーポレイテッドHbc Solutions, Inc. 異種電力増幅器システムの線形化
US8952754B2 (en) 2013-03-15 2015-02-10 Imagine Communications Corp. Linearization of heterogeneous power amplifier systems
EP2779436A1 (en) * 2013-03-15 2014-09-17 HBC Solutions, Inc. Linearization of heterogeneous power amplifier systems
EP2882097A1 (en) * 2013-12-09 2015-06-10 Alcatel Lucent Method for optimizing operation of a doherty amplifier and doherty amplifier
WO2020148094A1 (de) * 2019-01-20 2020-07-23 IAD Gesellschaft für Informatik, Automatisierung und Datenverarbeitung mbH Sende- und empfangsvorrichtung mit einem breitband-hf-leistungsverstärker, insbesondere n-wege-doherty verstarker mit aktiver lastmodulation
CN113474992A (zh) * 2019-01-20 2021-10-01 Iad信息自动化及数据处理有限公司 具有宽带HF功率放大器特别是具有有源负载调制的N路Doherty放大器的传输和接收设备
US11652448B2 (en) 2019-01-20 2023-05-16 IAD Gesellschaft für Informatik, Automatisierung und Datenverarbeitung mbH Transmitting and receiving device having a wide-band HF power amplifier, in particular an N-way Doherty amplifier having active load modulation
US11218118B2 (en) 2020-03-30 2022-01-04 Analog Devices International Unlimited Company Linearity optimizer for a millimeter-wave beamforming system

Also Published As

Publication number Publication date
RU2012142252A (ru) 2014-04-20
EP2545644A1 (en) 2013-01-16
CN102906996A (zh) 2013-01-30
EP2545644A4 (en) 2013-09-18

Similar Documents

Publication Publication Date Title
JP5205182B2 (ja) 歪補償増幅装置
CN101675584B (zh) 放大器预失真系统和方法
JP5236661B2 (ja) 多チャンネル広帯域通信システムにおけるベースバンドプリディストーション線形化の方法及びシステム
CN101416382B (zh) 用于减少rf功率放大器中的频率记忆效应的方法和设备
KR101679230B1 (ko) 전력증폭기의 비선형 특성을 보상하는 다항식 디지털 전치왜곡 장치 및 그 방법
CN104363191B (zh) 一种跳频通信系统的数字预失真方法
Staudinger et al. Memory fading Volterra series model for high power infrastructure amplifiers
US8564368B1 (en) Digital Predistorter (DPD) structure based on dynamic deviation reduction (DDR)-based volterra series
CA2817805A1 (en) Orthogonal basis function set for digital predistorter
CN102025327A (zh) 放大器装置和预失真控制方法
JP2005117599A (ja) 高周波増幅器
EP3665773A1 (en) Polyphase digital signal predistortion in radio transmitter
WO2011112129A1 (en) A decomposition transmitting system and method for improving efficiency and linearity
Nader et al. Peak-power controlling technique for enhancing digital pre-distortion of RF power amplifiers
Rahati Belabad et al. An accurate digital baseband predistorter design for linearization of RF power amplifiers by a genetic algorithm based Hammerstein structure
Karimi et al. An analog/digital pre-distorter using particle swarm optimization for RF power amplifiers
US20190097589A1 (en) Circuit and method for predistortion
CN100512246C (zh) 一种射频预失真线性化方法
Pan et al. Digital linearization of multiple power amplifiers in phased arrays for 5G wireless communications
JP2008028746A (ja) 歪み補償装置
KR20120054369A (ko) 메모리 다항식 모델을 이용하는 전치 왜곡 장치, 그것의 전치 왜곡 방법, 및 전치 왜곡 장치를 포함하는 시스템
Naraharisetti et al. 2D quasi exact inverse of PA model in digital predistorter for concurrent dual-band system
Rahmanian et al. Efficient fpga implementation of a digital predistorter for power amplifier linearization
KR102640792B1 (ko) 전치왜곡 보상 장치 및 방법
Byrne et al. Recursive pre-distorter for hardware efficient digital pre-distortion

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 201080065380.7

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10847574

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2010847574

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2012142252

Country of ref document: RU