WO2011083719A1 - Method and apparatus for etching of surface layer part of silicon wafer, and method for analysis of metal contamination in silicon wafer - Google Patents

Method and apparatus for etching of surface layer part of silicon wafer, and method for analysis of metal contamination in silicon wafer Download PDF

Info

Publication number
WO2011083719A1
WO2011083719A1 PCT/JP2010/073592 JP2010073592W WO2011083719A1 WO 2011083719 A1 WO2011083719 A1 WO 2011083719A1 JP 2010073592 W JP2010073592 W JP 2010073592W WO 2011083719 A1 WO2011083719 A1 WO 2011083719A1
Authority
WO
WIPO (PCT)
Prior art keywords
gas
etching
silicon wafer
acid
surface layer
Prior art date
Application number
PCT/JP2010/073592
Other languages
French (fr)
Japanese (ja)
Inventor
崇史 山下
モハマッド.ビー.シャバニー
Original Assignee
株式会社Sumco
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社Sumco filed Critical 株式会社Sumco
Priority to JP2011548966A priority Critical patent/JPWO2011083719A1/en
Publication of WO2011083719A1 publication Critical patent/WO2011083719A1/en

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00Sampling; Preparing specimens for investigation
    • G01N1/28Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/32Polishing; Etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching

Definitions

  • the present invention relates to an etching method and an etching apparatus for a silicon wafer surface layer, and more specifically, a silicon wafer surface layer suitable as a method and apparatus for etching the surface layer of the silicon wafer in order to analyze metal contamination of the silicon wafer.
  • the present invention relates to an etching method and an etching apparatus. Furthermore, the present invention relates to a method for analyzing metal contamination of a silicon wafer using the etching method or the etching apparatus.
  • an atomic absorption photometer (AAS) or an inductively coupled plasma mass spectrometer is prepared by dissolving the silicon wafer surface layer with an acid solution and diluting or concentrating the acid solution.
  • a method of quantitative analysis by (ICP-MS) was used (hereinafter referred to as “liquid phase etching method”).
  • ICP-MS quantitative analysis by
  • the metal impurity concentration is diluted by a large amount of acid solution, the sensitivity decrease due to insufficient sensitivity or increase in analysis background due to carry-in contamination from the acid solution itself is high in the semiconductor manufacturing field where ultra-trace metal impurity evaluation is required. This hindered sensitivity analysis.
  • the silicon wafer surface layer is decomposed with acid vapor (etching gas), and the decomposition residue is collected and quantitatively analyzed by AAS or ICP-MS (hereinafter, “ (Referred to as Japanese Patent No. 3832204, the entire description of which is specifically incorporated herein by reference).
  • the above-mentioned gas phase etching method has been studied on the merits that a small amount of acid solution may be used for etching and the amount of contamination brought in from the acid solution itself is very small compared to liquid phase etching.
  • the vapor phase etching method has a very slow reaction rate between the acid (acid vapor) and the semiconductor substrate as compared with the liquid phase etching method. Therefore, there is a problem that the analysis sensitivity is low because the etching amount in a certain time is small. Although it is possible to increase the etching amount by performing an etching reaction for a long time, it takes a long time for the analysis, resulting in a significant decrease in productivity.
  • a first object of the present invention is to provide means for enabling high-sensitivity analysis by short-time etching processing in silicon wafer surface layer analysis by vapor phase etching.
  • an acid vapor obtained by vaporizing a mixed acid of hydrofluoric acid and nitric acid (that is, a mixed gas of hydrogen fluoride gas and nitric acid gas) is mainly used as an etching gas.
  • a mixed acid of hydrofluoric acid and nitric acid that is, a mixed gas of hydrogen fluoride gas and nitric acid gas
  • the present inventors have newly found that the reaction rate of gas phase decomposition can be greatly increased by mixing nitrogen oxide gas with the acid vapor. . This makes it possible to etch a quantity of silicon wafer that can be analyzed with high sensitivity even with an etching time equivalent to that of the conventional method. The inventors presume this reason as follows.
  • NOx gas nitrogen oxide gas
  • etching rate reaction rate of the gas phase decomposition
  • One embodiment of the present invention provides: A method for etching a silicon wafer surface layer portion, wherein the silicon wafer surface layer portion is etched by bringing the silicon wafer surface into contact with an etching gas, Using the mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas as the etching gas, It is about.
  • the etching method may include generating the nitrogen oxide gas and the nitric acid gas from a mixed acid of nitric acid and hydrofluoric acid containing silicon pieces (hereinafter referred to as “mixed acid A”).
  • the silicon piece may be a silicon wafer piece.
  • the hydrogen fluoride gas can be generated from a mixed acid of hydrofluoric acid and sulfuric acid (hereinafter referred to as “mixed acid B”) or hydrofluoric acid heated to 30 ° C. to 50 ° C.
  • mixed acid B a mixed acid of hydrofluoric acid and sulfuric acid
  • the mixed gas causes nitrogen oxide gas and nitric acid gas generated by bubbling a carrier gas to the mixed acid A to bubble the carrier gas to the mixed acid B or hydrofluoric acid heated to 30 ° C. to 50 ° C. It can prepare by mixing with the hydrogen fluoride gas generated by this.
  • the Si compound (Si residue) generated on the silicon wafer to be evaluated by the vapor phase etching reaction becomes a disturbing substance in the quantitative evaluation in AAS and ICP-MS and prevents accurate quantitative evaluation.
  • the detection sensitivity is insufficient as a method for analyzing metal contamination of silicon wafers that require high-sensitivity analysis of ultra-trace metal components.
  • a second object of the present invention is to provide means for analyzing with high sensitivity the metal impurities on the surface layer of the silicon wafer that adversely affect the device characteristics.
  • the present inventors can reduce Si residue by heating a silicon wafer from above and below in a reaction chamber in a gas phase etching method.
  • trace metal impurities in a silicon wafer can be analyzed with high sensitivity.
  • One embodiment of the present invention has been completed based on the above findings.
  • One embodiment of the present invention provides: An etching method for the surface layer of a silicon wafer, A silicon wafer surface layer portion is formed in a reaction chamber having a support base in which a silicon wafer is disposed on a support portion, and a closed space formed by closing an open portion on the support portion side on the support base with a closing member.
  • Etching Performing the etching by introducing an etching gas into the enclosed space and bringing the gas into contact with the silicon wafer surface; and During the etching, the inside of the enclosed space is heated by the heating means provided on the closing member, and the silicon wafer disposed on the support portion is heated by the heating means provided on the support base, Including the etching method, It is about.
  • the etching gas may include hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas.
  • the silicon wafer can be rotated in the circumferential direction.
  • the etching gas can be introduced in a state where the closed space is maintained in the range of atmospheric pressure to positive pressure.
  • the etching gas can be introduced by spraying an etching gas from a gas spray port provided at the tip of a cylindrical body protruding vertically upward from the support base.
  • the cylindrical body can have a height control mechanism, and the distance between the gas spray port and the silicon wafer surface can be controlled by the mechanism.
  • a plurality of the cylindrical bodies can be installed.
  • An etching apparatus for the surface layer of a silicon wafer A support base having a support portion for placing the silicon wafer; A closing member that closes the open part on the support part side on the support base to form a closed space; Gas introduction means for introducing an etching gas into the closed space;
  • the etching apparatus wherein the closing member has a heating means for heating the inside of the closed space, and the support base has a heating means for heating a silicon wafer disposed on the support portion; It is about.
  • the support base may have a rotation mechanism that rotates a silicon wafer disposed on the support portion in a circumferential direction.
  • the etching apparatus may have a pressure control means for controlling the inside of the closed space to a positive pressure.
  • the gas introduction means may protrude vertically upward from the support base and may include a cylindrical body having a gas spray port for spraying an etching gas at the tip.
  • the cylindrical body can have a height control mechanism.
  • the etching apparatus can have a plurality of the cylindrical bodies.
  • Yet another aspect of the present invention provides: Etching the silicon wafer surface layer by the etching method or using the etching apparatus; Collecting the metal components on the surface of the silicon wafer after etching in the recovered liquid, and analyzing the metal components in the recovered liquid;
  • the present invention relates to a method for analyzing metal contamination of silicon wafers containing silicon.
  • the silicon wafer may be a wafer for grasping process contamination.
  • metal contamination of a silicon wafer that adversely affects device characteristics can be evaluated in a short time with high sensitivity.
  • a silicon wafer for grasping the process contamination it is possible to grasp the metal contamination of the process, thereby providing a high-quality silicon wafer.
  • FIG. 1 is a schematic view of an etching apparatus according to the present invention.
  • FIG. 2 is a graph showing the relationship between the heating temperature of the blocking member (reaction dome) and the amount of Si residue generated.
  • FIG. 3 is a graph showing the relationship between the height of the etching gas ejection tower and the amount of Si residue generated.
  • FIG. 4 is a graph showing the relationship between the amount of positive pressure in the enclosed space (reaction dome) and the amount of etching on the surface layer of the silicon wafer.
  • One embodiment of the present invention relates to a silicon wafer surface layer portion etching method (hereinafter, also simply referred to as “etching method”) in which the silicon wafer surface layer portion is etched by bringing the silicon wafer surface into contact with an etching gas.
  • etching method silicon wafer surface layer portion etching method
  • etching method 1 a mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas is used as an etching gas for etching the surface layer portion of the silicon wafer.
  • the reaction rate (etching rate) of the gas phase decomposition can be increased, so that the etching amount per unit time can be increased, resulting in a long etching process.
  • An etching amount sufficient for high sensitivity analysis can be realized without performing the analysis.
  • etching method 2 In another aspect of the etching method of the present invention (hereinafter referred to as “etching method 2”), a support base in which a silicon wafer is disposed on a support portion, and an opening portion on the support portion side on the support base are closed by a closing member. And etching the silicon wafer surface layer in a reaction chamber having a closed space formed by introducing an etching gas into the closed space, the gas and the silicon wafer surface, And a silicon wafer disposed on the support portion by the heating means provided on the support base while heating the inside of the closed space by the heating means provided on the closing member during the etching. Is to heat.
  • a support base having a support portion on which a silicon wafer is disposed, a closing member that closes an open portion on the support portion on the support base to form a closed space, and an etching gas in the closed space
  • a silicon wafer surface layer etching apparatus (hereinafter also simply referred to as an “etching apparatus”).
  • the closing member has a heating means for heating the inside of the closed space
  • the support base has a heating means for heating the silicon wafer disposed on the support portion. is there.
  • the etching apparatus of the present invention can be used for carrying out the etching method 2 of the present invention.
  • a support base and a blocking member are used to heat the silicon wafer from above and below when the etching gas and the silicon wafer surface are brought into contact with each other and the substrate surface layer portion is etched. And heating means are provided respectively. Thereby, the amount of Si residue generated by the vapor phase etching reaction and causing a decrease in measurement sensitivity can be reduced. The inventors presume this reason as follows.
  • HNO 3 hydrogen fluoride gas
  • Oxidation of Si with 3 gases (1) and removal of SiO 2 with HF gas (2) are performed simultaneously.
  • the NO gas produced by the reaction reacts with oxygen immediately after the reaction, as shown in (3) below.
  • Si is usually decomposed by 97% or more to form SiF 4 , while 3% or less forms diammonium hexafluorosilicate ((NH 4 ) 2 SiF 6 ).
  • NH 3 gas generated slightly in the reaction (1) reacts with HF gas contained in the etching gas and SiF 4 generated by the reaction of (2) as shown in the following formula (5).
  • the etching gas used is not limited to the one used in the etching method 1 (mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas).
  • hydrogen fluoride gas A mixed gas of (HF) and nitric acid gas (HNO 3 ) can also be used as an etching gas.
  • a mixed gas of hydrogen fluoride gas (HF) and nitric acid gas (HNO 3 ) is used, the above formula (1) is obtained by the NO 2 gas and HF gas generated in the above formulas (3) and (4), respectively.
  • Etching of the surface layer portion of the silicon wafer proceeds as Si is decomposed and sublimated by repeating the reaction of formula (2).
  • the mixed gas of hydrogen fluoride gas and nitric acid gas can be generated, for example, by the method described in paragraph [0010] of Japanese Patent No. 3832204. From the viewpoint of the etching rate, also in the etching method 2, as in the etching method 1, it is preferable to use a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas as the etching gas.
  • the etching method 1, the etching method 2, and the etching apparatus of the present invention can be used alone or in appropriate combination.
  • the present invention will be described in more detail.
  • the silicon wafer surface layer portion is etched by bringing a mixed gas (etching gas) of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas into contact with the surface of the silicon wafer.
  • etching gas can be brought into contact with the surface of the silicon wafer by introducing the etching gas into a chamber in which the silicon wafer is disposed.
  • the etching apparatus of the present invention can be used as an etching apparatus provided with such a chamber.
  • the etching apparatus of the present invention can be used as an etching apparatus provided with such a chamber.
  • the etching apparatus of the present invention can be used.
  • the etching apparatus according to the present invention will be described with reference to FIG. 1, but the etching apparatus used in the present invention is not limited to the apparatus shown in FIG. 1, and the etching method 1 and the etching method 2 can be performed. If it has a simple structure, it can be used without any limitation.
  • FIG. 1 is a schematic view of an etching apparatus according to the present invention.
  • 1 is a cross-sectional view of the device, and the lower view of FIG. 1 is a bird's-eye view of the device.
  • the support base 1 has a support portion 1 a on which the silicon wafer 2 is arranged.
  • the closing member (hereinafter also referred to as “reaction dome”) 3 forms a closed space by closing the opening portion of the support base 1 on the support portion 1a side.
  • the silicon wafer 2 disposed in the closed space is heated from above and below by the heating means 5-1 provided in the reaction dome 3 and the heating means 5-2 provided in the support portion 1a.
  • the heating means is not particularly limited, and heating can be performed by various heating methods such as energization heating and induction heating. From the viewpoint of heating efficiency, it is preferable to employ energization heating. For example, by heating the heating means 5-1 in the range of 40 to 100 ° C. and heating the heating means 5-2 in the range of 20 to 40 ° C., the etching reaction can be promoted and the amount of Si residue can be reduced. . Moreover, it is preferable to provide a rotation mechanism on the support base 1 to rotate the silicon wafer in the circumferential direction during the introduction of the etching gas. Thereby, the in-plane uniformity of the etching reaction can be enhanced.
  • the rotation speed is preferably set within a range in which the silicon wafer disposed on the support portion is not displaced by rotation, for example, a tangential speed of 10 to 100 mm / sec. It is preferable to set the degree.
  • it is not essential to heat the inside of the chamber in which the etching reaction is performed, and it is of course possible to use an etching apparatus that does not have the heating means.
  • it is also possible to provide a heating means only in one of the support portion and the reaction dome and heat the inside of the chamber by the heating means.
  • the wafer can be cooled to about 10 ° C. to 20 ° C. by providing a cooling means in the support portion. By this cooling, the etching rate in the surface layer portion of the silicon wafer can be improved.
  • the silicon wafer After the silicon wafer is arranged as described above, an etching gas is introduced into the enclosed space. When the introduced etching gas comes into contact with the surface of the silicon wafer, the surface layer portion of the silicon wafer is etched.
  • the etching gas introduced in the etching method 1 is a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas.
  • a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas can be obtained by mixing the above three gases at an arbitrary ratio.
  • a mixed gas of nitric acid gas and NOx gas generated by bubbling a carrier gas in a mixed acid of nitric acid and hydrofluoric acid (hereinafter referred to as “mixed acid A”) in which a silicon piece is immersed is converted into hydrogen fluoride.
  • the mixed gas can be obtained by mixing a mixed acid of acid and sulfuric acid (hereinafter referred to as “mixed acid B”) with hydrogen fluoride gas generated by bubbling a carrier gas.
  • mixed acid B mixed acid of sulfuric acid
  • a mixed gas of nitric acid gas and NOx gas generated by bubbling nitrogen gas as a carrier gas in the sealed container 8 containing the mixed acid A, and a carrier gas in the sealed container 7 containing the mixed acid B are used.
  • a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas is obtained by mixing with hydrogen fluoride gas generated by bubbling nitrogen gas.
  • the acid solution used to prepare the mixed acid A and the mixed acid B include hydrofluoric acid (HF) having a concentration of 40 to 50% by mass, sulfuric acid (H 2 SO 4 ) having a concentration of 50 to 98% by mass, and a concentration of 50 to 50%. Mention may be made of 70% by mass of nitric acid (HNO 3 ).
  • an inert gas such as nitrogen gas is suitable as the carrier gas used for bubbling in the present invention. Bubbling is preferable because a constant amount of gas can be always supplied.
  • the bubbling amount is not particularly limited, for example, 0.1 to 2 L / min. The degree is preferred.
  • the mixing ratio of the mixed gas is not particularly limited, and can be adjusted by, for example, the flow rate of the carrier gas used for bubbling.
  • the reason for heating hydrofluoric acid here is to increase the etching rate on the wafer surface. If the hydrofluoric acid is not heated, the amount of hydrogen fluoride gas generated per unit time is small as compared with the case of heating, and the etching rate on the wafer surface becomes low. From the viewpoint of the etching rate, hydrofluoric acid is preferably heated to a liquid temperature of 30 ° C. or higher.
  • the optimum liquid temperature of hydrofluoric acid is 40 ° C., and temperature control is relatively easy and preferable.
  • the etching rate was about 10 ⁇ m / hr and the temperature was less than 30 ° C.
  • the wafer surface was etched using hydrogen fluoride gas generated from hydrofluoric acid, the etching rate was less than half that when heated at 40 ° C. Therefore, when hydrofluoric acid is used as the hydrogen fluoride gas generation source, it is preferable to heat the liquid to a temperature of 30 ° C.
  • the etching rate on the wafer surface is the etching rate when hydrogen fluoride gas generated by heating hydrofluoric acid to 40 ° C. is used. Did not improve. This is thought to be because the etching reaction on the wafer surface is rate limiting.
  • the heating temperature of hydrofluoric acid is preferably 50 ° C. or lower.
  • the hydrofluoric acid contained in the container 7 is heated by an electric heater (not shown in FIG. 1) and a temperature sensor is installed to control the output of the heater.
  • nitrogen gas as a carrier gas while maintaining the temperature (as described above, preferably 30 to 50 ° C.)
  • hydrogen fluoride gas can be generated from heated hydrofluoric acid.
  • a constant amount is constantly or periodically fixed while bubbling a mixed acid of nitric acid and hydrofluoric acid in which silicon pieces are immersed with a carrier gas. It is preferable to add hydrofluoric acid.
  • hydrofluoric acid hydrofluoric acid aqueous solution
  • nitrogen gas as a carrier gas into nitric acid containing silicon pieces and hydrofluoric acid (sealed container 8).
  • the silicon piece used here it is preferable to use a high-purity silicon piece in order to prevent the inside of the system from being contaminated by the decomposition of the silicon piece.
  • high-purity silicon pieces include silicon wafer pieces obtained by cutting a silicon wafer, preferably a silicon wafer that has been subjected to final cleaning for manufacturing a silicon substrate.
  • the amount of silicon piece used is not particularly limited as long as a desired amount of gas can be generated. For example, about 80 g of a 68% by mass nitric acid aqueous solution and about 6 g of a 50% by mass hydrofluoric acid aqueous solution are used. About 3 to 5 g of silicon pieces are immersed in the mixed acid, and 50% by mass hydrofluoric acid is added to the mixed acid in an amount of 0.1 to 1.0 g / min. Can be added in an amount.
  • the mixed gas of hydrogen fluoride gas, nitric acid gas, and NOx gas is obtained by joining the flow path of the gas generated from the container 8 containing the mixed acid A containing silicon pieces serving as the supply source.
  • the container 9 is provided in front of the reaction chamber to improve the uniformity of the mixed gas, but the present invention is not limited to the embodiment shown in FIG.
  • the containers 7 to 9 it is preferable to use those made of a fluorine-based resin in order to prevent corrosion by acid or gas.
  • the etching gas is preferably, for example, 100 to 2000 ml / min.
  • the gas ejection tower 4 connected with this gas flow path is protruded vertically upward from the support part 1a.
  • a predetermined distance can be provided between the silicon wafer and the etching gas spraying port, so that the etching gas sprayed from the gas spraying port is the silicon wafer.
  • the reactions of the above formulas (1) and (2) are further promoted, and gel-like orthosilicic acid (H 4 SiO 4 ) and diammonium hexafluorosilicate ((NH 4 ) 2 SiF 6 ) that become Si residues. ) Can be more effectively suppressed.
  • the distance between the silicon wafer surface (surface to be etched) and the gas spray port is preferably 5 cm or more in the vertical direction, preferably 15 cm or more. More preferably, it is more preferably in the range of 15 to 30 cm.
  • the upper part of the gas ejection tower is L-shaped, and a gas spray port is provided at the tip.
  • the number of gas ejection towers is preferably at least 1, preferably 2 or more, and more preferably 5 or more. Although the upper limit of the number is not specifically limited, For example, it is 10 or less.
  • the plurality of gas reaction towers be installed at equal intervals so as to surround the silicon wafer as shown in FIG. Moreover, it is preferable to provide a height control mechanism in the gas ejection tower so that the distance between the gas spray port and the silicon wafer surface can be freely adjusted.
  • a pressure adjustment valve 11 is provided to control the pressure in the closed space.
  • the pressure control means in this manner so that the enclosed space is in the range of atmospheric pressure to positive pressure during etching.
  • the pressure in the enclosed space during etching is preferably a positive pressure in the range of, for example, atmospheric pressure (that is, atmospheric pressure outside the enclosed space) to atmospheric pressure + 0.050 MPa.
  • the pressure adjusting valve 11 is opened and appropriately exhausted.
  • the etching time may be set according to the amount of etching gas introduced and the desired etching amount, and is not particularly limited.
  • the metal impurity contained in the etched surface layer portion remains on the surface of the silicon wafer after the etching process. Therefore, by collecting and quantifying the metal component from the surface of the etched silicon wafer, the metal impurity concentration contained in the etched surface layer portion, that is, the amount of metal contamination in the surface layer portion can be obtained.
  • the moisture contained in the etching gas and the moisture generated by the reaction usually remain as droplets on the surface layer portion after etching. Therefore, it is preferable to dry the droplets by heating the silicon wafer using a heating device such as a hot plate before collecting the metal component.
  • the metal component can be collected in the recovered liquid by scanning the recovered liquid on the surface of the etched silicon wafer.
  • the recovered liquid includes pure water, a mixed solution of hydrofluoric acid and hydrogen peroxide; pure water, a mixed solution of hydrogen peroxide and hydrochloric acid; pure water, hydrofluoric acid, hydrogen peroxide and hydrochloric acid A mixed solution of, etc. can be used.
  • the recoverable liquid that can be used reference can be made to, for example, JP-A-2005-265718, the entire description of which is specifically incorporated herein by reference.
  • the recovery amount supplied and scanned on the silicon wafer surface is preferably about 50 to 250 ⁇ l.
  • a method of scanning the recovery liquid on the surface of the silicon wafer for example, a method of tilting and rotating the wafer so that the solution dripped onto the surface of the silicon wafer can be applied to the entire surface can be used. This method may be performed manually or automatically.
  • the qualitative analysis and quantitative analysis of the metal component contained in the substrate surface portion removed by etching can be performed.
  • the analysis of the metal component can be performed by a known method capable of analyzing the metal component in the solution. Such methods can include atomic absorption spectrometry (AAS) and inductively coupled plasma mass spectrometry (ICP-MS). AAS and ICP-MS are preferable because trace metal components can be analyzed with high sensitivity. Examples of metals that can be analyzed include various metals such as Ag, Cu, Li, Na, Mg, Al, K, Ca, Cr, Fe, Ni, and Zn.
  • the surface layer of the silicon wafer is etched by the etching method of the present invention or using the etching apparatus of the present invention, and the metal components on the surface of the silicon wafer after etching are captured in the recovered liquid. Collecting the silicon component and analyzing the metal component in the recovered liquid. The details are as described above.
  • Metal impurities are easily diffused to the surface layer of the substrate in various heat treatments such as oxidation and diffusion during the silicon wafer manufacturing process, and crystal defects such as precipitates, dislocations, oxygen-induced stacking faults (OSF), There is a possibility that the lifetime of minority carriers is reduced, the leakage current is increased, and the dielectric breakdown voltage of the oxide film is deteriorated. Therefore, in order to reduce metal contamination in manufacturing processes such as heat treatment processes, the process contamination amount of the heating furnace to be used is usually evaluated on a trial basis using an evaluation substrate before heat treating the product. After improving the contamination based on this, full-scale product heat treatment is performed.
  • the metal contamination analysis method of the present invention can be used as a wafer evaluation method for grasping process contamination as described above.
  • the surface layer to be etched for metal contamination analysis refers to the depth direction from the surface of the silicon wafer.
  • the depth to be etched differs depending on the use of the silicon wafer and the required physical properties, but it is generally used for device fabrication.
  • it is preferable to analyze the metal contamination by etching the surface layer portion having a depth of about 5.0 to 30.0 ⁇ m from the surface.
  • the surface may be washed to remove metal impurities on the surface.
  • an acidic solution or the like used as the recovery liquid described above can be used.
  • the silicon wafer whose surface layer metal contamination is analyzed according to the present invention may be a p-type semiconductor substrate or an n-type semiconductor substrate.
  • the thickness is, for example, 600 to 1000 ⁇ m, but is not particularly limited.
  • the analysis method of the present invention can be applied to wafers of any diameter such as ⁇ 200 mm, ⁇ 300 mm, and ⁇ 450 mm.
  • Example 1 Five p-type silicon wafers (resistivity: 10 ⁇ ⁇ cm) having a diameter of 200 mm with front and back surfaces mirror-finished were prepared. In order to completely remove metal impurities on the surface of each silicon wafer, the silicon wafer was cleaned with a cleaning solution of hydrofluoric acid / hydrogen peroxide solution / hydrochloric acid / pure water. After washing, the water was completely removed and dried. Next, the silicon wafer was placed in the etching apparatus shown in FIG. 1 according to the following procedure. First, the first silicon wafer 2 was placed on the support portion 1 a of the support base 1. After the installation, the reaction dome 3 was placed on the support base 1 and closed to prevent the reaction gas from leaking.
  • the temperature of the heating means 5-1 (electric heating) provided on the reaction dome 3 is controlled to about 80 ° C.
  • the heating means (electric heating) 5-2 provided on the support base 1 is controlled to 30 ° C.
  • the support base 1 is moved at a tangential speed of about 50 mm / sec. And rotated. The vertical distance (height) between the lower end of the gas spray port and the silicon wafer surface was adjusted to 20 cm by the height adjustment mechanism of the gas ejection tower.
  • Container 7 was fed at 250 ml / min (container 8) and bubbled. By bubbling, hydrogen fluoride gas is generated from the container 7, and nitric acid gas and NOx gas are generated from the container 8, and after passing through an empty container 9 made of fluorine resin, from the reaction gas spraying port 4 in the reaction dome 3. Sprayed.
  • the reaction gas sprayed from the reaction gas spraying port filled the inside of the reaction dome and etched silicon on the surface of the silicon wafer 2. The silicon wafer was left in the reaction dome 3 for about 30 minutes from the start of nitrogen gas bubbling. After 30 minutes, nitrogen bubbling was stopped.
  • the reaction dome was opened, the silicon wafer 2 was taken out so that the surface was not contaminated, and placed on a hot plate heated to 250 ° C. to dry the droplets. After drying, it was stored in a storage box so that the etched surface was not contaminated. Subsequently, a second silicon wafer is placed on the support base 1. After the installation, the reaction dome 3 was covered as in the first sheet, and the surface was etched in the same manner as in the first sheet. During the etching of the second silicon wafer, 100 ⁇ l of 5% hydrofluoric acid / 10% hydrochloric acid / 5% hydrogen peroxide aqueous acidic recovery solution was dropped on the surface of the first etched silicon wafer to be evaluated.
  • the entire surface of the wafer was scanned to recover metal impurities.
  • the recovered solution was made up to 1000 ⁇ l with ultrapure water, and then quantitative evaluation was performed by a double-convergence type high-sensitivity ICP-MS.
  • the etching reaction of the second silicon wafer is completed, nitrogen bubbling is stopped in the same manner as in the first wafer, taken out from the reaction dome, and heated on a hot plate in the same manner as in the first silicon wafer. After drying, it was stored in a storage box. Thereafter, the same operation was repeated and a total of five silicon wafers were etched and analyzed. Table 1 shows the results of quantification of metal impurities recovered from these five silicon wafers. In addition, the etching amount of each silicon wafer is also shown in Table 1.
  • Example 2 Eight p-type silicon wafers having a diameter of 200 mm (resistivity: 10 ⁇ ⁇ cm) with mirror-finished front and back surfaces were prepared. In order to completely remove metal impurities on the surface of each silicon wafer, the silicon wafer was cleaned with a cleaning solution of hydrofluoric acid / hydrogen peroxide solution / hydrochloric acid / pure water. After washing, the water was completely removed and dried. Using six of the eight silicon wafers after drying, the contamination amount of Fe, Ni, and Cu in the surface layer portion is 1 ⁇ 10 11 atoms / cm 3 or 1 ⁇ 10 13 atoms / cm 3 , respectively. One by one known contamination. Two silicon wafers without known contamination and six known contaminated silicon wafers were etched and analyzed in the same procedure as in Example 1. The results are shown in Table 2.
  • Example 3 Comparative Example 1
  • a total of three silicon wafers were etched in the same procedure as in Example 1 (Example 3). Separately, a total of three silicon wafers were etched by the same procedure as in Example 1 except that 100 g of 50% hydrofluoric acid was put in the container 7 and 80 g of 68% nitric acid was put in the container 8 (Comparative Example 1). ). The amounts of etching in Example 3 and Comparative Example 1 are shown in Table 3.
  • Comparative Example 1 is an example in which hydrogen fluoride gas and nitric acid gas were used as the etching gas, but as shown in Table 3, the etching could not be performed in the same etching time as in Example 1.
  • the surface layer portion of the silicon wafer is etched by about 10 ⁇ m within the same time. I was able to. If the etching amount is about 10 ⁇ m, the metal contamination of the wafer surface layer can be analyzed with high accuracy as shown in Tables 1 and 2. From the above comparison between Example 3 and Comparative Example 1, it was shown that according to the present invention, metal contamination of the surface layer portion of the silicon wafer can be analyzed with high sensitivity by a short etching process.
  • Example 1 (heating temperature of heating means 5-1: 80 ° C.) except that heating temperature of heating means 5-1 provided in the reaction dome was set to 27 ° C., 40 ° C. and 60 ° C., respectively.
  • the process up to the step of scanning the recovered liquid on the surface of the silicon wafer after etching was carried out by the same method as described above.
  • the amount of Si in the collected liquid obtained after etching at Example 1 and the above heating temperature was quantitatively analyzed by double convergence ICP-MS, and the ratio to the etched Si was calculated. The results are shown in FIG. From the results shown in FIG. 2, it can be confirmed that the Si residue is reduced as the heating temperature of the heating means 5-1 is increased.
  • the amount of Si residue compound generated relative to etched Si is preferably 1.0% by mass or less. Therefore, from the results shown in FIG. 2, it can be confirmed that the heating temperature of the heating means 5-1 is preferably 40 ° C. or higher. Also, from the results shown in FIG. 2, it can be confirmed that the amount of Si residue produced is substantially 0% when the heating temperature of the heating means 5-1 is around 100 ° C. Therefore, the heating temperature of the heating means 5-1 for effectively reducing the generation of Si residue is sufficient to be 100 ° C. or less. From the above results, it can be confirmed that the heating temperature of the heating means 5-1 is preferably set in the range of 40 to 100 ° C.
  • the height is preferably 5 cm or more.
  • the amount of Si residue generated is 0.5% by mass or less. Therefore, from the results shown in FIG. 3, the height of the gas spray port is 15 cm or more. It can be confirmed that it is more preferable. Further, in FIG. 3, since the amount of Si residue generated is less than 0.5% by mass at a height of 20 to 30 cm, a steady state is obtained. From the results shown in FIG. 3, a gas for effectively reducing Si residue generation is obtained. It can be said that it is sufficient that the height of the spray port is 30 cm or less. From the above results, it can be confirmed that the height of the gas spray port is preferably 5 cm or more and 30 cm or less, and more preferably 15 cm or more and 30 cm or less.
  • FIG. 4 shows the relationship between the pressure in the enclosed space and the etching amount per unit time. From the results shown in FIG. 4, it can be confirmed that the etching reaction rate increases and the etching amount increases as the pressure is increased.
  • the present invention is useful in the field of manufacturing semiconductor substrates.

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

Disclosed is a method for etching a surface layer part of a silicon wafer, which comprises bringing the surface of the silicon wafer into contact with an etching gas to etch the surface layer part of the silicon wafer. In the method, a mixed gas of a hydrogen fluoride gas, a nitric acid gas and a nitrogen oxide gas can be used as the etching gas.

Description

シリコンウェーハ表層部のエッチング方法およびエッチング装置、ならびにシリコンウェーハの金属汚染分析方法Silicon wafer surface layer etching method and etching apparatus, and silicon wafer metal contamination analysis method 関連出願の相互参照Cross-reference of related applications
 本出願は、2010年1月6日出願の日本特願2010-000887号および日本特願2010-000888号の優先権を主張し、それらの全記載は、ここに特に開示として援用される。 This application claims the priority of Japanese Patent Application No. 2010-000887 and Japanese Patent Application No. 2010-000888 filed on Jan. 6, 2010, the entire description of which is specifically incorporated herein by reference.
 本発明は、シリコンウェーハ表層部のエッチング方法およびエッチング装置に関するものであり、詳しくは、シリコンウェーハの金属汚染を分析するために、該ウェーハの表層部をエッチングする方法および装置として好適なシリコンウェーハ表層部のエッチング方法およびエッチング装置に関するものである。
 更に本発明は、前記エッチング方法またはエッチング装置を使用するシリコンウェーハの金属汚染分析方法に関するものである。
TECHNICAL FIELD The present invention relates to an etching method and an etching apparatus for a silicon wafer surface layer, and more specifically, a silicon wafer surface layer suitable as a method and apparatus for etching the surface layer of the silicon wafer in order to analyze metal contamination of the silicon wafer. The present invention relates to an etching method and an etching apparatus.
Furthermore, the present invention relates to a method for analyzing metal contamination of a silicon wafer using the etching method or the etching apparatus.
 半導体製造分野では、半導体デバイスの微細化、高集積化に伴い、半導体基板表面の微量金属不純物が、リーク不良や酸化膜耐圧不良、さらにライフタイム低下などのデバイス特性に影響を及ぼすことが報告されている。さらに、半導体基板表面上の金属不純物汚染のみならず、シャロートレンチやソース、ドレインなどのデバイス構造を形成する半導体基板表層領域での微量金属不純物汚染がデバイス特性へ影響することも問題視されてきている。 In the semiconductor manufacturing field, it has been reported that with the miniaturization and high integration of semiconductor devices, trace metal impurities on the surface of the semiconductor substrate affect device characteristics such as leakage failure, oxide breakdown voltage failure, and lifetime reduction. ing. Furthermore, not only metal impurity contamination on the surface of the semiconductor substrate but also trace metal impurity contamination in the surface layer region of the semiconductor substrate forming a device structure such as a shallow trench, source, drain, etc. has been regarded as a problem. Yes.
 従来、シリコンウェーハ表面および表層部の金属不純物評価方法としては、シリコンウェーハ表層部を酸溶液で溶解し、その酸溶液を希釈または濃縮して原子吸光光度計(AAS)または誘導結合プラズマ質量分析計(ICP-MS)で定量分析する方法が用いられていた(以下、「液相エッチング法」という)。しかし、上記液相エッチング法では、シリコンウェーハ表層を均一にエッチングするには大量の酸溶液が必要となる。従って、大量の酸溶液によって金属不純物濃度が希釈されるために感度不足や酸溶液自体からの持込汚染による分析バックグランド上昇による感度低下が、超微量金属不純物評価が求められる半導体製造分野における高感度分析の妨げとなっていた。 Conventionally, as a method for evaluating metal impurities on the surface and the surface layer of a silicon wafer, an atomic absorption photometer (AAS) or an inductively coupled plasma mass spectrometer is prepared by dissolving the silicon wafer surface layer with an acid solution and diluting or concentrating the acid solution. A method of quantitative analysis by (ICP-MS) was used (hereinafter referred to as “liquid phase etching method”). However, in the liquid phase etching method, a large amount of acid solution is required to uniformly etch the silicon wafer surface layer. Therefore, since the metal impurity concentration is diluted by a large amount of acid solution, the sensitivity decrease due to insufficient sensitivity or increase in analysis background due to carry-in contamination from the acid solution itself is high in the semiconductor manufacturing field where ultra-trace metal impurity evaluation is required. This hindered sensitivity analysis.
 そこで近年、上記液相エッチング法に代わる手段として、シリコンウェーハ表層部を酸蒸気(エッチングガス)にて分解し、その分解残渣を回収し、AASまたはICP-MSで定量分析する方法(以下、「気相エッチング法」という)が提案されている(日本特許第3832204号参照、その全記載は、ここに特に開示として援用される)。 Therefore, in recent years, as an alternative to the liquid phase etching method, the silicon wafer surface layer is decomposed with acid vapor (etching gas), and the decomposition residue is collected and quantitatively analyzed by AAS or ICP-MS (hereinafter, “ (Referred to as Japanese Patent No. 3832204, the entire description of which is specifically incorporated herein by reference).
 上記気相エッチング法は、エッチングで使用する酸溶液が少量でよいことや酸溶液自体からの持込汚染量が液相エッチングと比較して非常に少ないというメリットにより検討が行われている。しかし、気相エッチング法は、液相エッチング法と比較して酸(酸蒸気)と半導体基板との反応速度が非常に遅い。従って、一定時間でのエッチング量が少ないため、分析感度が低いという課題がある。長時間のエッチング反応を行いエッチング量を増やすことは可能であるが、分析に長時間を要することとなり、生産性の著しい低下を招くこととなる。 The above-mentioned gas phase etching method has been studied on the merits that a small amount of acid solution may be used for etching and the amount of contamination brought in from the acid solution itself is very small compared to liquid phase etching. However, the vapor phase etching method has a very slow reaction rate between the acid (acid vapor) and the semiconductor substrate as compared with the liquid phase etching method. Therefore, there is a problem that the analysis sensitivity is low because the etching amount in a certain time is small. Although it is possible to increase the etching amount by performing an etching reaction for a long time, it takes a long time for the analysis, resulting in a significant decrease in productivity.
発明の開示
 そこで本発明の第一の目的は、気相エッチング法によるシリコンウェーハ表層部分析において、短時間のエッチング処理により高感度分析を可能とするための手段を提供することにある。
DISCLOSURE OF THE INVENTION Accordingly, a first object of the present invention is to provide means for enabling high-sensitivity analysis by short-time etching processing in silicon wafer surface layer analysis by vapor phase etching.
 上記気相エッチング法では、主にエッチングガスとして弗化水素酸と硝酸との混酸を気化して得られた酸蒸気(即ち、弗化水素ガスと硝酸ガスとの混合ガス)が使用されている。本発明者らは、上記目的を達成するために鋭意検討を重ねた結果、上記酸蒸気に窒素酸化物ガスを混合することにより気相分解の反応速度を大きく高めることができることを新たに見出した。これにより、従来法と同等のエッチング時間であっても、高感度分析が可能な量のシリコンウェーハをエッチングすることが可能となる。この理由を、本発明者らは以下のように推察している。 In the gas phase etching method, an acid vapor obtained by vaporizing a mixed acid of hydrofluoric acid and nitric acid (that is, a mixed gas of hydrogen fluoride gas and nitric acid gas) is mainly used as an etching gas. . As a result of intensive studies to achieve the above object, the present inventors have newly found that the reaction rate of gas phase decomposition can be greatly increased by mixing nitrogen oxide gas with the acid vapor. . This makes it possible to etch a quantity of silicon wafer that can be analyzed with high sensitivity even with an etching time equivalent to that of the conventional method. The inventors presume this reason as follows.
 エッチングガスとして弗化水素ガス(HF)と硝酸ガス(HNO)との混合ガスを使用してシリコンウェーハ(半導体基板)の表層部をエッチングすると、以下のHNOガスによるSiの酸化(1)と、HFガスによるSiOの除去(2)が同時に行われる。
  Si+4HNO↑ → SiO+8NO↑+2HO  …(1)
  SiO+4HF↑ → SiF+2HO       …(2)
 反応で生じたNOガスは、下記(3)に示すように、反応後直ちに酸素と反応する。
  2NO↑+O↑ → 2NO↑            …(3)
 式(1)、式(2)で生じた水蒸気が反応容器内面に付着して微小な液滴になった後、式(4)に示すように、SiFガスはこの液滴と反応してゲル状のオルトケイ酸(HSiO)を生じる。なお、ここで生成したオルトケイ酸(HSiO)は、比較的短時間で分解昇華させることができる。
  SiF↑+4HO → HSiO↓+4HF↑    …(4)
 式(3)、式(4)でそれぞれ生じたNOガスとHFガスにより、上記式(1)、式(2)の反応が繰り返されることにより、Siが分解昇華される。ここで反応系内に窒素酸化物ガス(以下、「NOxガス」と記載する。好ましくはNOガスおよび/またはNOガスである。)を導入すれば、(1)~(4)の反応が促進されるため、結果的に気相分解の反応速度(エッチング速度)を大きく高めることができると考えられる。
 本発明の一態様は、以上の知見に基づき完成された。
When the surface layer portion of a silicon wafer (semiconductor substrate) is etched using a mixed gas of hydrogen fluoride gas (HF) and nitric acid gas (HNO 3 ) as an etching gas, Si oxidation by the following HNO 3 gas (1) And removal (2) of SiO 2 with HF gas is performed at the same time.
Si + 4HNO 3 ↑ → SiO 2 + 8NO ↑ + 2H 2 O (1)
SiO 2 + 4HF ↑ → SiF 4 + 2H 2 O (2)
The NO gas produced by the reaction reacts with oxygen immediately after the reaction, as shown in (3) below.
2NO ↑ + O 2 ↑ → 2NO 2 ↑ (3)
After the water vapor generated in the formulas (1) and (2) adheres to the inner surface of the reaction vessel to form fine droplets, the SiF 4 gas reacts with the droplets as shown in the formula (4). This produces gel-like orthosilicic acid (H 4 SiO 4 ). The orthosilicic acid (H 4 SiO 4 ) produced here can be decomposed and sublimated in a relatively short time.
SiF 4 ↑ + 4H 2 O → H 4 SiO 4 ↓ + 4HF ↑ (4)
Si is decomposed and sublimated by repeating the reactions of the above formulas (1) and (2) with the NO 2 gas and the HF gas generated in the formulas (3) and (4), respectively. Here, if nitrogen oxide gas (hereinafter referred to as “NOx gas”, preferably NO gas and / or NO 2 gas) is introduced into the reaction system, the reactions (1) to (4) are carried out. As a result, it is considered that the reaction rate (etching rate) of the gas phase decomposition can be greatly increased as a result.
One embodiment of the present invention has been completed based on the above findings.
 本発明の一態様は、
シリコンウェーハ表面をエッチングガスと接触させることにより、該シリコンウェーハ表層部をエッチングするシリコンウェーハ表層部のエッチング方法であって、
前記エッチングガスとして、弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガスを使用することを含む、前記エッチング方法、
に関するものである。
One embodiment of the present invention provides:
A method for etching a silicon wafer surface layer portion, wherein the silicon wafer surface layer portion is etched by bringing the silicon wafer surface into contact with an etching gas,
Using the mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas as the etching gas,
It is about.
 前記エッチング方法は、前記窒素酸化物ガスおよび硝酸ガスを、シリコン片を含む硝酸と弗化水素酸との混酸(以下、「混酸A」という)から発生させることを含むことができる。 The etching method may include generating the nitrogen oxide gas and the nitric acid gas from a mixed acid of nitric acid and hydrofluoric acid containing silicon pieces (hereinafter referred to as “mixed acid A”).
 前記シリコン片は、シリコンウェーハ片であることができる。 The silicon piece may be a silicon wafer piece.
前記弗化水素ガスは、弗化水素酸と硫酸との混酸(以下、「混酸B」という)または30℃~50℃に加熱した弗化水素酸から発生させることができる。 The hydrogen fluoride gas can be generated from a mixed acid of hydrofluoric acid and sulfuric acid (hereinafter referred to as “mixed acid B”) or hydrofluoric acid heated to 30 ° C. to 50 ° C.
 前記混合ガスは、前記混酸Aにキャリアガスをバブリングさせることにより発生させた窒素酸化物ガスおよび硝酸ガスを、前記混酸Bまたは30℃~50℃に加熱した弗化水素酸にキャリアガスをバブリングさせることにより発生させた弗化水素ガスと混合することにより調製することができる。 The mixed gas causes nitrogen oxide gas and nitric acid gas generated by bubbling a carrier gas to the mixed acid A to bubble the carrier gas to the mixed acid B or hydrofluoric acid heated to 30 ° C. to 50 ° C. It can prepare by mixing with the hydrogen fluoride gas generated by this.
 また、気相エッチング法は、気相エッチング反応で被評価シリコンウェーハ上に生成するSi化合物(Si残渣)がAASやICP-MSにおける定量評価で妨害物質となり正確な定量評価の妨げとなるため、超微量金属成分を高感度分析することが求められるシリコンウェーハの金属汚染分析方法としては、検出感度が不十分であった。 In the vapor phase etching method, the Si compound (Si residue) generated on the silicon wafer to be evaluated by the vapor phase etching reaction becomes a disturbing substance in the quantitative evaluation in AAS and ICP-MS and prevents accurate quantitative evaluation. The detection sensitivity is insufficient as a method for analyzing metal contamination of silicon wafers that require high-sensitivity analysis of ultra-trace metal components.
 そこで本発明の第二の目的は、デバイス特性に悪影響を与えるシリコンウェーハ表層部の金属不純物を高感度に分析するための手段を提供することにある。 Therefore, a second object of the present invention is to provide means for analyzing with high sensitivity the metal impurities on the surface layer of the silicon wafer that adversely affect the device characteristics.
 本発明者らは、上記第二の目的を達成するために鋭意検討を重ねた結果、気相エッチング法において、反応チャンバー内でシリコンウェーハを上下方向から加熱することにより、Si残渣の低減が可能となり、これによりシリコンウェーハ中の微量金属不純物を高感度に分析できることを新たに見出した。
 本発明の一態様は、以上の知見に基づき完成された。
As a result of intensive investigations to achieve the second object, the present inventors can reduce Si residue by heating a silicon wafer from above and below in a reaction chamber in a gas phase etching method. Thus, it has been newly found that trace metal impurities in a silicon wafer can be analyzed with high sensitivity.
One embodiment of the present invention has been completed based on the above findings.
 本発明の一態様は、 
シリコンウェーハ表層部のエッチング方法であって、
シリコンウェーハを支持部上に配置した支持台と、該支持台上の支持部側の開放部を閉塞部材により閉塞することによって形成された閉塞空間と、を有する反応チャンバー内でシリコンウェーハ表層部をエッチングすること、
前記エッチングを、前記閉塞空間内にエッチングガスを導入し、該ガスと前記シリコンウェーハ表面とを接触させることによって行うこと、および、
前記エッチング中、前記閉塞部材に設けた加熱手段によって前記閉塞空間内を加熱するとともに、前記支持台に設けた加熱手段によって前記支持部上に配置されたシリコンウェーハを加熱すること、
を含む、前記エッチング方法、
に関するものである。
One embodiment of the present invention provides:
An etching method for the surface layer of a silicon wafer,
A silicon wafer surface layer portion is formed in a reaction chamber having a support base in which a silicon wafer is disposed on a support portion, and a closed space formed by closing an open portion on the support portion side on the support base with a closing member. Etching,
Performing the etching by introducing an etching gas into the enclosed space and bringing the gas into contact with the silicon wafer surface; and
During the etching, the inside of the enclosed space is heated by the heating means provided on the closing member, and the silicon wafer disposed on the support portion is heated by the heating means provided on the support base,
Including the etching method,
It is about.
 前記エッチングガスは、弗化水素ガス、硝酸ガスおよび窒素酸化物ガスを含むことができる。 The etching gas may include hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas.
 前記エッチングガスの導入中、前記シリコンウェーハを円周方向に回転させることができる。 During the introduction of the etching gas, the silicon wafer can be rotated in the circumferential direction.
 前記エッチングガスの導入を、前記閉塞空間内を大気圧~陽圧の範囲に維持した状態で行うことができる。 The etching gas can be introduced in a state where the closed space is maintained in the range of atmospheric pressure to positive pressure.
 前記エッチングガスの導入を、前記支持台から鉛直上方に突出する筒状体の先端に設けられたガス噴霧口からエッチングガスを噴霧することによって行うことができる。 The etching gas can be introduced by spraying an etching gas from a gas spray port provided at the tip of a cylindrical body protruding vertically upward from the support base.
 前記筒状体は高さ制御機構を有することができ、該機構により前記ガス噴霧口とシリコンウェーハ表面との距離を制御することができる。 The cylindrical body can have a height control mechanism, and the distance between the gas spray port and the silicon wafer surface can be controlled by the mechanism.
 前記筒状体は、複数本設置することができる。 A plurality of the cylindrical bodies can be installed.
 本発明の別の態様は、
 シリコンウェーハ表層部のエッチング装置であって、
 シリコンウェーハを配置する支持部を有する支持台と、
上記支持台上の支持部側の開放部を閉塞し閉塞空間を形成する閉塞部材と、
上記閉塞空間にエッチングガスを導入するガス導入手段と、
を有し、
前記閉塞部材は、前記閉塞空間内を加熱する加熱手段を有し、かつ
前記支持台は、前記支持部上に配置されるシリコンウェーハを加熱する加熱手段を有する、前記エッチング装置、
に関するものである。
Another aspect of the present invention provides:
An etching apparatus for the surface layer of a silicon wafer,
A support base having a support portion for placing the silicon wafer;
A closing member that closes the open part on the support part side on the support base to form a closed space;
Gas introduction means for introducing an etching gas into the closed space;
Have
The etching apparatus, wherein the closing member has a heating means for heating the inside of the closed space, and the support base has a heating means for heating a silicon wafer disposed on the support portion;
It is about.
 前記支持台は、前記支持部上に配置されるシリコンウェーハを円周方向に回転する回転機構を有することができる。 The support base may have a rotation mechanism that rotates a silicon wafer disposed on the support portion in a circumferential direction.
 前記エッチング装置は、前記閉塞空間内を陽圧に制御する圧力制御手段を有することができる。 The etching apparatus may have a pressure control means for controlling the inside of the closed space to a positive pressure.
 前記ガス導入手段は、前記支持台から鉛直上方に突出してもよく、先端にエッチングガスを噴霧するガス噴霧口を有する筒状体を含むことができる。 The gas introduction means may protrude vertically upward from the support base and may include a cylindrical body having a gas spray port for spraying an etching gas at the tip.
 前記筒状体は高さ制御機構を有することができる。 The cylindrical body can have a height control mechanism.
 前記エッチング装置は、前記筒状体を複数本有することができる。 The etching apparatus can have a plurality of the cylindrical bodies.
 本発明の更に別の態様は、
 前記エッチング方法により、または前記エッチング装置を用いて、シリコンウェーハ表層部をエッチングすること、
エッチング後のシリコンウェーハ表面上の金属成分を回収液中に捕集すること、および
上記回収液中の金属成分を分析すること、
を含むシリコンウェーハの金属汚染分析方法
に関するものである。
Yet another aspect of the present invention provides:
Etching the silicon wafer surface layer by the etching method or using the etching apparatus;
Collecting the metal components on the surface of the silicon wafer after etching in the recovered liquid, and analyzing the metal components in the recovered liquid;
The present invention relates to a method for analyzing metal contamination of silicon wafers containing silicon.
 前記シリコンウェーハは、工程汚染の把握を行うためのウェーハであることができる。 The silicon wafer may be a wafer for grasping process contamination.
 本発明によれば、デバイス特性に悪影響を与えるシリコンウェーハの金属汚染を、短時間かつ高感度に評価することができる。評価対象のシリコンウェーハを、工程汚染の把握を行うシリコンウェーハとすることで、工程の金属汚染を把握することができ、これにより高品質なシリコンウェーハを提供することが可能となる。 According to the present invention, metal contamination of a silicon wafer that adversely affects device characteristics can be evaluated in a short time with high sensitivity. By making the silicon wafer to be evaluated a silicon wafer for grasping the process contamination, it is possible to grasp the metal contamination of the process, thereby providing a high-quality silicon wafer.
図1は、本発明にかかるエッチング装置の概略図である。FIG. 1 is a schematic view of an etching apparatus according to the present invention. 図2は、閉塞部材(反応ドーム)の加熱温度とSi残渣生成量との関係を示すグラフである。FIG. 2 is a graph showing the relationship between the heating temperature of the blocking member (reaction dome) and the amount of Si residue generated. 図3は、エッチングガス噴出塔の高さとSi残渣生成量との関係を示すグラフである。FIG. 3 is a graph showing the relationship between the height of the etching gas ejection tower and the amount of Si residue generated. 図4は、閉塞空間(反応ドーム)内の陽圧量とシリコンウェーハ表層部のエッチング量との関係を示すグラフである。FIG. 4 is a graph showing the relationship between the amount of positive pressure in the enclosed space (reaction dome) and the amount of etching on the surface layer of the silicon wafer.
 本発明の一態様は、シリコンウェーハ表面をエッチングガスと接触させることにより、該シリコンウェーハ表層部をエッチングするシリコンウェーハ表層部のエッチング方法(以下、単に「エッチング方法」ともいう)に関する。 One embodiment of the present invention relates to a silicon wafer surface layer portion etching method (hereinafter, also simply referred to as “etching method”) in which the silicon wafer surface layer portion is etched by bringing the silicon wafer surface into contact with an etching gas.
 本発明のエッチング方法の一態様(以下、「エッチング方法1」という)は、シリコンウェーハ表層部をエッチングするエッチングガスとして、弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガスを使用する。これにより先に詳細を説明したように、気相分解の反応速度(エッチング速度)を高めることができるため、単位時間あたりのエッチング量を増加させることができ、結果的に長時間のエッチング処理を行うことなく、高感度分析するに足るエッチング量を実現することができる。 In one embodiment of the etching method of the present invention (hereinafter referred to as “etching method 1”), a mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas is used as an etching gas for etching the surface layer portion of the silicon wafer. . As described in detail above, the reaction rate (etching rate) of the gas phase decomposition can be increased, so that the etching amount per unit time can be increased, resulting in a long etching process. An etching amount sufficient for high sensitivity analysis can be realized without performing the analysis.
 本発明のエッチング方法の他の態様(以下、「エッチング方法2」という)は、シリコンウェーハを支持部上に配置した支持台と、該支持台上の支持部側の開放部を閉塞部材により閉塞することによって形成された閉塞空間と、を有する反応チャンバー内でシリコンウェーハ表層部をエッチングすることを含み、前記エッチングを、前記閉塞空間内にエッチングガスを導入し、該ガスと前記シリコンウェーハ表面とを接触させることによって行い、かつ、前記エッチング中、前記閉塞部材に設けた加熱手段によって前記閉塞空間内を加熱するとともに、前記支持台に設けた加熱手段によって前記支持部上に配置されたシリコンウェーハを加熱するものである。 In another aspect of the etching method of the present invention (hereinafter referred to as “etching method 2”), a support base in which a silicon wafer is disposed on a support portion, and an opening portion on the support portion side on the support base are closed by a closing member. And etching the silicon wafer surface layer in a reaction chamber having a closed space formed by introducing an etching gas into the closed space, the gas and the silicon wafer surface, And a silicon wafer disposed on the support portion by the heating means provided on the support base while heating the inside of the closed space by the heating means provided on the closing member during the etching. Is to heat.
 本発明の更なる態様は、シリコンウェーハを配置する支持部を有する支持台と、上記支持台上の支持部側の開放部を閉塞し閉塞空間を形成する閉塞部材と、上記閉塞空間にエッチングガスを導入するガス導入手段と、を有するシリコンウェーハ表層部のエッチング装置(以下、単に「エッチング装置」ともいう)に関する。本発明のエッチング装置において、前記閉塞部材は、前記閉塞空間内を加熱する加熱手段を有し、かつ前記支持台は、前記支持部上に配置されるシリコンウェーハを加熱する加熱手段を有するものである。本発明のエッチング装置は、本発明のエッチング方法2を実施するために、使用することができる。 According to a further aspect of the present invention, there is provided a support base having a support portion on which a silicon wafer is disposed, a closing member that closes an open portion on the support portion on the support base to form a closed space, and an etching gas in the closed space A silicon wafer surface layer etching apparatus (hereinafter also simply referred to as an “etching apparatus”). In the etching apparatus of the present invention, the closing member has a heating means for heating the inside of the closed space, and the support base has a heating means for heating the silicon wafer disposed on the support portion. is there. The etching apparatus of the present invention can be used for carrying out the etching method 2 of the present invention.
 本発明のエッチング方法2およびエッチング装置は、エッチングガスとシリコンウェーハ表面とを接触させ、該基板表層部をエッチングする反応を行う際、シリコンウェーハを上下方向から加熱するために、支持台と閉塞部材とにそれぞれ加熱手段を設ける。これにより、気相エッチング反応によって生成される、測定感度低下の原因となるSi残渣量を低減することができる。この理由を、本発明者らは以下のように推察している。 In the etching method 2 and the etching apparatus of the present invention, a support base and a blocking member are used to heat the silicon wafer from above and below when the etching gas and the silicon wafer surface are brought into contact with each other and the substrate surface layer portion is etched. And heating means are provided respectively. Thereby, the amount of Si residue generated by the vapor phase etching reaction and causing a decrease in measurement sensitivity can be reduced. The inventors presume this reason as follows.
 先に説明したとおり、例えばエッチングガスとして弗化水素ガス(HF)と硝酸ガス(HNO)との混合ガスを使用してシリコンウェーハ(半導体基板)の表層部をエッチングする態様では、以下のHNOガスによるSiの酸化(1)と、HFガスによるSiOの除去(2)が同時に行われる。
  Si+4HNO↑ → SiO+8NO↑+2HO   …(1)
  SiO+4HF↑ → SiF+2HO        …(2)
 反応で生じたNOガスは、下記(3)に示すように、反応後直ちに酸素と反応する。
  2NO↑+O↑ → 2NO↑             …(3)
 式(1)、式(2)で生じた水蒸気が反応容器内面に付着して微小な液滴になった後、式(4)に示すように、SiFガスはこの液滴と反応してゲル状のオルトケイ酸(HSiO)を生じる。オルトケイ酸(HSiO)は、比較的短時間で分解昇華させることができる。
  SiF↑+4HO → HSiO↓+4HF↑     …(4)
 式(3)、式(4)でそれぞれ生じたNOガスとHFガスにより、上記式(1)、式(2)の反応が繰り返されることにより、Siが分解昇華される。HFとHNO3によりSiは、通常その97%以上が分解してSiF4を生成し、一方その3%以下がジアンモニウムヘキサフルオロシリケート((NH4)2SiF6)を生成する。これは、上記反応(1)において僅かに発生したNHガスが、エッチングガスに含まれるHFガスおよび上記(2)の反応で生成したSiFと、下記式(5)に示すように反応するためである。
  SiF↑+2HF↑+2NH↑ → (NHSiF …(5)
 この(NH4)2SiF6は白い結晶であり難分解成分であるため、従来の気相エッチング法においてSi残渣の大部分を占める化合物であった。ここでエッチング反応中にシリコンウェーハを上下方向から加熱することによって上記反応を促進することにより、SiF4の生成反応が有意に進むことが、(NH4)2SiF6の生成を抑制し、結果的にSi残渣低減に寄与していると考えられる。
As described above, for example, in a mode in which a surface layer portion of a silicon wafer (semiconductor substrate) is etched using a mixed gas of hydrogen fluoride gas (HF) and nitric acid gas (HNO 3 ) as an etching gas, the following HNO is used: Oxidation of Si with 3 gases (1) and removal of SiO 2 with HF gas (2) are performed simultaneously.
Si + 4HNO 3 ↑ → SiO 2 + 8NO ↑ + 2H 2 O (1)
SiO 2 + 4HF ↑ → SiF 4 + 2H 2 O (2)
The NO gas produced by the reaction reacts with oxygen immediately after the reaction, as shown in (3) below.
2NO ↑ + O 2 ↑ → 2NO 2 ↑ (3)
After the water vapor generated in the formulas (1) and (2) adheres to the inner surface of the reaction vessel to form fine droplets, the SiF 4 gas reacts with the droplets as shown in the formula (4). This produces gel-like orthosilicic acid (H 4 SiO 4 ). Orthosilicic acid (H 4 SiO 4 ) can be decomposed and sublimated in a relatively short time.
SiF 4 ↑ + 4H 2 O → H 4 SiO 4 ↓ + 4HF ↑ (4)
Si is decomposed and sublimated by repeating the reactions of the above formulas (1) and (2) with the NO 2 gas and the HF gas generated in the formulas (3) and (4), respectively. With HF and HNO 3 , Si is usually decomposed by 97% or more to form SiF 4 , while 3% or less forms diammonium hexafluorosilicate ((NH 4 ) 2 SiF 6 ). This is because NH 3 gas generated slightly in the reaction (1) reacts with HF gas contained in the etching gas and SiF 4 generated by the reaction of (2) as shown in the following formula (5). Because.
SiF 4 ↑ + 2HF ↑ + 2NH 3 ↑ → (NH 4 ) 2 SiF 6 (5)
Since (NH 4 ) 2 SiF 6 is a white crystal and a hardly decomposable component, it is a compound that occupies most of the Si residue in the conventional vapor phase etching method. Here, by promoting the reaction by heating the silicon wafer from above and below during the etching reaction, the formation reaction of SiF 4 proceeds significantly, which suppresses the formation of (NH 4 ) 2 SiF 6 , and results It is thought that it contributes to Si residue reduction.
 エッチング方法2では、使用するエッチングガスは、エッチング方法1で使用されるもの(弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガス)に限定されるものではなく、例えば弗化水素ガス(HF)と硝酸ガス(HNO)との混合ガスをエッチングガスとして使用することもできる。弗化水素ガス(HF)と硝酸ガス(HNO)との混合ガスを使用すると、前記した式(3)、式(4)でそれぞれ生じたNOガスとHFガスにより、上記式(1)、式(2)の反応が繰り返されることによってSiが分解昇華されることにより、シリコンウェーハ表層部のエッチングが進行する。弗化水素ガスと硝酸ガスとの混合ガスは、例えば、特許3832204号明細書段落[0010]に記載の方法により発生させることができる。エッチング速度の点からは、エッチング方法2においても、エッチング方法1と同様に、弗化水素ガス、硝酸ガスおよびNOxガスの混合ガスをエッチングガスとして使用することが好ましい。 In the etching method 2, the etching gas used is not limited to the one used in the etching method 1 (mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas). For example, hydrogen fluoride gas A mixed gas of (HF) and nitric acid gas (HNO 3 ) can also be used as an etching gas. When a mixed gas of hydrogen fluoride gas (HF) and nitric acid gas (HNO 3 ) is used, the above formula (1) is obtained by the NO 2 gas and HF gas generated in the above formulas (3) and (4), respectively. Etching of the surface layer portion of the silicon wafer proceeds as Si is decomposed and sublimated by repeating the reaction of formula (2). The mixed gas of hydrogen fluoride gas and nitric acid gas can be generated, for example, by the method described in paragraph [0010] of Japanese Patent No. 3832204. From the viewpoint of the etching rate, also in the etching method 2, as in the etching method 1, it is preferable to use a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas as the etching gas.
 本発明のエッチング方法1、エッチング方法2、およびエッチング装置は、単独で用いることもでき、適宜組み合わせて用いることもできる。
 以下、本発明について更に詳細に説明する。
The etching method 1, the etching method 2, and the etching apparatus of the present invention can be used alone or in appropriate combination.
Hereinafter, the present invention will be described in more detail.
 エッチング方法1では、弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガス(エッチングガス)をシリコンウェーハ表面と接触させることにより、シリコンウェーハ表層部をエッチングする。例えば、シリコンウェーハが配置されたチャンバー内にエッチングガスを導入することにより、エッチングガスをシリコンウェーハ表面と接触させることができる。そのようなチャンバーを備えたエッチング装置として、本発明のエッチング装置を用いることができる。
 以下、図1に基づき本発明にかかるエッチング装置について説明するが、本発明において使用されるエッチング装置は、図1に示す装置に限定されるものではなく、エッチング方法1、エッチング方法2を実施可能な構成を有するものであれば、何ら制限なく使用することができる。
In the etching method 1, the silicon wafer surface layer portion is etched by bringing a mixed gas (etching gas) of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas into contact with the surface of the silicon wafer. For example, the etching gas can be brought into contact with the surface of the silicon wafer by introducing the etching gas into a chamber in which the silicon wafer is disposed. As an etching apparatus provided with such a chamber, the etching apparatus of the present invention can be used.
Hereinafter, the etching apparatus according to the present invention will be described with reference to FIG. 1, but the etching apparatus used in the present invention is not limited to the apparatus shown in FIG. 1, and the etching method 1 and the etching method 2 can be performed. If it has a simple structure, it can be used without any limitation.
 図1は、本発明にかかるエッチング装置の概略図である。図1上図は、該装置の断面図、図1下図は、該装置の鳥瞰図である。図1中、支持台1は、シリコンウェーハ2を配置する支持部1aを有する。閉塞部材(以下、「反応ドーム」ともいう)3は、支持台1の支持部1a側の開放部を閉塞することにより閉塞空間を形成する。この閉塞空間内に配置されたシリコンウェーハ2は、反応ドーム3に設けた加熱手段5-1および支持部1aに設けた加熱手段5-2により、上下方向から加熱される。上記加熱手段は特に限定されるものではなく、通電加熱、誘導加熱等の各種加熱方式により加熱を行うことができる。加熱効率の観点からは、通電加熱を採用することが好ましい。例えば、加熱手段5-1を40~100℃の範囲に加熱し、加熱手段5-2を20~40℃の範囲に加熱することにより、エッチング反応を促進しSi残渣量を低減することができる。また、支持台1に回転機構を設け、エッチングガス導入中にシリコンウェーハを円周方向に回転させることが好ましい。これによりエッチング反応の面内均一性を高めることができる。回転速度は、支持部上に配置されたシリコンウェーハが回転により位置ずれを起こさない範囲に設定することが好ましく、例えば接線速度で10~100mm/sec.程度とすることが好ましい。
 なお、エッチング方法1においては、エッチング反応を行うチャンバー内を加熱することは必須ではなく、上記加熱手段を持たないエッチング装置を用いることももちろん可能である。または、支持部または反応ドームのいずれか一方のみに加熱手段を設け、該加熱手段によってチャンバー内を加熱することもできる。あるいは、支持部に冷却手段を設けてウェーハを10℃~20℃程度に冷却することもできる。この冷却により、シリコンウェーハ表層部におけるエッチング速度を向上させることができる。
FIG. 1 is a schematic view of an etching apparatus according to the present invention. 1 is a cross-sectional view of the device, and the lower view of FIG. 1 is a bird's-eye view of the device. In FIG. 1, the support base 1 has a support portion 1 a on which the silicon wafer 2 is arranged. The closing member (hereinafter also referred to as “reaction dome”) 3 forms a closed space by closing the opening portion of the support base 1 on the support portion 1a side. The silicon wafer 2 disposed in the closed space is heated from above and below by the heating means 5-1 provided in the reaction dome 3 and the heating means 5-2 provided in the support portion 1a. The heating means is not particularly limited, and heating can be performed by various heating methods such as energization heating and induction heating. From the viewpoint of heating efficiency, it is preferable to employ energization heating. For example, by heating the heating means 5-1 in the range of 40 to 100 ° C. and heating the heating means 5-2 in the range of 20 to 40 ° C., the etching reaction can be promoted and the amount of Si residue can be reduced. . Moreover, it is preferable to provide a rotation mechanism on the support base 1 to rotate the silicon wafer in the circumferential direction during the introduction of the etching gas. Thereby, the in-plane uniformity of the etching reaction can be enhanced. The rotation speed is preferably set within a range in which the silicon wafer disposed on the support portion is not displaced by rotation, for example, a tangential speed of 10 to 100 mm / sec. It is preferable to set the degree.
In the etching method 1, it is not essential to heat the inside of the chamber in which the etching reaction is performed, and it is of course possible to use an etching apparatus that does not have the heating means. Alternatively, it is also possible to provide a heating means only in one of the support portion and the reaction dome and heat the inside of the chamber by the heating means. Alternatively, the wafer can be cooled to about 10 ° C. to 20 ° C. by providing a cooling means in the support portion. By this cooling, the etching rate in the surface layer portion of the silicon wafer can be improved.
 上記のようにシリコンウェーハを配置した後、上記閉塞空間内にエッチングガスが導入される。導入されたエッチングガスがシリコンウェーハ表面と接触することによりシリコンウェーハ表層部がエッチングされる。ここでエッチング方法1において導入するエッチングガスは、弗化水素ガス、硝酸ガスおよびNOxガスの混合ガスである。 After the silicon wafer is arranged as described above, an etching gas is introduced into the enclosed space. When the introduced etching gas comes into contact with the surface of the silicon wafer, the surface layer portion of the silicon wafer is etched. Here, the etching gas introduced in the etching method 1 is a mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas.
 弗化水素ガス、硝酸ガスおよびNOxガスの混合ガスは、上記3種のガスを任意の割合で混合することにより得ることができる。例えば、シリコン片を浸漬した硝酸と弗化水素酸との混酸(以下、「混酸A」という)にキャリアガスをバブリングすることにより発生させた硝酸ガスとNOxガスとの混合ガスを、弗化水素酸と硫酸との混酸(以下、「混酸B」という)にキャリアガスをバブリングすることにより発生させた弗化水素ガスと混合することによって、上記混合ガスを得ることができる。図1に示す態様では、混酸Aを含む密閉容器8にキャリアガスとして窒素ガスをバブリングすることにより発生させた硝酸ガスとNOxガスとの混合ガスと、混酸Bを含む密閉容器7にキャリアガスとして窒素ガスをバブリングすることにより発生させた弗化水素ガスとを混合することにより、弗化水素ガス、硝酸ガスおよびNOxガスの混合ガスを得ている。混酸Aおよび混酸Bの調製に使用する酸溶液としては、例えば、濃度40~50質量%の弗化水素酸(HF)、濃度50~98質量%の硫酸(HSO)、濃度50~70質量%の硝酸(HNO)を挙げることができる。混酸Aにおける硝酸と弗化水素酸との混合比は、例えば、硝酸:弗化水素酸(体積基準)=10~20:1~3とすることができる。混酸Bにおける硫酸と弗化水素酸との混合比は、例えば、弗化水素酸:硫酸(体積基準)=3~6:1~3とすることができる。また、本発明においてバブリングに使用するキャリアガスとしては、窒素ガス等の不活性ガスが好適である。バブリングによれば、常時一定量のガスを供給できるため好ましい。バブリング量は特に限定されるものではないが、例えば0.1~2L/min.程度が好適である。上記混合ガスの混合比は特に限定されるものではなく、例えば、バブリングのために使用するキャリアガスの流量によって調整することができる。または、混酸Bに代えて加熱した弗化水素酸を、弗化水素ガス発生源として使用することも好適である。ここで弗化水素酸を加熱する理由は、ウェーハ表面におけるエッチング速度を高めるためである。弗化水素酸を加熱しないと、加熱する場合と比べて単位時間当たりの弗化水素ガスの発生量が少ないため、ウェーハ表面におけるエッチング速度は低くなる。エッチング速度の観点からは、弗化水素酸は液温30℃以上に加熱することが好ましい。本発明者らの検討によれば、弗化水素酸の液温は40℃が最適条件であり、温度制御も比較的容易であり好ましい。本発明者らが、40℃に加熱した弗化水素酸より発生させた弗化水素ガスを用いて、本発明によりウェーハ表面をエッチングしたところ、エッチング速度は10μm/hr程度、30℃未満の弗化水素酸より発生させた弗化水素ガスを用いてウェーハ表面をエッチングしたところエッチング速度は、40℃加熱の場合の半分以下であった。したがって弗化水素酸を弗化水素ガス発生源とする場合、液温30℃以上となるように加熱することが好ましく、40℃程度に加熱することが特に好ましい。弗化水素酸の加熱温度が高いほど、単位時間当たりの弗化水素ガスの発生量が増加するが、本発明者らの検討によれば、50℃を超える液温に弗化水素酸を加熱して単位時間当たりの弗化水素ガスの発生量を増加させても、ウェーハ表面におけるエッチング速度は、40℃に弗化水素酸を加熱して発生した弗化水素ガスを用いた場合のエッチング速度に対して向上しなかった。この原因は、ウェーハ表面におけるエッチング反応が律速となっていることにあると考えられる。また、弗化水素酸の液温が50℃を超えると、単位時間当たりの弗化水素の発生量が増加するため、弗化水素酸の交換頻度が増える。したがって工業的にも弗化水素酸の加熱温度は50℃以下とすることが好ましい。例えば図1に示すエッチング装置において、容器7に入れた弗化水素酸を電気ヒーター(図1では図示せず)にて加熱するとともに、温度センサーを設置してヒーターの出力を制御することで所望温度(上記の通り、好ましくは30~50℃)に維持した状態でキャリアガスとして窒素ガスをバブリングすることで、加熱した弗化水素酸から弗化水素ガスを発生させることができる。 A mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas can be obtained by mixing the above three gases at an arbitrary ratio. For example, a mixed gas of nitric acid gas and NOx gas generated by bubbling a carrier gas in a mixed acid of nitric acid and hydrofluoric acid (hereinafter referred to as “mixed acid A”) in which a silicon piece is immersed is converted into hydrogen fluoride. The mixed gas can be obtained by mixing a mixed acid of acid and sulfuric acid (hereinafter referred to as “mixed acid B”) with hydrogen fluoride gas generated by bubbling a carrier gas. In the embodiment shown in FIG. 1, a mixed gas of nitric acid gas and NOx gas generated by bubbling nitrogen gas as a carrier gas in the sealed container 8 containing the mixed acid A, and a carrier gas in the sealed container 7 containing the mixed acid B are used. A mixed gas of hydrogen fluoride gas, nitric acid gas and NOx gas is obtained by mixing with hydrogen fluoride gas generated by bubbling nitrogen gas. Examples of the acid solution used to prepare the mixed acid A and the mixed acid B include hydrofluoric acid (HF) having a concentration of 40 to 50% by mass, sulfuric acid (H 2 SO 4 ) having a concentration of 50 to 98% by mass, and a concentration of 50 to 50%. Mention may be made of 70% by mass of nitric acid (HNO 3 ). The mixing ratio of nitric acid and hydrofluoric acid in the mixed acid A can be, for example, nitric acid: hydrofluoric acid (volume basis) = 10 to 20: 1 to 3. The mixing ratio of sulfuric acid and hydrofluoric acid in the mixed acid B can be, for example, hydrofluoric acid: sulfuric acid (volume basis) = 3 to 6: 1 to 3. In addition, an inert gas such as nitrogen gas is suitable as the carrier gas used for bubbling in the present invention. Bubbling is preferable because a constant amount of gas can be always supplied. Although the bubbling amount is not particularly limited, for example, 0.1 to 2 L / min. The degree is preferred. The mixing ratio of the mixed gas is not particularly limited, and can be adjusted by, for example, the flow rate of the carrier gas used for bubbling. Alternatively, it is also preferable to use heated hydrofluoric acid instead of the mixed acid B as a hydrogen fluoride gas generation source. The reason for heating hydrofluoric acid here is to increase the etching rate on the wafer surface. If the hydrofluoric acid is not heated, the amount of hydrogen fluoride gas generated per unit time is small as compared with the case of heating, and the etching rate on the wafer surface becomes low. From the viewpoint of the etching rate, hydrofluoric acid is preferably heated to a liquid temperature of 30 ° C. or higher. According to the study by the present inventors, the optimum liquid temperature of hydrofluoric acid is 40 ° C., and temperature control is relatively easy and preferable. When the present inventors etched the wafer surface according to the present invention using hydrogen fluoride gas generated from hydrofluoric acid heated to 40 ° C., the etching rate was about 10 μm / hr and the temperature was less than 30 ° C. When the wafer surface was etched using hydrogen fluoride gas generated from hydrofluoric acid, the etching rate was less than half that when heated at 40 ° C. Therefore, when hydrofluoric acid is used as the hydrogen fluoride gas generation source, it is preferable to heat the liquid to a temperature of 30 ° C. or higher, and it is particularly preferable to heat to about 40 ° C. As the heating temperature of hydrofluoric acid increases, the amount of hydrogen fluoride gas generated per unit time increases, but according to the study by the present inventors, hydrofluoric acid is heated to a liquid temperature exceeding 50 ° C. Thus, even if the amount of hydrogen fluoride gas generated per unit time is increased, the etching rate on the wafer surface is the etching rate when hydrogen fluoride gas generated by heating hydrofluoric acid to 40 ° C. is used. Did not improve. This is thought to be because the etching reaction on the wafer surface is rate limiting. Further, when the liquid temperature of hydrofluoric acid exceeds 50 ° C., the amount of hydrogen fluoride generated per unit time increases, so the frequency of hydrofluoric acid exchange increases. Therefore, from an industrial viewpoint, the heating temperature of hydrofluoric acid is preferably 50 ° C. or lower. For example, in the etching apparatus shown in FIG. 1, the hydrofluoric acid contained in the container 7 is heated by an electric heater (not shown in FIG. 1) and a temperature sensor is installed to control the output of the heater. By bubbling nitrogen gas as a carrier gas while maintaining the temperature (as described above, preferably 30 to 50 ° C.), hydrogen fluoride gas can be generated from heated hydrofluoric acid.
 混酸Aから常時または定期的に所定量のNOxガスを発生させるためには、シリコン片を浸漬させた硝酸と弗化水素酸との混酸をキャリアガスによってバブリングさせながら、常時または定期的に一定量の弗化水素酸を添加することが好ましい。図1に示す態様では、密閉容器8において、シリコン片を含む硝酸と弗化水素酸(密閉容器8)にキャリアガスとして窒素ガスをバブリングしながら、弗化水素酸(弗酸水溶液)を滴下することによりNOxガスを発生させている。ここで使用するシリコン片としては、シリコン片の分解によって系内が汚染することを防止するため、高純度のものを用いることが好ましい。そのような高純度シリコン片としては、シリコンウェーハ、好ましくはシリコン基板製造の最終洗浄を経たシリコンウェーハを裁断することによって得られるシリコンウェーハ片を挙げることができる。シリコン片の使用量は、所望量のガスの発生が可能な量であればよく特に限定されるものではないが、例えば、68質量%硝酸水溶液約80gと50質量%弗酸水溶液約6gとの混酸に対して、約3~5g程度のシリコン片を浸漬させ、その混酸に50質量%弗酸を0.1~1.0g/min.量で添加することができる。 In order to generate a predetermined amount of NOx gas from the mixed acid A at all times or regularly, a constant amount is constantly or periodically fixed while bubbling a mixed acid of nitric acid and hydrofluoric acid in which silicon pieces are immersed with a carrier gas. It is preferable to add hydrofluoric acid. In the embodiment shown in FIG. 1, hydrofluoric acid (hydrofluoric acid aqueous solution) is dropped in a sealed container 8 while bubbling nitrogen gas as a carrier gas into nitric acid containing silicon pieces and hydrofluoric acid (sealed container 8). As a result, NOx gas is generated. As the silicon piece used here, it is preferable to use a high-purity silicon piece in order to prevent the inside of the system from being contaminated by the decomposition of the silicon piece. Examples of such high-purity silicon pieces include silicon wafer pieces obtained by cutting a silicon wafer, preferably a silicon wafer that has been subjected to final cleaning for manufacturing a silicon substrate. The amount of silicon piece used is not particularly limited as long as a desired amount of gas can be generated. For example, about 80 g of a 68% by mass nitric acid aqueous solution and about 6 g of a 50% by mass hydrofluoric acid aqueous solution are used. About 3 to 5 g of silicon pieces are immersed in the mixed acid, and 50% by mass hydrofluoric acid is added to the mixed acid in an amount of 0.1 to 1.0 g / min. Can be added in an amount.
 図1に示す態様では、弗化水素ガスの供給源となる混酸Bまたは好ましくは30℃~50℃に加熱した弗化水素酸を含む容器7から発生するガスの流路と硝酸ガスおよびNOxガスの供給源となるシリコン片入り混酸Aを含む容器8から発生するガスの流路を合流させることにより、弗化水素ガス、硝酸ガスおよびNOxガスの混合ガスを得ている。なお、図1では反応チャンバー前に容器9を設け混合ガスの均一性を高めているが、本発明は図1に示す態様に限定されるものではない。上記容器7~9としては、酸やガスによる腐食を防止するため弗素系樹脂製のものを使用することが好ましい。 In the embodiment shown in FIG. 1, a flow path of gas generated from a container 7 containing mixed acid B or a hydrofluoric acid heated to 30 ° C. to 50 ° C. as a supply source of hydrogen fluoride gas, nitric acid gas and NOx gas The mixed gas of hydrogen fluoride gas, nitric acid gas, and NOx gas is obtained by joining the flow path of the gas generated from the container 8 containing the mixed acid A containing silicon pieces serving as the supply source. In FIG. 1, the container 9 is provided in front of the reaction chamber to improve the uniformity of the mixed gas, but the present invention is not limited to the embodiment shown in FIG. As the containers 7 to 9, it is preferable to use those made of a fluorine-based resin in order to prevent corrosion by acid or gas.
 上記エッチングガスを閉塞空間に導入するためのガス導入口は、少なくとも1つ設ければよい。好ましくは、図1に示すように支持台から鉛直上方に突出する筒状体(以下、「ガス噴出塔」ともいう)の先端に設けられたガス噴霧口からエッチングガスを噴霧することが好ましい。ガス噴出塔1本あたりのガス噴霧量は、例えば100~2000ml/minとすることが好ましい。 It is sufficient to provide at least one gas inlet for introducing the etching gas into the closed space. Preferably, as shown in FIG. 1, it is preferable to spray the etching gas from a gas spray port provided at the tip of a cylindrical body (hereinafter also referred to as a “gas jet tower”) that protrudes vertically upward from the support base. The amount of gas sprayed per gas ejection tower is preferably, for example, 100 to 2000 ml / min.
 図1に示す態様では、支持台1内にガス流路を設けるとともに、このガス流路と連通したガス噴出塔4を、支持部1aから鉛直上方に突出させている。このように鉛直上方に突出するガス噴出塔からエッチングガスを導入することにより、シリコンウェーハとエッチングガス噴霧口に所定の距離を設けることができるため、ガス噴霧口から噴霧されたエッチングガスがシリコンウェーハ表面に接触するまでに閉塞空間内の雰囲気と均一化され、シリコンウェーハ表面のエッチング不均一性を解決することが可能である。更に、エッチングガスに含まれる水分が、シリコンウェーハ表面に吸着する割合を低減することもできる。これにより、前記した式(1)、(2)の反応がよりいっそう促進され、Si残渣となるゲル状のオルトケイ酸(HSiO)およびジアンモニウムヘキサフルオロシリケート((NH4)2SiF6)の生成を、より効果的に抑制することができる。上記式(1)、(2)の反応を効果的に促進する観点から、シリコンウェーハ表面(被エッチング面)とガス噴霧口との距離は、鉛直方向において5cm以上とすることが好ましく、15cm以上とすることがより好ましく、15~30cmの範囲とすることがよりいっそう好ましい。また、図1に示すようにガス噴出塔上部をL字型とし、その先端にガス噴霧口を設けることが好ましい。 In the aspect shown in FIG. 1, while providing a gas flow path in the support stand 1, the gas ejection tower 4 connected with this gas flow path is protruded vertically upward from the support part 1a. Thus, by introducing the etching gas from the gas ejection tower protruding vertically upward, a predetermined distance can be provided between the silicon wafer and the etching gas spraying port, so that the etching gas sprayed from the gas spraying port is the silicon wafer. By contacting the surface, the atmosphere in the enclosed space is made uniform, and the etching non-uniformity on the silicon wafer surface can be solved. Furthermore, the rate at which moisture contained in the etching gas is adsorbed on the silicon wafer surface can be reduced. As a result, the reactions of the above formulas (1) and (2) are further promoted, and gel-like orthosilicic acid (H 4 SiO 4 ) and diammonium hexafluorosilicate ((NH 4 ) 2 SiF 6 ) that become Si residues. ) Can be more effectively suppressed. From the viewpoint of effectively promoting the reactions of the above formulas (1) and (2), the distance between the silicon wafer surface (surface to be etched) and the gas spray port is preferably 5 cm or more in the vertical direction, preferably 15 cm or more. More preferably, it is more preferably in the range of 15 to 30 cm. Moreover, as shown in FIG. 1, it is preferable that the upper part of the gas ejection tower is L-shaped, and a gas spray port is provided at the tip.
 前記ガス噴出塔は、少なくとも1本、好ましくは2本以上設けることが好ましく、5本以上設けることが更に好ましい。その本数の上限は特に限定されるものではないが、例えば10本以下である。複数本のガス噴出塔を設置することにより、閉塞空間へのガス導入量を増加させるとともに、閉塞空間内でのガス濃度の均一性を高めることができる。ガス濃度の均一性をより一層高めるためには、複数本のガス反応塔は、図1に示すようにシリコンウェーハを取り囲むように均等な間隔で設置することが好ましい。また、ガス噴霧口とシリコンウェーハ表面との距離を自在に調整できるようにガス噴出塔に高さ制御機構を設けることが好ましい。 The number of gas ejection towers is preferably at least 1, preferably 2 or more, and more preferably 5 or more. Although the upper limit of the number is not specifically limited, For example, it is 10 or less. By installing a plurality of gas ejection towers, the amount of gas introduced into the enclosed space can be increased, and the uniformity of the gas concentration in the enclosed space can be enhanced. In order to further improve the uniformity of the gas concentration, it is preferable that the plurality of gas reaction towers be installed at equal intervals so as to surround the silicon wafer as shown in FIG. Moreover, it is preferable to provide a height control mechanism in the gas ejection tower so that the distance between the gas spray port and the silicon wafer surface can be freely adjusted.
 図1に示す態様では、閉塞空間内の圧力を制御するために圧力調整バルブ11が設けられている。本発明では、このように圧力制御手段を設けることにより、エッチング中に閉塞空間内を大気圧~陽圧の範囲とすることが好ましい。このように閉塞空間内を大気圧以上の気圧状態とすることにより、閉塞空間内のエッチングガス濃度を高濃度化し、エッチング反応を促進しエッチング時間を短縮化することができる。エッチング中の閉塞空間内の圧力は、例えば大気圧(即ち閉塞空間外部の気圧)~大気圧+0.050MPa程度の範囲内の陽圧とすることが好適である。また、反応により生じたガスを排出するため、圧力調整バルブ11を開放して適宜排気することが好ましい。 In the embodiment shown in FIG. 1, a pressure adjustment valve 11 is provided to control the pressure in the closed space. In the present invention, it is preferable to provide the pressure control means in this manner so that the enclosed space is in the range of atmospheric pressure to positive pressure during etching. Thus, by setting the inside of the enclosed space to a pressure state equal to or higher than the atmospheric pressure, the etching gas concentration in the enclosed space can be increased, the etching reaction can be promoted, and the etching time can be shortened. The pressure in the enclosed space during etching is preferably a positive pressure in the range of, for example, atmospheric pressure (that is, atmospheric pressure outside the enclosed space) to atmospheric pressure + 0.050 MPa. In addition, in order to discharge the gas generated by the reaction, it is preferable that the pressure adjusting valve 11 is opened and appropriately exhausted.
 以上説明したエッチング処理により、シリコンウェーハの表層部のSiを分解昇華することができる。エッチング時間は、エッチングガスの導入量および所望のエッチング量に応じて設定すればよく、特に限定されるものではない。 By the etching process described above, Si in the surface portion of the silicon wafer can be decomposed and sublimated. The etching time may be set according to the amount of etching gas introduced and the desired etching amount, and is not particularly limited.
 エッチング処理後のシリコンウェーハ表面には、エッチングされた表層部に含まれていた金属不純物が残留している。したがって、エッチング後のシリコンウェーハ表面から金属成分を回収、定量することにより、エッチングされた表層部に含まれていた金属不純物濃度、即ち表層部の金属汚染量を求めることができる。なお、エッチング後の表層部には通常、エッチングガスに含まれていた水分および反応により生じた水分が液滴として残留している。そこで上記金属成分の回収前に、ホットプレート等の加熱機器を用いてシリコンウェーハを加熱することにより、上記液滴を乾燥させることが好ましい。エッチング反応後、微量のオルトケイ酸およびジアンモニウムヘキサフルオロシリケートがウェーハ表面に存在していた場合にも、上記加熱処理によりそれらを分解昇華によって除去することができるため、上記加熱処理を施すことは、Si残渣をより一層低減するために好ましい。 The metal impurity contained in the etched surface layer portion remains on the surface of the silicon wafer after the etching process. Therefore, by collecting and quantifying the metal component from the surface of the etched silicon wafer, the metal impurity concentration contained in the etched surface layer portion, that is, the amount of metal contamination in the surface layer portion can be obtained. In addition, the moisture contained in the etching gas and the moisture generated by the reaction usually remain as droplets on the surface layer portion after etching. Therefore, it is preferable to dry the droplets by heating the silicon wafer using a heating device such as a hot plate before collecting the metal component. Even after a slight amount of orthosilicate and diammonium hexafluorosilicate are present on the wafer surface after the etching reaction, they can be removed by decomposition sublimation by the heat treatment. This is preferable in order to further reduce the Si residue.
 金属成分は、エッチング後のシリコンウェーハ表面に回収液を走査することにより、回収液中に捕集することができる。回収液としては、純水、弗化水素酸と過酸化水素水との混合溶液;純水、過酸化水素と塩酸との混合溶液;純水、弗化水素酸、過酸化水素水と塩酸との混合溶液、等を使用することができる。使用可能な回収液については、例えば特開2005-265718号公報、その全記載はここに特に開示として援用される、等を参照できる。シリコンウェーハ表面に供給および走査する回収量は、50~250μl程度が好適である。 The metal component can be collected in the recovered liquid by scanning the recovered liquid on the surface of the etched silicon wafer. The recovered liquid includes pure water, a mixed solution of hydrofluoric acid and hydrogen peroxide; pure water, a mixed solution of hydrogen peroxide and hydrochloric acid; pure water, hydrofluoric acid, hydrogen peroxide and hydrochloric acid A mixed solution of, etc. can be used. Regarding the recoverable liquid that can be used, reference can be made to, for example, JP-A-2005-265718, the entire description of which is specifically incorporated herein by reference. The recovery amount supplied and scanned on the silicon wafer surface is preferably about 50 to 250 μl.
 シリコンウェーハ表面に回収液を走査させる方法としては、例えば、シリコンウェーハ表面に滴下した溶液を全面になじませるように、ウェーハを傾かせて回転させる方法を用いることができる。この方法は手動で行ってもよく自動で行ってもよい。 As a method of scanning the recovery liquid on the surface of the silicon wafer, for example, a method of tilting and rotating the wafer so that the solution dripped onto the surface of the silicon wafer can be applied to the entire surface can be used. This method may be performed manually or automatically.
 次いで、シリコンウェーハ表面上を走査した回収液中の金属成分を分析することにより、エッチングにより除去された基板表層部に含まれていた金属成分の定性分析および定量分析を行うことができる。金属成分の分析は、溶液中の金属成分を分析可能な公知の方法によって行うことができる。そのような方法としては、原子吸光分析(AAS)および誘導結合プラズマ質量分析(ICP-MS)を挙げることができる。AASおよびICP-MSは、微量金属成分を高感度に分析可能であるため好ましい。分析可能な金属としては、Ag、Cu、Li、Na、Mg、Al、K、Ca、Cr、Fe、Ni、Zn等の各種金属を挙げることができる。 Next, by analyzing the metal component in the recovered liquid scanned on the surface of the silicon wafer, the qualitative analysis and quantitative analysis of the metal component contained in the substrate surface portion removed by etching can be performed. The analysis of the metal component can be performed by a known method capable of analyzing the metal component in the solution. Such methods can include atomic absorption spectrometry (AAS) and inductively coupled plasma mass spectrometry (ICP-MS). AAS and ICP-MS are preferable because trace metal components can be analyzed with high sensitivity. Examples of metals that can be analyzed include various metals such as Ag, Cu, Li, Na, Mg, Al, K, Ca, Cr, Fe, Ni, and Zn.
 本発明の更なる態様は、本発明のエッチング方法により、または本発明のエッチング装置を用いて、シリコンウェーハ表層部をエッチングすること、エッチング後のシリコンウェーハ表面上の金属成分を回収液中に捕集すること、および上記回収液中の金属成分を分析すること、を含むシリコンウェーハの金属汚染分析方法である。その詳細は、先に説明した通りである。 According to a further aspect of the present invention, the surface layer of the silicon wafer is etched by the etching method of the present invention or using the etching apparatus of the present invention, and the metal components on the surface of the silicon wafer after etching are captured in the recovered liquid. Collecting the silicon component and analyzing the metal component in the recovered liquid. The details are as described above.
 金属不純物は、シリコンウェーハ製造工程中の酸化、拡散等の各種熱処理において基板表層部へ容易に拡散し、析出物、転位、酸素誘起積層欠陥(OSF:Oxidation-induced Stacking Fault)等の結晶欠陥、少数キャリアのライフタイム低下、リーク電流の増大、酸化膜の絶縁破壊電圧劣化等を引き起こすおそれがある。そのため、熱処理プロセス等の製造工程における金属汚染を低減するために、通常、製品を熱処理する前に、使用する加熱炉のプロセス汚染量を評価用基板を用いて試験的に評価し、この評価値に基づいて汚染を改善した後に、本格的な製品熱処理を行っている。また、日常の工程汚染の把握のため、例えば1ロットあたり1枚、1日あたり1枚、または1週間あたり1枚の評価用基板をサンプリングすることにより、工程汚染を評価することも行われている。本発明の金属汚染分析方法は、上記のような工程汚染の把握を行うためのウェーハの評価方法として用いることができる。金属汚染分析のためにエッチングする表層部とは、シリコンウェーハ表面から深さ方向に向かう領域をいい、シリコンウェーハの用途および求められる物性によりエッチングすべき深さは異なるが、一般にデバイス作製に使用されるシリコンウェーハについては、表面から深さ5.0~30.0μm程度の表層部をエッチングし金属汚染を分析することが好ましい。また、表面を除く表層部の金属汚染を評価するためには、表面上の金属不純物を除去するために表面を洗浄すればよい。洗浄液としては、前記した回収液として使用される酸性溶液等を使用することができる。 Metal impurities are easily diffused to the surface layer of the substrate in various heat treatments such as oxidation and diffusion during the silicon wafer manufacturing process, and crystal defects such as precipitates, dislocations, oxygen-induced stacking faults (OSF), There is a possibility that the lifetime of minority carriers is reduced, the leakage current is increased, and the dielectric breakdown voltage of the oxide film is deteriorated. Therefore, in order to reduce metal contamination in manufacturing processes such as heat treatment processes, the process contamination amount of the heating furnace to be used is usually evaluated on a trial basis using an evaluation substrate before heat treating the product. After improving the contamination based on this, full-scale product heat treatment is performed. In addition, in order to grasp daily process contamination, process contamination is also evaluated by sampling, for example, one substrate per lot, one substrate per day, or one substrate per week. Yes. The metal contamination analysis method of the present invention can be used as a wafer evaluation method for grasping process contamination as described above. The surface layer to be etched for metal contamination analysis refers to the depth direction from the surface of the silicon wafer. The depth to be etched differs depending on the use of the silicon wafer and the required physical properties, but it is generally used for device fabrication. For the silicon wafer, it is preferable to analyze the metal contamination by etching the surface layer portion having a depth of about 5.0 to 30.0 μm from the surface. Moreover, in order to evaluate the metal contamination of the surface layer portion excluding the surface, the surface may be washed to remove metal impurities on the surface. As the cleaning liquid, an acidic solution or the like used as the recovery liquid described above can be used.
 本発明により表層部の金属汚染が分析されるシリコンウェーハは、p型半導体基板であってもn型半導体基板であってもよい。その厚さは、例えば600~1000μmであるが特に限定されるものではない。本発明の分析方法は、φ200mm、φ300mm、その他、φ450mm等どのような口径のウェーハにも適応可能である。 The silicon wafer whose surface layer metal contamination is analyzed according to the present invention may be a p-type semiconductor substrate or an n-type semiconductor substrate. The thickness is, for example, 600 to 1000 μm, but is not particularly limited. The analysis method of the present invention can be applied to wafers of any diameter such as φ200 mm, φ300 mm, and φ450 mm.
 以下、本発明を実施例により説明する。但し、本発明は実施例に示す態様に限定されるものではない。以下に記載の「%」は、質量%を示す。 Hereinafter, the present invention will be described by way of examples. However, this invention is not limited to the aspect shown in the Example. “%” Described below indicates mass%.
[実施例1]
 表裏面が鏡面加工された直径200mmのp型シリコンウェーハ(抵抗率:10Ω・cm)を5枚準備した。各シリコンウェーハの表面上の金属不純物を完全に除去するために、弗酸/過酸化水素水/塩酸/純水の洗浄液にてシリコンウェーハを洗浄した。洗浄後、完全に水分を取り除き、乾燥させた。
 次に、以下の手順により図1に示すエッチング装置内に上記シリコンウェーハを配置した。
 まず1枚目のシリコンウェーハ2を支持台1の支持部1a上に設置した。設置した後に、反応ドーム3を支持台1にかぶせて、反応ガスが漏れないように閉塞した。エッチング中の反応ドーム内の圧力が大気圧~大気圧+0.015MPaの陽圧の範囲となるように、圧力調整バルブ11を一定圧力以上にならないと反応ドーム内の反応ガスを排気しないように調整した。さらに、この時、反応ドーム3に設けた加熱手段5-1(通電加熱)の温度を約80℃に制御し、支持台1に設けた加熱手段(通電加熱)5-2を30℃に制御するとともに、支持台1を接線速度で約50mm/sec.にて回転させた。ガス噴出塔の高さ調整機構により、ガス噴霧口下端とシリコンウェーハ表面の鉛直方向距離(高さ)を20cmに調整した。
 続いて、反応ガス(エッチングガス)として、弗素系樹脂製容器7に50%弗酸50gと98%硫酸50gを秤量して入れた。別途、弗化樹脂製容器8に50%弗酸6gと68%硝酸80gを秤量し、シリコン片4gを弗素系樹脂製容器8に加えた。エッチング反応に必要なNOxガスを発生させるため、5分間待機した。同時に、容器8に0.4g/min.で50%弗酸の滴下を開始した。
 5分間待機後、容器7と容器8の薬液内に窒素ガスをそれぞれ500ml/min.(容器7)、250ml/min(容器8)で送り込み、バブリングさせた。バブリングによって、容器7から弗化水素ガスが、容器8からは硝酸ガスおよびNOxガスがそれぞれ発生し、弗素系樹脂製の空容器9を経由したのち、反応ドーム3内の反応ガス噴霧口4から噴霧された。反応ガス噴霧口から噴霧された反応ガスは反応ドーム内を充満し、シリコンウェーハ2の表面でシリコンをエッチングした。
 窒素ガスバブリング開始から約30分間シリコンウェーハを反応ドーム内3に放置した。30分後、窒素バブリングを停止した。バブリング停止後、反応ドームを開け、シリコンウェーハ2を表面が汚染されないように取り出し、250℃に加熱したホットプレート上に設置し液滴を乾燥させた。乾燥後、エッチングした面が汚染しないように保管ボックス内に保管した。
 続いて、2枚目のシリコンウェーハを支持台1に設置する。設置後、1枚目と同様に反応ドーム3をかぶせ、1枚目と同様の方法で表面をエッチングした。
 この2枚目のシリコンウェーハのエッチング中、1枚目のエッチング反応済み被評価シリコンウェーハの表面に、5%弗酸/10%塩酸/5%過酸化水素水の酸性回収液100μlを滴下し、ウェーハ表面全面をくまなく走査させ、金属不純物を回収した。この回収液を超純水で1000μlにメスアップした後、二重収束型の高感度ICP-MSにて定量評価を行った。
 2枚目のシリコンウェーハのエッチング反応が終了したところで、1枚目と同様に窒素バブリングを停止させ、反応ドーム内から取り出し、1枚目のシリコンウェーハと同様にホットプレート上で加熱し液滴を乾燥させた後、保管ボックスに保管した。
 以降、同様の操作を繰り返し合計5枚のシリコンウェーハのエッチングおよび分析を行った。
 これら5枚のシリコンウェーハから回収された金属不純物定量結果を表1に示す。併せて、各シリコンウェーハのエッチング量も表1に示す。
[Example 1]
Five p-type silicon wafers (resistivity: 10 Ω · cm) having a diameter of 200 mm with front and back surfaces mirror-finished were prepared. In order to completely remove metal impurities on the surface of each silicon wafer, the silicon wafer was cleaned with a cleaning solution of hydrofluoric acid / hydrogen peroxide solution / hydrochloric acid / pure water. After washing, the water was completely removed and dried.
Next, the silicon wafer was placed in the etching apparatus shown in FIG. 1 according to the following procedure.
First, the first silicon wafer 2 was placed on the support portion 1 a of the support base 1. After the installation, the reaction dome 3 was placed on the support base 1 and closed to prevent the reaction gas from leaking. Adjust the pressure adjustment valve 11 so that the reaction gas in the reaction dome is not exhausted until the pressure inside the reaction dome during etching is in the range of atmospheric pressure to positive pressure of 0.015 MPa. did. At this time, the temperature of the heating means 5-1 (electric heating) provided on the reaction dome 3 is controlled to about 80 ° C., and the heating means (electric heating) 5-2 provided on the support base 1 is controlled to 30 ° C. In addition, the support base 1 is moved at a tangential speed of about 50 mm / sec. And rotated. The vertical distance (height) between the lower end of the gas spray port and the silicon wafer surface was adjusted to 20 cm by the height adjustment mechanism of the gas ejection tower.
Subsequently, 50 g of 50% hydrofluoric acid and 50 g of 98% sulfuric acid were weighed and put into a fluorine resin container 7 as a reaction gas (etching gas). Separately, 6 g of 50% hydrofluoric acid and 80 g of 68% nitric acid were weighed in a fluororesin container 8, and 4 g of silicon pieces were added to the fluororesin container 8. In order to generate the NOx gas necessary for the etching reaction, the process waited for 5 minutes. At the same time, 0.4 g / min. 50% hydrofluoric acid was started to be dropped.
After waiting for 5 minutes, nitrogen gas was supplied into the chemical solution in the container 7 and the container 8 at 500 ml / min. (Container 7) was fed at 250 ml / min (container 8) and bubbled. By bubbling, hydrogen fluoride gas is generated from the container 7, and nitric acid gas and NOx gas are generated from the container 8, and after passing through an empty container 9 made of fluorine resin, from the reaction gas spraying port 4 in the reaction dome 3. Sprayed. The reaction gas sprayed from the reaction gas spraying port filled the inside of the reaction dome and etched silicon on the surface of the silicon wafer 2.
The silicon wafer was left in the reaction dome 3 for about 30 minutes from the start of nitrogen gas bubbling. After 30 minutes, nitrogen bubbling was stopped. After stopping bubbling, the reaction dome was opened, the silicon wafer 2 was taken out so that the surface was not contaminated, and placed on a hot plate heated to 250 ° C. to dry the droplets. After drying, it was stored in a storage box so that the etched surface was not contaminated.
Subsequently, a second silicon wafer is placed on the support base 1. After the installation, the reaction dome 3 was covered as in the first sheet, and the surface was etched in the same manner as in the first sheet.
During the etching of the second silicon wafer, 100 μl of 5% hydrofluoric acid / 10% hydrochloric acid / 5% hydrogen peroxide aqueous acidic recovery solution was dropped on the surface of the first etched silicon wafer to be evaluated. The entire surface of the wafer was scanned to recover metal impurities. The recovered solution was made up to 1000 μl with ultrapure water, and then quantitative evaluation was performed by a double-convergence type high-sensitivity ICP-MS.
When the etching reaction of the second silicon wafer is completed, nitrogen bubbling is stopped in the same manner as in the first wafer, taken out from the reaction dome, and heated on a hot plate in the same manner as in the first silicon wafer. After drying, it was stored in a storage box.
Thereafter, the same operation was repeated and a total of five silicon wafers were etched and analyzed.
Table 1 shows the results of quantification of metal impurities recovered from these five silicon wafers. In addition, the etching amount of each silicon wafer is also shown in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
評価結果
 表1に示す結果から、5枚のシリコンウェーハはほぼ同量表層部がエッチングされていることが確認できる。また、本実施例で使用したICS-MSの検出限界は1.0×1011atoms/cmであるが、一般的な気相エッチング法ではSi残渣の影響により、検出限界以下での定量は困難である。これに対し本実施例では、表1に示すように、検出限界以下(<1.0×1011atoms/cm)での分析が可能であった。また、この結果から評価作業での汚染がないことも確認できる。
 以上の結果から、本発明によれば、被評価シリコンウェーハ表層部の金属汚染がきわめて少なく、高品質ウェーハであることを評価可能であることが確認できる。
Evaluation Results From the results shown in Table 1, it can be confirmed that the surface layer portions of the five silicon wafers are etched by substantially the same amount. In addition, the detection limit of ICS-MS used in this example is 1.0 × 10 11 atoms / cm 3 , but in a general gas phase etching method, quantification below the detection limit is not possible due to the influence of Si residue. Have difficulty. On the other hand, in this example, as shown in Table 1, it was possible to analyze below the detection limit (<1.0 × 10 11 atoms / cm 3 ). It can also be confirmed from this result that there is no contamination in the evaluation work.
From the above results, according to the present invention, it can be confirmed that metal contamination of the surface layer portion of the silicon wafer to be evaluated is extremely small and it can be evaluated that it is a high quality wafer.
[実施例2]
 表裏面が鏡面加工された直径200mmのp型シリコンウェーハ(抵抗率:10Ω・cm)を8枚準備した。各シリコンウェーハの表面上の金属不純物を完全に除去するために、弗酸/過酸化水素水/塩酸/純水の洗浄液にてシリコンウェーハを洗浄した。洗浄後、完全に水分を取り除き、乾燥させた。
 乾燥後のシリコンウェーハ8枚のうち6枚を用いて、表層部のFe、Ni、Cuの汚染量がそれぞれ1×1011atoms/cmまたは1×1013atoms/cmとなるように1枚ずつ既知汚染した。
 既知汚染なしのシリコンウェーハ2枚と前記既知汚染シリコンウェーハ6枚を、実施例1と同様の手順にてエッチングおよび分析した。結果を表2に示す。
[Example 2]
Eight p-type silicon wafers having a diameter of 200 mm (resistivity: 10 Ω · cm) with mirror-finished front and back surfaces were prepared. In order to completely remove metal impurities on the surface of each silicon wafer, the silicon wafer was cleaned with a cleaning solution of hydrofluoric acid / hydrogen peroxide solution / hydrochloric acid / pure water. After washing, the water was completely removed and dried.
Using six of the eight silicon wafers after drying, the contamination amount of Fe, Ni, and Cu in the surface layer portion is 1 × 10 11 atoms / cm 3 or 1 × 10 13 atoms / cm 3 , respectively. One by one known contamination.
Two silicon wafers without known contamination and six known contaminated silicon wafers were etched and analyzed in the same procedure as in Example 1. The results are shown in Table 2.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
評価結果
 一般的な気相エッチング法では、1011atoms/cm~1013atoms/cmオーダーの金属汚染は、Si残渣の影響により正確な定量分析が困難である。これに対し、表2に示すように、既知汚染ウェーハからは既知汚染量に相当する金属成分が定量された。
 以上の結果から、本発明によればSi残渣の影響なく、ウェーハ表層部の金属汚染を高精度に分析できることが確認できる。
Evaluation Results In a general vapor phase etching method, metal contamination on the order of 10 11 atoms / cm 3 to 10 13 atoms / cm 3 is difficult to be accurately quantitatively analyzed due to the influence of Si residues. On the other hand, as shown in Table 2, the metal component corresponding to the known contamination amount was quantified from the known contamination wafer.
From the above results, according to the present invention, it can be confirmed that the metal contamination of the wafer surface layer portion can be analyzed with high accuracy without the influence of Si residue.
[実施例3、比較例1]
 実施例1と同様の手順で合計3枚のシリコンウェーハをエッチングした(実施例3)。これとは別に、容器7に50%弗化水素酸100g、容器8に68%硝酸80gを入れた点以外は実施例1と同様の手順で合計3枚のシリコンウェーハをエッチングした(比較例1)。実施例3および比較例1におけるエッチング量を、表3に示す。
[Example 3, Comparative Example 1]
A total of three silicon wafers were etched in the same procedure as in Example 1 (Example 3). Separately, a total of three silicon wafers were etched by the same procedure as in Example 1 except that 100 g of 50% hydrofluoric acid was put in the container 7 and 80 g of 68% nitric acid was put in the container 8 (Comparative Example 1). ). The amounts of etching in Example 3 and Comparative Example 1 are shown in Table 3.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
評価結果
 比較例1は、エッチングガスとして弗化水素ガスと硝酸ガスを用いた例であるが、表3に示すように、実施例1と同様のエッチング時間ではエッチングを行うことができなかった。これに対し表3に示すように、エッチングガスとして、弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガスを用いた実施例3では同一時間内でシリコンウェーハ表層部を約10μmエッチングすることができた。約10μmのエッチング量であれば表1、表2に示すようにウェーハ表層部の金属汚染を高精度に分析することができる。
 以上の実施例3と比較例1との対比から、本発明によれば短時間のエッチング処理によりシリコンウェーハ表層部の金属汚染を高感度に分析できることが示された。
Evaluation Results Comparative Example 1 is an example in which hydrogen fluoride gas and nitric acid gas were used as the etching gas, but as shown in Table 3, the etching could not be performed in the same etching time as in Example 1. On the other hand, as shown in Table 3, in Example 3 using a mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas as the etching gas, the surface layer portion of the silicon wafer is etched by about 10 μm within the same time. I was able to. If the etching amount is about 10 μm, the metal contamination of the wafer surface layer can be analyzed with high accuracy as shown in Tables 1 and 2.
From the above comparison between Example 3 and Comparative Example 1, it was shown that according to the present invention, metal contamination of the surface layer portion of the silicon wafer can be analyzed with high sensitivity by a short etching process.
1.加熱温度の影響の確認
 反応ドームに設けた加熱手段5-1の加熱温度をそれぞれ27℃、40℃、60℃とした点以外、実施例1(加熱手段5-1の加熱温度:80℃)と同様の方法によりエッチング後のシリコンウェーハ表面に回収液を走査する工程まで実施した。実施例1および上記加熱温度でのエッチング後に得られた回収液中のSi量を二重収束型ICP-MSにより定量分析し、エッチングしたSiに対する割合を算出した。結果を図2に示す。
 図2に示す結果から、加熱手段5-1の加熱温度を高めるほど、Si残渣が低減されることが確認できる。高精度分析を行う観点からは、エッチングしたSiに対するSi残渣化合物の生成量は1.0質量%以下であることが好ましい。したがって図2に示す結果からは、加熱手段5-1の加熱温度は40℃以上であることが好ましいことが確認できる。また、図2に示す結果から、加熱手段5-1の加熱温度100℃近傍でSi残渣の生成量が実質的に0%となることが確認できる。したがって、Si残渣生成を効果的に低減するための加熱手段5-1の加熱温度は、100℃以下で十分である。
 以上の結果から、加熱手段5-1の加熱温度は、40~100℃の範囲に設定することが好ましいことが確認できる。
1. Confirmation of influence of heating temperature Example 1 (heating temperature of heating means 5-1: 80 ° C.) except that heating temperature of heating means 5-1 provided in the reaction dome was set to 27 ° C., 40 ° C. and 60 ° C., respectively. The process up to the step of scanning the recovered liquid on the surface of the silicon wafer after etching was carried out by the same method as described above. The amount of Si in the collected liquid obtained after etching at Example 1 and the above heating temperature was quantitatively analyzed by double convergence ICP-MS, and the ratio to the etched Si was calculated. The results are shown in FIG.
From the results shown in FIG. 2, it can be confirmed that the Si residue is reduced as the heating temperature of the heating means 5-1 is increased. From the viewpoint of performing high-accuracy analysis, the amount of Si residue compound generated relative to etched Si is preferably 1.0% by mass or less. Therefore, from the results shown in FIG. 2, it can be confirmed that the heating temperature of the heating means 5-1 is preferably 40 ° C. or higher. Also, from the results shown in FIG. 2, it can be confirmed that the amount of Si residue produced is substantially 0% when the heating temperature of the heating means 5-1 is around 100 ° C. Therefore, the heating temperature of the heating means 5-1 for effectively reducing the generation of Si residue is sufficient to be 100 ° C. or less.
From the above results, it can be confirmed that the heating temperature of the heating means 5-1 is preferably set in the range of 40 to 100 ° C.
2.ガス噴霧口高さの影響の確認
 シリコンウェーハ表面とガス噴霧口下端との鉛直方向距離(高さ)を、高さ制御機構により0~30cmの間で変更した点以外、実施例1と同様の方法によりエッチング後のシリコンウェーハ表面に回収液を走査する工程まで実施した。回収液中のSi量を二重収束型ICP-MSにより定量分析し、エッチングしたSiに対する割合を算出した。結果を図3に示す。
 図3に示す結果から、ガス噴霧口を高くするほどSi残渣が低減されることが確認できる。また、上記の通り、高精度分析を行う観点からは、エッチングしたSiに対するSi残渣化合物の生成量は1.0質量%以下であることが好ましいため、図3に示す結果からは、ガス噴霧口の高さは、5cm以上であることが好ましいといえる。また、より高感度な分析を行うためには、Si残渣生成量は0.5質量%以下であることが好ましいため、図3に示す結果からは、ガス噴霧口の高さは、15cm以上であることがより好ましいことが確認できる。また、図3では、高さ20~30cmにおいてSi残渣生成量は0.5質量%未満で定常状態となるため、図3に示す結果からは、Si残渣生成を効果的に低減するためのガス噴霧口の高さは30cm以下であれば十分であると言える。
 以上の結果から、ガス噴霧口の高さは5cm以上30cm以下であることが好ましく、15cm以上30cm以下であることがより好ましいことが確認できる。
2. Confirmation of the effect of the height of the gas spray port The vertical distance (height) between the surface of the silicon wafer and the lower end of the gas spray port was changed between 0 and 30 cm by the height control mechanism. The method was carried out up to the step of scanning the recovered liquid on the surface of the silicon wafer after etching. The amount of Si in the recovered liquid was quantitatively analyzed by double convergence ICP-MS, and the ratio to the etched Si was calculated. The results are shown in FIG.
From the results shown in FIG. 3, it can be confirmed that the Si residue is reduced as the gas spraying port is raised. In addition, as described above, from the viewpoint of performing a high-precision analysis, the amount of Si residue compound generated with respect to etched Si is preferably 1.0% by mass or less. Therefore, the results shown in FIG. It can be said that the height is preferably 5 cm or more. Moreover, in order to perform a more sensitive analysis, it is preferable that the amount of Si residue generated is 0.5% by mass or less. Therefore, from the results shown in FIG. 3, the height of the gas spray port is 15 cm or more. It can be confirmed that it is more preferable. Further, in FIG. 3, since the amount of Si residue generated is less than 0.5% by mass at a height of 20 to 30 cm, a steady state is obtained. From the results shown in FIG. 3, a gas for effectively reducing Si residue generation is obtained. It can be said that it is sufficient that the height of the spray port is 30 cm or less.
From the above results, it can be confirmed that the height of the gas spray port is preferably 5 cm or more and 30 cm or less, and more preferably 15 cm or more and 30 cm or less.
3.閉塞空間内の圧力の影響の確認
 圧力調整バルブ11により閉塞空間(反応チャンバー)内の圧力を調整した点以外、実施例1と同様の方法でシリコンウェーハをエッチングした。閉塞空間内の圧力と単位時間あたりのエッチング量との関係を図4に示す。
 図4に示す結果から、圧力を高めるほどエッチング反応速度が高まりエッチング量が増加することが確認できる。
3. Confirmation of influence of pressure in enclosed space The silicon wafer was etched in the same manner as in Example 1 except that the pressure in the enclosed space (reaction chamber) was adjusted by the pressure adjusting valve 11. FIG. 4 shows the relationship between the pressure in the enclosed space and the etching amount per unit time.
From the results shown in FIG. 4, it can be confirmed that the etching reaction rate increases and the etching amount increases as the pressure is increased.
 本発明は、半導体基板の製造分野に有用である。 The present invention is useful in the field of manufacturing semiconductor substrates.

Claims (15)

  1. シリコンウェーハ表面をエッチングガスと接触させることにより、該シリコンウェーハ表層部をエッチングするシリコンウェーハ表層部のエッチング方法であって、
    前記エッチングガスとして、弗化水素ガス、硝酸ガス、および窒素酸化物ガスの混合ガスを使用することを含む、前記エッチング方法。
    A method for etching a silicon wafer surface layer portion, wherein the silicon wafer surface layer portion is etched by bringing the silicon wafer surface into contact with an etching gas,
    The etching method including using a mixed gas of hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas as the etching gas.
  2. 前記窒素酸化物ガスおよび硝酸ガスを、シリコン片を含む硝酸と弗化水素酸との混酸(以下、「混酸A」という)から発生させることを含む、請求項1に記載のエッチング方法。 2. The etching method according to claim 1, comprising generating the nitrogen oxide gas and nitric acid gas from a mixed acid of nitric acid containing silicon pieces and hydrofluoric acid (hereinafter referred to as “mixed acid A”).
  3. 前記弗化水素ガスを、弗化水素酸と硫酸との混酸(以下、「混酸B」という)または30℃~50℃に加熱した弗化水素酸から発生させることを含む、請求項1または2に記載のエッチング方法。 3. The hydrogen fluoride gas is generated from a mixed acid of hydrofluoric acid and sulfuric acid (hereinafter referred to as “mixed acid B”) or hydrofluoric acid heated to 30 ° C. to 50 ° C. The etching method as described in 4. above.
  4. 前記混酸Aにキャリアガスをバブリングさせることにより発生させた窒素酸化物ガスおよび硝酸ガスを、前記混酸Bまたは30℃~50℃に加熱した弗化水素酸にキャリアガスをバブリングさせることにより発生させた弗化水素ガスと混合することにより、前記混合ガスを調製する、請求項3に記載のエッチング方法。 Nitrogen oxide gas and nitric acid gas generated by bubbling a carrier gas to the mixed acid A were generated by bubbling a carrier gas to the mixed acid B or hydrofluoric acid heated to 30 ° C. to 50 ° C. The etching method according to claim 3, wherein the mixed gas is prepared by mixing with hydrogen fluoride gas.
  5. シリコンウェーハ表層部のエッチング方法であって、
    シリコンウェーハを支持部上に配置した支持台と、該支持台上の支持部側の開放部を閉塞部材により閉塞することによって形成された閉塞空間と、を有する反応チャンバー内でシリコンウェーハ表層部をエッチングすること、
    前記エッチングを、前記閉塞空間内にエッチングガスを導入し、該ガスと前記シリコンウェーハ表面とを接触させることによって行うこと、および、
    前記エッチング中、前記閉塞部材に設けた加熱手段によって前記閉塞空間内を加熱するとともに、前記支持台に設けた加熱手段によって前記支持部上に配置されたシリコンウェーハを加熱すること、
    を含む、前記エッチング方法。
    An etching method for the surface layer of a silicon wafer,
    A silicon wafer surface layer portion is formed in a reaction chamber having a support base in which a silicon wafer is disposed on a support portion, and a closed space formed by closing an open portion on the support portion side on the support base with a closing member. Etching,
    Performing the etching by introducing an etching gas into the enclosed space and bringing the gas into contact with the silicon wafer surface; and
    During the etching, the inside of the enclosed space is heated by the heating means provided on the closing member, and the silicon wafer disposed on the support portion is heated by the heating means provided on the support base,
    The etching method.
  6. 前記エッチングガスは、弗化水素ガス、硝酸ガスおよび窒素酸化物ガスを含む、請求項5に記載のエッチング方法。 The etching method according to claim 5, wherein the etching gas includes hydrogen fluoride gas, nitric acid gas, and nitrogen oxide gas.
  7. 前記エッチングガスの導入中、前記シリコンウェーハを円周方向に回転させる、請求項5または6に記載のエッチング方法。 The etching method according to claim 5 or 6, wherein the silicon wafer is rotated in a circumferential direction during introduction of the etching gas.
  8. 前記エッチングガスの導入を、前記閉塞空間内を陽圧に維持した状態で行う、請求項5~7のいずれか1項に記載のエッチング方法。 The etching method according to any one of claims 5 to 7, wherein the etching gas is introduced in a state in which the closed space is maintained at a positive pressure.
  9. 前記エッチングガスの導入を、前記支持台から鉛直上方に突出する筒状体の先端に設けられたガス噴霧口からエッチングガスを噴霧することによって行う、請求項5~8のいずれか1項に記載のエッチング方法。 The etching gas is introduced by spraying the etching gas from a gas spraying port provided at a tip of a cylindrical body protruding vertically upward from the support base. Etching method.
  10. シリコンウェーハ表層部のエッチング装置であって、
    シリコンウェーハを配置する支持部を有する支持台と、
    上記支持台上の支持部側の開放部を閉塞し閉塞空間を形成する閉塞部材と、
    上記閉塞空間にエッチングガスを導入するガス導入手段と、
    を有し、
    前記閉塞部材は、前記閉塞空間内を加熱する加熱手段を有し、かつ
    前記支持台は、前記支持部上に配置されるシリコンウェーハを加熱する加熱手段を有する、前記エッチング装置。
    An etching apparatus for the surface layer of a silicon wafer,
    A support base having a support portion for placing the silicon wafer;
    A closing member that closes the open part on the support part side on the support base to form a closed space;
    Gas introduction means for introducing an etching gas into the closed space;
    Have
    The said etching member has the heating means which heats the inside of the said enclosed space, and the said support stand has a heating means which heats the silicon wafer arrange | positioned on the said support part.
  11. 前記支持台は、前記支持部上に配置されるシリコンウェーハを円周方向に回転する回転機構を有する、請求項10に記載のエッチング装置。 The etching apparatus according to claim 10, wherein the support base includes a rotation mechanism that rotates a silicon wafer disposed on the support portion in a circumferential direction.
  12. 前記閉塞空間内を陽圧に制御する圧力制御手段を有する、請求項10または11に記載のエッチング装置。 The etching apparatus according to claim 10, further comprising pressure control means for controlling the inside of the enclosed space to a positive pressure.
  13. 前記ガス導入手段は、先端にエッチングガスを噴霧するガス噴霧口を有し、前記支持台から鉛直上方に突出する筒状体を含む、請求項10~12のいずれか1項に記載のエッチング装置。 The etching apparatus according to any one of claims 10 to 12, wherein the gas introduction means includes a cylindrical body that has a gas spraying port for spraying an etching gas at a tip and protrudes vertically upward from the support base. .
  14. 請求項1~9のいずれか1項に記載の方法により、または請求項10~13のいずれか1項に記載の装置を用いて、シリコンウェーハ表層部をエッチングすること、
    エッチング後のシリコンウェーハ表面上の金属成分を回収液中に捕集すること、および
    上記回収液中の金属成分を分析すること、
    を含むシリコンウェーハの金属汚染分析方法。
    Etching the surface layer of the silicon wafer by the method according to any one of claims 1 to 9 or using the apparatus according to any one of claims 10 to 13,
    Collecting the metal components on the surface of the silicon wafer after etching in the recovered liquid, and analyzing the metal components in the recovered liquid;
    A method for analyzing metal contamination of silicon wafers.
  15. 前記シリコンウェーハは、工程汚染の把握を行うためのウェーハである請求項14に記載の金属汚染分析方法。 The metal contamination analysis method according to claim 14, wherein the silicon wafer is a wafer for grasping process contamination.
PCT/JP2010/073592 2010-01-06 2010-12-27 Method and apparatus for etching of surface layer part of silicon wafer, and method for analysis of metal contamination in silicon wafer WO2011083719A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011548966A JPWO2011083719A1 (en) 2010-01-06 2010-12-27 Silicon wafer surface layer etching method and etching apparatus, and silicon wafer metal contamination analysis method

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2010-000887 2010-01-06
JP2010000887 2010-01-06
JP2010000888 2010-01-06
JP2010-000888 2010-01-06

Publications (1)

Publication Number Publication Date
WO2011083719A1 true WO2011083719A1 (en) 2011-07-14

Family

ID=44305455

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2010/073592 WO2011083719A1 (en) 2010-01-06 2010-12-27 Method and apparatus for etching of surface layer part of silicon wafer, and method for analysis of metal contamination in silicon wafer

Country Status (2)

Country Link
JP (1) JPWO2011083719A1 (en)
WO (1) WO2011083719A1 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015063679A (en) * 2013-08-30 2015-04-09 学校法人東京電機大学 Production method of luminescent material
RU2631544C1 (en) * 2016-10-10 2017-09-25 Публичное Акционерное Общество "Корпорация Всмпо-Ависма" Method of standard samples manufacture of ligatures based on aluminium
EP3229262A1 (en) * 2016-04-05 2017-10-11 Siltronic AG Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
JP6399141B1 (en) * 2017-04-17 2018-10-03 株式会社Sumco Method for analyzing metal contamination of silicon wafer and method for manufacturing silicon wafer
CN110223927A (en) * 2018-03-01 2019-09-10 胜高股份有限公司 The metallic pollution analysis method of silicon wafer
JP2020174070A (en) * 2019-04-08 2020-10-22 信越半導体株式会社 Gas phase decomposition method for semiconductor substrates

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211223A (en) * 1991-11-29 1993-08-20 Nec Corp Analyzing method of impurity on semiconductor substrate surface
JPH08330271A (en) * 1995-06-02 1996-12-13 Shin Etsu Handotai Co Ltd Method and device for etching surface of silicon wafer
JP2001129798A (en) * 1999-08-28 2001-05-15 Robert Bosch Gmbh Method of manufacturing surface micromachining type structure
JP2004028787A (en) * 2002-06-25 2004-01-29 Fujitsu Ltd Total reflection fluorescent x-ray analysis method, total reflection fluorescent x-ray analysis pretreatment device, and total reflection fluorescent x-ray analyzer
JP2008130696A (en) * 2006-11-17 2008-06-05 Shin Etsu Handotai Co Ltd Silicon elimination method for silicon wafer surface, liquid sample extraction method for region under surface layer of silicon wafer, and analysis method for metal impurity in the region
JP2008182201A (en) * 2006-12-27 2008-08-07 Siltronic Ag Silicon etching method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211223A (en) * 1991-11-29 1993-08-20 Nec Corp Analyzing method of impurity on semiconductor substrate surface
JPH08330271A (en) * 1995-06-02 1996-12-13 Shin Etsu Handotai Co Ltd Method and device for etching surface of silicon wafer
JP2001129798A (en) * 1999-08-28 2001-05-15 Robert Bosch Gmbh Method of manufacturing surface micromachining type structure
JP2004028787A (en) * 2002-06-25 2004-01-29 Fujitsu Ltd Total reflection fluorescent x-ray analysis method, total reflection fluorescent x-ray analysis pretreatment device, and total reflection fluorescent x-ray analyzer
JP2008130696A (en) * 2006-11-17 2008-06-05 Shin Etsu Handotai Co Ltd Silicon elimination method for silicon wafer surface, liquid sample extraction method for region under surface layer of silicon wafer, and analysis method for metal impurity in the region
JP2008182201A (en) * 2006-12-27 2008-08-07 Siltronic Ag Silicon etching method

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015063679A (en) * 2013-08-30 2015-04-09 学校法人東京電機大学 Production method of luminescent material
KR20200086386A (en) * 2016-04-05 2020-07-16 실트로닉 아게 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
EP3229262A1 (en) * 2016-04-05 2017-10-11 Siltronic AG Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
WO2017174371A1 (en) 2016-04-05 2017-10-12 Siltronic Ag Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
KR102237913B1 (en) * 2016-04-05 2021-04-09 실트로닉 아게 Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
US10861704B2 (en) 2016-04-05 2020-12-08 Siltronic Ag Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
CN109075056A (en) * 2016-04-05 2018-12-21 硅电子股份公司 The gaseous corrosion method of semiconductor wafer for trace metal analysis
JP2019511839A (en) * 2016-04-05 2019-04-25 ジルトロニック アクチエンゲゼルシャフトSiltronic AG Method for vapor phase etching of semiconductor wafers for trace metal analysis
RU2631544C1 (en) * 2016-10-10 2017-09-25 Публичное Акционерное Общество "Корпорация Всмпо-Ависма" Method of standard samples manufacture of ligatures based on aluminium
JP6399141B1 (en) * 2017-04-17 2018-10-03 株式会社Sumco Method for analyzing metal contamination of silicon wafer and method for manufacturing silicon wafer
KR20190128221A (en) * 2017-04-17 2019-11-15 가부시키가이샤 사무코 Method for analyzing metal contamination of silicon wafers and manufacturing method of silicon wafers
US10727071B2 (en) 2017-04-17 2020-07-28 Sumco Corporation Method of analyzing metal contamination of silicon wafer and method of manufacturing silicon wafer
JP2018179822A (en) * 2017-04-17 2018-11-15 株式会社Sumco Analysis method for silicon wafer metal contamination and silicon wafer manufacturing method
WO2018193714A1 (en) * 2017-04-17 2018-10-25 株式会社Sumco Method for analyzing silicon wafer metal contamination, and silicon wafer manufacturing method
KR102299861B1 (en) 2017-04-17 2021-09-07 가부시키가이샤 사무코 Method for analyzing metal contamination of silicon wafer and method for manufacturing silicon wafer
CN110223927A (en) * 2018-03-01 2019-09-10 胜高股份有限公司 The metallic pollution analysis method of silicon wafer
JP2020174070A (en) * 2019-04-08 2020-10-22 信越半導体株式会社 Gas phase decomposition method for semiconductor substrates
JP7092087B2 (en) 2019-04-08 2022-06-28 信越半導体株式会社 Gas phase decomposition method for semiconductor substrates

Also Published As

Publication number Publication date
JPWO2011083719A1 (en) 2013-05-13

Similar Documents

Publication Publication Date Title
JP5720297B2 (en) Method for analyzing metal contamination of silicon wafers
WO2011083719A1 (en) Method and apparatus for etching of surface layer part of silicon wafer, and method for analysis of metal contamination in silicon wafer
US7686973B2 (en) Silicon wafer etching method and apparatus, and impurity analysis method
JP5087855B2 (en) Heat treatment evaluation wafer, heat treatment evaluation method, and semiconductor wafer manufacturing method
US11183393B2 (en) Atomic layer etching using acid halide
WO2017110132A1 (en) Silicon substrate analyzing device
JPWO2008090763A1 (en) Semiconductor device manufacturing method and semiconductor manufacturing apparatus
EP1237177A2 (en) Apparatus and method for etching semiconductor wafers
CN110223927A (en) The metallic pollution analysis method of silicon wafer
JP5413342B2 (en) Silicon wafer surface layer etching method and silicon wafer metal contamination analysis method
JP2008182201A (en) Silicon etching method
JP2010008048A (en) Method of etching silicon wafer surface oxide film, metal contamination analysis method of silicon wafer with oxide film, and method of manufacturing silicon wafer with oxide film
CN111868888B (en) Etching method, metal contamination evaluation method and manufacturing method for boron-doped p-type silicon wafer
CN104550133B (en) Method for removing organic pollutants in hollow micro-defect and on surface of wafer of silicon carbide single crystal
US10727071B2 (en) Method of analyzing metal contamination of silicon wafer and method of manufacturing silicon wafer
JPH1092888A (en) Apparatus and method of decomposing semiconductor sample
JPH03173131A (en) Manufacture of semiconductor device
JPH1012580A (en) Cleaning method of silicon substrate surface and equipment therefor
Vierhaus et al. Cleaning of Silicon Wafer Surfaces with Reactive Gases
JP2021040082A (en) Method for pretreatment of silicon sample, method for evaluation on metal pollution of silicon sample, method for evaluation on single crystal silicon ingot-growing process, method for manufacturing single crystal silicon ingot, and method for manufacturing silicon wafer
JPH03127828A (en) Manufacture of information processing device and equipment therefor
JP2010114282A (en) Method for evaluation of metal pollution in semiconductor substrate

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 10842230

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2011548966

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 10842230

Country of ref document: EP

Kind code of ref document: A1