WO2011068459A1 - Integrated chip comprising a ditch - Google Patents
Integrated chip comprising a ditch Download PDFInfo
- Publication number
- WO2011068459A1 WO2011068459A1 PCT/SE2010/051326 SE2010051326W WO2011068459A1 WO 2011068459 A1 WO2011068459 A1 WO 2011068459A1 SE 2010051326 W SE2010051326 W SE 2010051326W WO 2011068459 A1 WO2011068459 A1 WO 2011068459A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- ditch
- chip
- waveguide
- waveguides
- integrated chip
- Prior art date
Links
- 230000003287 optical effect Effects 0.000 claims abstract description 26
- 238000004458 analytical method Methods 0.000 claims abstract description 5
- 238000005530 etching Methods 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 3
- 239000000306 component Substances 0.000 description 47
- 239000000463 material Substances 0.000 description 14
- 239000011358 absorbing material Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 3
- 239000011149 active material Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 239000012472 biological sample Substances 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000002674 ointment Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
- H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
- H01S5/4031—Edge-emitting structures
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/12004—Combinations of two or more optical elements
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/12007—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4296—Coupling light guides with opto-electronic elements coupling with sources of high radiant energy, e.g. high power lasers, high temperature light sources
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0262—Photo-diodes, e.g. transceiver devices, bidirectional devices
- H01S5/0264—Photo-diodes, e.g. transceiver devices, bidirectional devices for monitoring the laser-output
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0265—Intensity modulators
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/12107—Grating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0232—Optical elements or arrangements associated with the device
- H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0262—Photo-diodes, e.g. transceiver devices, bidirectional devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
Definitions
- Integrated chip comprising a ditch
- the present invention relates to an integrated chip for data or telecommunication or analytic applications wherein the chip can be used both for emitting light from narrow-band light sources such as lasers or broadband light sources such as for example light emitting diodes, and to be able to detect laser light or light from other light sources, for example from light emitting diodes or luminescent light from biological samples or the like.
- narrow-band light sources such as lasers or broadband light sources such as for example light emitting diodes
- other light sources for example from light emitting diodes or luminescent light from biological samples or the like.
- the invention refers especially to an integrated chip comprising several optical components.
- integrated chips can in general comprise one or more components, such as for example lasers, photo diodes, diplex- ers, or matrices of such components.
- Each component can in turn be composed of partial components, such as for example where a diplexer comprises a number of waveguides.
- lasers are often used to emit laser light which is modulated with the information to be emitted, and light detectors, such as photo diodes, to detect received laser light.
- a problem during transmitting and receiving optical signals is the risk of optical and electrical overhearing between various components. This is particularly true for the case where laser components and light detector components are arranged on the same integrated chip. Problems with undesired reflections in joints or interfaces can arise, as the connec- tion port to the optical fiber, or from other disturbing stray light. Moreover, undesired such light can exist from externally arranged components of such as lasers, light diodes and similar, as well as scattered light from imperfections in waveguides and gratings and also spontaneous emis- sion from optically active material in the chip itself.
- the invention refers to an integrated chip for data or telecommunication or optical analysis for one, two or more wavelengths, wherein the chip has a basic structure which is identical, from a carrier and upwards over the en- tire surface of the chip, wherein waveguides are formed at the upper surface of the chip by way of the basic structure being etched down so that protruding waveguides are formed, and wherein the chip comprises monolithically integrated components, and is characterized in that a ditch is etched down along at least one of the sides of one of the waveguides and down to an etch depth, which is at least so large so as to achieve a ditch which is optically isolating.
- Figure 1 is a perspective view of a monolithically integrated chip for optical signals according to a first preferred embodiment of the present invention
- Figure 2 is a top view of the integrated chip according to claim 1;
- Figure 3 is a perspective view of a monolithically integrated chip for optical signals according to a second preferred embodiment of the present invention.
- Figure 4 is a top view of the integrated chip as shown in figure 3.
- Figures 5a-5c are cross sectional views through A-A in figure 2, illustrating the detailed embodiment of a ditch wall in accordance with the present invention.
- Figure 1 illustrates schematically a monolithically inte- grated chip 1, prior to metallization, with a coupling waveguide 2, an optical coupler 6 and two output waveguides 4, 5.
- a chip with such features is known from the Swedish patent No. 0501217-4.
- One or both of the waveguides 4, 5 can also serve as input waveguides to the coupler 6.
- the chip 1 is intended for data- or telecommunication or optical analysis of one, two or more wavelengths .
- the chip 1 comprises a waveguide 2 with a first port 3, which port 3 is arranged to convey light into or out from the waveguide 2.
- the waveguide 2 is expanded, in an expanded part in form of an optical coupler 6, from the first port 3 in a direction towards a second waveguide 4 and a third waveguide 5.
- the various components of the chip 1 are monolithically integrated.
- the chip has a basic structure which is identical from a carrier and upwards over the entire surface of the chip, and the waveguides 2, 4, 5 are formed at the upper surface of the chip by way of the basic structure being etched down so that protruding waveguides are formed.
- Figure 2 shows an integrated chip similar to the one in fig- ure 1. Corresponding parts have the same reference numbers in all figures.
- the monolithically integrated components included in the chip 1 share a common ground plane, namely the substrate in the chip 1, constituting the n-side of the structure. Over there is a material layer constituting a p-side of the chip 1, whereby a pn- unction arises.
- the ditch 7 is produced by etching the monolithically integrated material structure in the chip 1 from the upper side of the chip and down to an etching depth that is at least as large so as to achieve a ditch which is optically and preferably also electrically isolating. Accord- ing to a preferred embodiment, the etching is continued at least down to an n-layer in the chip 1.
- the etching is continued at least down to a depth where all p-layers in the structure above the pn- junction have been etched through, or at least until a depth reaching down to the pn-junction or down to the pn-junction except only a few, preferably at most 3, material layers, alternatively at least down to the first occurring n-layer except only a few, preferably at most 3, material layers in the etching direction down through the material, alternatively to a depth that at least goes past the pn-junction.
- the ditch 7 reaches down to a depth of between 50 and 5000 nm, preferably between 200 and 2000 nm. Such etching depths lead to good isolating characteristics optically as wells as electrically (see below).
- the ditch 7 illustrated in the figures runs on both sides of all waveguides 2, 4, 5 of the chip 1. However, the ditch 7 may either run along only parts of one or more waveguides, enclose one or more waveguides, alternatively enclose one or more components on the chip 1. This is clear from the following .
- FIG. 5a illustrates a cross section of a preferred embodiment of a ditch 7 according to the present invention.
- a waveguide, in this case the third waveguide 5, is provided with a ditch 7. The figure is for clarifying purpose not according to scale.
- at least one wall 55 of the ditch 7, which is arranged closest to the waveguide 5, is vertical.
- the chip 1 is advantageously designed in absorbing material 8 on the side of the ditch 7 where the waveguide 5 is not present. Since incident, unwanted stray light L is reflected back, due to the vertical wall 55, into the absorbing material 8, such stray light L can be prevented from spreading further. It is preferred that the amount of absorbing material 8 between the mutually from each other isolated components or part components on the chip 1 is sufficient to black out essentially all such stray light L that is reflected back. According to a preferred embodiment the smallest distance between two nearby, parallel ditches, each arranged to isolate a respective waveguide, is thus at least 25 ⁇ . It is also preferred that earthed, alternatively biased, contact surfaces are used with the chip 1 to improve the absorption of unwanted light L in the absorbing material 8.
- Figure 5b illustrates, similarly with figure 5a, a second preferred embodiment of the wall 55. At least one wall of the ditch 7, which is arranged closest to the waveguide 5, is thus inclined so that light L incident to the waveguide 5 is reflected against the ditch wall 55 out from the chip 1.
- Figure 5c illustrates in a corresponding way a third preferred embodiment of the wall 55, wherein at least one wall of the ditch 7, which wall is arranged closest to the waveguide 5, is inclined so that light L incident to the waveguide 5 is reflected against the ditch wall 55 down into the substrate of the chip 1, which generally is not absorbing. This can in many cases lead to that the unwanted stray light is distributed over a larger material volume, which is desirable. On the other side, there is a risk that light is reflected back to sensitive areas in the chip. Moreover, there is a risk that disturbing interference fringe pattern occur between the walls of the chip 1. It is therefore preferred in some applications to use either the first or the second preferred embodiment of the wall 55, as described above.
- the material system in a monolithically integrated chip according to the present invention can be designed in various materials.
- the material structure generally consists of a number of layers of various semiconductive materials, mainly consisting of As, P, Ga, In and/or Al .
- the active material can further consist of a bulk layer, a multiple quantum well structure (MQW) or a combination of quantum dots (QD) .
- a respective ditch runs along both sides of at least one waveguide.
- the considered waveguide is isolated optically by means of a ditch in accordance with the invention along both sides, why influences from incident stray light in the waveguide and on components arranged along the waveguide decrease considerably.
- the ditch 7 is arranged to run along with and around all waveguides 2, 4, 5 arranged in a compo- nent, so that all these waveguides 2, 4, 5 are enclosed by the ditch 7.
- the ditch 7 does not describe, as it is illu- strated in figures 1 and 2, a closed curve. The reason for this is that light is lead into and out from the first waveguide 2, through the port 3, why an opening in the ditch 7 must be arranged in front of the port 3.
- the expression that the ditch 7 "encloses" all waveguides 2, 4, 5, as it is used herein, is also meant to include designs wherein the ditch 7 has openings where connections to one or more waveguides exist.
- the waveguides 4, 5 may also include ports for conveying light in and out, as has been mentioned above, in which case the ditch 7 is arranged with openings in front of such ports.
- At ditch is arranged to enclose all these components including transport waveguides, however with openings for possible external ports.
- a chip is to be cleaved, it is preferred that no ditch is arranged along a waveguide at the place of cleaving, since such a ditch can cause cleaving errors.
- Such a chip can for example comprise a number of components of the type illustrated in figures 1 and 2, wherein each component comprises a first waveguide 2, a second waveguide 4 and a third wave- guide 5.
- the second waveguide 4 comprises a laser for emitting light.
- the third waveguide comprises a light detector for detecting light.
- the part components can in this case advantageously be monolithically integrated. Light from the laser is conveyed through an expanded part in the form of an optical coupler 6 to the first waveguide 4 and further out through the port 3, and light is also conveyed from the port 3, via the first waveguide 2 and on to the light detector in the third waveguide.
- Various components are arranged with the respective lasers and light detectors to emit and receive light with different respective wavelengths.
- Each component is in this case preferably isolated from the other components by means of a respective enclosing ditch in accordance with what has been described above, resulting in that a plurality of such components can be manufactured on one chip 1 and be operated there without substantial overhearing between components.
- Such manufacturing of several components and waveguides on one chip results in low manufacturing costs, for example for applications in which light with a number of various wavelengths is to be handled in parallel .
- the skilled person realizes that a number of components can be arranged on one monolithically integrated chip 1 in a number of different ways. For example, a number of lasers and/or light detectors for various wavelengths can be ar- ranged in separate waveguides, isolated from each other on one chip 1.
- Some components on the chip 1 can also be cascaded one after the other, by means of optical couplers, wherein each respective component is optically and electrically isolated from the other components as described above, with openings in the ditch for transport waveguides and so on.
- optical couplers wherein each respective component is optically and electrically isolated from the other components as described above, with openings in the ditch for transport waveguides and so on.
- the individual components on the chip can then each be encapsulated individually without dividing the material itself.
- a chip with arrays of component can then be packed (aligned optically) against a fiber ribbon, or a band cable of parallel optical fibers, which results in that all components in the array can be attached to a common multi-channel control electronics circuit, which is cost saving and moreover saves physical space.
- optical filters are used as components in monolithically integrated chips 1 of the present type.
- at least one such optical filter is achieved in the chip 1 by modification of a ditch running along the waveguides in which the filter is to be arranged.
- a ditch running along the waveguides in which the filter is to be arranged This is illustrated in figures 3 and 4, in which an optical filter 52 is arranged along with the third waveguide 5. Consequently, the part of the ditch 7 running along the part of the third waveguide 5, at which the filter 52 is arranged, is located at such distance from the waveguide 5 so that the optical mode in the waveguide 5 is affected by the ditch 7 closest to the inner wall 53 of the waveguide 5, and also possibly the bottom of the ditch 53.
- the ditch wall 53 and/or the ditch bottom is corrugated 54, so that a filter function of the first order is achieved.
- the corrugation 54 of the ditch wall 53 or the ditch bottom is preferably achieved, similarly to the ditch 7 itself, by way of etching, in a way which is known as such.
- the present inventors have surprisingly found that the size, in the plane of the chip 1 (the plane illustrated in figures 2 and 4), in the area of the ditch 7 that is etched away and also in the total etched off material volume, will affect the quality of the corrugated side wall 53 or the bottom of the ditch.
- An area that is too small will make it hard for the process gases to reach the etching front, resulting in a deteriorated physical structure of the corrugated wall. This is of course not desirable, since it affects the characteristics of the filter 52.
- a too large total etched off material volume will, on the other hand, lead to heavy regrowth during etching, which also deteriorates the structure of the corrugated side wall 53 or the bottom of the ditch. It has been realised that good etching results can be
- the ditch 7 is at least 0.1 ⁇ , preferably at least 0.5 ⁇ wide and at most 1000 ⁇ , preferably at most 250 ⁇ wide.
- the width of the ditch 7 is the dimension of the ditch 7 as can be seen in figure 4 perpendicularly to the longitudinal direction of the third waveguide 5.
- etching results can be achieved in the case where the cross-sectional area of the ditch 7, perpendicularly to its main area of direction, is between 0.005 and 5000 ⁇ 2 , preferably between 0.1 and 500 ⁇ 2 .
- a monolithically integrated filter 52 comprises at least about 100 grating periods, wherein each grating period is about between 50 and 300 nm.
- the distance between the ditch 7 and the waveguide 5 is preferably between 0 and 10 ⁇ at the location of the filter 52, and at other locations preferably between 0 and 500 ⁇ .
- the ditch can be exposed to air, giving a high refractive index difference. It can also be covered by a dielectric such as SiO x , SiN x , BCB or the corresponding, giving a lower refractive index difference, but on the other hand a better physical protection of the filter and/or the ditch. This choice depends for example on the enclosure used for the chip 1.
- grating based optical part components by adjusting a wall of the ditch 7 closest a certain waveguide.
- Examples include lasers and diftractive couplers, wherein the latter can be used to couple light from the waveguide to a neighboring waveguide.
- the ditch 7 and the filter 52 can in many cases be manufactured in one and the same step.
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Optical Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE0950937A SE534346C2 (sv) | 2009-12-04 | 2009-12-04 | Integrerat chip innefattande dike |
SE0950937-3 | 2009-12-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2011068459A1 true WO2011068459A1 (en) | 2011-06-09 |
Family
ID=44115156
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/SE2010/051326 WO2011068459A1 (en) | 2009-12-04 | 2010-12-01 | Integrated chip comprising a ditch |
Country Status (2)
Country | Link |
---|---|
SE (1) | SE534346C2 (sv) |
WO (1) | WO2011068459A1 (sv) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0691717A1 (en) * | 1994-07-07 | 1996-01-10 | Hewlett-Packard Company | Method for optically and thermally isolating surface emitting laser diodes |
EP0704913A2 (en) * | 1994-09-28 | 1996-04-03 | Nippon Telegraph And Telephone Corporation | Optical semiconductor device and method of fabricating the same |
US20030214990A1 (en) * | 2002-05-20 | 2003-11-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
US20060138433A1 (en) * | 2002-03-08 | 2006-06-29 | Infinera Corporation | Optical combiner/decombiner with reduced insertion loss |
WO2006130094A1 (en) * | 2005-05-30 | 2006-12-07 | Phoxtal Communications Ab | Integrated chip |
-
2009
- 2009-12-04 SE SE0950937A patent/SE534346C2/sv not_active IP Right Cessation
-
2010
- 2010-12-01 WO PCT/SE2010/051326 patent/WO2011068459A1/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0691717A1 (en) * | 1994-07-07 | 1996-01-10 | Hewlett-Packard Company | Method for optically and thermally isolating surface emitting laser diodes |
EP0704913A2 (en) * | 1994-09-28 | 1996-04-03 | Nippon Telegraph And Telephone Corporation | Optical semiconductor device and method of fabricating the same |
US20060138433A1 (en) * | 2002-03-08 | 2006-06-29 | Infinera Corporation | Optical combiner/decombiner with reduced insertion loss |
US20030214990A1 (en) * | 2002-05-20 | 2003-11-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
WO2006130094A1 (en) * | 2005-05-30 | 2006-12-07 | Phoxtal Communications Ab | Integrated chip |
Also Published As
Publication number | Publication date |
---|---|
SE534346C2 (sv) | 2011-07-19 |
SE0950937A1 (sv) | 2011-06-05 |
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