WO2011044053A1 - Method of providing stable and adhesive interface between fluorine-based low-k material and metal barrier layer - Google Patents
Method of providing stable and adhesive interface between fluorine-based low-k material and metal barrier layer Download PDFInfo
- Publication number
- WO2011044053A1 WO2011044053A1 PCT/US2010/051347 US2010051347W WO2011044053A1 WO 2011044053 A1 WO2011044053 A1 WO 2011044053A1 US 2010051347 W US2010051347 W US 2010051347W WO 2011044053 A1 WO2011044053 A1 WO 2011044053A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- fluorine
- based dielectric
- dielectric layer
- layer
- forming
- Prior art date
Links
- 229910052731 fluorine Inorganic materials 0.000 title claims abstract description 166
- 239000011737 fluorine Substances 0.000 title claims abstract description 166
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 title claims abstract description 158
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 126
- 239000002184 metal Substances 0.000 title claims abstract description 126
- 238000000034 method Methods 0.000 title claims abstract description 83
- 239000000463 material Substances 0.000 title claims description 48
- 230000004888 barrier function Effects 0.000 title description 18
- 239000000853 adhesive Substances 0.000 title description 6
- 230000001070 adhesive effect Effects 0.000 title description 6
- 239000000758 substrate Substances 0.000 claims abstract description 69
- 238000001465 metallisation Methods 0.000 claims abstract description 16
- 239000000203 mixture Substances 0.000 claims abstract description 16
- 229910003481 amorphous carbon Inorganic materials 0.000 claims description 38
- 238000005240 physical vapour deposition Methods 0.000 claims description 26
- 238000000231 atomic layer deposition Methods 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 20
- 230000008569 process Effects 0.000 claims description 20
- 238000005229 chemical vapour deposition Methods 0.000 claims description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
- JMANVNJQNLATNU-UHFFFAOYSA-N oxalonitrile Chemical compound N#CC#N JMANVNJQNLATNU-UHFFFAOYSA-N 0.000 claims description 16
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 16
- 239000002245 particle Substances 0.000 claims description 15
- 238000012546 transfer Methods 0.000 claims description 15
- 229910052799 carbon Inorganic materials 0.000 claims description 14
- 239000007789 gas Substances 0.000 claims description 13
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- 239000003989 dielectric material Substances 0.000 claims description 10
- 238000007654 immersion Methods 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- 239000002243 precursor Substances 0.000 claims description 9
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 238000005137 deposition process Methods 0.000 claims description 8
- 238000007740 vapor deposition Methods 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 230000001678 irradiating effect Effects 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 6
- 238000010884 ion-beam technique Methods 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 6
- 229910000838 Al alloy Inorganic materials 0.000 claims description 5
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 5
- 238000010790 dilution Methods 0.000 claims description 5
- 239000012895 dilution Substances 0.000 claims description 5
- 230000003247 decreasing effect Effects 0.000 claims description 4
- 238000009616 inductively coupled plasma Methods 0.000 claims description 4
- 238000010894 electron beam technology Methods 0.000 claims description 3
- 230000005855 radiation Effects 0.000 claims description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 229910052756 noble gas Inorganic materials 0.000 claims description 2
- 238000005019 vapor deposition process Methods 0.000 claims 2
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 1
- 125000001153 fluoro group Chemical group F* 0.000 abstract description 19
- 239000010410 layer Substances 0.000 description 237
- 239000010949 copper Substances 0.000 description 12
- 238000009413 insulation Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910001512 metal fluoride Inorganic materials 0.000 description 5
- 238000002360 preparation method Methods 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 230000004907 flux Effects 0.000 description 3
- 150000001247 metal acetylides Chemical class 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000010948 rhodium Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910000792 Monel Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 125000004432 carbon atom Chemical group C* 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 229910052702 rhenium Inorganic materials 0.000 description 2
- 229910052703 rhodium Inorganic materials 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- KLZUFWVZNOTSEM-UHFFFAOYSA-K Aluminium flouride Chemical compound F[Al](F)F KLZUFWVZNOTSEM-UHFFFAOYSA-K 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910018054 Ni-Cu Inorganic materials 0.000 description 1
- 229910018481 Ni—Cu Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- -1 carbon ions Chemical class 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000007735 ion beam assisted deposition Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 238000007736 thin film deposition technique Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
- H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02351—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76844—Bottomless liners
Definitions
- the invention relates to a method for preparing an interface for a fluorine-based low dielectric constant (low-k) material and, in particular, a method of integrating fluorine-based low-k materials with metal
- low-k dielectric constant dielectric materials not only reduces the line-to- line capacitance, but also minimizes cross-talk noise and reduces power consumption.
- a broad range of low-k materials, including fluorinated Si0 2 , organic polymers or hybrid polymers, organosilicate glasses, nanoporous silica, and amorphous fluorocarbon have been investigated in detail.
- barrier material such as titanium, tungsten, or tantalum and their nitrides, is often used to be deposited under or on these fluorine-based low-k materials.
- F atoms play a critical role in relation to the adhesion problem.
- the inventors recognize that F is a very reactive and corrosive element and, therefore, they suspect that F atoms, which initially existed at the interface between the metal barrier layer and the fluorine-based low-k materials or diffused from the bulk fluorine-based low-k materials and accumulated at the interface during device processing involving high temperature, may react with metal.
- the interface between the metal barrier layer and the fluorine-based low-k materials may become a very low strength corrosion layer and, consequently, may exhibit poor adhesion properties.
- the metal element of the barrier layer may readily react with free and moveable F atoms in the fluorine-based low-k material to form metal fluoride which usually possesses a high vapor pressure and a high sensitivity to -OH groups.
- This interfacial chemical reaction process significantly weakens the interface strength, rendering a serious interface adhesion problem and, in time, a significant k-value increase due to penetration of water molecules.
- the metal layer acts like an F atom sink and, therefore, F atoms are expected to diffuse to a certain depth of the metal barrier layer. This diffusive process may reduce the ratio of F to C atoms in the fluorine-based low-k material and further cause the k-value to increase and become less stable.
- the invention relates to a method for preparing an interface for a fluorine-based low dielectric constant (low-k) material. Furthermore, the invention relates to a method of integrating fluorine-based low-k materials with metal interconnects in semiconductor and electronic devices.
- low-k low dielectric constant
- a method of integrating a fluorine- based dielectric with a metallization scheme comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer.
- a platform for preparing a fluorine-based dielectric metallization scheme comprises a first film-forming system for forming a fluorine-based dielectric layer on a substrate, a second film-forming system for forming a metal- containing layer on the substrate, a treatment system for modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer, and a transfer system coupled to the first film-forming system, the second film-forming system, and the treatment system, and configured to transfer a substrate there between.
- a method of integrating a fluorine-based dielectric with a metallization scheme comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the buffer layer includes a carbon- containing layer selected from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a-C), hydrogenated amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (C 3 N 4 ), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof.
- ta-C tetrahedral amorphous carbon
- a-C amorphous carbon
- a method of integrating a fluorine-based dielectric with a metallization scheme comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the metal buffer layer includes a metal selected from the group consisting of Ni, or Ni alloy, or both.
- a method of integrating a fluorine-based dielectric with a metallization scheme comprises forming CF x -based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a metal buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the metal buffer layer includes a metal selected from the group consisting of Al, Ni, Cu, Al alloy, Ni alloy, Cu alloy, or any combination of two or more thereof.
- a platform for preparing a fluorine-based dielectric metallization scheme comprises a first film-forming system for forming a fluorine-based dielectric layer on a substrate, a second film-forming system for forming a metal- containing layer on the substrate, a third film-forming system for depositing a buffer layer between the fluorine-based dielectric layer and the metal- containing layer, and a transfer system coupled to the first film-forming system, the second film-forming system, and the treatment system, and configured to transfer a substrate there between.
- FIGs. 1 A through 1 D present a simplified schematic representation of a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment
- FIG. 2 illustrates a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to another embodiment
- FIGs. 3A through 3E present a simplified schematic representation of a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer in a metal interconnect according to an embodiment
- FIG. 4 presents a schematic representation of a platform for preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment.
- a method and system for preparing an interface between a fluorine- based dielectric layer and a metal-containing layer is disclosed in various embodiments.
- the various embodiments may be practiced without one or more of the specific details, or with other replacement and/or additional methods, materials, or components.
- well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of various embodiments of the invention.
- substrate as used herein generically refers to the object being processed in accordance with the invention.
- the substrate may include any material portion or structure of a device, particularly a semiconductor or other electronics device, and may, for example, be a base substrate structure, such as a semiconductor wafer or a layer on or overlying a base substrate structure such as a thin film.
- substrate is not intended to be limited to any particular base structure, underlying layer or overlying layer, patterned or unpatterned, but rather, is contemplated to include any such layer or base structure, and any combination of layers and/or base structures.
- the description below may reference particular types of substrates, but this is for illustrative purposes only and not limitation.
- FIGs. 1 A through 1 E, and FIG. 2 illustrate a method for preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment.
- the method is illustrated in a flow chart 200, and begins in 210 with forming a fluorine-based dielectric layer 120 on substrate 1 10.
- the fluorine-based dielectric layer 120 may include a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material.
- the fluorine-based dielectric layer 120 may include a CFx-containing material, wherein x represents an integer greater than or equal to unity.
- the fluorine-based dielectric layer 120 may include a fluorinated amorphous carbon dielectric material.
- the fluorine-based dielectric layer 120 may comprise a low dielectric constant (i.e., low-k) or ultra-low dielectric constant (i.e., ultra- low-k) dielectric layer having a nominal dielectric constant value less than the dielectric constant of Si0 2 , which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the thin film may have a dielectric constant of less than 3.7, or a dielectric constant ranging from 1 .6 to 3.7. Furthermore, the fluorine- based dielectric layer 120 may be non-porous or porous.
- the fluorine-based dielectric layer 120 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or a spin-on technique, such as those offered in the Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD, and LITHIUS coating systems commercially available from Tokyo Electron Limited (TEL).
- the Clean Track ACT 8 (200 mm), ACT 12 (300 mm), and LITHIUS (300 mm) coating systems provide coat, bake, and cure tools for SOD materials.
- the track system can be configured for processing substrate sizes of 100 mm, 200 mm, 300 mm, and greater. Other systems and methods for forming a thin film on a substrate are well known to those skilled in the art of both spin-on technology and vapor deposition technology.
- a metal-containing layer 160 is formed on substrate 1 10.
- the metal-containing layer 160 is formed on the fluorine- based dielectric layer 120 as shown in FIG. 1 C.
- the metal-containing layer may include a metal layer, a metal seed layer, a metal wetting layer, a metal barrier layer, a metal adhesion layer, or any combination of two or more thereof.
- the metal- containing layer 160 may include a metal, a metal alloy, a metal oxide, a metal nitride, a metal oxynitride, a metal carbide, a metal silicide, or any combination of two or more thereof.
- the metal-containing layer 160 may include a copper (Cu)-containing material, an aluminum (Al)-containing material, a titanium (Ti)-containing material, a tantalum (Ta)-containing material, a tungsten (W)-containing layer, a rhenium (Re)-containing layer, a ruthenium (Ru)- containing layer, a rhodium (Rh)-containing layer, a palladium (Pd)- containing layer, or a silver (Ag)-containing layer, or any combination of two or more thereof.
- the metal-containing layer 160 may contain compounds of these metals and oxygen, nitrogen, carbon, boron, or phosphorus, or any combination of two or more thereof.
- the metal-containing layer 160 may include Cu, Cu alloy, Al, Al alloy, Re, Ru, Rh, Pd, Ag, or any combination of two or more thereof. Further yet, for example, the metal-containing layer 160 may include W, Ti, Ta, oxides thereof, nitrides thereof, oxynitrides thereof, carbides thereof, silicides thereof, or any combination of two or more thereof.
- the metal-containing layer 160 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or any combination of two or more thereof.
- CVD chemical vapor deposition
- PECVD plasma enhanced CVD
- ALD atomic layer deposition
- PEALD plasma enhanced ALD
- PVD physical vapor deposition
- iPVD ionized PVD
- an interface 140 is prepared between the fluorine-based dielectric layer 120 and the metal-containing layer 160.
- a dielectric layer 180 may be formed on the metal-containing layer 160, and a second interface 170 may be formed between the dielectric layer 180 and the metal-containing layer 160.
- the dielectric layer 180 may be the same material composition as the fluorine-based dielectric layer 120, or the dielectric layer 180 may be a different material composition than the fluorine-based dielectric layer 120.
- the second interface 170 may be the same material composition as the interface 140, or the second interface 170 may be a different material composition as the interface 140.
- the second interface 170 may be prepared in the same manner as the interface 140, or the second interface 170 may be prepared in a different manner than the interface 140. Furthermore, the interface 140 and/or the second interface 170 may be a fluorine (F) diffusion barrier layer.
- F fluorine
- the interface (e.g., interface 140) may be prepared during and/or following the formation of the fluorine- based dielectric layer 120, and prior to the formation of the metal- containing layer 160.
- the interface (e.g., second interface 170) may be prepared following the formation of the metal-containing layer 160, and prior to and/or during the dielectric layer 180.
- the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer.
- the modifying the composition of the fluorine- based dielectric layer may comprise increasing a relative concentration of carbon (C) near, at, or within the interface and/or reducing a relative concentration of fluorine (F) near, at, or within the interface.
- the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles.
- the charged particles may include electrons, ions, or gas cluster ions, or any combination of two or more thereof.
- the flux of energetic charged particles may be collimated or not collimated.
- the flux of energetic charged particles may be produced by an electron source, an ion source, or a gas cluster ion source, or any combination of two or more thereof.
- the flux of energetic charged particles may be produced by an electron beam source, an ion beam source, or a gas cluster ion beam source, or any combination of two or more thereof.
- the irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles may be performed in the same deposition system used for forming the fluorine-based dielectric layer on the substrate.
- the irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles may be performed in a treatment system separate from the deposition system used for forming the fluorine-based dielectric layer on the substrate.
- the irradiation of the fluorine-based dielectric layer by non-plasma immersion, energetic charged particles may modify the surface of the fluorine-based dielectric layer to form the interface, grow material at the surface of the fluorine-based dielectric layer to form the interface, deposit material at the surface of the fluorine-based dielectric layer to form the interface, dope the surface of the fluorine-based dielectric layer to form the interface, or infuse material at the surface of the fluorine-based dielectric layer to form the interface, or any combination of two or more thereof.
- the irradiation of the fluorine-based dielectric layer by non-plasma immersion, energetic charged particles may be most suitable for when the metal-containing layer is deposited on top of the fluorine-based dielectric layer, as shown in FIG. 1 C (e.g., metal-containing layer 160 is formed on top of the fluorine-based dielectric layer 120).
- high energy charged particles may form a C-rich surface either by hot electron dissociation or ion sputtering, for example.
- metal barrier layer such as the metal-containing layer
- metal carbides would be formed at the interface and these carbides provide a very stable and adhesive interfacial layer.
- the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by adjusting a deposition process for the forming the fluorine-based dielectric layer.
- the adjusting the deposition process for the forming the fluorine- based dielectric layer may comprise adjusting one or more of the following: (1 ) a plasma discharge condition for forming the fluorine-based dielectric layer; (2) a pressure for forming the fluorine-based dielectric layer; (3) a CF radical density; (4) a CF 2 radical density; (5) a CF 3 radical density; (6) a flow rate of a film-forming precursor; (7) a substrate temperature; or (8) a flow rate of a dilution gas; or (9) a combination of two or more thereof.
- the film-forming precursor may include a C x F y -containing precursor, wherein x and y are integers greater than or equal to unity. Additionally, a dilution gas may be introduced with the film-forming precursor.
- the dilution gas may include a noble gas, such as argon (Ar), or a hydrogen-containing gas, such as H 2 , or NH 3 , or both.
- the adjusting the plasma discharge condition for the deposition process may comprise adjusting a power coupled to an electrode supporting the substrate, or adjusting a power coupled to an electrode not supporting the substrate, or both.
- the adjusting of the deposition process may be suitable for when the metal-containing layer is deposited on top of the fluorine-based dielectric layer, as shown in FIG. 1 C (e.g., metal-containing layer 160 is formed on top of the fluorine-based dielectric layer 120), or when the fluorine-based dielectric layer is deposited on top of the metal-containing layer, as shown in FIG. 1 D (e.g., dielectric layer 180 is formed on top of metal-containing layer 160).
- the fluorine-based dielectric layer is formed on the metal-containing layer, the modification of the surface to form an interface having C-rich material at the interface using non-plasma immersion, energetic charged particle irradiation is
- one or more adjustments may be made to grade the interface and produce a C-rich interface including, but not limited to: (i) increasing power coupled to the electrode supporting the substrate and/or the electrode not supporting the substrate; (ii) increasing bias power to the electrode supporting the substrate; (iii) increasing substrate temperature; (iv) increasing pressure; (v) increasing CF radical density; and/or (vi) decreasing CF 2 or CF 3 radical density.
- the probability for bonding between an F atom and a metal atom may be lowered, and the total F atom to C atom ratio in the bulk materials may also be lowered.
- the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by exposing the fluorine-based dielectric layer to a nitrogen plasma excluding NH 3 .
- the nitrogen plasma may be formed using a gas comprising N 2 , NO, N 2 0, N0 2 , or any combination of two or more thereof.
- a nitrogen plasma (e.g. formed using N 2 , etc.) treatment of the fluorine-based dielectric layer may reduce F atoms on the surface and incorporate N atoms on the surface, which may improve the adhesion.
- the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises depositing a buffer layer at the interface between the fluorine- based dielectric layer and the metal-containing layer.
- the formation of the buffer layer may provide a stable and adhesive interface with the metal- containing layer and may also provide strong bonding with the fluorine- based dielectric layer.
- the buffer layer should not significantly modify the k-value of the fluorine-based dielectric layer.
- the depositing the buffer layer at the interface between the fluorine-based dielectric layer and the metal- containing layer comprises depositing a carbon-containing layer selected from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a-C), hydrogenated amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (CsN 4 ), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof.
- ta-C tetrahedral amorphous carbon
- a-C amorphous carbon
- a-C hydrogenated amorphous carbon
- DLC diamond-like carbon
- nitrogenated amorphous carbon a-C:N
- a-CN amorphous carbon
- the buffer layer can be deposited using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), ionized PVD (iPVD), vacuum arc deposition (VAD), or filtered VAD, or any combination of two or more thereof.
- CVD chemical vapor deposition
- PECVD plasma enhanced CVD
- ALD atomic layer deposition
- PEALD plasma enhanced ALD
- PVD physical vapor deposition
- iPVD ionized PVD
- VAD vacuum arc deposition
- filtered VAD vacuum arc deposition
- CCP capacitively coupled plasma
- ICP inductively coupled plasma
- RLSA radial line slot antenna
- vacuum arc plasma or any combination of two or more thereof.
- the buffer layer containing tetrahedral amorphous carbon (ta-C, or called amorphous diamond), or common amorphous carbon (a-C or a- C:H) or diamond-like carbon (DLC), or nitrogenated amorphous carbon (a- C:N), or carbon nitride (a-CN, a-CN:H, or CsN 4 ) between the fluorine- based dielectric layer and the metal-containing layer may act as a chemical buffer layer between these two materially different layers.
- the buffer layer may lessen the reactivity or even block the reaction between the metal element of the metal-containing layer and F atoms in the fluorine-based dielectric layer. As a result, a metal carbide may be formed at the interface.
- a buffer layer containing, for example, amorphous carbon may not significantly affect the k-value of the fluorine-based dielectric layer because a C-C bond (preferably sp 3 hybridized) only has a slightly higher k-value than a C-F bond.
- a buffer layer containing, for example, a nitrogenated amorphous carbon (a-C:N) may also serve as the buffer layer. Nitrogenated amorphous carbon (a-C:N) may be deposited using plasma based CVD (e.g., PECVD via CCP, RLSA, etc.) or through nitrogen plasma nitridation of an amorphous carbon layer.
- the depositing the buffer layer at the interface between the fluorine-based dielectric layer and the metal- containing layer comprises depositing a metal selected from the group consisting of Al, Ni, Cu, Al alloy, Ni alloy, Cu alloy, or any combination of two or more thereof.
- the buffer layer can be deposited using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or any combination of two or more thereof.
- CVD chemical vapor deposition
- PECVD plasma enhanced CVD
- ALD atomic layer deposition
- PEALD plasma enhanced ALD
- PVD physical vapor deposition
- iPVD ionized PVD
- plasma may be formed using capacitively coupled plasma (CCP), inductively coupled plasma (ICP), surface wave plasma, or radial line slot antenna (RLSA) plasma, or any combination of two or more thereof.
- CCP capacitively coupled plasma
- ICP inductively coupled plasma
- RLSA radial line slot antenna
- a buffer layer using a metal including Al, Ni, Cu, Ni-Cu alloy, such as MONEL®, etc, in contact with the fluorine-based dielectric layer may serve as a chemical buffer and/or Cu barrier layer.
- Depositing the above mentioned buffer layer on the top or the bottom of the fluorine-based dielectric layer may provide a stable (thermal and mechanical), non- volatile, adhesive, and/or low-k value metal fluoride at the interface.
- Al fluoride e.g. AIF 3
- AIF 3 may or may not form at the interface after Al deposition in contact with the fluorine-based dielectric layer.
- the buffer layer containing Al may provide a strong adhesive film that is stable at temperatures up to about 400°C (about 650°C for Ni; about 400°C for Cu; about 550°C for
- the buffer layer containing Al fluoride may provide an adhesive interface between the fluorine-based dielectric layer and the metal- containing layer.
- a desirable feature for metal fluoride e.g., Al fluoride
- a low k-value e.g., about 2.2
- metal fluorides possess good adhesion properties and a low k-value.
- a buffer layer containing a metal fluoride is stable at temperatures exceeding about 1000°C.
- the buffer layer may be deposited by any evaporation, PVD (e.g., sputtering), or CVD/PECVD thin film deposition method.
- PVD e.g., sputtering
- CVD/PECVD thin film deposition method e.g., alumilicates
- Al CVD is the use of trimethyl aluminium (TMA) AI 2 (CH 3 ) 6 . Only a thin layer of Al is required for forming Al fluoride.
- excess Al may be etched depending on the application.
- excess Al may be desirable since it may be converted to AIN by annealing in NH 3 or N 2 , or by nitrogen plasma treatment.
- AIN provide a good copper diffusion barrier material and, thus, there may be no need for another metal or metal nitride barrier layer, such as TaN.
- FIGs. 3A through 3E a simplified schematic representation of a method of preparing an interface between a fluorine- based dielectric layer and a metal-containing layer in a metal interconnect is provided according to an embodiment.
- embodiments of the invention can be applied to patterned substrates containing one or more vias, or trenches, or combinations thereof.
- FIG. 3A schematically illustrates a trench-via pattern 330 formed in an insulation layer 320, such as a fluorine-based dielectric layer as described above, on a substrate 310, wherein a metal line, to be formed in the trench of the trench-via pattern 330, is to make electrical and physical contact with another metal line 312 through a metal via, to be formed in the via portion of the trench-via pattern 330.
- an insulation layer 320 such as a fluorine-based dielectric layer as described above
- an interface 340 is prepared on a surface of the insulation layer 330.
- the interface 340 may be prepared using any one of the methods described above.
- the interface 340 may serve as a F barrier layer for the insulation layer 330.
- another interface may be prepared at boundary 314 between the insulation layer 330 and the underlying substrate 310.
- the trench-via pattern 330 is lined with one or more conformal thin films 350.
- the one or more conformal thin films 350 may include a metal barrier layer, a metal adhesion layer, or a metal seed layer, or any combination of two or more thereof. Thereafter, the trench-via pattern 330 is filled with metal 355, such as Cu.
- the trench-via patern filled with metal 355 is planarized to form a planarized metal-filled trench-via structure 360.
- the planarization may be performed using chemical-mechanical planarization (CMP).
- the planarized metal-filled trench-via structure 360 may be capped using one or more capping layers 380, and another insulation layer 370 may be formed thereon. Additionally, yet another interface 390 is prepared on a surface of the insulation layer 370.
- the interface 390 may be prepared using any one of the methods described above. For example, the interface 390 may serve as a F barrier layer for insulation layer 370.
- the platform 400 comprises a first film-forming system 410 for forming a fluorine-based dielectric layer on a substrate 442, a second film-forming system 420 for forming a metal-containing layer on the substrate 442, a treatment system 430 for modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer, and a transfer system 470 coupled to the first film-forming system 410, the second film-forming system 420, and the treatment system 430, and configured to transfer a substrate there between.
- the treatment system 430 may include a radiation system, or a plasma processing system.
- the treatment system 430 comprises a third film- forming system configured to deposit a buffer layer between the fluorine- based dielectric layer and the metal-containing layer.
- the third film- forming system may include a vapor deposition system, such as a physical vapor deposition (PVD) system, an ionized PVD system, a chemical vapor deposition (CVD) system, a plasma enhanced CVD system, an atomic layer deposition (ALD) system, or a plasma enhanced ALD system, or any combination of two or more thereof.
- PVD physical vapor deposition
- CVD chemical vapor deposition
- ALD atomic layer deposition
- the transfer system 470 is configured to transfer one or more substrates in and out of the first film-forming system 410, the second film-forming system 420, and the treatment system 430, and also to exchange one or more substrates with a multi-element manufacturing system 440.
- the multi-element manufacturing system 440 may comprise a load-lock element to allow cassettes of substrates to cycle between ambient conditions and low pressure conditions.
- the transfer system 470 may comprise a dedicated handler 460 for moving one or more substrates between the first film-forming system 410, the second film-forming system 420, the treatment system 430, and the multi-element manufacturing system 440.
- the multi-element manufacturing system 440 may permit the transfer of substrates to and from processing elements including such devices as etch systems, deposition systems, coating systems, patterning systems, metrology systems, etc.
- an isolation assembly 450 is utilized to couple each system with the transfer system and the multi-element manufacturing system 440.
- the isolation assembly 450 may comprise at least one of a thermal insulation assembly to provide thermal isolation and a gate valve assembly to provide vacuum isolation.
- the first film-forming system 410, the second film-forming system 420, and the treatment system 430 may be placed in any sequence.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
A method of integrating a fluorine-based dielectric with a metallization scheme is described. The method includes forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and adding a buffer layer or modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer.
Description
METHOD OF PROVIDING STABLE AND ADHESIVE INTERFACE BETWEEN FLUORINE-BASED LOW-K MATERIAL AND METAL
BARRIER LAYER
BACKGROUND OF THE INVENTION FIELD OF THE INVENTION
[0001] The invention relates to a method for preparing an interface for a fluorine-based low dielectric constant (low-k) material and, in particular, a method of integrating fluorine-based low-k materials with metal
interconnects in semiconductor and electronic devices.
DESCRIPTION OF RELATED ART
[0002] As the dimensions of ultra large scale integration (ULSI) circuits continuously shrink, the interconnect delay caused by parasitic
capacitance becomes greater than the gate delay and, hence, dominates device performance with the current Al/Si02 metallization scheme.
Significant research and development for using lower resistance metal (e.g., Cu) as well as lower capacitance interlayer dielectric (ILD) materials has been initiated and conducted for several decades. The use of low-k (low dielectric constant) dielectric materials not only reduces the line-to- line capacitance, but also minimizes cross-talk noise and reduces power consumption. A broad range of low-k materials, including fluorinated Si02, organic polymers or hybrid polymers, organosilicate glasses, nanoporous silica, and amorphous fluorocarbon have been investigated in detail.
Moreover, the relevant properties, such as dielectric constant, thermal and mechanical stability, water and chemical resistance, adhesion, and gap fill capabilities, have been investigated.
[0003] Recent work on fluorine-based (alloyed, incorporated, or doped) low-k materials, such as CFX polymer or fluorinated amorphous carbon deposited by plasma enhanced chemical vapor deposition (PECVD) with a dielectric constant of 2.0-2.7, has shown that they are promising materials
for interlayer dielectric applications. Further, it has been found that the electrical, thermal, and mechanical properties of these materials are dictated by the fluorine to carbon ratio in the corresponding deposited films. High fluorine content in these films leads to a lower dielectric constant, but poorer thermal and mechanical stability.
[0004] To accommodate Cu metallization, a barrier material, such as titanium, tungsten, or tantalum and their nitrides, is often used to be deposited under or on these fluorine-based low-k materials.
[0005] Currently, the main issue that has hindered the practical application of these fluorine-based low-k materials in ULSI is adhesion problems between fluorine-based low-k materials and metal barrier materials.
Although there might be many other material or process related reasons that could cause the adhesion problem, the inventors believe that F atoms play a critical role in relation to the adhesion problem. The inventors recognize that F is a very reactive and corrosive element and, therefore, they suspect that F atoms, which initially existed at the interface between the metal barrier layer and the fluorine-based low-k materials or diffused from the bulk fluorine-based low-k materials and accumulated at the interface during device processing involving high temperature, may react with metal. Thus, the interface between the metal barrier layer and the fluorine-based low-k materials may become a very low strength corrosion layer and, consequently, may exhibit poor adhesion properties.
[0006] Whenever a metal barrier layer is deposited beneath or above these fluorine-based low-k materials, the metal element of the barrier layer may readily react with free and moveable F atoms in the fluorine-based low-k material to form metal fluoride which usually possesses a high vapor pressure and a high sensitivity to -OH groups. This interfacial chemical reaction process significantly weakens the interface strength, rendering a serious interface adhesion problem and, in time, a significant k-value increase due to penetration of water molecules. Furthermore, the metal layer acts like an F atom sink and, therefore, F atoms are expected to diffuse to a certain depth of the metal barrier layer. This diffusive process
may reduce the ratio of F to C atoms in the fluorine-based low-k material and further cause the k-value to increase and become less stable.
SUMMARY OF THE INVENTION
[0007] The invention relates to a method for preparing an interface for a fluorine-based low dielectric constant (low-k) material. Furthermore, the invention relates to a method of integrating fluorine-based low-k materials with metal interconnects in semiconductor and electronic devices.
[0008] According to an embodiment, a method of integrating a fluorine- based dielectric with a metallization scheme is described. The method comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer.
[0009] According to another embodiment, a platform for preparing a fluorine-based dielectric metallization scheme is described. The platform comprises a first film-forming system for forming a fluorine-based dielectric layer on a substrate, a second film-forming system for forming a metal- containing layer on the substrate, a treatment system for modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer, and a transfer system coupled to the first film-forming system, the second film-forming system, and the treatment system, and configured to transfer a substrate there between.
[0010] According to another embodiment, a method of integrating a fluorine-based dielectric with a metallization scheme is described. The method comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the buffer layer includes a carbon- containing layer selected from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a-C), hydrogenated
amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (C3N4), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof.
[0011] According to another embodiment, a method of integrating a fluorine-based dielectric with a metallization scheme is described. The method comprises forming a fluorine-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the metal buffer layer includes a metal selected from the group consisting of Ni, or Ni alloy, or both.
[0012] According to another embodiment, a method of integrating a fluorine-based dielectric with a metallization scheme is described. The method comprises forming CFx-based dielectric layer on a substrate, forming a metal-containing layer on the substrate, and forming a metal buffer layer at an interface between the fluorine-based dielectric layer and the metal-containing layer, wherein the metal buffer layer includes a metal selected from the group consisting of Al, Ni, Cu, Al alloy, Ni alloy, Cu alloy, or any combination of two or more thereof.
[0013] According to another embodiment, a platform for preparing a fluorine-based dielectric metallization scheme is described. The platform comprises a first film-forming system for forming a fluorine-based dielectric layer on a substrate, a second film-forming system for forming a metal- containing layer on the substrate, a third film-forming system for depositing a buffer layer between the fluorine-based dielectric layer and the metal- containing layer, and a transfer system coupled to the first film-forming system, the second film-forming system, and the treatment system, and configured to transfer a substrate there between.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] In the accompanying drawings:
[0015] FIGs. 1 A through 1 D present a simplified schematic representation of a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment;
[0016] FIG. 2 illustrates a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to another embodiment;
[0017] FIGs. 3A through 3E present a simplified schematic representation of a method of preparing an interface between a fluorine-based dielectric layer and a metal-containing layer in a metal interconnect according to an embodiment; and
[0018] FIG. 4 presents a schematic representation of a platform for preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment.
DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS
[0019] A method and system for preparing an interface between a fluorine- based dielectric layer and a metal-containing layer is disclosed in various embodiments. However, one skilled in the relevant art will recognize that the various embodiments may be practiced without one or more of the specific details, or with other replacement and/or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of various embodiments of the invention.
[0020] Similarly, for purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough
understanding of the invention. Nevertheless, the invention may be practiced without specific details. Furthermore, it is understood that the various embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale.
[0021] Reference throughout this specification to "one embodiment" or "an embodiment" or variation thereof means that a particular feature, structure, material, or characteristic described in connection with the embodiment is
included in at least one embodiment of the invention, but do not denote that they are present in every embodiment. Thus, the appearances of the phrases such as "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the invention. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.
[0022] Nonetheless, it should be appreciated that, contained within the description are features which, notwithstanding the inventive nature of the general concepts being explained, are also of an inventive nature.
[0023] "Substrate" as used herein generically refers to the object being processed in accordance with the invention. The substrate may include any material portion or structure of a device, particularly a semiconductor or other electronics device, and may, for example, be a base substrate structure, such as a semiconductor wafer or a layer on or overlying a base substrate structure such as a thin film. Thus, substrate is not intended to be limited to any particular base structure, underlying layer or overlying layer, patterned or unpatterned, but rather, is contemplated to include any such layer or base structure, and any combination of layers and/or base structures. The description below may reference particular types of substrates, but this is for illustrative purposes only and not limitation.
[0024] Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views, FIGs. 1 A through 1 E, and FIG. 2 illustrate a method for preparing an interface between a fluorine-based dielectric layer and a metal-containing layer according to an embodiment. The method is illustrated in a flow chart 200, and begins in 210 with forming a fluorine-based dielectric layer 120 on substrate 1 10. The fluorine-based dielectric layer 120 may include a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material. For example, the fluorine-based dielectric layer 120 may include a CFx-containing material, wherein x represents an integer greater than or
equal to unity. Additionally, for example, the fluorine-based dielectric layer 120 may include a fluorinated amorphous carbon dielectric material.
[0025] The fluorine-based dielectric layer 120 may comprise a low dielectric constant (i.e., low-k) or ultra-low dielectric constant (i.e., ultra- low-k) dielectric layer having a nominal dielectric constant value less than the dielectric constant of Si02, which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the thin film may have a dielectric constant of less than 3.7, or a dielectric constant ranging from 1 .6 to 3.7. Furthermore, the fluorine- based dielectric layer 120 may be non-porous or porous.
[0026] The fluorine-based dielectric layer 120 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or a spin-on technique, such as those offered in the Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD, and LITHIUS coating systems commercially available from Tokyo Electron Limited (TEL). The Clean Track ACT 8 (200 mm), ACT 12 (300 mm), and LITHIUS (300 mm) coating systems provide coat, bake, and cure tools for SOD materials. The track system can be configured for processing substrate sizes of 100 mm, 200 mm, 300 mm, and greater. Other systems and methods for forming a thin film on a substrate are well known to those skilled in the art of both spin-on technology and vapor deposition technology.
[0027] In 220, a metal-containing layer 160 is formed on substrate 1 10. For example, the metal-containing layer 160 is formed on the fluorine- based dielectric layer 120 as shown in FIG. 1 C. In one example, the metal-containing layer may include a metal layer, a metal seed layer, a metal wetting layer, a metal barrier layer, a metal adhesion layer, or any combination of two or more thereof. In another example, the metal- containing layer 160 may include a metal, a metal alloy, a metal oxide, a metal nitride, a metal oxynitride, a metal carbide, a metal silicide, or any combination of two or more thereof.
[0028] For example, the metal-containing layer 160 may include a copper (Cu)-containing material, an aluminum (Al)-containing material, a titanium (Ti)-containing material, a tantalum (Ta)-containing material, a tungsten (W)-containing layer, a rhenium (Re)-containing layer, a ruthenium (Ru)- containing layer, a rhodium (Rh)-containing layer, a palladium (Pd)- containing layer, or a silver (Ag)-containing layer, or any combination of two or more thereof. Additionally, for example, the metal-containing layer 160 may contain compounds of these metals and oxygen, nitrogen, carbon, boron, or phosphorus, or any combination of two or more thereof. Furthermore, for example, the metal-containing layer 160 may include Cu, Cu alloy, Al, Al alloy, Re, Ru, Rh, Pd, Ag, or any combination of two or more thereof. Further yet, for example, the metal-containing layer 160 may include W, Ti, Ta, oxides thereof, nitrides thereof, oxynitrides thereof, carbides thereof, silicides thereof, or any combination of two or more thereof.
[0029] The metal-containing layer 160 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or any combination of two or more thereof.
[0030] In 230, an interface 140 is prepared between the fluorine-based dielectric layer 120 and the metal-containing layer 160. Thereafter, a dielectric layer 180 may be formed on the metal-containing layer 160, and a second interface 170 may be formed between the dielectric layer 180 and the metal-containing layer 160. The dielectric layer 180 may be the same material composition as the fluorine-based dielectric layer 120, or the dielectric layer 180 may be a different material composition than the fluorine-based dielectric layer 120. Additionally, the second interface 170 may be the same material composition as the interface 140, or the second interface 170 may be a different material composition as the interface 140. Additionally yet, the second interface 170 may be prepared in the same manner as the interface 140, or the second interface 170 may be prepared
in a different manner than the interface 140. Furthermore, the interface 140 and/or the second interface 170 may be a fluorine (F) diffusion barrier layer.
[0031]As shown in FIGs. 1A through 1 C, the interface (e.g., interface 140) may be prepared during and/or following the formation of the fluorine- based dielectric layer 120, and prior to the formation of the metal- containing layer 160. Alternatively and/or additionally, as shown in FIG. 1 D, the interface (e.g., second interface 170) may be prepared following the formation of the metal-containing layer 160, and prior to and/or during the dielectric layer 180.
[0032] According to one embodiment, the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer. The modifying the composition of the fluorine- based dielectric layer may comprise increasing a relative concentration of carbon (C) near, at, or within the interface and/or reducing a relative concentration of fluorine (F) near, at, or within the interface.
[0033] According to another embodiment, the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles. For example, the charged particles may include electrons, ions, or gas cluster ions, or any combination of two or more thereof. The flux of energetic charged particles may be collimated or not collimated. For example, the flux of energetic charged particles may be produced by an electron source, an ion source, or a gas cluster ion source, or any combination of two or more thereof. Additionally, for example, the flux of energetic charged particles may be produced by an electron beam source, an ion beam source, or a gas cluster ion beam source, or any combination of two or more thereof.
[0034] The irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles may be performed in the same deposition system used for forming the fluorine-based dielectric layer on the substrate. Alternatively, the irradiating the fluorine-based dielectric layer with non-plasma immersion, energetic charged particles may be performed in a treatment system separate from the deposition system used for forming the fluorine-based dielectric layer on the substrate.
[0035] The irradiation of the fluorine-based dielectric layer by non-plasma immersion, energetic charged particles may modify the surface of the fluorine-based dielectric layer to form the interface, grow material at the surface of the fluorine-based dielectric layer to form the interface, deposit material at the surface of the fluorine-based dielectric layer to form the interface, dope the surface of the fluorine-based dielectric layer to form the interface, or infuse material at the surface of the fluorine-based dielectric layer to form the interface, or any combination of two or more thereof.
[0036] The irradiation of the fluorine-based dielectric layer by non-plasma immersion, energetic charged particles may be most suitable for when the metal-containing layer is deposited on top of the fluorine-based dielectric layer, as shown in FIG. 1 C (e.g., metal-containing layer 160 is formed on top of the fluorine-based dielectric layer 120). Therein, high energy charged particles may form a C-rich surface either by hot electron dissociation or ion sputtering, for example. When a metal barrier layer, such as the metal-containing layer, is deposited on the fluorine-based dielectric layer, metal carbides would be formed at the interface and these carbides provide a very stable and adhesive interfacial layer.
[0037] According to another embodiment, the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by adjusting a deposition process for the forming the fluorine-based dielectric layer.
[0038] The adjusting the deposition process for the forming the fluorine- based dielectric layer may comprise adjusting one or more of the following: (1 ) a plasma discharge condition for forming the fluorine-based dielectric layer; (2) a pressure for forming the fluorine-based dielectric layer; (3) a CF radical density; (4) a CF2 radical density; (5) a CF3 radical density; (6) a flow rate of a film-forming precursor; (7) a substrate temperature; or (8) a flow rate of a dilution gas; or (9) a combination of two or more thereof.
[0039] The film-forming precursor may include a CxFy-containing precursor, wherein x and y are integers greater than or equal to unity. Additionally, a dilution gas may be introduced with the film-forming precursor. The dilution gas may include a noble gas, such as argon (Ar), or a hydrogen-containing gas, such as H2, or NH3, or both.
[0040] The adjusting the plasma discharge condition for the deposition process may comprise adjusting a power coupled to an electrode supporting the substrate, or adjusting a power coupled to an electrode not supporting the substrate, or both.
[0041] The adjusting of the deposition process may be suitable for when the metal-containing layer is deposited on top of the fluorine-based dielectric layer, as shown in FIG. 1 C (e.g., metal-containing layer 160 is formed on top of the fluorine-based dielectric layer 120), or when the fluorine-based dielectric layer is deposited on top of the metal-containing layer, as shown in FIG. 1 D (e.g., dielectric layer 180 is formed on top of metal-containing layer 160). For example, if the fluorine-based dielectric layer is formed on the metal-containing layer, the modification of the surface to form an interface having C-rich material at the interface using non-plasma immersion, energetic charged particle irradiation is
challenging and impractical.
[0042] By changing the fluorine-based dielectric layer deposition
conditions, such as plasma discharge conditions, one or more adjustments may be made to grade the interface and produce a C-rich interface including, but not limited to: (i) increasing power coupled to the electrode supporting the substrate and/or the electrode not supporting the substrate;
(ii) increasing bias power to the electrode supporting the substrate; (iii) increasing substrate temperature; (iv) increasing pressure; (v) increasing CF radical density; and/or (vi) decreasing CF2 or CF3 radical density.
Therefore, the probability for bonding between an F atom and a metal atom may be lowered, and the total F atom to C atom ratio in the bulk materials may also be lowered. Alternately, the inventors suspect that diluting the film-forming precursor, i.e., a CXFX precursor, with Ar and/or H2 may also reduce the F atom to metal atom bonding possibility, and this result may not modify the dielectric constant of the fluorine-based dielectric layer.
[0043] According to another embodiment, the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer by exposing the fluorine-based dielectric layer to a nitrogen plasma excluding NH3.
[0044] The nitrogen plasma may be formed using a gas comprising N2, NO, N20, N02, or any combination of two or more thereof.
[0045] The use of a nitrogen plasma (e.g. formed using N2, etc.) treatment of the fluorine-based dielectric layer may reduce F atoms on the surface and incorporate N atoms on the surface, which may improve the adhesion.
[0046] According to another embodiment, the preparation of an interface between a fluorine-based dielectric layer and a metal-containing layer comprises depositing a buffer layer at the interface between the fluorine- based dielectric layer and the metal-containing layer. The formation of the buffer layer may provide a stable and adhesive interface with the metal- containing layer and may also provide strong bonding with the fluorine- based dielectric layer. Desirably, the buffer layer should not significantly modify the k-value of the fluorine-based dielectric layer.
[0047] According to another embodiment, the depositing the buffer layer at the interface between the fluorine-based dielectric layer and the metal- containing layer comprises depositing a carbon-containing layer selected
from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a-C), hydrogenated amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (CsN4), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof.
[0048] The buffer layer can be deposited using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), ionized PVD (iPVD), vacuum arc deposition (VAD), or filtered VAD, or any combination of two or more thereof. For example, when plasma is used to enhance and/or facilitate the deposition of the buffer layer, plasma may be formed using
capacitively coupled plasma (CCP), inductively coupled plasma (ICP), surface wave plasma, radial line slot antenna (RLSA) plasma, or vacuum arc plasma, or any combination of two or more thereof.
[0049] The buffer layer containing tetrahedral amorphous carbon (ta-C, or called amorphous diamond), or common amorphous carbon (a-C or a- C:H) or diamond-like carbon (DLC), or nitrogenated amorphous carbon (a- C:N), or carbon nitride (a-CN, a-CN:H, or CsN4) between the fluorine- based dielectric layer and the metal-containing layer may act as a chemical buffer layer between these two materially different layers. The buffer layer may lessen the reactivity or even block the reaction between the metal element of the metal-containing layer and F atoms in the fluorine-based dielectric layer. As a result, a metal carbide may be formed at the interface.
[0050] Additionally, a buffer layer containing, for example, amorphous carbon, may not significantly affect the k-value of the fluorine-based dielectric layer because a C-C bond (preferably sp3 hybridized) only has a slightly higher k-value than a C-F bond. Furthermore, a buffer layer containing, for example, a nitrogenated amorphous carbon (a-C:N) may also serve as the buffer layer. Nitrogenated amorphous carbon (a-C:N)
may be deposited using plasma based CVD (e.g., PECVD via CCP, RLSA, etc.) or through nitrogen plasma nitridation of an amorphous carbon layer. With optimal plasma discharge conditions, substrate temperature, power, and pressure, only C-N single bonds may be obtained with C=N and C≡N bonds removed. Because a C-N bond has a shorter bond length than a C-C bond, the inventors expect a denser buffer layer may be formed that may further block the F atom reaction with metal-containing layer. In this context, highly sp3 bonded non-hydrogenated amorphous carbon (ta-C or amorphous diamond) deposited at room temperature using mono-energetic, low energy carbon ions produced by metal vacuum arc plasma (filtered or non-filtered) may be a superior candidate. Lower quality amorphous carbon based films may also be deposited by PVD or CVD methods such as broad ion beam assisted deposition.
[0051] According to another embodiment, the depositing the buffer layer at the interface between the fluorine-based dielectric layer and the metal- containing layer comprises depositing a metal selected from the group consisting of Al, Ni, Cu, Al alloy, Ni alloy, Cu alloy, or any combination of two or more thereof.
[0052] The buffer layer can be deposited using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or any combination of two or more thereof. For example, when plasma is used to enhance and/or facilitate the deposition of the buffer layer, plasma may be formed using capacitively coupled plasma (CCP), inductively coupled plasma (ICP), surface wave plasma, or radial line slot antenna (RLSA) plasma, or any combination of two or more thereof.
[0053]A buffer layer using a metal including Al, Ni, Cu, Ni-Cu alloy, such as MONEL®, etc,, in contact with the fluorine-based dielectric layer may serve as a chemical buffer and/or Cu barrier layer. Depositing the above mentioned buffer layer on the top or the bottom of the fluorine-based dielectric layer may provide a stable (thermal and mechanical), non-
volatile, adhesive, and/or low-k value metal fluoride at the interface. For example, Al fluoride (e.g. AIF3) may or may not form at the interface after Al deposition in contact with the fluorine-based dielectric layer.
[0054] If Al fluoride is not formed, the buffer layer containing Al may provide a strong adhesive film that is stable at temperatures up to about 400°C (about 650°C for Ni; about 400°C for Cu; about 550°C for
MONEL®; etc.). If Al fluoride is formed (such as at high temperature, high energy), the buffer layer containing Al fluoride may provide an adhesive interface between the fluorine-based dielectric layer and the metal- containing layer. A desirable feature for metal fluoride (e.g., Al fluoride) is a low k-value (e.g., about 2.2), which is closer to the k-value of the fluorine-based dielectric layer. In summary, metal fluorides possess good adhesion properties and a low k-value.
[0055] A buffer layer containing a metal fluoride is stable at temperatures exceeding about 1000°C. The buffer layer may be deposited by any evaporation, PVD (e.g., sputtering), or CVD/PECVD thin film deposition method. One example of Al CVD is the use of trimethyl aluminium (TMA) AI2(CH3)6. Only a thin layer of Al is required for forming Al fluoride.
Optionally or if desired, excess Al may be etched depending on the application. However, excess Al may be desirable since it may be converted to AIN by annealing in NH3 or N2, or by nitrogen plasma treatment. AIN provide a good copper diffusion barrier material and, thus, there may be no need for another metal or metal nitride barrier layer, such as TaN.
[0056] Turning now to FIGs. 3A through 3E, a simplified schematic representation of a method of preparing an interface between a fluorine- based dielectric layer and a metal-containing layer in a metal interconnect is provided according to an embodiment. As those skilled in the art will readily appreciate, embodiments of the invention can be applied to patterned substrates containing one or more vias, or trenches, or combinations thereof. FIG. 3A schematically illustrates a trench-via pattern 330 formed in an insulation layer 320, such as a fluorine-based
dielectric layer as described above, on a substrate 310, wherein a metal line, to be formed in the trench of the trench-via pattern 330, is to make electrical and physical contact with another metal line 312 through a metal via, to be formed in the via portion of the trench-via pattern 330.
[0057] As illustrated in FIG. 3B, an interface 340 is prepared on a surface of the insulation layer 330. The interface 340 may be prepared using any one of the methods described above. For example, the interface 340 may serve as a F barrier layer for the insulation layer 330. Additionally, another interface may be prepared at boundary 314 between the insulation layer 330 and the underlying substrate 310.
[0058] As illustrated in FIG. 3C, the trench-via pattern 330 is lined with one or more conformal thin films 350. The one or more conformal thin films 350 may include a metal barrier layer, a metal adhesion layer, or a metal seed layer, or any combination of two or more thereof. Thereafter, the trench-via pattern 330 is filled with metal 355, such as Cu.
[0059] As illustrated in FIG. 3D, the trench-via patern filled with metal 355 is planarized to form a planarized metal-filled trench-via structure 360. The planarization may be performed using chemical-mechanical planarization (CMP).
[0060] As illustrated in FIG. 3E, the planarized metal-filled trench-via structure 360 may be capped using one or more capping layers 380, and another insulation layer 370 may be formed thereon. Additionally, yet another interface 390 is prepared on a surface of the insulation layer 370. The interface 390 may be prepared using any one of the methods described above. For example, the interface 390 may serve as a F barrier layer for insulation layer 370.
[0061] Turning now to FIG. 4, a top view of a platform 400 for processing a substrate and preparing a fluorine-based dielectric metallization scheme is provided according to yet another embodiment. The platform 400 comprises a first film-forming system 410 for forming a fluorine-based dielectric layer on a substrate 442, a second film-forming system 420 for forming a metal-containing layer on the substrate 442, a
treatment system 430 for modifying a composition of the fluorine-based dielectric layer proximate an interface between the fluorine-based dielectric layer and the metal-containing layer, and a transfer system 470 coupled to the first film-forming system 410, the second film-forming system 420, and the treatment system 430, and configured to transfer a substrate there between. The treatment system 430 may include a radiation system, or a plasma processing system.
[0062] Alternatively, the treatment system 430 comprises a third film- forming system configured to deposit a buffer layer between the fluorine- based dielectric layer and the metal-containing layer. The third film- forming system may include a vapor deposition system, such as a physical vapor deposition (PVD) system, an ionized PVD system, a chemical vapor deposition (CVD) system, a plasma enhanced CVD system, an atomic layer deposition (ALD) system, or a plasma enhanced ALD system, or any combination of two or more thereof.
[0063] As illustrated in FIG. 4, the transfer system 470 is configured to transfer one or more substrates in and out of the first film-forming system 410, the second film-forming system 420, and the treatment system 430, and also to exchange one or more substrates with a multi-element manufacturing system 440. The multi-element manufacturing system 440 may comprise a load-lock element to allow cassettes of substrates to cycle between ambient conditions and low pressure conditions.
[0064] The transfer system 470 may comprise a dedicated handler 460 for moving one or more substrates between the first film-forming system 410, the second film-forming system 420, the treatment system 430, and the multi-element manufacturing system 440. In one embodiment, the multi-element manufacturing system 440 may permit the transfer of substrates to and from processing elements including such devices as etch systems, deposition systems, coating systems, patterning systems, metrology systems, etc.
[0065] In order to isolate the processes occurring in the first film- forming system 410, the second film-forming system 420, and the
treatment system 430, an isolation assembly 450 is utilized to couple each system with the transfer system and the multi-element manufacturing system 440. For instance, the isolation assembly 450 may comprise at least one of a thermal insulation assembly to provide thermal isolation and a gate valve assembly to provide vacuum isolation. Of course, the first film-forming system 410, the second film-forming system 420, and the treatment system 430 may be placed in any sequence.
[0066] Although only certain embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the embodiments without materially departing from the novel teachings and advantages of this invention.
Accordingly, all such modifications are intended to be included within the scope of this invention.
Claims
1 . A method of integrating a fluorine-based dielectric with a metallization scheme, comprising:
forming a fluorine-based dielectric layer on a substrate;
forming a metal-containing layer on said substrate; and
modifying a composition of said fluorine-based dielectric layer proximate an interface between said fluorine-based dielectric layer and said metal-containing layer by performing one or more of the following:
irradiating said fluorine-based dielectric layer with non- plasma immersion, energetic charged particles,
adjusting a deposition process for said forming said fluorine- based dielectric layer, or
exposing said fluorine-based dielectric layer to a nitrogen plasma excluding NH3.
2. The method of claim 1 , wherein said modifying said composition of said fluorine-based dielectric layer comprises increasing a relative concentration of carbon near, at, or within said interface and/or reducing a relative concentration of fluorine near, at, or within said interface.
3. The method of claim 1 , wherein said irradiating said fluorine- based dielectric layer with non-plasma immersion, energetic charged particles comprises irradiating said fluorine-based dielectric layer with an electron beam, an ion beam, or a gas cluster ion beam, or any
combination of two or more thereof.
4. The method of claim 1 , wherein said irradiating said fluorine- based dielectric layer with non-plasma immersion, energetic charged particles is performed in the same deposition system used for forming said fluorine-based dielectric layer on said substrate.
5. The method of claim 1 , wherein said adjusting said deposition process for said forming said fluorine-based dielectric layer comprises adjusting one or more of the following:
a plasma discharge condition for forming said fluorine-based dielectric layer,
a pressure for forming said fluorine-based dielectric layer, a CF radical density,
a CF2 radical density
a CF3 radical density,
a flow rate of a film-forming precursor,
a substrate temperature,
a flow rate of a dilution gas, or
a combination of two or more thereof.
6. The method of claim 5, wherein said film-forming precursor comprises a CxFy-containing precursor, wherein x and y are integers greater than or equal to unity.
7. The method of claim 5, wherein said dilution gas comprises a noble gas, or a hydrogen-containing gas, or a combination thereof.
8. The method of claim 5, wherein said adjusting said plasma discharge condition comprises adjusting a power coupled to an electrode supporting said substrate, or adjusting a power coupled to an electrode not supporting said substrate, or both.
9. The method of claim 8, wherein said adjusting said deposition process comprises increasing said power to said electrode supporting said substrate, increasing said power to said electrode not supporting said substrate, decreasing said pressure for forming said fluorine-based dielectric layer, increasing said substrate temperature, increasing said CF radical density, decreasing said CF2 radical density, or decreasing said CF3 radical density, or any combination of two or more thereof.
10. The method of claim 1 , wherein said nitrogen plasma comprises N2, NO, N20, N02, or any combination of two or more thereof.
1 1 . The method of claim 1 , wherein said fluorine-based dielectric layer comprises a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material.
12. The method of claim 1 , wherein said fluorine-based dielectric layer comprises a CFx-containing material.
13. The method of claim 1 , wherein said fluorine-based dielectric layer comprises a fluorinated amorphous carbon dielectric material.
14. The method of claim 1 , further comprising:
forming a metal-barrier layer between said fluorine-based dielectric layer and said metal-containing layer.
15. A platform for preparing a fluorine-based dielectric metallization scheme, comprising:
a first film-forming system for forming a fluorine-based dielectric layer on a substrate;
a second film-forming system for forming a metal-containing layer on said substrate;
a treatment system for modifying a composition of said fluorine- based dielectric layer proximate an interface between said fluorine-based dielectric layer and said metal-containing layer; and
a transfer system coupled to said first film-forming system, said second film-forming system, and said treatment system, and configured to transfer a substrate there between.
16. The platform of claim 15, wherein said fluorine-based dielectric layer comprises a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material.
17. The platform of claim 15, wherein said treatment system comprises a radiation system configured to irradiate said fluorine-based dielectric layer with non-plasma immersion, energetic charged particles.
18. The platform of claim 17, wherein said radiation system comprises an electron beam source, an ion beam source, or a gas cluster ion beam source, or any combination of two or more thereof.
19. The platform of claim 15, wherein said second film-forming system comprises a controller configured to adjust a deposition process for said forming said fluorine-based dielectric layer.
20. The platform of claim 15, wherein said treatment system comprises a plasma processing system configured to form a nitrogen- containing plasma containing N2, NO, N20, N02, or any combination of two or more thereof.
21 . A method of integrating a fluorine-based dielectric with a metallization scheme, comprising:
forming a fluorine-based dielectric layer on a substrate;
forming a metal-containing layer on said substrate; and
forming a buffer layer at an interface between said fluorine-based dielectric layer and said metal-containing layer, said buffer layer including a carbon-containing layer selected from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a-C), hydrogenated amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (C3N4), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof.
22. The method of claim 21 , wherein said fluorine-based dielectric layer comprises a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material.
23. The method of claim 21 , wherein said fluorine-based dielectric layer comprises a CFx-containing material.
24. The method of claim 21 , wherein said fluorine-based dielectric layer comprises a fluorinated amorphous carbon dielectric material.
25. The method of claim 21 , further comprising:
forming a metal-barrier layer between said fluorine-based dielectric layer and said metal-containing layer.
26. The method of claim 21 , wherein said buffer layer is formed using a vapor deposition process.
27. The method of claim 21 , wherein said buffer layer is formed using a physical vapor deposition (PVD) process, an ionized PVD process, a chemical vapor deposition (CVD) process, a plasma enhanced CVD process, an atomic layer deposition (ALD) process, a plasma enhanced ALD process, a vacuum arc deposition (VAD) process, or a filtered VAD process, or any combination of two or more thereof.
28. The method of claim 27, wherein plasma is formed using capacitively coupled plasma (CCP), inductively coupled plasma (ICP), surface wave plasma, radial line slot antenna (RLSA) plasma, or a vacuum arc plasma, or any combination of two or more thereof.
29. A method of integrating a fluorine-based dielectric with a metallization scheme, comprising:
forming a fluorine-based dielectric layer on a substrate;
forming a metal-containing layer on said substrate; and
forming a buffer layer at an interface between said fluorine-based dielectric layer and said metal-containing layer, said metal buffer layer including a metal selected from the group consisting of Ni, or Ni alloy, or both.
30. The method of claim 29, wherein said fluorine-based dielectric layer comprises a fluorine alloyed, a fluorine incorporated, or fluorine doped dielectric material.
31 . The method of claim 29, wherein said fluorine-based dielectric layer comprises a CFx-containing material.
32. The method of claim 29, wherein said fluorine-based dielectric layer comprises a fluorinated amorphous carbon dielectric material.
33. The method of claim 29, further comprising:
forming a metal-barrier layer between said fluorine-based dielectric layer and said metal-containing layer.
34. The method of claim 29, wherein said buffer layer is formed using a vapor deposition process.
35. The method of claim 29, wherein said buffer layer is formed using a physical vapor deposition (PVD) process, an ionized PVD process, a chemical vapor deposition (CVD) process, a plasma enhanced CVD process, an atomic layer deposition (ALD) process, a plasma enhanced ALD process, a vacuum arc deposition (VAD) process, or a filtered VAD process, or any combination of two or more thereof.
36. The method of claim 35, wherein plasma is formed using capacitively coupled plasma (CCP), inductively coupled plasma (ICP), surface wave plasma, radial line slot antenna (RLSA) plasma, or a vacuum arc plasma, or any combination of two or more thereof.
37. A method of integrating a fluorine-based dielectric with a metallization scheme, comprising:
forming CFx-based dielectric layer on a substrate;
forming a metal-containing layer on said substrate; and
forming a metal buffer layer at an interface between said fluorine- based dielectric layer and said metal-containing layer, said metal buffer layer including a metal selected from the group consisting of Al, Ni, Cu, Al alloy, Ni alloy, Cu alloy, or any combination of two or more thereof.
38. A platform for preparing a fluorine-based dielectric metallization scheme, comprising:
a first film-forming system for forming a fluorine-based dielectric layer on a substrate;
a second film-forming system for forming a metal-containing layer on said substrate;
a third film-forming system for depositing a buffer layer between said fluorine-based dielectric layer and said metal-containing layer, said buffer layer comprising a carbon-containing layer selected from the group consisting of tetrahedral amorphous carbon (ta-C), amorphous carbon (a- C), hydrogenated amorphous carbon (a-C:H), diamond-like carbon (DLC), nitrogenated amorphous carbon (a-C:N), carbon nitride (C3N4), amorphous carbon nitride (a-CN), hydrogenated amorphous carbon nitride (a-CN:H), or any combination of two or more thereof, or a metal selected from the group consisting of Ni, Ni alloy, Al, Al alloy, Cu, or Cu alloy, or both; and a transfer system coupled to said first film-forming system, said second film-forming system and said third film-forming system, and configured to transfer a substrate there between.
39. The system of claim 38, wherein said third film-forming system comprises a vapor deposition system.
40. The system of claim 39, wherein said vapor deposition system comprises a physical vapor deposition (PVD) system, an ionized PVD system, a chemical vapor deposition (CVD) system, a plasma enhanced CVD system, an atomic layer deposition (ALD) system, a plasma enhanced ALD system, a vacuum arc deposition (VAD) process, or a filtered VAD process, or any combination of two or more thereof.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/574,117 US20110081503A1 (en) | 2009-10-06 | 2009-10-06 | Method of depositing stable and adhesive interface between fluorine-based low-k material and metal barrier layer |
| US12/574,101 | 2009-10-06 | ||
| US12/574,117 | 2009-10-06 | ||
| US12/574,101 US20110081500A1 (en) | 2009-10-06 | 2009-10-06 | Method of providing stable and adhesive interface between fluorine-based low-k material and metal barrier layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2011044053A1 true WO2011044053A1 (en) | 2011-04-14 |
Family
ID=43857077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2010/051347 WO2011044053A1 (en) | 2009-10-06 | 2010-10-04 | Method of providing stable and adhesive interface between fluorine-based low-k material and metal barrier layer |
Country Status (2)
| Country | Link |
|---|---|
| TW (1) | TW201120955A (en) |
| WO (1) | WO2011044053A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8691709B2 (en) * | 2011-09-24 | 2014-04-08 | Tokyo Electron Limited | Method of forming metal carbide barrier layers for fluorocarbon films |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040234779A1 (en) * | 1997-10-24 | 2004-11-25 | Lee Chung J. | Fluorinated aromatic precursors |
| US20050158665A1 (en) * | 2004-01-16 | 2005-07-21 | Semiconductor Energy Laboratory Co., Ltd. | Substrate having film pattern and manufacturing method of the same, manufacturing method of semiconductor device, liquid crystal television, and EL television |
| US20060054279A1 (en) * | 2004-09-10 | 2006-03-16 | Yunsang Kim | Apparatus for the optimization of atmospheric plasma in a processing system |
-
2010
- 2010-10-04 WO PCT/US2010/051347 patent/WO2011044053A1/en active Application Filing
- 2010-10-06 TW TW099134060A patent/TW201120955A/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040234779A1 (en) * | 1997-10-24 | 2004-11-25 | Lee Chung J. | Fluorinated aromatic precursors |
| US20050158665A1 (en) * | 2004-01-16 | 2005-07-21 | Semiconductor Energy Laboratory Co., Ltd. | Substrate having film pattern and manufacturing method of the same, manufacturing method of semiconductor device, liquid crystal television, and EL television |
| US20060054279A1 (en) * | 2004-09-10 | 2006-03-16 | Yunsang Kim | Apparatus for the optimization of atmospheric plasma in a processing system |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201120955A (en) | 2011-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20140127902A1 (en) | Method of providing stable and adhesive interface between fluorine based low k material and metal barrier layer | |
| US6605549B2 (en) | Method for improving nucleation and adhesion of CVD and ALD films deposited onto low-dielectric-constant dielectrics | |
| US7420275B1 (en) | Boron-doped SIC copper diffusion barrier films | |
| US6974768B1 (en) | Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films | |
| US6656840B2 (en) | Method for forming silicon containing layers on a substrate | |
| US7910476B2 (en) | Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop | |
| US6464779B1 (en) | Copper atomic layer chemical vapor desposition | |
| US7239017B1 (en) | Low-k B-doped SiC copper diffusion barrier films | |
| CN101569003B (en) | Semiconductor device and method for manufacturing the same | |
| TWI402887B (en) | Structures and methods for integration of ultralow-k dielectrics with improved reliability | |
| US8372739B2 (en) | Diffusion barrier for integrated circuits formed from a layer of reactive metal and method of fabrication | |
| US7799681B2 (en) | Method for forming a ruthenium metal cap layer | |
| KR100407680B1 (en) | Method of forming a metal wiring in a semiconductor device | |
| US20060281299A1 (en) | Method of fabricating silicon carbide-capped copper damascene interconnect | |
| US20080290515A1 (en) | Properties of metallic copper diffusion barriers through silicon surface treatments | |
| US20110081503A1 (en) | Method of depositing stable and adhesive interface between fluorine-based low-k material and metal barrier layer | |
| WO2011044053A1 (en) | Method of providing stable and adhesive interface between fluorine-based low-k material and metal barrier layer | |
| US20060040490A1 (en) | Method of fabricating silicon carbide-capped copper damascene interconnect | |
| JP2006024668A (en) | Process for fabricating semiconductor device | |
| JP4447438B2 (en) | Manufacturing method of semiconductor device | |
| CN1222014C (en) | Method of forming TiN barrier by chemical rapour phase deposition | |
| US20230274932A1 (en) | Selective inhibition for selective metal deposition | |
| JP2011124472A (en) | Method of manufacturing semiconductor device | |
| JP2006024667A (en) | Process for fabricating semiconductor device | |
| TW465031B (en) | Copper manufacture process for semiconductor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 10822489 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 10822489 Country of ref document: EP Kind code of ref document: A1 |