WO2010137394A1 - Switching apparatus and control method thereof - Google Patents

Switching apparatus and control method thereof Download PDF

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Publication number
WO2010137394A1
WO2010137394A1 PCT/JP2010/054948 JP2010054948W WO2010137394A1 WO 2010137394 A1 WO2010137394 A1 WO 2010137394A1 JP 2010054948 W JP2010054948 W JP 2010054948W WO 2010137394 A1 WO2010137394 A1 WO 2010137394A1
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Prior art keywords
switching device
switching
control circuit
abnormal state
switching element
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PCT/JP2010/054948
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French (fr)
Japanese (ja)
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清勝 佐藤
祥宏 篠田
広明 川口
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サンケン電気株式会社
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Publication of WO2010137394A1 publication Critical patent/WO2010137394A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

Definitions

  • the present invention relates to a switching device, and more particularly to a switching device having an abnormality detection function and a protection function and a control method thereof.
  • the switching device related to Japanese Patent Publication No. 2000-114039 detects a load current flowing in a solenoid as a load, and reduces a deviation between a control target value input from a microcomputer and the load current. Is a solenoid drive device that performs PWM control.
  • step S101 the switching device performs a normal operation. That is, the control circuit performs PWM control of the switching element to supply power to the solenoid. Further, the control circuit detects, for example, a load current flowing through the solenoid, and modulates the duty (on width) ratio of the drive signal so that the load current becomes a desired magnitude.
  • step S102 the control circuit checks whether or not the switching device is in an abnormal state by the abnormality detection function. If the switching device is in an abnormal state, in step S103, the control circuit activates the protection function and stops PWM control or performs PWM control at a preset minimum duty ratio. On the other hand, if the switching device is in a normal state, the switching device continues normal operation in step S101.
  • step S106 the switching device performs a normal operation as in step S101.
  • the related switching device gradually modulates the duty ratio of the drive signal from the minimum to the optimum value after the PWM control of the switching element is resumed in step S105 in FIG. 1 until the normal operation in step S106. Need adjustment time for.
  • the control circuit erroneously detects an abnormal state due to switching noise or external noise, the duty ratio adjustment time is required even though the PWM control stop time is instantaneous. For this reason, the related switching device has a problem that the load cannot be stably driven when returning from normal operation to normal operation.
  • the present invention has been made to solve the above problems. Therefore, according to this invention, the switching apparatus which can drive a load stably can be provided.
  • a switching device control method comprising a switching element and a control circuit for controlling the switching element, wherein an input voltage is supplied to a load by a switching operation of the switching element.
  • the duty information of the switching element is periodically held and reset when the switching device is in a normal state, the reset is suspended when the switching device is in an abnormal state, and the switching device is out of the abnormal state.
  • the switching element is controlled based on the duty information held immediately after returning to the normal state.
  • a switching device 100 includes a switching element 2 that opens and closes between a solenoid 6 as a load and a battery 1, and current detection means (power detection means) that detects a load current flowing through the solenoid 6. 3, a drive unit 4 having a protection function and PWM-controlling the switching element 2 in accordance with an output of the current detection unit 3 and a control target value input from the microcomputer 7, and an abnormality detecting an abnormal state of the switching device 100 Detecting means 5.
  • the current detection means 3, the drive means 4, and the abnormality detection means 5 constitute a control circuit 8.
  • the battery 1 as a DC voltage output means is composed of a rechargeable battery, and outputs a DC voltage to the drain terminal of the switching element 2 and each part of the control circuit 8.
  • a circuit configured to output a DC voltage by rectifying the commercial power supply may be provided.
  • the switching element 2 is composed of a MOSFET, the drain terminal is connected to the battery 1, and intermittently from the source terminal to the solenoid 6 via the current detection means 3 in response to a gate drive signal input from the control circuit 8 to the gate terminal. DC voltage is output to.
  • a bipolar transistor, IGBT (insulated gate bipolar transistor), or the like can be used as the switching element 2.
  • the current detection means 3 includes a current detection resistor 31 and a current detection amplifier 32.
  • One end of the current detection resistor 31 is connected to the source terminal of the switching element 2, the current detection amplifier 32 non-inverting input terminal, and the cathode of the regenerative diode 9, and the other end is one end of the solenoid 6 and the inverting input of the current detection amplifier 32. Connected to the terminal.
  • the current detection resistor 31 detects the load current flowing through the solenoid 6, converts it into a voltage signal, and outputs it to the current detection amplifier 32.
  • the current detection amplifier 32 amplifies the voltage signal input to the inverting input terminal and the non-inverting input terminal, and outputs the amplified voltage signal to the first input terminal of the driving unit 4 as a detection signal.
  • the driving unit 4 includes an arithmetic circuit 41 having a protection function and a driver circuit 42.
  • the arithmetic circuit 41 synchronizes with the clock signal input from the microcomputer 7, and the detection signal input from the current detection means 3 to the first input terminal and the control target value input from the microcomputer 7 to the second input terminal. Then, the duty (on width) ratio of the gate drive signal is calculated, and a PWM signal based on the calculation result is output to the driver circuit 42.
  • the third to fifth input terminals of the arithmetic circuit 41 are connected to the output terminal of the abnormality detection means 5, and the output terminal is connected to the driver circuit 42.
  • the driver circuit 42 is applied with a DC voltage boosted by a charge pump circuit (not shown), and outputs the output of the arithmetic circuit 41 to the gate terminal of the switching element 2 as a gate drive signal.
  • the arithmetic circuit 41 is composed of, for example, a digital circuit, periodically holds and resets duty information (calculation result) of the PWM signal, and holds and resets the resetting unit (pauses the reset according to the output of the abnormality detecting unit 5 (Not shown).
  • the arithmetic circuit 41 periodically resets and holds the duty information in synchronization with the clock signal input from the microcomputer 7 by the holding means and the reset means.
  • the holding unit holds the duty information immediately before the abnormal state is entered, and the reset unit pauses the reset operation.
  • the duty information (calculation result) when the switching device 100 is abnormal is constant without being influenced by the detection signal of the current detection means 3 and the control target value of the microcomputer 7.
  • the arithmetic circuit 41 stops the output of the PWM signal due to the protection function, or outputs a PWM signal having a preset minimum duty ratio to the driver circuit 42.
  • the abnormality detecting unit 5 When the DC voltage is supplied from the battery 1 and the abnormal state of the switching device 100 is detected, the abnormality detecting unit 5 outputs an abnormal signal corresponding to the abnormal state to the third to fifth input terminals of the arithmetic circuit 41.
  • the abnormality detection means 5 according to the present embodiment is provided with an overcurrent detection function OCP (Over Current Protection), an overvoltage detection function OVP (Over Voltage Protection), and an overheat detection function TSD (in order to prevent the switching device 100 and the solenoid 6 from being destroyed. Thermal Shut-Down).
  • OCP Over Current Protection
  • OVP Over Voltage Protection
  • TSD overheat detection function
  • the overcurrent detection function is connected to the current detection unit 3, and when the value of the detection signal of the current detection unit 3 is larger than a predetermined value, it is determined that the overcurrent is abnormal, and the abnormal signal is output to the third circuit Output to the input terminal.
  • the overvoltage detection function is connected to voltage detection means (not shown) and outputs an abnormal signal to the fourth input terminal of the arithmetic circuit 41 in accordance with the value of the detection signal of the voltage detection means.
  • the overheat detection function outputs an abnormal signal to the fifth input terminal of the arithmetic circuit 41 according to the temperature of the switching element 2 or the control circuit 8.
  • Each detection function of the abnormality detection means 5 is configured by a combination of a known comparison circuit, a reference voltage, a temperature sensitive element, and the like.
  • the arithmetic circuit 41 pauses resetting of the duty information and operates the protection function.
  • the solenoid 6 has one end connected to the other end of the current detection resistor 31 and the other end connected to the ground.
  • the solenoid 6 is an actuator that can obtain a predetermined amount of displacement according to the magnitude of the load current.
  • the microcomputer 7 outputs a control target value and a control clock signal to the driving means 4.
  • the regenerative diode 9 has an anode connected to the ground and a cathode connected to one end of the solenoid 6 via the current detection resistor 31.
  • step S2 the holding means and reset means of the arithmetic circuit 41 periodically repeat resetting and holding duty information (calculation results) in synchronization with the clock signal input from the microcomputer 7.
  • step S3 the abnormality detection means 5 checks whether the switching device 100 and the solenoid 6 are in an abnormal state. If the switching device 100 and the solenoid 6 are in the normal state, the switching device 100 continues normal operation in step S2. On the other hand, if the switching device 100 and the solenoid 6 are in an abnormal state, the arithmetic circuit 41 stops resetting the duty information in accordance with the abnormal signal from the abnormality detecting means 5 in step S4. Specifically, the holding means of the arithmetic circuit 41 holds the duty information immediately before becoming an abnormal state. Further, at this time, in step S ⁇ b> 5, the drive unit 4 performs PWM control of the switching element 2 in accordance with the abnormality signal from the abnormality detection unit 5.
  • the arithmetic circuit 41 stops outputting the PWM signal, and the driving means 4 performs PWM control of the switching element 2. To stop.
  • OCP overcurrent
  • the arithmetic circuit 41 outputs a PWM signal having a preset minimum duty ratio to the driver circuit 42, and the driving means 4 performs switching.
  • the element 2 is PWM-controlled.
  • step S6 the abnormality detection means 5 checks whether or not the abnormal state of the switching device 100 and the solenoid 6 has been released. If switching device 100 and solenoid 6 are in a normal state, in step S7, control circuit 8 resumes PWM control based on the duty information held by the holding means. At this time, the control circuit 8 gradually modulates the duty ratio of the gate drive signal from a value equal to that immediately before the switching device 100 and the solenoid 6 become abnormal to an optimum value. Further, in step S8, the arithmetic circuit 41 periodically repeats resetting and holding of the duty information (calculation result) as in step S2. On the other hand, if the switching device 100 and the solenoid 6 are in an abnormal state, in step S5, the drive unit 4 performs PWM control of the switching element 2 in accordance with the abnormal signal from the abnormality detection unit 5.
  • step S9 as in step S1, the switching device 100 performs a normal operation.
  • the switching device 100 prevents the switching device 100 and the solenoid 6 from being destroyed by such an operation, and immediately after the switching device 100 and the solenoid 6 return from the abnormal state to the normal state, the abnormal state
  • the PWM control can be restarted at the duty (on width) ratio immediately before.
  • the switching device 100 according to the present embodiment has the following effects.
  • the present invention is not limited to the specific embodiment, and various modifications can be made within the scope of the gist of the present invention described in the claims. Can be changed.
  • the present invention can be applied to a switching device using a load other than a solenoid, or a switching device that detects and controls a load voltage.

Abstract

A switching apparatus having a switching device, and a control circuit that conducts PWM control of aforementioned switching device, wherein the switching apparatus is characterized in having aforementioned control circuit periodically repeat the retention and resetting of the duty-ratio of aforementioned PWM control, and having aforementioned switching device conduct PWM control of the switching device with the same duty-ratio just before it becomes an abnormal state, and just after returning to normal state from the abnormal state.

Description

スイッチング装置及びその制御方法Switching device and control method thereof
　本発明は、スイッチング装置に関し、特に異常検知機能及び保護機能を備えるスイッチング装置及びその制御方法に関する。 The present invention relates to a switching device, and more particularly to a switching device having an abnormality detection function and a protection function and a control method thereof.
　日本国特許公開公報第２０００－１１４０３９号の関連するスイッチング装置は、負荷としてのソレノイドに流れる負荷電流を検出し、マイコンから入力される制御目標値と負荷電流との偏差を小さくするようにスイッチング素子をＰＷＭ制御するソレノイド駆動装置である。 The switching device related to Japanese Patent Publication No. 2000-114039 detects a load current flowing in a solenoid as a load, and reduces a deviation between a control target value input from a microcomputer and the load current. Is a solenoid drive device that performs PWM control.
　このようなスイッチング装置は、負荷及びスイッチング装置の破壊を防止するために異常検知機能及び保護機能を備えることが知られている。異常検知機能は、負荷の過電流、過電圧又は過熱を検知するものであり、これらの異常状態を検知したときに保護機能を動作させる。保護機能は、スイッチング素子のＰＷＭ制御を停止させるものや、或いは予め設定された最小デューティ（オン幅）比率でＰＷＭ制御を行うものが知られている。 It is known that such a switching device has an abnormality detection function and a protection function in order to prevent damage to the load and the switching device. The abnormality detection function detects an overcurrent, overvoltage, or overheat of the load, and activates the protection function when detecting these abnormal states. As a protection function, there are known a function for stopping PWM control of a switching element or a function for performing PWM control at a preset minimum duty (on width) ratio.
　図１を用いて、関連するスイッチング装置の動作を説明する。図１は、関連するスイッチング装置の動作を示すフローチャートである。 The operation of the related switching device will be described with reference to FIG. FIG. 1 is a flowchart showing the operation of the related switching device.
　まず、ステップＳ１０１では、スイッチング装置は通常動作を行う。即ち、制御回路は、ソレノイドに電力を供給するためにスイッチング素子のＰＷＭ制御を行う。また、制御回路は、例えばソレノイドに流れる負荷電流を検出して、負荷電流が所望の大きさになるように駆動信号のデューティ（オン幅）比率を変調する。 First, in step S101, the switching device performs a normal operation. That is, the control circuit performs PWM control of the switching element to supply power to the solenoid. Further, the control circuit detects, for example, a load current flowing through the solenoid, and modulates the duty (on width) ratio of the drive signal so that the load current becomes a desired magnitude.
　ステップＳ１０２では、制御回路は、異常検知機能によってスイッチング装置が異常状態であるか否かを調べる。スイッチング装置が異常状態であれば、ステップＳ１０３において制御回路は、保護機能が働きＰＷＭ制御を停止させるか、或いは予め設定された最小デューティ比率でＰＷＭ制御を行う。一方、スイッチング装置が正常状態であれば、ステップＳ１０１において引き続き、スイッチング装置は通常動作を行う。 In step S102, the control circuit checks whether or not the switching device is in an abnormal state by the abnormality detection function. If the switching device is in an abnormal state, in step S103, the control circuit activates the protection function and stops PWM control or performs PWM control at a preset minimum duty ratio. On the other hand, if the switching device is in a normal state, the switching device continues normal operation in step S101.
　ステップＳ１０４では、制御回路は、異常検知機能によってスイッチング装置の異常状態が解除され正常状態に移行したか否かを調べる。スイッチング装置が正常状態であれば、ステップＳ１０５において保護機能が停止し、制御回路はＰＷＭ制御を再開する。一方、スイッチング装置が異常状態であれば、ステップＳ１０３において引き続き保護機能が働き、制御回路は異常状態に応じたＰＷＭ制御を行う。 In step S104, the control circuit checks whether the abnormal state of the switching device is canceled by the abnormality detection function and the normal state is entered. If the switching device is in a normal state, the protection function is stopped in step S105, and the control circuit restarts the PWM control. On the other hand, if the switching device is in an abnormal state, the protection function continues to operate in step S103, and the control circuit performs PWM control according to the abnormal state.
　ステップＳ１０６では、ステップＳ１０１と同様に、スイッチング装置は通常動作を行う。 In step S106, the switching device performs a normal operation as in step S101.
　このように、関連する異常検知機能及び保護機能を備えるスイッチング装置は、異常状態に応じてスイッチング素子を制御することにより、スイッチング装置及び負荷の破壊を防止する。 As described above, the switching device having the related abnormality detection function and protection function prevents the switching device and the load from being destroyed by controlling the switching element according to the abnormal state.
　ところで、関連するスイッチング装置は、図１のステップＳ１０５でスイッチング素子のＰＷＭ制御が再開してからステップＳ１０６の通常動作に至るまでの間、駆動信号のデューティ比率を最小から最適値まで徐々に変調するための調整時間を必要とする。 By the way, the related switching device gradually modulates the duty ratio of the drive signal from the minimum to the optimum value after the PWM control of the switching element is resumed in step S105 in FIG. 1 until the normal operation in step S106. Need adjustment time for.
　さらに、スイッチングノイズや外来ノイズにより制御回路が異常状態を誤検知した場合は、ＰＷＭ制御の停止時間は瞬時的であるにも関わらず、デューティ比率の調整時間が必要である。このため、関連するスイッチング装置は、異常時の動作から通常動作に復帰する際に負荷を安定に駆動できないという問題があった。 Furthermore, if the control circuit erroneously detects an abnormal state due to switching noise or external noise, the duty ratio adjustment time is required even though the PWM control stop time is instantaneous. For this reason, the related switching device has a problem that the load cannot be stably driven when returning from normal operation to normal operation.
　本発明は、上記課題を解決するためになされたものである。従って、本発明によれば、負荷を安定に駆動できるスイッチング装置を提供することができる。 The present invention has been made to solve the above problems. Therefore, according to this invention, the switching apparatus which can drive a load stably can be provided.
　本発明の技術的側面によれば、スイッチング素子と、前記スイッチング素子をＰＷＭ制御する制御回路と、を有し、前記スイッチング素子のスイッチング動作により入力電力を負荷に供給するスイッチング装置であって、前記制御回路が、前記ＰＷＭ制御のデューティ情報の保持とリセットとを周期的に繰り返し、前記スイッチング装置が異常状態になる直前と異常状態から正常状態に復帰した直後とにおいて、同一のデューティ情報に基づきスイッチング素子をＰＷＭ制御することを特徴とする。 According to a technical aspect of the present invention, there is provided a switching device that includes a switching element and a control circuit that performs PWM control of the switching element, and that supplies input power to a load by a switching operation of the switching element, The control circuit periodically repeats holding and resetting of the duty information of the PWM control, and switching is performed based on the same duty information immediately before the switching device becomes abnormal and immediately after returning from the abnormal state to the normal state. The device is characterized by PWM control.
　また、本発明の他の技術的側面によれば、スイッチング素子と、前記スイッチング素子を制御する制御回路とを有し、前記スイッチング素子のスイッチング動作により入力電圧を負荷に供給するスイッチング装置の制御方法であって、前記スイッチング装置が正常状態のとき前記スイッチング素子のデューティ情報を周期的に保持及びリセットし、前記スイッチング装置が異常状態のとき前記リセットを休止し、且つ、前記スイッチング装置が異常状態から正常状態に復帰した直後に保持した前記デューティ情報に基づいてスイッチング素子を制御することを特徴とする。 According to another technical aspect of the present invention, there is provided a switching device control method comprising a switching element and a control circuit for controlling the switching element, wherein an input voltage is supplied to a load by a switching operation of the switching element. The duty information of the switching element is periodically held and reset when the switching device is in a normal state, the reset is suspended when the switching device is in an abnormal state, and the switching device is out of the abnormal state. The switching element is controlled based on the duty information held immediately after returning to the normal state.
関連するスイッチング装置の動作を示すフローチャートである。It is a flowchart which shows operation | movement of a related switching apparatus. 本発明の実施形態に係るスイッチング装置の構成を示す回路構成図である。It is a circuit block diagram which shows the structure of the switching apparatus which concerns on embodiment of this invention. 本発明の実施形態に係るスイッチング装置の動作を示すフローチャートである。It is a flowchart which shows operation | movement of the switching apparatus which concerns on embodiment of this invention.
　次に、図面を参照して、本発明の実施の形態を説明する。以下の図面の記載において、同一又は類似の部分には同一又は類似の符号を付している。ただし、図面は模式的に表示したものである。 Next, an embodiment of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are shown schematically.
　図２を用いて、本発明の実施形態に係るスイッチング装置１００の構成について説明する。本実施形態における異常状態とは、スイッチングノイズや外来ノイズにより制御回路が異常状態を誤検知した場合も含むこととする。 The configuration of the switching device 100 according to the embodiment of the present invention will be described with reference to FIG. The abnormal state in the present embodiment includes a case where the control circuit erroneously detects the abnormal state due to switching noise or external noise.
　図２に示す本実施形態に係るスイッチング装置１００は、負荷としてのソレノイド６とバッテリ１との間を開閉するスイッチング素子２と、ソレノイド６に流れる負荷電流を検出する電流検出手段（電力検出手段）３と、保護機能を有し電流検出手段３の出力とマイコン７から入力される制御目標値とに応じてスイッチング素子２をＰＷＭ制御する駆動手段４と、スイッチング装置１００の異常状態を検知する異常検知手段５と、を備える。電流検出手段３と駆動手段４と異常検知手段５とは、制御回路８を構成する。 A switching device 100 according to the present embodiment shown in FIG. 2 includes a switching element 2 that opens and closes between a solenoid 6 as a load and a battery 1, and current detection means (power detection means) that detects a load current flowing through the solenoid 6. 3, a drive unit 4 having a protection function and PWM-controlling the switching element 2 in accordance with an output of the current detection unit 3 and a control target value input from the microcomputer 7, and an abnormality detecting an abnormal state of the switching device 100 Detecting means 5. The current detection means 3, the drive means 4, and the abnormality detection means 5 constitute a control circuit 8.
　直流電圧出力手段としてのバッテリ１は、充電式電池から成り、直流電圧をスイッチング素子２のドレイン端子及び制御回路８の各部に出力する。なお、バッテリ１に代わり、商用電源を整流して直流電圧を出力するように構成した回路を設けても良い。 The battery 1 as a DC voltage output means is composed of a rechargeable battery, and outputs a DC voltage to the drain terminal of the switching element 2 and each part of the control circuit 8. Instead of the battery 1, a circuit configured to output a DC voltage by rectifying the commercial power supply may be provided.
　スイッチング素子２は、ＭＯＳＦＥＴから成り、ドレイン端子がバッテリ１に接続され、制御回路８からゲート端子に入力されるゲート駆動信号に応じて、ソース端子から電流検出手段３を介してソレノイド６に断続的に直流電圧を出力する。なお、スイッチング素子２として、バイポーラトランジスタやＩＧＢＴ（絶縁ゲートバイポーラトランジスタ）などを用いることができる。 The switching element 2 is composed of a MOSFET, the drain terminal is connected to the battery 1, and intermittently from the source terminal to the solenoid 6 via the current detection means 3 in response to a gate drive signal input from the control circuit 8 to the gate terminal. DC voltage is output to. As the switching element 2, a bipolar transistor, IGBT (insulated gate bipolar transistor), or the like can be used.
　電流検出手段３は、電流検出抵抗３１と、電流検出アンプ３２と、を備える。電流検出抵抗３１の一端は、スイッチング素子２のソース端子と電流検出アンプ３２非反転入力端子と回生ダイオード９のカソードとに接続され、他端は、ソレノイド６の一端と電流検出アンプ３２の反転入力端子とに接続される。電流検出抵抗３１は、ソレノイド６に流れる負荷電流を検出し、電圧信号に変換して電流検出アンプ３２に出力する。電流検出アンプ３２は、反転入力端子と非反転入力端子とに入力される電圧信号を増幅し、検出信号として駆動手段４の第１の入力端子に出力する。 The current detection means 3 includes a current detection resistor 31 and a current detection amplifier 32. One end of the current detection resistor 31 is connected to the source terminal of the switching element 2, the current detection amplifier 32 non-inverting input terminal, and the cathode of the regenerative diode 9, and the other end is one end of the solenoid 6 and the inverting input of the current detection amplifier 32. Connected to the terminal. The current detection resistor 31 detects the load current flowing through the solenoid 6, converts it into a voltage signal, and outputs it to the current detection amplifier 32. The current detection amplifier 32 amplifies the voltage signal input to the inverting input terminal and the non-inverting input terminal, and outputs the amplified voltage signal to the first input terminal of the driving unit 4 as a detection signal.
　駆動手段４は、保護機能を有する演算回路４１と、ドライバ回路４２と、を備える。演算回路４１は、マイコン７から入力されるクロック信号に同期して、電流検出手段３から第１の入力端子に入力される検出信号とマイコン７から第２の入力端子に入力される制御目標値とから、ゲート駆動信号のデューティ（オン幅）比率を演算し、演算結果に基づくＰＷＭ信号をドライバ回路４２に出力する。演算回路４１の第３乃至第５の入力端子は異常検知手段５の出力端子に接続され、出力端子はドライバ回路４２に接続される。ドライバ回路４２は、図示しないチャージポンプ回路により昇圧された直流電圧が印加され、演算回路４１の出力をゲート駆動信号としてスイッチング素子２のゲート端子に出力する。 The driving unit 4 includes an arithmetic circuit 41 having a protection function and a driver circuit 42. The arithmetic circuit 41 synchronizes with the clock signal input from the microcomputer 7, and the detection signal input from the current detection means 3 to the first input terminal and the control target value input from the microcomputer 7 to the second input terminal. Then, the duty (on width) ratio of the gate drive signal is calculated, and a PWM signal based on the calculation result is output to the driver circuit 42. The third to fifth input terminals of the arithmetic circuit 41 are connected to the output terminal of the abnormality detection means 5, and the output terminal is connected to the driver circuit 42. The driver circuit 42 is applied with a DC voltage boosted by a charge pump circuit (not shown), and outputs the output of the arithmetic circuit 41 to the gate terminal of the switching element 2 as a gate drive signal.
　演算回路４１は、例えばデジタル回路で構成され、ＰＷＭ信号のデューティ情報（演算結果）の保持及びリセットを周期的に繰り返し、異常検知手段５の出力に応じてリセットを休止する保持手段及びリセット手段（図示せず）を有する。スイッチング装置１００が正常状態にあるとき、演算回路４１は、保持手段及びリセット手段により、マイコン７から入力されるクロック信号に同期して、デューティ情報のリセットと保持とを周期的に行う。一方、スイッチング装置１００が異常状態にあるとき、保持手段は異常状態になる直前のデューティ情報を保持し、リセット手段はリセット動作を休止する。即ち、スイッチング装置１００の異常時におけるデューティ情報（演算結果）は、電流検出手段３の検出信号とマイコン７の制御目標値とに影響されず一定となる。また、このとき演算回路４１は、保護機能が働きＰＷＭ信号の出力を停止するか、或いは予め設定された最小のデューティ比率となるＰＷＭ信号をドライバ回路４２に出力する。 The arithmetic circuit 41 is composed of, for example, a digital circuit, periodically holds and resets duty information (calculation result) of the PWM signal, and holds and resets the resetting unit (pauses the reset according to the output of the abnormality detecting unit 5 (Not shown). When the switching device 100 is in the normal state, the arithmetic circuit 41 periodically resets and holds the duty information in synchronization with the clock signal input from the microcomputer 7 by the holding means and the reset means. On the other hand, when the switching device 100 is in an abnormal state, the holding unit holds the duty information immediately before the abnormal state is entered, and the reset unit pauses the reset operation. That is, the duty information (calculation result) when the switching device 100 is abnormal is constant without being influenced by the detection signal of the current detection means 3 and the control target value of the microcomputer 7. At this time, the arithmetic circuit 41 stops the output of the PWM signal due to the protection function, or outputs a PWM signal having a preset minimum duty ratio to the driver circuit 42.
　異常検知手段５は、バッテリ１から直流電圧が供給され、スイッチング装置１００の異常状態を検知すると、異常状態に応じた異常信号を演算回路４１の第３乃至第５の入力端子に出力する。本実施形態に係る異常検知手段５は、スイッチング装置１００及びソレノイド６の破壊を防止するため、過電流検知機能ＯＣＰ（Ｏｖｅｒ　Ｃｕｒｒｅｎｔ　Ｐｒｏｔｅｃｔｉｏｎ）、過電圧検知機能ＯＶＰ（Ｏｖｅｒ　Ｖｏｌｔａｇｅ　Ｐｒｏｔｅｃｔｉｏｎ）及び過熱検知機能ＴＳＤ（Ｔｈｅｒｍａｌ　Ｓｈｕｔ－Ｄｏｗｎ）を有する。例えば、過電流検知機能は電流検出手段３に接続され、電流検出手段３の検出信号の値が所定値よりも大きいときに過電流異常と判断して、異常信号を演算回路４１の第３の入力端子に出力する。また、過電圧検知機能は、図示しない電圧検出手段に接続され、電圧検出手段の検出信号の値に応じて異常信号を演算回路４１の第４の入力端子に出力する。また、過熱検知機能は、スイッチング素子２又は制御回路８の温度に応じて異常信号を演算回路４１の第５の入力端子に出力する。異常検知手段５の各検知機能は、周知の比較回路、基準電圧及び感温素子等の組み合わせで構成される。これらの異常信号が演算回路４１に入力されると、上述のように、演算回路４１はデューティ情報のリセットを休止するとともに保護機能を動作させる。 When the DC voltage is supplied from the battery 1 and the abnormal state of the switching device 100 is detected, the abnormality detecting unit 5 outputs an abnormal signal corresponding to the abnormal state to the third to fifth input terminals of the arithmetic circuit 41. The abnormality detection means 5 according to the present embodiment is provided with an overcurrent detection function OCP (Over Current Protection), an overvoltage detection function OVP (Over Voltage Protection), and an overheat detection function TSD (in order to prevent the switching device 100 and the solenoid 6 from being destroyed. Thermal Shut-Down). For example, the overcurrent detection function is connected to the current detection unit 3, and when the value of the detection signal of the current detection unit 3 is larger than a predetermined value, it is determined that the overcurrent is abnormal, and the abnormal signal is output to the third circuit Output to the input terminal. The overvoltage detection function is connected to voltage detection means (not shown) and outputs an abnormal signal to the fourth input terminal of the arithmetic circuit 41 in accordance with the value of the detection signal of the voltage detection means. The overheat detection function outputs an abnormal signal to the fifth input terminal of the arithmetic circuit 41 according to the temperature of the switching element 2 or the control circuit 8. Each detection function of the abnormality detection means 5 is configured by a combination of a known comparison circuit, a reference voltage, a temperature sensitive element, and the like. When these abnormal signals are input to the arithmetic circuit 41, as described above, the arithmetic circuit 41 pauses resetting of the duty information and operates the protection function.
　ソレノイド６は、その一端が電流検出抵抗３１の他端に接続され、他端はグランドに接続される。ソレノイド６は、負荷電流の大きさに応じて所定の変位量を得ることができるアクチュエータである。 The solenoid 6 has one end connected to the other end of the current detection resistor 31 and the other end connected to the ground. The solenoid 6 is an actuator that can obtain a predetermined amount of displacement according to the magnitude of the load current.
　マイコン７は、駆動手段４に制御目標値及び制御クロック信号を出力する。回生ダイオード９は、アノードがグランドに接続され、カソードが電流検出抵抗３１を介してソレノイド６の一端に接続される。 The microcomputer 7 outputs a control target value and a control clock signal to the driving means 4. The regenerative diode 9 has an anode connected to the ground and a cathode connected to one end of the solenoid 6 via the current detection resistor 31.
　次に、図３を用いて、本実施形態に係るスイッチング装置１００の動作について説明する。図３は、図２に示す本発明に係るスイッチング装置１００の動作を示すフローチャートである。 Next, the operation of the switching device 100 according to the present embodiment will be described with reference to FIG. FIG. 3 is a flowchart showing the operation of the switching device 100 according to the present invention shown in FIG.
　まず、ステップＳ１では、スイッチング装置１００は通常動作を行う。即ち、バッテリ１の直流電圧が制御回路８に印加されると、駆動手段４は、通常動作として、ソレノイド６に電力を供給するためにスイッチング素子２のＰＷＭ制御を開始し、Ｈ（高）レベルとＬ（低）レベルとを交互に繰り返すパルス信号であるゲート駆動信号を出力する。また、演算回路４１が、電流検出手段３の検出信号をマイコン７の制御目標値に近づけるようにゲート駆動信号のデューティ（オン幅）比率を変調する。 First, in step S1, the switching device 100 performs a normal operation. That is, when the DC voltage of the battery 1 is applied to the control circuit 8, the driving means 4 starts PWM control of the switching element 2 to supply power to the solenoid 6 as a normal operation, and the H (high) level. And a gate drive signal that is a pulse signal that alternately repeats the L (low) level. Further, the arithmetic circuit 41 modulates the duty (on width) ratio of the gate drive signal so that the detection signal of the current detection means 3 approaches the control target value of the microcomputer 7.
　ステップＳ２では、演算回路４１の保持手段及びリセット手段は、マイコン７から入力されるクロック信号に同期して、デューティ情報（演算結果）のリセットと保持とを周期的に繰り返す。 In step S2, the holding means and reset means of the arithmetic circuit 41 periodically repeat resetting and holding duty information (calculation results) in synchronization with the clock signal input from the microcomputer 7.
　ステップＳ３では、異常検知手段５は、スイッチング装置１００及びソレノイド６が異常状態であるか否かを調べる。スイッチング装置１００及びソレノイド６が正常状態であれば、ステップＳ２において引き続き、スイッチング装置１００は通常動作を行う。一方、スイッチング装置１００及びソレノイド６が異常状態であれば、ステップＳ４において、異常検知手段５の異常信号に応じて演算回路４１はデューティ情報のリセットを休止する。詳細には演算回路４１の保持手段は、異常状態となる直前のデューティ情報を保持する。さらにこのとき、ステップＳ５において駆動手段４は、異常検知手段５の異常信号に応じてスイッチング素子２のＰＷＭ制御を行う。より詳細には、過電圧（ＯＶＰ）及び過熱（ＴＳＤ）の異常信号が演算回路４１に入力されたときは、演算回路４１はＰＷＭ信号の出力を停止し、駆動手段４はスイッチング素子２のＰＷＭ制御を停止する。また、過電流（ＯＣＰ）の異常信号が演算回路４１に入力されたときは、演算回路４１は予め設定された最小のデューティ比率となるＰＷＭ信号をドライバ回路４２に出力し、駆動手段４はスイッチング素子２をＰＷＭ制御する。 In step S3, the abnormality detection means 5 checks whether the switching device 100 and the solenoid 6 are in an abnormal state. If the switching device 100 and the solenoid 6 are in the normal state, the switching device 100 continues normal operation in step S2. On the other hand, if the switching device 100 and the solenoid 6 are in an abnormal state, the arithmetic circuit 41 stops resetting the duty information in accordance with the abnormal signal from the abnormality detecting means 5 in step S4. Specifically, the holding means of the arithmetic circuit 41 holds the duty information immediately before becoming an abnormal state. Further, at this time, in step S <b> 5, the drive unit 4 performs PWM control of the switching element 2 in accordance with the abnormality signal from the abnormality detection unit 5. More specifically, when an abnormal signal of overvoltage (OVP) and overheat (TSD) is input to the arithmetic circuit 41, the arithmetic circuit 41 stops outputting the PWM signal, and the driving means 4 performs PWM control of the switching element 2. To stop. When an overcurrent (OCP) abnormality signal is input to the arithmetic circuit 41, the arithmetic circuit 41 outputs a PWM signal having a preset minimum duty ratio to the driver circuit 42, and the driving means 4 performs switching. The element 2 is PWM-controlled.
　ステップＳ６では、異常検知手段５は、スイッチング装置１００及びソレノイド６の異常状態が解除されたか否かを調べる。スイッチング装置１００及びソレノイド６が正常状態であれば、ステップＳ７において制御回路８は、保持手段が保持しているデューティ情報に基づきＰＷＭ制御を再開する。このとき、制御回路８は、スイッチング装置１００及びソレノイド６が異常状態になる直前と等しい値から最適値まで徐々にゲート駆動信号のデューティ比率を変調する。さらにステップＳ８において演算回路４１は、ステップＳ２と同様にデューティ情報（演算結果）のリセットと保持とを周期的に繰り返す。一方、スイッチング装置１００及びソレノイド６が異常状態であれば、ステップＳ５において継続して駆動手段４が異常検知手段５の異常信号に応じてスイッチング素子２のＰＷＭ制御を行う。 In step S6, the abnormality detection means 5 checks whether or not the abnormal state of the switching device 100 and the solenoid 6 has been released. If switching device 100 and solenoid 6 are in a normal state, in step S7, control circuit 8 resumes PWM control based on the duty information held by the holding means. At this time, the control circuit 8 gradually modulates the duty ratio of the gate drive signal from a value equal to that immediately before the switching device 100 and the solenoid 6 become abnormal to an optimum value. Further, in step S8, the arithmetic circuit 41 periodically repeats resetting and holding of the duty information (calculation result) as in step S2. On the other hand, if the switching device 100 and the solenoid 6 are in an abnormal state, in step S5, the drive unit 4 performs PWM control of the switching element 2 in accordance with the abnormal signal from the abnormality detection unit 5.
　ステップＳ９では、ステップＳ１と同様に、スイッチング装置１００は通常動作を行う。 In step S9, as in step S1, the switching device 100 performs a normal operation.
　本発明の実施形態に係るスイッチング装置１００は、このような動作により、スイッチング装置１００及びソレノイド６の破壊を防止するとともに、スイッチング装置１００及びソレノイド６が異常状態から正常状態に復帰した直後、異常状態となる直前のデューティ（オン幅）比率でＰＷＭ制御を再開させることができる。 The switching device 100 according to the embodiment of the present invention prevents the switching device 100 and the solenoid 6 from being destroyed by such an operation, and immediately after the switching device 100 and the solenoid 6 return from the abnormal state to the normal state, the abnormal state The PWM control can be restarted at the duty (on width) ratio immediately before.
　本実施形態に係るスイッチング装置１００は、以下の効果を有する。 The switching device 100 according to the present embodiment has the following effects.
（ｉ）異常検知手段５がスイッチング装置１００及びソレノイド６の異常状態を検知し、駆動手段４が異常信号に応じてスイッチング素子２のＰＷＭ制御を行うため、スイッチング装置１００及びソレノイド６の破壊を防止することができる。 (I) Since the abnormality detection unit 5 detects an abnormal state of the switching device 100 and the solenoid 6 and the driving unit 4 performs PWM control of the switching element 2 according to the abnormality signal, the switching device 100 and the solenoid 6 are prevented from being destroyed. can do.
（ｉｉ）最小デューティ比率でＰＷＭ制御を再開する場合に比べ、異常状態から正常状態への復帰時におけるデューティ比率の調整時間を短縮し、通常動作へ素早く移行することができる。 (Ii) Compared with the case where PWM control is restarted at the minimum duty ratio, the duty ratio adjustment time when returning from the abnormal state to the normal state can be shortened, and the normal operation can be quickly performed.
（ｉｉｉ）ノイズにより制御回路８が異常状態を誤検知した場合、デューティ比率の変動が非常に小さいため、デューティ比率の調整時間が殆ど発生しない。従って、ノイズによる制御精度の低下を防止することができる。 (Iii) When the control circuit 8 erroneously detects an abnormal state due to noise, the duty ratio fluctuation is very small, and therefore the duty ratio adjustment time hardly occurs. Accordingly, it is possible to prevent a decrease in control accuracy due to noise.
　以上、本発明の実施形態の一例について説明したが、本発明は係る特定の実施形態に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形、変更が可能である。例えば、本発明は、ソレノイド以外を負荷とするスイッチング装置、或いは負荷電圧を検出して制御するスイッチング装置に適用することができる。 Although an example of the embodiment of the present invention has been described above, the present invention is not limited to the specific embodiment, and various modifications can be made within the scope of the gist of the present invention described in the claims. Can be changed. For example, the present invention can be applied to a switching device using a load other than a solenoid, or a switching device that detects and controls a load voltage.
発明の効果
　上述の通り、本発明に係るスイッチング装置及びその制御方法によれば、負荷を安定に制御できるスイッチング装置を提供することができる。 As described above, according to the switching device and the control method thereof according to the present invention, a switching device capable of stably controlling a load can be provided.
（米国指定）
　本国際特許出願は米国指定に関し、２００９年５月２７日に出願された日本国特許出願第２００９－１２７６９４号（２００９年５月２７日出願）について米国特許法第１１９条（ａ）に基づく優先権の利益を援用し、当該開示内容を引用する。 (US designation)
This international patent application is related to the designation of the United States, and Japanese Patent Application No. 2009-127694 (filed on May 27, 2009) filed on May 27, 2009 has priority over US Patent Act 119 (a). Incorporate the interests of the right and cite the disclosure.

Claims (7)

  1. 　スイッチング素子と、
    　前記スイッチング素子をＰＷＭ制御する制御回路とを有し、
    　前記スイッチング素子のスイッチング動作により入力電力を負荷に供給するスイッチング装置であって、
    　前記制御回路が、
    　　前記ＰＷＭ制御のデューティ情報の保持とリセットとを周期的に繰り返し、
    　　前記スイッチング装置が異常状態になる直前と異常状態から正常状態に復帰した直後とにおいて、同一のデューティ情報に基づきスイッチング素子をＰＷＭ制御することを特徴とするスイッチング装置。     A switching element;
    A control circuit for PWM controlling the switching element,
    A switching device for supplying input power to a load by a switching operation of the switching element,
    The control circuit comprises:
    Holding and resetting the duty information of the PWM control periodically and repeatedly,
    A switching device that performs PWM control of a switching element based on the same duty information immediately before the switching device becomes an abnormal state and immediately after the abnormal state returns to a normal state.
  2. 　前記異常状態において、前記制御回路が、前記デューティ情報のリセットを休止することを特徴とする請求項１記載のスイッチング装置。 The switching device according to claim 1, wherein the control circuit pauses resetting of the duty information in the abnormal state.
  3. 　前記制御回路が、
    　　前記デューティ情報を周期的に保持する保持手段と、
    　　前記保持手段が保持する前記デューティ情報を周期的にリセットするリセット手段と、
    　　前記スイッチング装置の異常状態を検知する異常検知手段と、
    　を備え、
    　前記制御回路が、前記スイッチング装置が前記異常状態から正常状態に復帰した直後に、前記保持手段が保持する前記デューティ情報に基づいてスイッチング素子をＰＷＭ制御することを特徴とする請求項１又は２記載のスイッチング装置。     The control circuit comprises:
    Holding means for periodically holding the duty information;
    Reset means for periodically resetting the duty information held by the holding means;
    An abnormality detection means for detecting an abnormal state of the switching device;
    With
    3. The control circuit according to claim 1, wherein the control circuit performs PWM control of the switching element based on the duty information held by the holding unit immediately after the switching device returns from the abnormal state to a normal state. Switching device.
  4. 　前記負荷がソレノイドであることを特徴とする請求項１又は２記載のスイッチング装置。 3. The switching device according to claim 1, wherein the load is a solenoid.
  5. 　前記制御回路が、前記負荷に流れる電流を制御するために電流検出手段を備えることを特徴とする請求項１又は２記載のスイッチング装置。 3. The switching device according to claim 1, wherein the control circuit includes a current detection means for controlling a current flowing through the load.
  6. 　前記入力電圧が、バッテリから入力される直流電圧であることを特徴とする請求項１又は２記載のスイッチング装置。 The switching device according to claim 1 or 2, wherein the input voltage is a DC voltage input from a battery.
  7. 　スイッチング素子と、前記スイッチング素子を制御する制御回路とを有し、前記スイッチング素子のスイッチング動作により入力電圧を負荷に供給するスイッチング装置の制御方法であって、
    　前記スイッチング装置が正常状態のとき前記スイッチング素子のデューティ情報を周期的に保持及びリセットし、
    　前記スイッチング装置が異常状態のとき前記リセットを休止し、および
    　前記スイッチング装置が異常状態から正常状態に復帰した直後に保持した前記デューティ情報に基づいてスイッチング素子を制御することを特徴とするスイッチング装置の制御方法。     A switching device and a control circuit for controlling the switching element, and a switching device control method for supplying an input voltage to a load by a switching operation of the switching element,
    When the switching device is in a normal state, the duty information of the switching element is periodically held and reset,
    The switching device is characterized in that the reset is suspended when the switching device is in an abnormal state, and the switching element is controlled based on the duty information held immediately after the switching device returns from the abnormal state to the normal state. Control method.
PCT/JP2010/054948 2009-05-27 2010-03-23 Switching apparatus and control method thereof WO2010137394A1 (en)

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JP6203326B1 (en) * 2016-04-22 2017-09-27 三菱電機株式会社 AC rotating machine control device

Citations (4)

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JPH0338109A (en) * 1989-07-05 1991-02-19 Canon Inc Pwm controller
JP2000114039A (en) * 1998-09-29 2000-04-21 Denso Corp Device for detecting failure in linear solenoid
JP2000346968A (en) * 1999-06-07 2000-12-15 Japan Atom Energy Res Inst Acceleration power source device
JP2006246653A (en) * 2005-03-04 2006-09-14 Toyota Motor Corp Voltage converter system, motor drive unit, and control method of voltage converter

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JPH02176901A (en) * 1988-12-28 1990-07-10 Toyota Motor Corp Electric conduction controller for load
JP5033401B2 (en) * 2006-11-21 2012-09-26 日立オートモティブシステムズ株式会社 Solenoid drive

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Publication number Priority date Publication date Assignee Title
JPH0338109A (en) * 1989-07-05 1991-02-19 Canon Inc Pwm controller
JP2000114039A (en) * 1998-09-29 2000-04-21 Denso Corp Device for detecting failure in linear solenoid
JP2000346968A (en) * 1999-06-07 2000-12-15 Japan Atom Energy Res Inst Acceleration power source device
JP2006246653A (en) * 2005-03-04 2006-09-14 Toyota Motor Corp Voltage converter system, motor drive unit, and control method of voltage converter

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