WO2010126302A3 - Semiconductor package with nsmd type solder mask and method for manufacturing the same - Google Patents

Semiconductor package with nsmd type solder mask and method for manufacturing the same Download PDF

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Publication number
WO2010126302A3
WO2010126302A3 PCT/KR2010/002683 KR2010002683W WO2010126302A3 WO 2010126302 A3 WO2010126302 A3 WO 2010126302A3 KR 2010002683 W KR2010002683 W KR 2010002683W WO 2010126302 A3 WO2010126302 A3 WO 2010126302A3
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WO
WIPO (PCT)
Prior art keywords
solder mask
semiconductor package
manufacturing
same
type solder
Prior art date
Application number
PCT/KR2010/002683
Other languages
French (fr)
Other versions
WO2010126302A2 (en
Inventor
Seong Bo Shim
Young Jae Lee
Sung Wuk Ryu
Original Assignee
Lg Innotek Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Innotek Co., Ltd. filed Critical Lg Innotek Co., Ltd.
Publication of WO2010126302A2 publication Critical patent/WO2010126302A2/en
Publication of WO2010126302A3 publication Critical patent/WO2010126302A3/en

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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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Abstract

A method for manufacturing semiconductor package comprising: a first step of forming a solder mask formed with an opening on an insulation substrate; and a second step of firmly adhering a solder paste and a metal ball on the solder mask to mount chips thereon, such that a circuit density of a substrate can be greatly increased by directly printing a solder paste on a solder mask following formation of an opening of the solder mask on a trace and can be applied to a fine bump pitch of less than 100μm due to non-existence of bump bridges.
PCT/KR2010/002683 2009-04-30 2010-04-28 Semiconductor package with nsmd type solder mask and method for manufacturing the same WO2010126302A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2009-0038392 2009-04-30
KR1020090038392A KR101211724B1 (en) 2009-04-30 2009-04-30 Semiconductor package with nsmd type solder mask and method for manufacturing the same

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WO2010126302A2 WO2010126302A2 (en) 2010-11-04
WO2010126302A3 true WO2010126302A3 (en) 2010-12-29

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KR101493340B1 (en) * 2011-03-29 2015-02-16 파나소닉 주식회사 Solder transfer base, method for producing solder transfer base, and method for transferring solder
DE102012111358A1 (en) * 2012-11-23 2014-05-28 Osram Opto Semiconductors Gmbh Method for separating a composite into semiconductor chips and semiconductor chip
CN105093853B (en) * 2015-09-02 2017-06-23 广东海圣科技有限公司 Automatic anti-welding exposure desk frame module and exposure machine
KR101800367B1 (en) * 2016-08-24 2017-11-28 한국기계연구원 Method of transferring a micro-device and Micro-device substrate manufactured by the same
KR102094014B1 (en) 2018-09-20 2020-03-27 주식회사 지엔테크 Soldering apparatus for PCB and process method

Citations (3)

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US20050023679A1 (en) * 2003-08-01 2005-02-03 Advanced Semiconductor Engineering, Inc. Substrate with reinforced contact pad structure
US20080023829A1 (en) * 2006-07-31 2008-01-31 Promax Technology (Hong Kong) Limited Substrate and process for semiconductor flip chip package
KR100834486B1 (en) * 2003-11-21 2008-06-02 미쓰이 긴조꾸 고교 가부시키가이샤 Printed wiring board for mounting electronic components, and production process thereof and semiconductor device

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KR100336575B1 (en) * 2000-06-28 2002-05-16 박종섭 Solder ball of semiconductor package and method of fabricating the same
TWI307547B (en) * 2003-06-11 2009-03-11 Phoenix Prec Technology Corp Method for fabricating substrate with plated metal layer over pads thereon
TWI295550B (en) * 2005-12-20 2008-04-01 Phoenix Prec Technology Corp Structure of circuit board and method for fabricating the same
TWI375307B (en) * 2007-07-26 2012-10-21 Flip chip package structure and method for manufacturing the same

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
US20050023679A1 (en) * 2003-08-01 2005-02-03 Advanced Semiconductor Engineering, Inc. Substrate with reinforced contact pad structure
KR100834486B1 (en) * 2003-11-21 2008-06-02 미쓰이 긴조꾸 고교 가부시키가이샤 Printed wiring board for mounting electronic components, and production process thereof and semiconductor device
US20080023829A1 (en) * 2006-07-31 2008-01-31 Promax Technology (Hong Kong) Limited Substrate and process for semiconductor flip chip package

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KR101211724B1 (en) 2012-12-12
TWI406342B (en) 2013-08-21
KR20100119328A (en) 2010-11-09
WO2010126302A2 (en) 2010-11-04
TW201104767A (en) 2011-02-01

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