WO2010110315A1 - Transmission line - Google Patents

Transmission line Download PDF

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Publication number
WO2010110315A1
WO2010110315A1 PCT/JP2010/055081 JP2010055081W WO2010110315A1 WO 2010110315 A1 WO2010110315 A1 WO 2010110315A1 JP 2010055081 W JP2010055081 W JP 2010055081W WO 2010110315 A1 WO2010110315 A1 WO 2010110315A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal wiring
wiring
dielectric substrate
transmission line
recess
Prior art date
Application number
PCT/JP2010/055081
Other languages
French (fr)
Japanese (ja)
Inventor
健雄 白井
嘉城 早崎
健 橋本
浩司 横山
太 西村
敦 諏訪
雅和 足立
成正 岩本
孝明 吉原
徹 馬場
Original Assignee
パナソニック電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2009071796A external-priority patent/JP2010225431A/en
Priority claimed from JP2009071797A external-priority patent/JP2010226450A/en
Application filed by パナソニック電工株式会社 filed Critical パナソニック電工株式会社
Publication of WO2010110315A1 publication Critical patent/WO2010110315A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H50/00Details of electromagnetic relays
    • H01H50/005Details of electromagnetic relays using micromechanics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/003Coplanar lines
    • H01P3/006Conductor backed coplanar waveguides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H51/00Electromagnetic relays
    • H01H51/22Polarised relays
    • H01H51/2272Polarised relays comprising rockable armature, rocking movement around central axis parallel to the main plane of the armature
    • H01H51/2281Contacts rigidly combined with armature

Definitions

  • the present invention relates to a transmission line for transmitting a high frequency.
  • the transmission line includes a dielectric substrate and signal wiring.
  • the dielectric substrate is formed in a substantially plate shape.
  • the dielectric substrate has a first surface, and a signal wiring made of a linear conductor foil is formed on the first surface.
  • the dielectric substrate has a second surface located on the opposite side of the first surface.
  • the dielectric substrate has a ground plane on the second surface.
  • the dielectric substrate has a groove formed in a part thereof. This groove makes the distance between the signal wiring and the ground plane smaller than the thickness of the dielectric substrate.
  • This groove is formed on the second surface of the dielectric substrate.
  • the first surface on which the signal wiring is formed is a flat surface. The groove shortens the distance between the signal wiring and the ground plane, thereby adjusting the impedance of the microstrip line.
  • a coplanar waveguide (coplanar wave guide) is known in addition to a microstrip line.
  • the coplanar waveguide is composed of a substrate, a first conductor film, and a second conductor film.
  • the first conductor film is provided on the upper surface of the substrate.
  • the first conductor film has a slit-shaped opening.
  • the second conductor film is provided on the upper surface of the substrate so as to be positioned inside the slit-shaped opening.
  • the second conductor film is electrically insulated from the first conductor film.
  • the coplanar waveguide transmits electromagnetic waves by an electric field in a direction from the signal wiring toward the first conductor films on both sides, a magnetic field in a direction surrounding the signal line inside the substrate, and a direction along the transmission direction outside the substrate.
  • the technology for adjusting the impedance of the microstrip line by forming a groove on the second surface of the dielectric substrate disclosed in Patent Document 1 can also be applied to this coplanar waveguide.
  • the electric field in the direction from the signal wiring toward the first conductor films on both sides includes an electric field penetrating the inside of the dielectric substrate and an electric field passing through the air layer above the dielectric substrate.
  • the first surface of the dielectric substrate is a flat surface. Therefore, the ratio of the electric field passing through the air layer of information on the dielectric substrate to the electric field penetrating the inside of the dielectric substrate does not increase.
  • dielectric loss tangent of dielectric substrates such as glass and silicon is larger than the dielectric loss tangent of the air layer. Therefore, the dielectric substrate has a greater loss of electrical energy (hereinafter referred to as “dielectric loss”) than the air layer.
  • dielectric loss tangent (tangent delta) is a numerical value representing the degree of dielectric loss in the capacitor formed by the signal wiring and the ground plane.
  • the dielectric loss cannot be reduced in the coplanar waveguide in which the groove is formed on the second surface of the dielectric substrate.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a transmission line having a small dielectric loss and excellent transmission characteristics.
  • the dielectric substrate having a dielectric substrate and a signal wiring has a first surface and a second surface, and the second surface is the first surface.
  • the dielectric substrate has a first region on the first surface, and the dielectric substrate is provided with a back electrode on the second surface.
  • the signal wiring is configured to transmit a signal, has a length and a width, has a first end at one end in the length direction, and the first end is The first region is disposed in a first region, the first end is electrically connected to the back electrode, and the first region overlaps the back electrode in the thickness direction of the dielectric substrate.
  • a transmission line having a small dielectric loss and excellent transmission characteristics can be obtained.
  • the dielectric substrate has a first recess formed in the first region, the first recess has a first inner surface, and one end of the signal wiring is disposed on the first inner surface. It is preferable.
  • the first inner surface includes a bottom surface, the first end of the signal wiring is disposed on the bottom surface, and the dielectric substrate is provided with a surface ground electrode on the first surface, The front surface ground electrode is electrically insulated from the signal wiring, and the dielectric substrate is provided with a rear surface ground electrode on the second surface, and the rear surface ground electrode is electrically connected to the signal wiring. Is preferably electrically insulated.
  • a first recess is formed on the first surface of the dielectric substrate.
  • the signal wiring is disposed on the bottom surface of the first recess. Therefore, the distance between the signal wiring and the back surface ground electrode can be shortened as compared with the transmission line in which the signal wiring is arranged on the first surface. In this case, a transmission line having a desired impedance is obtained.
  • the signal wiring is disposed on the bottom surface of the first recess.
  • an electric flux is formed between the signal wiring and the surface ground electrode. This electric flux is divided into an electric flux passing through the inside of the dielectric substrate and an electric flux passing through the air layer. This configuration can increase the electric flux passing through the air layer more than the electric flux passing through the inside of the dielectric substrate.
  • the air layer has less dielectric loss than the dielectric substrate. As a result, dielectric loss can be reduced.
  • the first recess has a length along the first surface, and a bottom surface of the first inner surface has a length along a length direction of the first recess, and the signal All of the wiring is preferably arranged on the bottom surface.
  • the dielectric substrate has a second recess formed on the second surface thereof, and the second recess is formed to overlap the first recess in the thickness direction of the dielectric substrate, It is preferable that the second recess has a second inner surface, and the back ground electrode is formed on the second surface and the second inner surface.
  • the periphery of the second recess is aligned with the periphery of the first recess in the thickness direction of the dielectric substrate.
  • the first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface. It is preferable that a part of one end is provided on the inclined surface.
  • the inclined surface of the first recess intersects the first surface at an acute angle.
  • a part of one end of the signal wiring is disposed on the inclined surface. Accordingly, the through via can be shortened as compared with the case where the signal wiring is electrically connected to the back electrode via the through via embedded in the through hole penetrating from the first surface to the second surface. Therefore, impedance mismatch due to the through via is suppressed. As a result, a transmission line with high frequency transmission characteristics can be obtained.
  • the recess has an inner diameter, and the inner diameter is formed so as to decrease from the first surface to the second surface of the dielectric substrate, whereby the recess has the inclined surface. It is preferable.
  • the first inner surface further has a bottom surface, and the dielectric substrate is provided with a through wiring penetrating from the second surface to the bottom surface, and the through wiring is electrically connected to the back electrode. It is preferable that one end of the signal wiring is disposed on the bottom surface and is electrically connected to the through wiring.
  • the dielectric substrate has a through hole extending from the second surface to the bottom surface, and the through wiring is disposed in the through hole.
  • the dielectric substrate has a second recess formed on the second surface, and the dielectric substrate has a back surface ground electrode on the second surface and the second recess, and the back surface ground electrode Is electrically insulated from the back electrode, and the back ground electrode is separated from the signal wiring by a predetermined distance in the thickness direction of the dielectric substrate, and the predetermined distance is the signal wiring It is preferable that it is constant over the length direction.
  • the dielectric substrate has a pair of surface ground electrodes, the surface ground electrodes are provided over the first surface and the inclined surface, and the surface ground electrodes are positioned on both sides of the signal wiring. Are arranged along the width direction of the signal wiring, and are separated from the signal wiring so as to be electrically insulated from the signal wiring, and the signal wiring has a wiring inclined portion, The wiring inclined portion is located on the inclined surface, the surface ground electrode has an electrode inclined portion, the electrode inclined portion is located on the inclined surface, and the wiring inclined portion is the electrode inclined portion. It is preferable that the first distance is separated from the portion, and the first distance changes as the surface ground electrode and the signal wiring approach the second surface.
  • the dielectric substrate further includes a pair of through-ground wirings, each of the pair of through-grounds penetrating from the second surface to the first surface of the dielectric substrate, and the through-ground Is located on both sides of the through wiring, is disposed along the width direction of the signal wiring, is electrically insulated from the through wiring, and the pair of through grounds is the pair of surfaces It is preferable to be electrically connected to the ground electrode.
  • the dielectric substrate has a hole formed in the first region, the hole penetrates from the second surface to the first surface, and the hole has a first inner surface,
  • the signal wiring preferably extends from the first surface to the back electrode via the first inner surface.
  • the first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface. It is preferable that a part of one end is provided on the inclined surface.
  • the hole is filled with an insulating resin.
  • FIG. 2 is a perspective view illustrating a state in which a base 20, a functional unit 30, a cover 40, and a driving device 50 in FIG. 1 are separated in a stacking direction (z direction).
  • FIG. 3A is a top view showing a configuration of a transmission line according to Embodiment 1 of the present invention, which is applied to a portion surrounded by a dotted line G in FIG.
  • FIG. 3B is a bottom view of the transmission line according to the first embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG.
  • FIG. 3A is a top view showing a configuration of a transmission line according to Embodiment 1 of the present invention, which is applied to a portion surrounded by a dotted line G in FIG.
  • FIG. 3B is a bottom view of the transmission line according to the first embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG.
  • FIG. 3C is a cross-sectional view taken along the line AA in FIG.
  • FIG. 3D is a cross-sectional view relating to a modification. It is a figure explaining the effect which the transmission line concerning Embodiment 1 of the present invention shows.
  • FIG. 4A is a cross-sectional view of a transmission line according to a comparative example.
  • FIG. 4B is a cross-sectional view of the transmission line according to the first embodiment of the present invention.
  • FIG. 5A is a top view showing a configuration of a transmission line according to the second embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG.
  • FIG.5 (b) is a bottom view of the structure of the transmission line concerning Embodiment 2 of this invention applied to the part enclosed with the dotted line G of FIG.
  • FIG. 5C is a cross-sectional view taken along the line BB in FIG.
  • FIG. 5D is a cross-sectional view relating to a modification.
  • FIG. 6A is a plan view showing a configuration of a transmission line according to Embodiment 3 of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. 2, and FIG. It is sectional drawing along the AA cut surface of a).
  • 7A is a plan view showing a back surface configuration of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG.
  • FIG. 7B is a cross-sectional view taken along the line BB in FIG. 6A.
  • FIG. FIG. 8A is a plan view showing a configuration of a transmission line according to the fourth embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. 2, and
  • FIG. 8C is a cross-sectional view taken along the line CC of FIG. 8A, and
  • FIG. 8C is a plan view showing a back surface configuration of a portion surrounded by a dotted line G in the base 20 shown in FIG.
  • FIG. 9 (a) is a cross-sectional view taken along the line DD in FIG. 6 (b) of the third embodiment, showing the configuration of the transmission line according to the fifth embodiment of the present invention.
  • These are top views which show the back surface structure of a transmission line.
  • a micro relay is an example of a MEMS structure.
  • the micro relay according to the first embodiment of the present invention is a MEMS relay that transmits a high-frequency electric signal and has a micro-drive mechanism manufactured using a semiconductor process. Further, the micro relay is a so-called latching type relay having a normally open contact and a normally closed contact.
  • FIG. 1 shows a perspective view of the microrelay of this embodiment.
  • the micro relay includes a base 20, a functional unit 30, a cover 40, and a driving device 50 having an electromagnet device 51.
  • FIG. 2 shows an exploded perspective view of the microrelay of this embodiment.
  • the micro relay has a base 20, a functional unit 30, a cover 40, and a driving device 50.
  • the transmission line according to the first embodiment of the present invention is used in a part of the base 20. If it demonstrates concretely, the transmission line in connection with Embodiment 1 of this invention is used for the part enclosed with the dotted line G of the base 20.
  • FIG. 1 shows a perspective view of the microrelay of this embodiment.
  • the micro relay includes a base 20, a functional unit 30, a cover 40, and a driving device 50 having an electromagnet device 51.
  • FIG. 2 shows an exploded perspective view of the microrelay of this embodiment.
  • the micro relay has a base 20, a functional unit 30, a cover 40,
  • the base 20 includes a glass substrate 21 and a pair of signal wirings 10.
  • the glass substrate 21 is formed in a rectangular parallelepiped shape. Therefore, the glass substrate 21 has a length, a width, and a thickness.
  • the width direction of the glass substrate 21 is along the y direction of FIG.
  • the length direction of the glass substrate 21 is along the x direction of FIG.
  • the thickness direction of the glass substrate 21 is along the z direction of FIG.
  • the glass substrate 21 has the 1st surface which functions as a surface, and the function part 30 is arrange
  • the signal wiring 10 is disposed on the first surface.
  • One pair of signal wirings 10 is disposed at one end in the longitudinal direction of the glass substrate 21, and the other pair of signal wirings 10 is disposed at the other end in the longitudinal direction of the glass substrate 21.
  • Each of the pair of signal wirings 10 has a length and a width.
  • the signal wiring 10 is disposed so as to have a length along the width direction of the glass substrate 21.
  • the pair of signal wirings 10 are arranged along the width direction of the glass substrate 21.
  • the signal wiring 10 has a first end located at one end in the width direction of the glass substrate 21 and a second end opposite to the first end.
  • the signal wiring 10 has a fixed contact 26 at the second end.
  • a pair of fixed contacts 26 are disposed on both ends of the glass substrate 21 in the longitudinal direction.
  • the fixed contact 26 is a metal thin film made of a metal material having good conductivity such as copper (Cu) or gold (Au). Such a fixed contact 26 can be formed using a sputtering method, an electroplating method, a vacuum deposition method, or the like.
  • the fixed contact 26 is not limited to a single layer structure, and may be a multilayer structure including, for example, an Au layer and a Ti layer interposed between the Au layer and the base 20.
  • the functional unit 30 mainly includes a movable part 32 and a frame 33 surrounding the movable part 32.
  • the movable part 32 and the frame 33 have a length along the length direction of the glass substrate 21 and have a width along the width direction.
  • the frame 33 is formed in a frame shape.
  • the frame 33 has two first openings and one second opening. More specifically, the frame 33 has first openings 31 at one end and the other end in the length direction.
  • the frame 33 has a second opening 34 at the center thereof. Therefore, the second opening 34 is located between the first opening 31 and the first opening 31.
  • Each of the first openings 31 and the second openings 34 are in communication with each other at the central portion of the frame 33 in the short direction.
  • the frame has a regulation protrusion 331.
  • the restriction protrusions 331 extend from the both ends in the width direction of the frame to the inside of the frame.
  • the restricting protrusion 331 is located between the first opening 31 and the second opening 34.
  • the restriction protrusion 331 prevents the movable part 32 from moving in the direction along the longitudinal direction of the frame 33.
  • the outer size of the frame 33 is equal to the outer size of the base 20.
  • the movable part 32 has a main body part 320 and a contact protrusion 321.
  • the movable part 32 is arranged inside the frame 33 so that the main body part 320 is arranged inside the second opening 34.
  • the movable portion 32 is disposed inside the frame 33 such that the contact protrusion 321 is disposed inside the first opening 31 of the frame 33.
  • the main body 320 is formed in a rectangular plate shape.
  • the contact protrusions 321 are located at both ends in the longitudinal direction of the main body 320, and project from the center in the width direction of the main body 320 toward the outside in the longitudinal direction of the main body 320.
  • the tip of the contact protrusion 321 is disposed in the first opening 31.
  • the contact protrusion 321 has a lower surface, and the lower surface faces the first surface of the base 20.
  • the contact protrusion 321 is provided with a movable contact 322 on the lower surface thereof.
  • the main body 320 is provided with a fulcrum protrusion 323.
  • the fulcrum protrusions 323 are located at both ends in the width direction of the main body 320 and at the center in the length direction.
  • the fulcrum protrusion 323 has an upper surface, and this upper surface faces the lower surface of the cover 40.
  • the fulcrum protrusion 323 is provided with a fulcrum protrusion 324 on the upper surface thereof.
  • the fulcrum protrusion 324 is used as a fulcrum for the swinging motion of the movable part 32.
  • the movable part 32 is disposed inside the frame 33 so as to swing around the fulcrum protrusion 324.
  • the movable portion 32 is integrally connected to the frame 33 by a plurality of (for example, four) support pieces 35.
  • Each support piece 35 integrally connects the inner side surface located at both ends in the longitudinal direction of the second opening 34 of the frame 33 and the outer side surface of the main body 320 in the width direction.
  • the four support pieces 35 are arranged at positions that are point-symmetric with respect to the center of the main body 320.
  • the support piece 35 has a curved shape that advances while meandering in a direction along the longitudinal direction of the main body 320 in a plane orthogonal to the stacking direction (z direction). Thereby, the movable part 32 is supported so as to be swingable with respect to the frame 33.
  • the support piece 35 By forming the support piece 35 in a meandering shape, the length of the support piece 35 can be increased. Therefore, the spring constant of the spring force generated when the support piece 35 is twisted when the movable portion 32 swings can be appropriately reduced, and the stress applied to the support piece 35 can also be dispersed.
  • the movable part 32, the frame 33, and the support piece 35 are formed by, for example, a semiconductor substrate (for example, a silicon substrate or an SOI substrate) having a thickness of about 50 ⁇ m to 300 ⁇ m, preferably about 200 ⁇ m, such as photolithography technology and etching technology. It can be formed by patterning using technology.
  • a semiconductor substrate for example, a silicon substrate or an SOI substrate
  • a thickness of about 50 ⁇ m to 300 ⁇ m, preferably about 200 ⁇ m such as photolithography technology and etching technology. It can be formed by patterning using technology.
  • the movable part 32 is provided with a magnetic plate 60 on the upper surface side of the main body part 320.
  • the magnetic plate 60 is made of, for example, a magnetic material such as electromagnetic soft iron, electromagnetic stainless steel, and permalloy machined into a rectangular plate shape, and is joined to the main body 320 by a method such as adhesion, welding, heat fitting, or brazing.
  • the magnetic plate 60 is used for swinging the movable portion 32 by a magnetic field generated by the electromagnet device 51 of the driving device 50.
  • a sequential 70 is provided on the lower surface of the movable portion 32. The sequential 70 is used to set the distance between the movable part 32 and the base 20 to a suitable distance.
  • the frame 33 of the functional unit 30 described above is joined to the base 20 so that the movable contact 322 and the pair of fixed contacts 26 face each other. Thereby, the functional unit 30 is attached to the first surface side of the base 20.
  • a joining metal layer (not shown) can be used. The metal layer is used as a ground.
  • the cover 40 includes, for example, a rectangular parallelepiped glass substrate 45 and a closing plate 42.
  • the outer size of the glass substrate 45 is equal to the outer size of the base 20.
  • an opening 41 is formed that penetrates the glass substrate 45 in the thickness direction (z direction).
  • the closing plate 42 is tightly bonded to the lower surface of the glass substrate 45 and closes the entire opening 41. Therefore, the cover 40 is formed with a recess having an upper opening. More specifically, the cover 40 has a recess defined by the inner peripheral surface of the opening 41 and the closing plate 42.
  • the driving device 50 is disposed in the recess.
  • the closing plate 42 is made of, for example, a thin plate such as a silicon plate or a glass plate having a thickness of about 5 to 50 ⁇ m, preferably about 20 ⁇ m.
  • the cover 40 is joined to the surface of the frame 33 opposite to the base 20 (upper surface in FIG. 2).
  • a joining metal layer (not shown) can be used.
  • the metal layer can be used as a high-frequency shield layer.
  • a nonmagnetic material is used as the material of the metal layer so as not to block the magnetic field of the driving device 50.
  • the driving device 50 includes an electromagnet device 51 that generates a magnetic field that attracts the magnetic plate 60 and a permanent magnet 52 that latches the movable portion 32.
  • the electromagnet device 51 mainly includes a yoke 53 and a pair of coils 54.
  • the yoke 53 integrally has a long rectangular plate-shaped main piece 530 and rectangular plate-shaped leg pieces 531 that protrude from both ends in the longitudinal direction on the surface side (the lower surface side in FIG. 2) of the main piece 530. I have.
  • Such a yoke 53 is formed by bending or forging an iron plate such as electromagnetic soft iron.
  • the permanent magnet 52 is formed in a rectangular parallelepiped shape, and is magnetized so that the upper surface side and the lower surface side have different polarities.
  • the permanent magnet 52 is attached to the yoke 53 so that the upper surface thereof is in contact with the longitudinal center of the upper surface of the main piece 530 of the yoke 53.
  • Each coil 54 is wound around the main piece 530 so as to be positioned between each leg piece 531 and the permanent magnet 52.
  • the drive device 50 is provided with a pair of coil terminals 55. When a voltage is applied between the pair of coil terminals 55, a current flows through each coil 54. Such a driving device 50 is stored in the storage chamber of the cover 40.
  • a drive electrode (not shown) for energizing the coil 54 is formed on the second surface of the glass substrate 21.
  • a wiring pattern 43 to which the coil terminal 55 is connected is formed on the upper surface of the glass substrate 45.
  • the drive electrode and the wiring pattern 43 described above are a through via 27 that penetrates the glass substrate 21 in the stacking direction, a through via 36 that penetrates the frame 33 in the thickness direction, and a penetration that penetrates the cover 40 in the thickness direction.
  • the vias 44 are electrically connected.
  • each signal wiring 10 is connected to the first end of the glass substrate 21 via a penetration signal wiring embedded in a hole that penetrates the glass substrate 21. It is electrically connected to the back surface extraction electrode arranged on the two surfaces.
  • the transmission line according to the first embodiment of the present invention is applied to a portion surrounded by a dotted line G in FIG. 2 including the signal wiring 10, the through signal wiring 12, and the back electrode 13.
  • FIG. 3A is a plan view showing a first surface of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2
  • FIG. 3B is a plan view showing a second surface.
  • FIG. 3C is a cross-sectional view taken along the line AA in FIG.
  • the transmission line according to Embodiment 1 of the present invention is a transmission line used for the MEMS structure, and includes a glass substrate 21, a signal wiring 10, a front surface ground electrode 11, and a back surface ground electrode 14.
  • the glass substrate 21 is used as an example of a dielectric substrate.
  • the glass substrate 21 has a first surface F1 and a second surface F2.
  • the second surface F2 is located on the opposite side of the first surface F1.
  • the glass substrate 21 has a first region on the first surface F1.
  • the glass substrate 21 has a first recess Ca1 formed in the first region of the first surface F1. In other words, the first recess Ca1 defines the first region of the first surface F1.
  • This 1st recessed part Ca1 has the 1st inner surface comprised by the bottom face BT and the side surface.
  • the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. More specifically, all the signal wirings 10 are disposed on the bottom surface BT of the first recess Ca1. Therefore, the first end of the signal wiring 10 is also disposed on the bottom surface BT of the first recess Ca ⁇ b> 1 that is the first region.
  • the signal wiring 10 is provided for transmitting a high frequency signal.
  • the surface ground electrode 11 is provided on the first surface F ⁇ b> 1 and is electrically insulated from the signal wiring 10.
  • the back surface ground electrode 14 is disposed on the second surface F2. The back surface ground electrode 14 is separated via the glass substrate 21. Therefore, the back surface ground electrode 14 is electrically insulated from the signal wiring 10.
  • the signal wiring 10 in FIG. 3A is one linear wiring, and is in contact with the through wiring 12 at both ends thereof.
  • a pair of signal wirings 10 is formed by removing the central portion in the length direction of the signal wiring 10 of FIG.
  • the through wiring 12 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21.
  • the through wiring 12 is in contact with the signal wiring 10 at one end located on the first surface F1 side.
  • the through wiring 12 is electrically connected to the back surface electrode 13 disposed on the second surface F2 at one end located on the second surface F2 side.
  • the through wiring 12 has a cylindrical shape.
  • the back electrode 13 overlaps the through wiring 12 in the thickness direction of the glass substrate 21.
  • the back electrode 13 has the same circular planar shape as the through wiring 12.
  • the surface ground electrode 11 is provided with a linear gap.
  • the signal wiring is composed of a linear conductor foil.
  • the signal wiring 10 is disposed on the upper surface of the glass substrate 21 so as to be located inside the gap. As a result, the signal wiring 10 is sandwiched between the linear slits.
  • the linear slits and the signal wiring 10 are arranged along the width direction of the signal wiring 10.
  • a ground potential is applied to the surface ground electrode 11. Electromagnetic waves are transmitted by an electric field formed between the signal wiring 10 and the surface ground electrodes 11 on both sides thereof. Further, the characteristic impedance of the transmission line can be arbitrarily designed by adjusting the distance between the signal wiring 10 and the surface ground electrode 11.
  • a glass substrate 21 is exposed in the gap between the signal wiring 10 and the surface ground electrode 11. Thereby, the signal wiring 10 is electrically insulated from the surface ground electrode 11.
  • the surface ground electrode 11 is electrically connected to the through ground wiring 15.
  • the through-ground wiring 15 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21, contacts the surface ground electrode 11 at one end on the first surface F1 side, and at the end on the second surface F2 side. It is in contact with the back ground electrode 14.
  • the through-ground wiring 15 has a cylindrical shape. In the first embodiment, two through-ground wirings 15 forming a pair are arranged on both sides of the signal wiring 10.
  • the back surface ground electrode 14 is disposed on a portion of the second surface F2 of the glass substrate 21 excluding the region where the back electrode 13 is formed and the peripheral region of the back electrode 13. That is, the back surface ground electrode 14 is separated from the back surface electrode 13 by a predetermined distance.
  • the characteristic impedance of the transmission line can be designed to have an arbitrary value by adjusting the distance from the back surface electrode 13 to the back surface ground electrode 14.
  • the glass substrate 21 is exposed in the gap between the back ground electrode 14 and the back electrode 13. Therefore, the back surface ground electrode 14 is electrically insulated from the back surface electrode 13.
  • a first recess Ca1 is formed on the first surface F1 of the glass substrate 21.
  • 1st recessed part Ca1 is comprised by the bottom face BT and side surface which are located in the other side of 2nd surface F2.
  • the first recess Ca1 has a width.
  • the width of the first concave portion Ca1 is gradually reduced from the first surface F1 toward the second surface F2.
  • the first recess Ca ⁇ b> 1 has a length along the width direction of the glass substrate 21 and a width along the length direction of the glass substrate 21. Accordingly, the first recess Ca1 has a length along the first surface F1.
  • the signal wiring 10 is disposed along the length direction of the bottom surface BT, and is disposed at the center of the bottom surface BT in the width direction.
  • the bottom surface BT has an intersection line intersecting the side surface.
  • the distance from one end of the signal wiring 10 in the width direction to the intersection line is preferably in the range of 0 to 2 times the width of the signal wiring 10.
  • the side surface of the first recess Ca1 is inclined at a predetermined angle different from the right angle with respect to the bottom surface BT.
  • the side surface of the first recess Ca1 may intersect the bottom surface BT at a right angle.
  • the surface ground electrode 11 is disposed up to the upper end of the side surface of the first recess Ca1. In other words, the surface ground electrode 11 is disposed on the entire first surface F1 of the glass substrate 21 excluding the first recess Ca1.
  • a through hole for the through wiring (12, 15) and the first recess Ca1 are formed on the glass substrate 21 having a thickness of 500 ⁇ m by using blasting or the like.
  • the slit-shaped first recess Ca1 is formed so that the depth is 200 to 400 ⁇ m and the bottom width is 100 to 400 ⁇ m.
  • a metal film such as gold (Au) or copper (Cu) is formed on the second surface F2 of the glass substrate 21 by plating. At this time, the metal film is filled in the through hole for the through wiring (12, 15) described above. Thereafter, using the photolithography technique and the etching technique, as shown in FIG. 3B, the patterned back surface ground electrode 14 and back surface electrode 13 are formed.
  • a metal film such as Au or Cu is formed on the first surface F1 of the glass substrate 21 by plating.
  • a patterned surface ground electrode 11 and signal wiring 10 are formed by using a photolithography technique and an etching technique.
  • the line width of the signal wiring 10 is 100 to 300 ⁇ m. According to these design parameters, a transmission line having a characteristic impedance of 50 ⁇ can be manufactured.
  • FIG. 4A is a cross-sectional view of a transmission line according to a comparative example.
  • FIG. 4B is a cross-sectional view of the transmission line according to the first embodiment of the present invention.
  • Both the transmission line according to the comparative example and the first embodiment have a glass substrate 21, a front surface ground electrode 11, a back surface ground electrode 14, and a signal wiring 10.
  • the surface ground electrode 11 is provided on the first surface F ⁇ b> 1 of the glass substrate 21.
  • the back surface ground electrode 14 is provided on the second surface F ⁇ b> 2 of the glass substrate 21.
  • the surface ground electrode 11 has a linear gap formed at the center thereof, and the upper surface of the glass substrate 21 is exposed upward via the gap.
  • the signal wiring 10 is disposed at the center of the gap.
  • a transmission line transmits electromagnetic waves with the 1st magnetic field, the 2nd magnetic field, and the 3rd magnetic field.
  • the first magnetic field is generated from the signal wiring 10 toward the surface ground electrode 11.
  • the second magnetic field is generated in the direction surrounding the signal wiring 10 inside the glass substrate 21.
  • the third magnetic field is generated outside the glass substrate 21 in a direction along the longitudinal direction of the signal wiring 10.
  • the signal wiring 10 and the surface ground electrode 11 are formed on the flat upper surface of the glass substrate 21.
  • the first electric field EL from the signal wiring 10 toward the surface ground electrode 11 is divided into an electric field that penetrates the inside of the glass substrate 21 and an electric field that passes through the air layer above the glass substrate 21.
  • the ratio of the electric field passing through the air layer of the information on the glass substrate 21 to the electric field passing through the inside of the glass substrate 21 is not large.
  • the signal wiring 10 is formed at the central portion of the bottom surface of the first recess Ca1. Even in this case, the first electric field EL from the signal wiring 10 toward the surface ground electrode 11 is divided into an electric field penetrating the inside of the glass substrate 21 and an electric field passing through the air layer above the glass substrate 21. In the case of the structure shown in FIG. 4B, the ratio of the electric field passing through the air layer above the glass substrate 21 to the electric field penetrating the inside of the glass substrate 21 is increased.
  • the dielectric loss tangent (tangent delta) of a dielectric substrate such as glass or silicon is larger than the dielectric loss tangent of the air layer. Therefore, the dielectric substrate has a larger dielectric loss than the air layer. Therefore, it is preferable to form the signal wiring 10 inside the first recess Ca1. By forming the signal wiring 10 inside the first recess Ca1, the dielectric loss of the transmission line is reduced.
  • the transmission line of the present embodiment includes the glass substrate 21 and the signal wiring 10.
  • 1st recessed part Ca1 is formed in the 1st surface F1.
  • the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1.
  • an electric flux is formed between the signal wiring 10 and the surface ground electrode 11.
  • This electric flux includes an electric flux passing through the inside of the glass substrate 21 and an electric flux passing above the glass substrate 21. Since the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1, the electric flux passing through the inside of the glass substrate 21 is larger than the electric flux passing above the glass substrate. In other words, it is possible to increase the electric flux passing through air having a dielectric loss smaller than that of the glass substrate 21. As a result, the dielectric loss of the transmission line is reduced.
  • the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. Therefore, the distance between the signal wiring 10 and the back surface ground electrode 14 can be shortened as compared with the case where the signal wiring 10 is disposed on the flat first surface F1. In other words, compared with the case where the signal wiring 10 is arranged on the bottom surface BT of the first concave portion Ca1 from the signal wiring 10 as compared with the case where the signal wiring 10 is arranged on the glass substrate 21 where the first concave portion Ca1 is not formed. The distance to the back ground electrode 14 is reduced. As a result, a desired impedance can be obtained in the transmission line in which the signal wiring 10 and the back surface ground electrode 14 are electromagnetically coupled.
  • the transmission line of this embodiment since the glass substrate 21 is formed with the first concave portion Ca1 only in a part thereof, the portions other than the first concave portion Ca1 are ensured in thickness. Therefore, the mechanical strength of the glass substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield. (Embodiment 2) Next, referring to FIGS. 5A to 5C, the configuration of the transmission line according to the second embodiment of the present invention applied to the portion surrounded by the dotted line G in the base 20 shown in FIG. explain.
  • FIG. 5A is a plan view showing a first surface of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG. 5B is a plan view showing a second surface.
  • FIG. 5C is a cross-sectional view taken along the line BB in FIG.
  • the transmission line according to Embodiment 2 of the present invention is a transmission line used for a MEMS structure.
  • the transmission line of the present embodiment includes a glass substrate 21, a signal wiring 10, and a back surface ground electrode 14.
  • the glass substrate 21 is a dielectric substrate having a first surface F1 and a second surface F2.
  • the first surface F1 is located on the opposite side of the second surface F2.
  • 1st recessed part Ca1 is formed in the 1st surface F1.
  • the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1.
  • the signal wiring 10 is provided for transmitting a high frequency signal.
  • the back surface ground electrode 14 is disposed on the second surface F2.
  • the transmission lines in FIGS. 5A to 5C are different from the transmission lines in FIGS. 3A to 3C in that the surface ground electrode 11 and the through-ground wiring 15 are not provided. Other configurations are the same.
  • the signal wiring 10 in FIG. 5A is one linear wiring.
  • the signal wiring 10 is electrically connected to the through wiring 12 at both ends in the length direction.
  • the pair of signal wirings 10 is formed by removing the central portion of the signal wiring 10 in FIG. 5.
  • the through wiring 12 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21.
  • the through wiring 12 is electrically connected to the signal wiring 10 at one end on the first surface F1 side, and is electrically connected to the back electrode 13 at one end on the second surface F2 side.
  • the through wiring 12 has a cylindrical shape, and the back electrode 13 overlaps the through wiring 12 in the thickness direction of the glass substrate 21 and has the same circular planar shape as the through wiring 12.
  • a first recess Ca1 is formed on the first surface F1 of the glass substrate 21.
  • the first recess Ca1 has a bottom surface BT and side surfaces located on the opposite side of the second surface F2.
  • the first recess Ca1 has a length and a width.
  • the signal wiring 10 is disposed in the central portion of the bottom surface BT along the length direction of the bottom surface BT.
  • the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. Therefore, when the signal wiring 10 is arranged on the bottom surface BT of the first concave portion Ca1 from the signal wiring 10 than when the signal wiring is arranged on the upper surface of the glass substrate 21 not having the first concave portion Ca1.
  • the distance to the back ground electrode 14 is short. Therefore, the transmission line of this embodiment in which the signal wiring 10 and the back surface ground electrode 14 are electromagnetically coupled can widen the design range of impedance.
  • the transmission line of the present embodiment since the glass substrate 21 is formed with the first recess Ca1 only in a part thereof, the thickness other than the first recess Ca1 is ensured. Therefore, the mechanical strength of the glass substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield.
  • a second recess Ca2 may be formed on the second surface F2 of the glass substrate 21.
  • 2nd recessed part Ca2 has a 2nd inner surface.
  • 2nd recessed part Ca2 is formed so that it may be located on the opposite side to 1st recessed part Ca1, and has the same linear planar shape.
  • the second recess Ca2 is on the opposite side of the first recess Ca1 so that the entire periphery of the second recess Ca2 overlaps with the entire periphery of the first recess Ca1 in the thickness direction of the glass substrate 21.
  • the back surface ground electrode 14 is also disposed on the second inner surface of the second recess Ca2. Thereby, the distance between the signal wiring 10 and the back surface ground electrode 14 can be further shortened. Therefore, the design range of impedance is further expanded.
  • the glass substrate 21 has been described as an example of a dielectric substrate.
  • a silicon substrate made of single crystal silicon or a low temperature co-fired ceramic substrate (LTCC substrate) can also be used as the dielectric substrate.
  • LTCC substrate low temperature co-fired ceramic substrate
  • a semiconductor fine processing technique such as a photolithography technique and an etching technique can be used. Therefore, the base 20 made of a silicon substrate can be processed more easily than the base 20 made of the glass substrate 21.
  • the functional unit 30 is formed using silicon. Therefore, the linear expansion coefficients of the functional unit 30 and the base 20 can be made approximately equal.
  • the stress generated between the functional unit 30 and the base 20 due to the difference in linear expansion coefficient is reduced.
  • the silicon substrate it is desirable to use high resistance silicon. In this case, high frequency characteristics (particularly, high frequency characteristics in the slow wave mode) are improved.
  • the dielectric substrate is the glass substrate 21
  • high frequency characteristics can be improved by using glass which is a substance having a relatively low dielectric constant.
  • the low-temperature co-fired ceramic substrate can easily form circular through-holes and internal wiring (ground layer) having a uniform diameter as compared with the glass substrate 21.
  • the high frequency characteristics are improved as compared with the case where the diameter of the through hole is not uniform. More specifically, when the diameter of the through hole is uniform regardless of the depth of the hole, it has better high frequency characteristics than when the diameter of the hole changes according to the depth of the hole.
  • the impedance can be adjusted by providing a ground layer inside the substrate. As a result, the transmission line impedance can be easily designed. Therefore, high-frequency transmission characteristics can be improved compared to a glass substrate.
  • the micro relay has been described as an example of the MEMS structure.
  • the present invention is not limited to this, and includes a high frequency switch, a resonator, a filter, an oscillator, and the like that handle high frequency electric signals.
  • Embodiment 3 This embodiment will be described with reference to FIGS.
  • the micro relay of the present embodiment also has the same configuration except for the micro relay and the base 20 in the first embodiment. Therefore, the same reference numerals are given to the same components as those in the first embodiment. The description of the same configuration as that of the first embodiment is omitted.
  • the base 20 includes a silicon substrate 21 and a pair of signal wirings 10.
  • the silicon substrate 21 is made of rectangular parallelepiped single crystal silicon. Accordingly, the silicon substrate 21 has a length, a width, and a thickness.
  • the width direction of the silicon substrate 21 is along the y direction of FIG.
  • the length direction of the silicon substrate 21 is along the x direction of FIG.
  • the thickness direction of the silicon substrate 21 is along the z direction of FIG.
  • the silicon substrate 21 has a first surface.
  • the functional unit 30 is disposed on the first surface of the silicon substrate 21.
  • the signal wiring 10 is disposed on the first surface.
  • the signal wiring 10 is disposed on the first surface.
  • One pair of signal wirings 10 is disposed at one end in the longitudinal direction of the silicon substrate 21, and the other pair of signal wirings 10 is disposed at the other end in the longitudinal direction of the silicon substrate 21.
  • Each of the pair of signal wirings 10 has a length and a width.
  • the signal wiring 10 is arranged to have a length along the width direction of the silicon substrate 21.
  • the pair of signal wirings 10 are arranged along the width direction of the silicon substrate 21.
  • the signal wiring 10 has a first end located at one end in the width direction of the silicon substrate 21 and a second end opposite to the first end.
  • the second end of the signal wiring is located at the center in the width direction of the silicon substrate 21.
  • the signal wiring 10 has a fixed contact 26 at the second end. Accordingly, a pair of fixed contacts 26 are disposed on both ends of the silicon substrate 21 in the longitudinal direction.
  • the fixed contact 26 is a metal thin film made of a metal material having good conductivity such as copper (Cu) or gold (Au). Such a fixed contact 26 can be formed using a sputtering method, an electroplating method, a vacuum deposition method, or the like.
  • the fixed contact 26 is not limited to a single layer structure, and may be a multilayer structure including, for example, an Au layer and a Ti layer interposed between the Au layer and the base 20.
  • FIG. 6 (a) is a plan view of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2
  • FIG. 6 (b) is a diagram of the microrelay along the AA section in FIG. 6 (a). It is sectional drawing.
  • the x direction in FIG. 6A is the x direction in FIG. 2, that is, the width direction of the base 20, and the y direction in FIG. 6A is the y direction in FIG.
  • the transmission line according to Embodiment 3 of the present invention is a transmission line used for a micro relay as an example of a MEMS structure.
  • This transmission line includes a silicon substrate 21, a signal wiring 10, a pair of front surface ground electrodes 11, and a back surface electrode 13.
  • the silicon substrate 21 is an example of a dielectric substrate.
  • the silicon substrate 21 has a first surface and a second surface. The first surface is located on the opposite side of the second surface.
  • the first surface has a first recess Ca1.
  • the signal wiring 10 is provided for transmitting a high frequency signal.
  • the signal wiring 10 is disposed on the first surface of the silicon substrate 21 and inside the first recess Ca1.
  • the pair of surface ground electrodes 11 are disposed on the first surface of the silicon substrate 21 and inside the first recess Ca1.
  • the pair of surface ground electrodes 11 are separated from the signal wiring 10 by a predetermined distance.
  • the pair of surface ground electrodes 11 are located on both sides of the signal wiring 10.
  • the pair of surface ground electrodes 11 and the signal wiring 10 are arranged along the width direction of the signal wiring 10.
  • the back electrode 13 is disposed on the second surface F ⁇ b> 2 of the silicon substrate 21.
  • the silicon substrate 21 has two first recesses Ca1 arranged in the x direction.
  • the silicon substrate 21 is provided with first recesses Ca1 at one end and the other end in the width direction.
  • 1st recessed part Ca1 has the 1st inner surface comprised by the side surface and the bottom face BT.
  • the first recess Ca1 has an opening area. More specifically, the first recess Ca ⁇ b> 1 has an opening area in a direction perpendicular to the thickness direction of the silicon substrate 21. The opening area of the first recess Ca1 decreases as it goes from the first surface F1 to the second surface F2.
  • 1st inner surface Ca1 has the periphery located in the upper end of the 1st inner surface Ca1, and the periphery located in the lower end of the 1st inner surface Ca2.
  • the entire periphery located at the lower end of the first inner surface Ca1 is located inside the entire periphery located at the upper end of the first inner surface Ca1.
  • At least a part of the side surface of the first recess Ca1 forms an inclined surface WA1 where the side surface intersects at an acute angle with respect to the first surface F1.
  • the first end of the signal wiring 10 has a wiring inclined portion 10a and a wiring bottom portion 10b.
  • the wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 of the first recess Ca1.
  • the wiring bottom portion 10b of the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1.
  • the silicon substrate 21 has a through hole 221 that penetrates from the bottom surface BT of the first recess Ca1 to the second surface F2.
  • the through wiring 12 disposed so as to be positioned inside the through hole 221 is embedded.
  • the back electrode 13 and the wiring bottom 10b of the signal wiring 10 are in contact with the through wiring.
  • the signal wiring 10 has the wiring inclined portion 10a and the wiring bottom portion 10b.
  • the wiring inclined portion 10a is disposed on the inclined surface WA1.
  • the wiring bottom portion 10b is disposed on the bottom surface BT.
  • the wiring bottom portion 10 b is electrically connected to the back electrode 13 disposed on the bottom surface BT via the through wiring 12.
  • the surface ground electrode 11 disposed on the first surface F1 of the silicon substrate 21 is separated from the signal wiring 10 by a predetermined distance. Therefore, the surface ground electrode 11 is electrically insulated from the signal wiring 10.
  • the predetermined distance between the surface ground electrode 11 and the signal wiring 10 is constant along the longitudinal direction of the signal wiring 10.
  • a frame electrode (annular electrode) 19 is disposed on the first surface of the silicon substrate 21 so as to surround the outer periphery of the silicon substrate 21.
  • the frame electrode (annular electrode) 19 and the surface ground electrode 11 are electrically connected, and a ground potential is applied.
  • the surface ground electrode 11 has an electrode inclined part 11a and an electrode bottom part 11b.
  • the electrode inclined portion 11a of the surface ground electrode 11 is disposed on the inclined surface WA1 of the first recess Ca1.
  • the electrode bottom 11b of the surface ground electrode 11 is extended to the bottom surface BT of the first recess Ca1.
  • the wiring inclined portion 10 a of the signal wiring 10 is separated from the electrode inclined portion 11 a of the surface ground electrode 11 by a first distance.
  • the first distance changes as the signal wiring 10 and the surface ground electrode 11 approach the second surface F2 of the silicon substrate 21. Specifically, the first distance decreases as the signal wiring 10 and the surface ground electrode 11 approach the second surface F ⁇ b> 2 of the silicon substrate 21. Thereby, a transmission line can be reduced in size.
  • interval of the wiring inclination part 10a of the signal wiring 10 and the electrode inclination part 11a of the surface ground electrode 11 may become large as it approaches the 2nd surface F2.
  • the functional unit 30 is disposed on the base 20.
  • the cover 40 is disposed on the functional unit 30. Therefore, the base 20 is laminated together with the functional unit 30 and the cover 40.
  • the movable contact 322 provided on the contact protrusion 321 in the function unit 30 contacts the fixed contact on the pair of signal wirings 10 as the main body in the function unit 30 swings. Thereby, the movable contact 322 short-circuits the pair of signal wirings 10.
  • the silicon substrate 21 is provided with the back surface electrode 13 and the ground electrode 14 in the 2nd surface F2.
  • the back electrode 13 is electrically connected to the through wiring 12.
  • the back electrode 13 is electrically insulated from the back ground electrode 14.
  • the back electrode 13 has a line segment shape.
  • the back electrode 13 has one end connected to the through wiring 12 and the other end arranged on the outer periphery of the silicon substrate 21. A predetermined gap is formed between the back electrode 13 and the back ground electrode 14.
  • the silicon substrate 21 has a through hole penetrating from the bottom surface BT of the first recess Ca1 to the second surface F2 of the silicon substrate 21.
  • the through holes are located on both sides of the through wiring 12.
  • the through hole 222 and the through wiring 12 are arranged along the width direction of the signal wiring 10.
  • the silicon substrate 21 is provided with a through ground wiring 15, and the through ground wiring 15 is provided inside the through hole 222. Therefore, the through ground wiring 15 and the through wiring 12 are arranged along the width direction of the signal wiring 10. Further, the through ground wiring 15 is separated from the through wiring 12 by the silicon substrate 21. Accordingly, the through ground wiring 15 is electrically insulated from the through wiring 12.
  • the electrode bottom 11b of the surface ground electrode 11 is disposed on the bottom surface BT of the first recess Ca1. Therefore, the electrode bottom 11 b of the front surface ground electrode 11 is electrically connected to the back surface ground electrode 14 through the through ground wiring 15.
  • the signal wiring 10, the front surface ground electrode 11, the back surface electrode 13, and the back surface ground electrode 14 are made of a conductive material having high adhesion to the silicon substrate 21.
  • a conductive material include Au, Cr, Pt, Ti, Ni, Al, and Cu.
  • conductive materials include alloys such as Au, Cr, Pt, Ti, Ni, Al, and Cu. Therefore, the signal wiring 10 is preferably made of a conductive film made of these conductive materials or alloys. Alternatively, the signal wiring 10 may be formed by laminating these conductive films in multiple layers.
  • a silicon substrate 21 with a (100) crystal face exposed is prepared.
  • a wet etching process is performed on the first surface F1 of the silicon substrate 21 on which the (100) crystal plane is exposed, using an alkaline solution such as tetramethylammonium hydroxide (TMAH) or potassium hydroxide (KOH) aqueous solution as an etchant.
  • TMAH tetramethylammonium hydroxide
  • KOH potassium hydroxide
  • a resist pattern having an opening in a predetermined region of the first surface F1 of the silicon substrate 21 is formed.
  • the wet etching process is selectively performed on the first surface F1 of the silicon substrate 21 exposed from the opening. In this way, the inclined surface WA1 of the first recess Ca1 is formed.
  • the following steps are performed. First, before forming the inclined surface WA1, etching is selectively performed only in a direction perpendicular to the first surface F1.
  • An example of such selective etching is dry etching. Thereby, a recess having a surface perpendicular to the first surface F1 is formed in the silicon substrate 21.
  • a barrier material that does not react with the etchant is coated on the vertical surface of the recess.
  • a wet etching process for performing wet etching on the silicon substrate is performed.
  • the silicon substrate 21 provided with the recessed part which has inclined surface WA1 is obtained.
  • the barrier material is removed after the wet etching process.
  • the first recess F ⁇ b> 1 having a side surface having a surface perpendicular to the inclined surface WA ⁇ b> 1 is formed on the first surface F ⁇ b> 1 of the silicon substrate 21.
  • An ICP etching apparatus is used for the dry etching process.
  • Two types of gases, SF 6 and C 4 F 8 are used for the dry etching process in the ICP etching apparatus. Specifically, etching with SF 6 and formation of a protective film with C 4 F 8 are performed alternately. As a result, a groove having a high aspect ratio is formed on the first surface F1 of the silicon substrate 21.
  • a through hole is formed in the bottom surface BT of the first recess Ca1 by using a photolithography technique and an etching technique. Subsequently, a conductor that becomes the through wiring 12 and the through ground wiring 15 is embedded in the through hole. Then, on the first surface F1 of the silicon substrate 21, the inclined surface WA1 of the first recess Ca1, and the bottom surface BT using a physical vapor deposition (PVD) method such as a sputtering method, a chemical vapor deposition (CVD) method, or the like. At the same time, a conductor film is formed.
  • PVD physical vapor deposition
  • the signal wirings 10 and 10b and the surface ground electrodes 11 and 11b shown in FIG. 6A are patterned.
  • the signal wiring 10a and the surface ground electrode 11a formed on the inclined surface WA1 are patterned using a laser patterning technique.
  • the back surface electrode 13 and the back surface ground electrode 14 shown in FIG. 7A are also formed on the second surface F2 by a similar process.
  • At least part of the side surface of the first recess Ca1 forms an inclined surface WA1 whose side surface intersects at an acute angle with respect to the first surface F1 of the silicon substrate 21.
  • the wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1.
  • the first recess Ca1 has a bottom surface BT.
  • the silicon substrate 21 has a through hole 221 that penetrates the silicon substrate 21 from the bottom surface BT to the second surface F2.
  • the through wiring 12 is embedded in the through hole 221 of the silicon substrate 21.
  • the wiring bottom portion 10b of the signal wiring 10 is provided on the bottom surface BT.
  • the wiring bottom 10 b of the signal wiring 10 is electrically connected to the through wiring 12 and is electrically connected to the back electrode 13 through the through wiring 12.
  • the through wiring can be shortened.
  • the wiring inclined portion 10a of the signal wiring 10 disposed on the inclined surface WA1 has a smaller impedance change than the through wiring. Therefore, with this configuration, impedance mismatch due to the through wiring is suppressed, and as a result, high-frequency transmission characteristics can be improved.
  • the inclined surface WA1 intersects the first surface F1 of the silicon substrate 21 at an acute angle, for example, compared with the case where a part of the signal wiring 10 is formed on a vertical surface perpendicular to the first surface F1, the inclined surface WA1 is sharp. It is possible to suppress a change in electromagnetic field and a change in impedance.
  • the silicon substrate 21 since the silicon substrate 21 has the first recess Ca1 formed only in a part thereof, the thickness is ensured at portions other than the first recess Ca1. Therefore, the mechanical strength of the silicon substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield. Further, the first recess Ca1 does not penetrate to the second surface F2 of the silicon substrate 21. Therefore, when sealing the inside of the micro relay, the silicon substrate 21 functions as a package or a cap. Therefore, a micro relay can be manufactured with few members. As a result, the manufacturing cost is reduced and the shape of the microrelay is reduced.
  • the wiring inclined portion 10a of the signal wiring disposed on the inclined surface WA1 is electrically connected to the back surface electrode 13 disposed on the second surface F2 of the silicon substrate 21.
  • the through via is shortened. Therefore, impedance mismatch due to the through via is suppressed, and as a result, high-frequency transmission characteristics can be improved.
  • the wiring inclined portion 10a of the signal wiring 10 on the inclined surface WA1 of the first recess Ca1 is separated from the electrode inclined portion 11a of the surface ground electrode 11 by a predetermined distance.
  • This predetermined distance changes as it goes from the first surface F1 of the silicon substrate 21 to the second surface F2. Therefore, the impedance of the signal wiring 10a in the inclined surface WA1 can be matched.
  • the line width of the wiring inclined portion 10a of the signal wiring 10 becomes smaller from the first surface F1 of the silicon substrate 21 toward the second surface F2. Further, the distance between the wiring inclined portion 10a of the signal wiring 10 and the electrode inclined portion 11a of the surface ground electrode 11 decreases as it goes from the first surface F1 of the silicon substrate 21 to the second surface F2.
  • the line width of the signal wiring 10a and the distance between the signal wiring 10a and the surface ground electrode 11a on the inclined surface WA1 of the first recess Ca1 may be increased as the second surface F2 is approached.
  • the silicon substrate 21 is provided with a pair of through ground wirings 15.
  • the through ground wiring 15 is located on both sides of the through wiring 12. Further, the through ground wiring 15 and the through wiring 12 are provided along the width direction of the signal wiring.
  • the pair of surface ground electrodes 11 b and the surface ground electrode 11 are electrically connected by a pair of through-ground wirings 15. With this configuration, the pair of through ground wirings 15 can be prevented from being electromagnetically coupled to the through wiring 12. As a result, high-frequency transmission characteristics can be realized.
  • the silicon substrate 21 has a hole Ca1 instead of the first recess Ca1.
  • FIG. 8A is a surface view of a portion surrounded by a dotted line G in the base 20 shown in FIG.
  • FIG. 8B is a cross-sectional view of the entire micro relay along the line CC of FIG. 8A.
  • the x direction in FIG. 8A is the x direction in FIG. 2, that is, the width direction of the base 20.
  • the y direction in FIG. 8A is the y direction in FIG. 2, that is, the longitudinal direction of the base 20.
  • the hole Ca1 formed in the silicon substrate 21 penetrates from the first surface F1 to the second surface F2 of the silicon substrate 21. Therefore, the hole Ca1 does not have a bottom surface.
  • the wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 of the hole Ca1. However, since the hole Ca1 does not have a bottom surface, the signal wiring 10 does not have a wiring bottom 10b.
  • the electrode inclined portion 11a of the surface ground electrode 11 is disposed on the inclined surface WA1 of the hole Ca1. However, since the hole Ca1 does not have a bottom surface, the surface ground electrode 11 does not have the electrode bottom 11b.
  • the wiring inclined portion 10a of the signal wiring 10 arranged on the inclined surface WA1 of the hole Ca1 is in contact with the back electrode 13b. That is, the signal wiring 10 is directly electrically connected to the back surface electrode 13b. In other words, the signal wiring 10 is electrically connected to the back surface electrode 13b without passing through the through wiring.
  • the silicon substrate 21 includes a hole Ca1 penetrating from the second surface F2 to the first surface F1.
  • the silicon substrate 21 includes a back electrode 13b and a back ground electrode 14 on the second surface F2.
  • the back electrode 13b is adjacent to the hole Ca1.
  • the back surface ground electrode 14 is located around the back surface electrode 13b.
  • the electrode inclined portion 11a of the front surface ground electrode 11 disposed on the inclined surface WA1 of the hole Ca1 is in contact with the back surface back surface ground electrode. That is, the front surface ground electrode 11 is directly electrically connected to the back surface ground electrode 14. In other words, the front surface ground electrode 11 is electrically connected to the back surface ground electrode 14 without passing through the through-ground wiring 15.
  • the hole Ca1 may be filled with an insulator such as resin. In this case, the airtightness inside the micro relay can be ensured.
  • the silicon substrate 21 has the hole Ca1 penetrating from the first surface F1 to the second surface F2 of the silicon substrate 21.
  • the wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 and is electrically connected to the back electrode 13b.
  • the silicon substrate 21 does not need to have a through via. Therefore, the influence of impedance mismatch due to the through via can be reduced. As a result, high-frequency transmission characteristics can be further improved.
  • the silicon substrate 21 has a first recess Ca1, and the first recess Ca1 has a bottom surface BT without penetrating to the second surface F2.
  • the silicon substrate 21 is provided with a second recess Ca2 on the second surface F2.
  • the second recess Ca2 has an inclined surface WA2 and a bottom surface.
  • the back surface ground electrode 14 is disposed on the second surface F2 of the silicon substrate 21 and on the inclined surface WA2 and the bottom surface of the second recess Ca2.
  • FIG. 9A is a cross-sectional view taken along the line DD in FIG. 9B.
  • the back surface ground electrode 14 is disposed on the side opposite to the signal wiring 10 when viewed from the silicon substrate 21.
  • the back surface ground electrode 14 is separated from the signal wiring 10 by a predetermined distance.
  • This predetermined distance is constant along the longitudinal direction of the signal wiring 10.
  • the back surface ground electrode 14 is separated from the signal wiring 10 by the thickness of the silicon substrate 21.
  • the thickness of the silicon substrate 21 is constant along the longitudinal direction of the signal wiring 10.
  • the back surface ground electrode 14a is separated from the signal wiring 10a by a predetermined distance. This predetermined distance is constant along the longitudinal direction of the signal wiring 10. In other words, the back surface ground electrode 14 a is separated from the signal wiring 10 a by the thickness of the silicon substrate 21. The thickness of the silicon substrate 21 is constant along the longitudinal direction of the signal wiring 10.
  • the second recess Ca2 is formed on the first surface F1 of the silicon substrate 21 so as to face a region where the first recess Ca1 is not formed.
  • the inclined surface Wa2 is formed at a position facing the inclined surface WA1 of the first recess Ca1.
  • the positions and shapes of the first recess Ca1 and the second recess Ca2 are such that the distance between the back ground electrodes 14, 14a and the signal wirings 10, 10a is along the longitudinal direction of the signal wirings 10, 10a. Adjusted to be constant. As a result, the distance between the signal wirings 10 and 10a and the back ground electrodes 14 and 14a in the coplanar waveguide line is constant. As a result, a transmission line that realizes high-frequency transmission characteristics can be designed.
  • Embodiment 5 showed the case where 2nd recessed part Ca2 was formed in the 2nd surface F2 side in the transmission line shown in FIG.6 and FIG.7, the 2nd surface F2 side in the transmission line shown in FIG. Even if the second concave portion Ca2 is formed, a similar effect can be obtained.
  • the silicon substrate 21 made of single crystal silicon has been described as an example of the dielectric substrate.
  • the dielectric substrate may be a glass substrate or a low-temperature co-fired ceramic substrate (LTCC substrate). It does not matter.
  • the advantages of each substrate are described.
  • the silicon substrate 21 since the semiconductor fine processing technology such as the photolithography technology and the etching technology can be used, the processing of the base 20 can be easily performed as compared with the case of using the glass substrate.
  • the functional unit 30 is formed using silicon, the linear expansion coefficients of the functional unit 30 and the base 20 can be made approximately equal. Therefore, the stress resulting from the difference in linear expansion coefficient can be reduced.
  • the silicon substrate 21 it is desirable to use high resistance silicon. In this case, high frequency characteristics (particularly, high frequency characteristics in the slow wave mode) can be improved.
  • the dielectric substrate is a glass substrate
  • high-frequency characteristics can be improved by using glass which is a substance having a relatively low dielectric constant.
  • the low-temperature co-fired ceramic substrate can easily form circular through-holes and internal wiring (ground layer) having a uniform diameter as compared with a glass substrate.
  • the high frequency characteristics are improved as compared with the case where the diameter of the through hole is not uniform (for example, when the diameter changes according to the depth of the hole).
  • the impedance can be adjusted, and the impedance design becomes easy. Therefore, high-frequency transmission characteristics can be improved compared to a glass substrate.
  • the micro relay has been described as an example of the MEMS structure.
  • the present invention is not limited to this, and a high frequency switch, a resonator, a filter, an oscillator, and the like that handle a high frequency electric signal are also included. included.

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Abstract

Provided is a transmission line having a dielectric substrate and signal wiring. The dielectric substrate has a first surface and a second surface, and the second surface is positioned on the side opposite to the first surface side. The dielectric substrate has a first region on the first surface, and a rear surface electrode is disposed on the second surface. The signal wiring is configured to transmit signals, has a length, a width, and a first end at one end in the length direction. The first end is disposed in the first region and is electrically connected to the rear surface electrode. The first region overlaps the rear surface electrode in the thickness direction of the dielectric substrate.

Description

伝送線路Transmission line
 本発明は、高周波を伝送する伝送線路に関する。 The present invention relates to a transmission line for transmitting a high frequency.
 従来から、シリコン基板等の誘電体基板上に線状の導体膜を形成したマイクロストリップラインが知られている。このようなマイクロストリップラインを有する誘電体基板からなる伝送線路は、後述する特許文献1に開示されている。特許文献1において、伝送線路は、誘電体基板と、信号配線とからなる。誘電体基板は、略板状に形成されている。誘電体基板は、第1面を有しており、当該第1面に線状の導体箔から成る信号配線が形成されている。誘電体基板は、第1面と反対側に位置する第2面を有している。誘電体基板は、第2面に、接地面が形成されている。そして、誘電体基板は、その一部に溝が形成されている。この溝は、信号配線と接地面との距離を、誘電体基板の厚みよりも小さくする。 Conventionally, a microstrip line in which a linear conductor film is formed on a dielectric substrate such as a silicon substrate is known. A transmission line made of a dielectric substrate having such a microstrip line is disclosed in Patent Document 1 described later. In Patent Document 1, the transmission line includes a dielectric substrate and signal wiring. The dielectric substrate is formed in a substantially plate shape. The dielectric substrate has a first surface, and a signal wiring made of a linear conductor foil is formed on the first surface. The dielectric substrate has a second surface located on the opposite side of the first surface. The dielectric substrate has a ground plane on the second surface. The dielectric substrate has a groove formed in a part thereof. This groove makes the distance between the signal wiring and the ground plane smaller than the thickness of the dielectric substrate.
 この溝は、誘電体基板の第2面に形成されている。一方、信号配線が形成された第1面は平坦な面を成している。溝は、信号配線と接地面との間隔を短くし、これにより、マイクロストリップラインのインピーダンスは調整される。 This groove is formed on the second surface of the dielectric substrate. On the other hand, the first surface on which the signal wiring is formed is a flat surface. The groove shortens the distance between the signal wiring and the ground plane, thereby adjusting the impedance of the microstrip line.
特開平7-336114号公報JP 7-336114 A
 高周波信号を伝送する伝送線路は、マイクロストリップラインに加えて、コプレーナ導波路(コプレーナウェイブガイド)が知られている。コプレーナ導波路は、基板と、第1導体膜と、第2導体膜とで構成される。第1導体膜は、基板の上面に設けられている。第1導体膜は、スリット状の開口を有している。第2導体膜は、スリット状の開口の内側に位置するように、前記基板の上面に設けられている。第2導体膜は、第1導体膜から電気的に絶縁されている。コプレーナ導波路は、信号配線から両側の第1導体膜に向かう方向の電界と、基板内部において信号線周囲を囲む方向、基板外部において伝送方向に沿った方向の磁界によって電磁波を伝送する。 As a transmission line for transmitting a high-frequency signal, a coplanar waveguide (coplanar wave guide) is known in addition to a microstrip line. The coplanar waveguide is composed of a substrate, a first conductor film, and a second conductor film. The first conductor film is provided on the upper surface of the substrate. The first conductor film has a slit-shaped opening. The second conductor film is provided on the upper surface of the substrate so as to be positioned inside the slit-shaped opening. The second conductor film is electrically insulated from the first conductor film. The coplanar waveguide transmits electromagnetic waves by an electric field in a direction from the signal wiring toward the first conductor films on both sides, a magnetic field in a direction surrounding the signal line inside the substrate, and a direction along the transmission direction outside the substrate.
 このコプレーナ導波路に対して、特許文献1に開示された誘電体基板の第2面に溝を形成してマイクロストリップラインのインピーダンスを調整する技術を適用することもできる。この場合、信号配線から両側の第1導体膜に向かう方向の電界は、誘電体基板の内部を貫通する電界と、誘電体基板の上方の空気層を通過する電界とを含んでいる。ここで、誘電体基板の第1面は平坦な面である。従って、誘電体基板の内部を貫通する電界に対する、誘電体基板の情報の空気層を通過する電界の割合は増加しない。 The technology for adjusting the impedance of the microstrip line by forming a groove on the second surface of the dielectric substrate disclosed in Patent Document 1 can also be applied to this coplanar waveguide. In this case, the electric field in the direction from the signal wiring toward the first conductor films on both sides includes an electric field penetrating the inside of the dielectric substrate and an electric field passing through the air layer above the dielectric substrate. Here, the first surface of the dielectric substrate is a flat surface. Therefore, the ratio of the electric field passing through the air layer of information on the dielectric substrate to the electric field penetrating the inside of the dielectric substrate does not increase.
 ガラスやシリコンなどの誘電体基板の誘電正接は空気層の誘電正接に比べて大きい。したがって、誘電体基板は空気層よりも電気エネルギーの損失(以後、「誘電損失」という)が大きい。ここで、「誘電正接(タンジェントデルタ)」とは、信号配線と接地面により形成されるコンデンサ内での誘電損失の度合いを表す数値である。 The dielectric loss tangent of dielectric substrates such as glass and silicon is larger than the dielectric loss tangent of the air layer. Therefore, the dielectric substrate has a greater loss of electrical energy (hereinafter referred to as “dielectric loss”) than the air layer. Here, “dielectric loss tangent (tangent delta)” is a numerical value representing the degree of dielectric loss in the capacitor formed by the signal wiring and the ground plane.
 したがって、誘電体基板の第2面に溝が形成されたコプレーナ導波路では、誘電損失を小さくすることができない。 Therefore, the dielectric loss cannot be reduced in the coplanar waveguide in which the groove is formed on the second surface of the dielectric substrate.
 本発明は、上記問題点に鑑みて成されたものであり、その目的は、誘電損失が小さく伝達特性が優れた伝送線路を提供することである。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a transmission line having a small dielectric loss and excellent transmission characteristics.
 上記課題を解決するため、本発明の伝送線路は、誘電体基板と信号配線とを有する前記誘電体基板は、第1面及び第2面を有しており、前記第2面は、前記第1面と反対側に位置しており、前記誘電体基板は、前記第1面に、第1領域を有しており、前記誘電体基板は、前記第2面に、裏面電極が設けられており、前記信号配線は、信号を伝送するように構成されており、長さと幅とを有しており、長さ方向の一端に第1端を有しており、前記第1端は、前記第1領域に配置されており、前記第1端は、前記裏面電極と電気的に接続されており、前記第1領域は、前記裏面電極と、前記誘電体基板の厚み方向において重複している
 この場合、誘電損失が小さく伝達特性が優れた伝送線路が得られる。
In order to solve the above-described problem, in the transmission line of the present invention, the dielectric substrate having a dielectric substrate and a signal wiring has a first surface and a second surface, and the second surface is the first surface. The dielectric substrate has a first region on the first surface, and the dielectric substrate is provided with a back electrode on the second surface. The signal wiring is configured to transmit a signal, has a length and a width, has a first end at one end in the length direction, and the first end is The first region is disposed in a first region, the first end is electrically connected to the back electrode, and the first region overlaps the back electrode in the thickness direction of the dielectric substrate. In this case, a transmission line having a small dielectric loss and excellent transmission characteristics can be obtained.
 前記誘電体基板は、前記第1領域に第1凹部が形成されており、前記第1凹部は、第1内面を有しており、前記信号配線の一端は、第1内面に配置されていることが好ましい。 The dielectric substrate has a first recess formed in the first region, the first recess has a first inner surface, and one end of the signal wiring is disposed on the first inner surface. It is preferable.
 前記第1内面は底面を含んでおり、前記信号配線の前記第1端は、前記底面に配置されており、前記誘電体基板は、前記第1面に、表面グラウンド電極が設けられており、前記表面グラウンド電極は、前記信号配線と電気的に絶縁されており、前記誘電体基板は、前記第2面に、裏面グラウンド電極が設けられており、前記裏面グラウンド電極は、前記信号配線と電気的に絶縁されていることが好ましい。 The first inner surface includes a bottom surface, the first end of the signal wiring is disposed on the bottom surface, and the dielectric substrate is provided with a surface ground electrode on the first surface, The front surface ground electrode is electrically insulated from the signal wiring, and the dielectric substrate is provided with a rear surface ground electrode on the second surface, and the rear surface ground electrode is electrically connected to the signal wiring. Is preferably electrically insulated.
 この場合、誘電体基板の第1面に第1凹部が形成されている。信号配線は、第1凹部の底面に配置されている。したがって、第1面上に信号配線が配置された伝送線路に比べて、信号配線と裏面グラウンド電極との距離を短くすることができる。そしてこの場合、所望のインピーダンスを有する伝送線路が得られる。また同時に、信号配線は、第1凹部の底面に配置されている。この場合、信号配線と表面グラウンド電極との間に、電束が形成される。この電束は、誘電体基板の内部を通る電束と空気層を通る電束とに分けられる。そして、この構成は、空気層を通る電束を、誘電体基板の内部を通る電束よりも多くすることができる。空気層は、誘電体基板よりも誘電損失が少ない。その結果、誘電損失を低減することができる。 In this case, a first recess is formed on the first surface of the dielectric substrate. The signal wiring is disposed on the bottom surface of the first recess. Therefore, the distance between the signal wiring and the back surface ground electrode can be shortened as compared with the transmission line in which the signal wiring is arranged on the first surface. In this case, a transmission line having a desired impedance is obtained. At the same time, the signal wiring is disposed on the bottom surface of the first recess. In this case, an electric flux is formed between the signal wiring and the surface ground electrode. This electric flux is divided into an electric flux passing through the inside of the dielectric substrate and an electric flux passing through the air layer. This configuration can increase the electric flux passing through the air layer more than the electric flux passing through the inside of the dielectric substrate. The air layer has less dielectric loss than the dielectric substrate. As a result, dielectric loss can be reduced.
 前記第1凹部は、前記第1面に沿った長さを有しており、前記第1内面の底面は、前記第1凹部の長さ方向に沿った長さを有しており、前記信号配線の全ては、前記底面に配置されていることが好ましい。 The first recess has a length along the first surface, and a bottom surface of the first inner surface has a length along a length direction of the first recess, and the signal All of the wiring is preferably arranged on the bottom surface.
 前記誘電体基板は、その前記第2面に、第2凹部が形成されており、前記第2凹部は、前記第1凹部と前記誘電体基板の厚み方向において重複するように形成されており、前記第2凹部は、第2内面を有しており、前記裏面グラウンド電極は、前記第2面及び前記第2内面に形成されていることが好ましい。 The dielectric substrate has a second recess formed on the second surface thereof, and the second recess is formed to overlap the first recess in the thickness direction of the dielectric substrate, It is preferable that the second recess has a second inner surface, and the back ground electrode is formed on the second surface and the second inner surface.
 前記第2凹部の周縁は、前記第1凹部の周縁と前記誘電体基板の厚み方向において位置合わせされていることが好ましい。 It is preferable that the periphery of the second recess is aligned with the periphery of the first recess in the thickness direction of the dielectric substrate.
 前記第1内面は、傾斜面を有しており、前記傾斜面は、前記第1面に対して鋭角に交差するように、前記第1面に対して傾斜しており、前記信号配線の第1端の一部は、前記傾斜面に設けられていることが好ましい。 The first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface. It is preferable that a part of one end is provided on the inclined surface.
 この場合、第1凹部の傾斜面は、第1面に対して鋭角で交わる。そして、信号配線の一端の一部は、傾斜面上に配置されている。これにより、第1面から第2面に貫通する貫通孔に埋め込まれた貫通ビアを介して信号配線を裏面電極に電気的に接続する場合に比べて、貫通ビアを短くすることができる。したがって、貫通ビアによるインピーダンスの不整合が抑制される。その結果、高周波の伝送特性が高い伝送線路が得られる。 In this case, the inclined surface of the first recess intersects the first surface at an acute angle. A part of one end of the signal wiring is disposed on the inclined surface. Accordingly, the through via can be shortened as compared with the case where the signal wiring is electrically connected to the back electrode via the through via embedded in the through hole penetrating from the first surface to the second surface. Therefore, impedance mismatch due to the through via is suppressed. As a result, a transmission line with high frequency transmission characteristics can be obtained.
 前記凹部は、内径を有しており、前記内径は誘電体基板の第1面から第2面に向かうに伴って小さくなるように形成されており、これにより、前記凹部は前記傾斜面を有していることが好ましい。 The recess has an inner diameter, and the inner diameter is formed so as to decrease from the first surface to the second surface of the dielectric substrate, whereby the recess has the inclined surface. It is preferable.
 前記第1内面は、さらに底面を有しており、前記誘電体基板は、前記第2面から前記底面に貫通する貫通配線が設けられており、前記貫通配線は、前記裏面電極と電気的に接続されており、前記信号配線の一端は、前記底面に配置されており、前記貫通配線と電気的に接続されていることが好ましい。 The first inner surface further has a bottom surface, and the dielectric substrate is provided with a through wiring penetrating from the second surface to the bottom surface, and the through wiring is electrically connected to the back electrode. It is preferable that one end of the signal wiring is disposed on the bottom surface and is electrically connected to the through wiring.
 前記誘電体基板は、前記第2面から前記底面に延びる貫通孔が形成されており、前記貫通配線は、前記貫通孔に配置されていることが好ましい。 It is preferable that the dielectric substrate has a through hole extending from the second surface to the bottom surface, and the through wiring is disposed in the through hole.
 前記誘電体基板は、前記第2面に第2凹部が形成されており、前記誘電体基板は、前記第2面及び前記第2凹部に、裏面グラウンド電極が設けられており、前記裏面グラウンド電極は、前記裏面電極から電気的に絶縁されており、前記裏面グラウンド電極は、前記信号配線から、前記誘電体基板の厚み方向において所定の距離離間しており、前記所定の距離は、前記信号配線の長さ方向にわたって一定であることが好ましい。 The dielectric substrate has a second recess formed on the second surface, and the dielectric substrate has a back surface ground electrode on the second surface and the second recess, and the back surface ground electrode Is electrically insulated from the back electrode, and the back ground electrode is separated from the signal wiring by a predetermined distance in the thickness direction of the dielectric substrate, and the predetermined distance is the signal wiring It is preferable that it is constant over the length direction.
 前記誘電体基板は、一対の表面グラウンド電極を有しており、前記表面グラウンド電極は、前記第1面及び前記傾斜面にわたって設けられており、前記表面グラウンド電極は、前記信号配線の両側に位置し、信号配線の幅方向に沿って並んでおり、前記信号配線と電気的に絶縁されるように前記信号配線から離間しており、前記信号配線は、配線傾斜部を有しており、前記配線傾斜部は前記傾斜面に位置しており、前記表面グラウンド電極は、電極傾斜部を有しており、電極傾斜部は前記傾斜面に位置しており、前記配線傾斜部は、前記電極傾斜部から、第1の距離離間しており、前記第1の距離は、前記表面グラウンド電極及び前記信号配線が前記第2面に近づくに伴って変化することが好ましい。 The dielectric substrate has a pair of surface ground electrodes, the surface ground electrodes are provided over the first surface and the inclined surface, and the surface ground electrodes are positioned on both sides of the signal wiring. Are arranged along the width direction of the signal wiring, and are separated from the signal wiring so as to be electrically insulated from the signal wiring, and the signal wiring has a wiring inclined portion, The wiring inclined portion is located on the inclined surface, the surface ground electrode has an electrode inclined portion, the electrode inclined portion is located on the inclined surface, and the wiring inclined portion is the electrode inclined portion. It is preferable that the first distance is separated from the portion, and the first distance changes as the surface ground electrode and the signal wiring approach the second surface.
 前記誘電体基板は、さらに、一対の貫通グラウンド配線を有しており、前記一対の貫通グラウンドそれぞれは、前記誘電体基板の前記第2面から前記第1面に貫通しており、前記貫通グラウンドは、前記貫通配線の両側に位置しており、前記信号配線の幅方向に沿って配置されており、前記貫通配線と電気的に絶縁されており、前記一対の貫通グラウンドは、前記一対の表面グラウンド電極と、それぞれ電気的に接続されていることが好ましい。 The dielectric substrate further includes a pair of through-ground wirings, each of the pair of through-grounds penetrating from the second surface to the first surface of the dielectric substrate, and the through-ground Is located on both sides of the through wiring, is disposed along the width direction of the signal wiring, is electrically insulated from the through wiring, and the pair of through grounds is the pair of surfaces It is preferable to be electrically connected to the ground electrode.
 前記誘電体基板は、前記第1領域に穴が形成されており、前記穴は前記第2面から前記第1面に貫通しており、前記穴は、第1内面を有しており、前記信号配線は、前記第1面から前記第1内面を介して前記裏面電極に延びていることが好ましい。 The dielectric substrate has a hole formed in the first region, the hole penetrates from the second surface to the first surface, and the hole has a first inner surface, The signal wiring preferably extends from the first surface to the back electrode via the first inner surface.
 前記第1内面は、傾斜面を有しており、前記傾斜面は、前記第1面に対して鋭角に交差するように、前記第1面に対して傾斜しており、前記信号配線の第1端の一部は、前記傾斜面に設けられていることが好ましい。 The first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface. It is preferable that a part of one end is provided on the inclined surface.
 前記穴は、絶縁性を有する樹脂により充填されていることが好ましい。 It is preferable that the hole is filled with an insulating resin.
本発明の実施形態1に関わる伝送線路を用いたマイクロリレーの外観を示す斜視図である。It is a perspective view which shows the external appearance of the micro relay using the transmission line in connection with Embodiment 1 of this invention. 図1のベース20、機能部30、カバー40及び駆動装置50を積層方向(z方向)に分離した状態で示す斜視図である。FIG. 2 is a perspective view illustrating a state in which a base 20, a functional unit 30, a cover 40, and a driving device 50 in FIG. 1 are separated in a stacking direction (z direction). 図3(a)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態1に関わる伝送線路の構成を示す上面図である。図3(b)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態1に関わる伝送線路の底面図である。図3(c)は、図3(a)のA-A切断面に沿った断面図である。図3(d)は、変形例に関わる断面図である。FIG. 3A is a top view showing a configuration of a transmission line according to Embodiment 1 of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. FIG. 3B is a bottom view of the transmission line according to the first embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. FIG. 3C is a cross-sectional view taken along the line AA in FIG. FIG. 3D is a cross-sectional view relating to a modification. 本発明の実施形態1に係わる伝送線路が奏する作用効果を説明する図である。図4(a)は比較例に関わる伝送線路の断面図である。図4(b)は本発明の実施形態1に関わる伝送線路の断面図である。It is a figure explaining the effect which the transmission line concerning Embodiment 1 of the present invention shows. FIG. 4A is a cross-sectional view of a transmission line according to a comparative example. FIG. 4B is a cross-sectional view of the transmission line according to the first embodiment of the present invention. 図5(a)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態2に関わる伝送線路の構成を示す上面図である。図5(b)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態2に関わる伝送線路の構成の底面図である。図5(c)は、図5(a)のB-B切断面に沿った断面図である。図5(d)は、変形例に関わる断面図である。FIG. 5A is a top view showing a configuration of a transmission line according to the second embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. FIG.5 (b) is a bottom view of the structure of the transmission line concerning Embodiment 2 of this invention applied to the part enclosed with the dotted line G of FIG. FIG. 5C is a cross-sectional view taken along the line BB in FIG. FIG. 5D is a cross-sectional view relating to a modification. 図6(a)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態3に関わる伝送線路の構成を示す平面図であり、図6(b)は、図6(a)のA-A切断面に沿った断面図である。FIG. 6A is a plan view showing a configuration of a transmission line according to Embodiment 3 of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. 2, and FIG. It is sectional drawing along the AA cut surface of a). 図7(a)は、図2に示すベース20における点線Gで囲んだ部分の裏面構成を示す平面図であり、図7(b)は、図6(a)のB-B切断面における断面図である。7A is a plan view showing a back surface configuration of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG. 7B is a cross-sectional view taken along the line BB in FIG. 6A. FIG. 図8(a)は、図2の点線Gで囲んだ部分に適用される、本発明の実施形態4に関わる伝送線路の構成を示す平面図であり、図8(b)は、図8(a)のC-C切断面に沿った断面図であり、図8(c)は、図2に示すベース20における点線Gで囲んだ部分の裏面構成を示す平面図である。FIG. 8A is a plan view showing a configuration of a transmission line according to the fourth embodiment of the present invention, which is applied to a portion surrounded by a dotted line G in FIG. 2, and FIG. FIG. 8C is a cross-sectional view taken along the line CC of FIG. 8A, and FIG. 8C is a plan view showing a back surface configuration of a portion surrounded by a dotted line G in the base 20 shown in FIG. 図9(a)は、本発明の実施形態5に関わる伝送線路の構成を示す、実施形態3の図6(b)に対応するD-D切断面における断面図であり、図9(b)は、伝送線路の裏面構成を示す平面図である。FIG. 9 (a) is a cross-sectional view taken along the line DD in FIG. 6 (b) of the third embodiment, showing the configuration of the transmission line according to the fifth embodiment of the present invention. These are top views which show the back surface structure of a transmission line.
 以下図面を参照して、本発明の実施形態を説明する。図面の記載において同一部分には同一符号を付している。
(実施形態1)
 先ず、図1及び図2を参照して、本発明の実施形態1に関わる伝送線路を用いたマイクロリレーの構成を説明する。マイクロリレーは、MEMS構造体の一例である。本発明の実施形態1に関わるマイクロリレーは、高周波の電気信号を伝送し、且つ半導体プロセスを用いて作製される微小駆動機構を有するMEMSリレーである。更に、マイクロリレーは、常開接点と常閉接点とを備えた所謂ラッチング型リレーである。
Embodiments of the present invention will be described below with reference to the drawings. In the description of the drawings, the same parts are denoted by the same reference numerals.
(Embodiment 1)
First, with reference to FIG.1 and FIG.2, the structure of the micro relay using the transmission line in connection with Embodiment 1 of this invention is demonstrated. A micro relay is an example of a MEMS structure. The micro relay according to the first embodiment of the present invention is a MEMS relay that transmits a high-frequency electric signal and has a micro-drive mechanism manufactured using a semiconductor process. Further, the micro relay is a so-called latching type relay having a normally open contact and a normally closed contact.
 図1は、本実施形態のマイクロリレーの斜視図を示している。図1に示すように、マイクロリレーは、ベース20と、機能部30と、カバー40と、電磁石装置51を有する駆動装置50とを備えている。図2は、本実施形態のマイクロリレーの分解斜視図を示している。図2に示すように、マイクロリレーは、ベース20、機能部30、カバー40及び駆動装置50を有している。本発明の実施形態1に関わる伝送線路は、ベース20の一部分に用いられている。具体的に説明すると、本発明の実施形態1に関わる伝送線路は、ベース20の点線Gで囲んだ部分に用いられている。 FIG. 1 shows a perspective view of the microrelay of this embodiment. As shown in FIG. 1, the micro relay includes a base 20, a functional unit 30, a cover 40, and a driving device 50 having an electromagnet device 51. FIG. 2 shows an exploded perspective view of the microrelay of this embodiment. As shown in FIG. 2, the micro relay has a base 20, a functional unit 30, a cover 40, and a driving device 50. The transmission line according to the first embodiment of the present invention is used in a part of the base 20. If it demonstrates concretely, the transmission line in connection with Embodiment 1 of this invention is used for the part enclosed with the dotted line G of the base 20. FIG.
 次に、図2を参照して、ベース20、機能部30、カバー40及び駆動装置50の各構成を説明する。
ベース20は、ガラス基板21と、一対の信号配線10とを備える。ガラス基板21は、直方体状に形成されている。したがって、ガラス基板21は、長さと幅と厚みとを有する。ガラス基板21の幅方向は、図2のy方向に沿っている。ガラス基板21の長さ方向は、図2のx方向に沿っている。ガラス基板21の厚み方向は、図2のz方向に沿っている。ガラス基板21は、表面として機能する第1面を有しており、この第1面上に機能部30が配置されている。信号配線10は、第1面上に配置されている。一方の一対の信号配線10は、ガラス基板21の長手方向の一端に配置されており、他方の一対の信号配線10は、ガラス基板21の長手方向の他端に配置されている。一対の信号配線10は、それぞれ長さと幅とを有している。信号配線10は、ガラス基板21の幅方向に沿った長さを有するように配置されている。一対の信号配線10は、ガラス基板21の幅方向に沿って配置されている。
Next, with reference to FIG. 2, each structure of the base 20, the function part 30, the cover 40, and the drive device 50 is demonstrated.
The base 20 includes a glass substrate 21 and a pair of signal wirings 10. The glass substrate 21 is formed in a rectangular parallelepiped shape. Therefore, the glass substrate 21 has a length, a width, and a thickness. The width direction of the glass substrate 21 is along the y direction of FIG. The length direction of the glass substrate 21 is along the x direction of FIG. The thickness direction of the glass substrate 21 is along the z direction of FIG. The glass substrate 21 has the 1st surface which functions as a surface, and the function part 30 is arrange | positioned on this 1st surface. The signal wiring 10 is disposed on the first surface. One pair of signal wirings 10 is disposed at one end in the longitudinal direction of the glass substrate 21, and the other pair of signal wirings 10 is disposed at the other end in the longitudinal direction of the glass substrate 21. Each of the pair of signal wirings 10 has a length and a width. The signal wiring 10 is disposed so as to have a length along the width direction of the glass substrate 21. The pair of signal wirings 10 are arranged along the width direction of the glass substrate 21.
 信号配線10は、ガラス基板21の幅方向の一端に位置する第1端と、当該第1端と反対側の第2端とを有している。信号配線10は、第2端に固定接点26を有している。ガラス基板21の長手方向の両端側それぞれには、一対の固定接点26が配置されている。 The signal wiring 10 has a first end located at one end in the width direction of the glass substrate 21 and a second end opposite to the first end. The signal wiring 10 has a fixed contact 26 at the second end. A pair of fixed contacts 26 are disposed on both ends of the glass substrate 21 in the longitudinal direction.
 固定接点26は、例えば、銅(Cu)や金(Au)などの導電性が良好な金属材料からなる金属薄膜である。このような固定接点26は、スパッタ法や、電気めっき法、真空蒸着法などを利用して形成することができる。また、固定接点26は、単層構造に限らず、例えば、Au層と、Au層とベース20との間に介在されるTi層とからなる多層構造であってもよい。 The fixed contact 26 is a metal thin film made of a metal material having good conductivity such as copper (Cu) or gold (Au). Such a fixed contact 26 can be formed using a sputtering method, an electroplating method, a vacuum deposition method, or the like. The fixed contact 26 is not limited to a single layer structure, and may be a multilayer structure including, for example, an Au layer and a Ti layer interposed between the Au layer and the base 20.
 機能部30は、主として、可動部32と、可動部32を囲むフレーム33とを有する。可動部32及びフレーム33は、ガラス基板21の長さ方向に沿った長さを有しており、幅方向に沿った幅を有している。 The functional unit 30 mainly includes a movable part 32 and a frame 33 surrounding the movable part 32. The movable part 32 and the frame 33 have a length along the length direction of the glass substrate 21 and have a width along the width direction.
 フレーム33は、枠状に形成されている。フレーム33は、2つの第1の開口と、1つの第2の開口とを有している。具体的に説明すると、フレーム33は、その長さ方向の一端及び他端のそれぞれに、第1の開口31を有する。そして、フレーム33は、その中央に、第2の開口34を有する。従って、第2の開口34は、第1の開口31と第1の開口31との間に位置する。第1の開口31それぞれと第2の開口34とは、フレーム33の短手方向の中央部において互いに連通されている。また、フレームは、規制突起331を有する。この規制突起331は、フレームの幅方向の両端からフレームの内側に延出している。規制突起331は、第1の開口31と第2の開口34との間に位置する。この規制突起331は、可動部32がフレーム33の長手方向に沿った方向への移動を妨げる。また、フレーム33の外形サイズは、ベース20の外形サイズと等しい。 The frame 33 is formed in a frame shape. The frame 33 has two first openings and one second opening. More specifically, the frame 33 has first openings 31 at one end and the other end in the length direction. The frame 33 has a second opening 34 at the center thereof. Therefore, the second opening 34 is located between the first opening 31 and the first opening 31. Each of the first openings 31 and the second openings 34 are in communication with each other at the central portion of the frame 33 in the short direction. Further, the frame has a regulation protrusion 331. The restriction protrusions 331 extend from the both ends in the width direction of the frame to the inside of the frame. The restricting protrusion 331 is located between the first opening 31 and the second opening 34. The restriction protrusion 331 prevents the movable part 32 from moving in the direction along the longitudinal direction of the frame 33. The outer size of the frame 33 is equal to the outer size of the base 20.
 可動部32は、本体部320と、接点用突片321とを有している。可動部32は、本体部320が第2の開口34の内側に配置されるようにフレーム33の内側に配置されている。また、可動部32は、接点用突片321がフレーム33の第1の開口31の内側に配置されるように、フレーム33の内側に配置されている。本体部320は、矩形板状に形成されている。接点用突片321は、本体部320の長手方向の両端それぞれに位置し、本体部320の幅方向の中央から本体部320の長手方向外方に向かって突設されている。接点用突片321の先端部は、第1の開口31内に配置されている。接点用突片321は、下面を有しており、この下面はベース20の第1面と対向している。接点用突片321は、その下面に可動接点322が設けられている。可動接点322が一対の固定接点26それぞれに同時に接触した時、可動接点322は当該一対の固定接点26間を短絡させる。一方、本体部320は、支点用突片323が設けられている。この支点用突片323は、本体部320の幅方向の両端に位置し、且つ、長さ方向の中央に位置する。支点用突片323は、上面を有しており、この上面はカバー40の下面と対向している。支点用突片323は、その上面に支点突起324が設けられている。支点突起324は、可動部32の揺動動作の支点として使用される。言い換えると、可動部32は、支点突起324を中心に揺動するようにフレーム33の内側に配置される。 The movable part 32 has a main body part 320 and a contact protrusion 321. The movable part 32 is arranged inside the frame 33 so that the main body part 320 is arranged inside the second opening 34. The movable portion 32 is disposed inside the frame 33 such that the contact protrusion 321 is disposed inside the first opening 31 of the frame 33. The main body 320 is formed in a rectangular plate shape. The contact protrusions 321 are located at both ends in the longitudinal direction of the main body 320, and project from the center in the width direction of the main body 320 toward the outside in the longitudinal direction of the main body 320. The tip of the contact protrusion 321 is disposed in the first opening 31. The contact protrusion 321 has a lower surface, and the lower surface faces the first surface of the base 20. The contact protrusion 321 is provided with a movable contact 322 on the lower surface thereof. When the movable contact 322 contacts each of the pair of fixed contacts 26 simultaneously, the movable contact 322 causes the pair of fixed contacts 26 to be short-circuited. On the other hand, the main body 320 is provided with a fulcrum protrusion 323. The fulcrum protrusions 323 are located at both ends in the width direction of the main body 320 and at the center in the length direction. The fulcrum protrusion 323 has an upper surface, and this upper surface faces the lower surface of the cover 40. The fulcrum protrusion 323 is provided with a fulcrum protrusion 324 on the upper surface thereof. The fulcrum protrusion 324 is used as a fulcrum for the swinging motion of the movable part 32. In other words, the movable part 32 is disposed inside the frame 33 so as to swing around the fulcrum protrusion 324.
 可動部32は、複数(例えば4つ)の支持片35によりフレーム33と一体に連結されている。各支持片35は、フレーム33の第2の開口34の長手方向の両端に位置する内側面と、本体部320の幅方向の外側面とを一体に連結している。4つの支持片35は、本体部320の中心に対して点対称となる位置に配置されている。 The movable portion 32 is integrally connected to the frame 33 by a plurality of (for example, four) support pieces 35. Each support piece 35 integrally connects the inner side surface located at both ends in the longitudinal direction of the second opening 34 of the frame 33 and the outer side surface of the main body 320 in the width direction. The four support pieces 35 are arranged at positions that are point-symmetric with respect to the center of the main body 320.
 支持片35は、積層方向(z方向)に直交する平面内で本体部320の長手方向に沿った方向に蛇行しながら進む曲線形状を有する。これによって、可動部32はフレーム33に対して揺動自在に支持される。支持片35を蛇行形状に形成することで、支持片35の長さを長くできる。そのため、可動部32が揺動する際に支持片35がねじられることで生じるばね力のばね定数を適切に小さくすることができ、支持片35に加えられる応力も分散することができる。 The support piece 35 has a curved shape that advances while meandering in a direction along the longitudinal direction of the main body 320 in a plane orthogonal to the stacking direction (z direction). Thereby, the movable part 32 is supported so as to be swingable with respect to the frame 33. By forming the support piece 35 in a meandering shape, the length of the support piece 35 can be increased. Therefore, the spring constant of the spring force generated when the support piece 35 is twisted when the movable portion 32 swings can be appropriately reduced, and the stress applied to the support piece 35 can also be dispersed.
 可動部32、フレーム33及び支持片35は、例えば、50μm~300μm程度、好ましくは200μm程度の厚みの半導体基板(例えば、シリコン基板や、SOI基板)をフォトリソグラフィ技術およびエッチング技術などの半導体微細加工技術を利用してパターニングすることにより形成することができる。 The movable part 32, the frame 33, and the support piece 35 are formed by, for example, a semiconductor substrate (for example, a silicon substrate or an SOI substrate) having a thickness of about 50 μm to 300 μm, preferably about 200 μm, such as photolithography technology and etching technology. It can be formed by patterning using technology.
 可動部32は、その本体部320の上面側に、磁性板60が設けられている。磁性板60は、例えば、電磁軟鉄、電磁ステンレス、パーマロイなどの磁性材料を矩形板状に機械加工したものからなり、接着、溶接、熱着、或いはロウ付けなどの方法で本体部320に接合される。磁性板60は、駆動装置50の電磁石装置51が発生する磁場により可動部32を揺動させるために使用される。一方、可動部32の下面には、レシジュアル70が設けられている。レシジュアル70は、可動部32とベース20との距離を好適な距離に設定するために使用される。 The movable part 32 is provided with a magnetic plate 60 on the upper surface side of the main body part 320. The magnetic plate 60 is made of, for example, a magnetic material such as electromagnetic soft iron, electromagnetic stainless steel, and permalloy machined into a rectangular plate shape, and is joined to the main body 320 by a method such as adhesion, welding, heat fitting, or brazing. The The magnetic plate 60 is used for swinging the movable portion 32 by a magnetic field generated by the electromagnet device 51 of the driving device 50. On the other hand, a sequential 70 is provided on the lower surface of the movable portion 32. The sequential 70 is used to set the distance between the movable part 32 and the base 20 to a suitable distance.
 上記した機能部30のフレーム33は、可動接点322と一対の固定接点26とがそれぞれ対向するように、ベース20に接合される。これにより、機能部30はベース20の第1面側に取り付けられる。なお、フレーム33をベース20に接合するにあたっては、接合用の金属層(図示せず)を用いることができる。当該金属層は、グラウンドとして利用される。 The frame 33 of the functional unit 30 described above is joined to the base 20 so that the movable contact 322 and the pair of fixed contacts 26 face each other. Thereby, the functional unit 30 is attached to the first surface side of the base 20. In joining the frame 33 to the base 20, a joining metal layer (not shown) can be used. The metal layer is used as a ground.
 カバー40は、例えば、直方体状のガラス基板45と、閉塞板42とを有する。ガラス基板45の外形サイズは、ベース20の外形サイズと等しい。ガラス基板45の中央部には、ガラス基板45を厚み方向(z方向)に貫通する開孔部41が形成されている。閉塞板42は、ガラス基板45の下面に密着接合され、開孔部41全体を閉塞している。したがって、カバー40は、上方が開口した凹部が形成されている。詳しく説明すると、カバー40は、開孔部41の内周面と閉塞板42とで定義される凹部を有する。この凹部には、駆動装置50が配置される。閉塞板42は、例えば、厚みが5~50μm程度、好ましくは20μm程度に形成されたシリコン板やガラス板などの薄板からなる。カバー40は、フレーム33におけるベース20側とは反対側の面(図2における上面)に接合される。なお、ガラス基板45をフレーム33に接合するにあたっては、接合用の金属層(図示せず)を用いることができる。当該金属層は、高周波用のシールド層として利用することができる。ただし、駆動装置50の磁場を遮断することがないように、当該金属層の材料には、非磁性体を用いる。 The cover 40 includes, for example, a rectangular parallelepiped glass substrate 45 and a closing plate 42. The outer size of the glass substrate 45 is equal to the outer size of the base 20. In the central portion of the glass substrate 45, an opening 41 is formed that penetrates the glass substrate 45 in the thickness direction (z direction). The closing plate 42 is tightly bonded to the lower surface of the glass substrate 45 and closes the entire opening 41. Therefore, the cover 40 is formed with a recess having an upper opening. More specifically, the cover 40 has a recess defined by the inner peripheral surface of the opening 41 and the closing plate 42. The driving device 50 is disposed in the recess. The closing plate 42 is made of, for example, a thin plate such as a silicon plate or a glass plate having a thickness of about 5 to 50 μm, preferably about 20 μm. The cover 40 is joined to the surface of the frame 33 opposite to the base 20 (upper surface in FIG. 2). In joining the glass substrate 45 to the frame 33, a joining metal layer (not shown) can be used. The metal layer can be used as a high-frequency shield layer. However, a nonmagnetic material is used as the material of the metal layer so as not to block the magnetic field of the driving device 50.
 駆動装置50は、磁性板60を吸引する磁場を発生させる電磁石装置51と、可動部32をラッチするための永久磁石52とを備えている。電磁石装置51は、主として、ヨーク53と、一対のコイル54とを備えている。ヨーク53は、長尺矩形板状の主片530と、主片530の表面側(図2における下面側)の長手方向両端部それぞれに突設された矩形板状の脚片531とを一体に備えている。このようなヨーク53は、電磁軟鉄などの鉄板を曲げ加工あるいは鍛造加工することにより形成されている。永久磁石52は、直方体状に形成され、上面側と下面側とが互いに異極となるように着磁されている。永久磁石52は、その上面がヨーク53の主片530の上面の長手方向中央部に当接するようにして、ヨーク53に取り付けられる。各コイル54は、主片530における各脚片531と永久磁石52との間に位置するようにそれぞれに巻回される。また、駆動装置50には、一対のコイル端子55が設けられている。これら一対のコイル端子55の間に電圧が印加されると、各コイル54に電流が流れる。このような駆動装置50は、カバー40の上記収納室に収納される。 The driving device 50 includes an electromagnet device 51 that generates a magnetic field that attracts the magnetic plate 60 and a permanent magnet 52 that latches the movable portion 32. The electromagnet device 51 mainly includes a yoke 53 and a pair of coils 54. The yoke 53 integrally has a long rectangular plate-shaped main piece 530 and rectangular plate-shaped leg pieces 531 that protrude from both ends in the longitudinal direction on the surface side (the lower surface side in FIG. 2) of the main piece 530. I have. Such a yoke 53 is formed by bending or forging an iron plate such as electromagnetic soft iron. The permanent magnet 52 is formed in a rectangular parallelepiped shape, and is magnetized so that the upper surface side and the lower surface side have different polarities. The permanent magnet 52 is attached to the yoke 53 so that the upper surface thereof is in contact with the longitudinal center of the upper surface of the main piece 530 of the yoke 53. Each coil 54 is wound around the main piece 530 so as to be positioned between each leg piece 531 and the permanent magnet 52. The drive device 50 is provided with a pair of coil terminals 55. When a voltage is applied between the pair of coil terminals 55, a current flows through each coil 54. Such a driving device 50 is stored in the storage chamber of the cover 40.
 なお、図1および図2に示すマイクロリレーでは、コイル54に通電するための駆動電極(図示せず)がガラス基板21の第2面に形成されている。また、ガラス基板45の上面に、コイル端子55が接続される配線パターン43が形成されている。ここで、上記した駆動電極と配線パターン43とは、ガラス基板21を積層方向に貫通する貫通ビア27と、フレーム33を厚み方向に貫通する貫通ビア36と、カバー40を厚み方向に貫通する貫通ビア44とによって、電気的に接続されている。 In the microrelay shown in FIGS. 1 and 2, a drive electrode (not shown) for energizing the coil 54 is formed on the second surface of the glass substrate 21. A wiring pattern 43 to which the coil terminal 55 is connected is formed on the upper surface of the glass substrate 45. Here, the drive electrode and the wiring pattern 43 described above are a through via 27 that penetrates the glass substrate 21 in the stacking direction, a through via 36 that penetrates the frame 33 in the thickness direction, and a penetration that penetrates the cover 40 in the thickness direction. The vias 44 are electrically connected.
 また、図1及び図2には示されていないが、各信号配線10の第1端は、ガラス基板21を貫通する孔の内部に埋め込まれた貫通信号配線を介して、ガラス基板21の第2面上に配置された裏面取出電極に電気的に接続されている。本発明の実施形態1に関わる伝送線路は、信号配線10、貫通信号配線12、及び裏面電極13を含む、図2の点線Gで囲んだ部分に適用される。 Although not shown in FIGS. 1 and 2, the first end of each signal wiring 10 is connected to the first end of the glass substrate 21 via a penetration signal wiring embedded in a hole that penetrates the glass substrate 21. It is electrically connected to the back surface extraction electrode arranged on the two surfaces. The transmission line according to the first embodiment of the present invention is applied to a portion surrounded by a dotted line G in FIG. 2 including the signal wiring 10, the through signal wiring 12, and the back electrode 13.
 次に、図3(a)~図3(c)を参照して、図2に示すベース20における点線Gで囲んだ部分に適用される、本発明の実施形態1に関わる伝送線路の構成を説明する。図3(a)は、図2に示すベース20における点線Gで囲んだ部分の第1面を示す平面図であり、図3(b)は、第2面を示す平面図であり、図3(c)は、図3(a)のA-A切断面に沿った断面図である。 Next, with reference to FIGS. 3A to 3C, the configuration of the transmission line according to the first embodiment of the present invention applied to the portion surrounded by the dotted line G in the base 20 shown in FIG. explain. 3A is a plan view showing a first surface of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG. 3B is a plan view showing a second surface. FIG. 3C is a cross-sectional view taken along the line AA in FIG.
 本発明の実施形態1に関わる伝送線路は、MEMS構造体に用いられる伝送線路であって、ガラス基板21と、信号配線10と、表面グラウンド電極11と、裏面グラウンド電極14とを有する。ガラス基板21は、誘電体基板の一例として使用される。ガラス基板21は、第1面F1及び第2面F2を有する。第2面F2は、第1面F1の反対側に位置する。また、ガラス基板21は、第1面F1に第1領域を有している。また、ガラス基板21は、第1面F1の第1領域に第1凹部Ca1が形成されている。言い換えると、第1凹部Ca1が、第1面F1の第1領域を定義する。この第1凹部Ca1は、底面BTと側面とで構成される第1内面を有している。信号配線10は、第1凹部Ca1の底面BT上に配置されている。より詳しく説明すると、信号配線10全ては、第1凹部Ca1の底面BT上に配置されている。したがって、信号配線10の第1端も、第1領域たる第1凹部Ca1の底面BTに配置されている。信号配線10は、高周波信号を伝送するために設けられている。表面グラウンド電極11は、第1面F1に設けられており、且つ、信号配線10から電気的に絶縁されている。裏面グラウンド電極14は、第2面F2上に配置されている。裏面グラウンド電極14は、ガラス基板21を介して離間している。したがって、裏面グラウンド電極14は、信号配線10から電気的に絶縁されている。 The transmission line according to Embodiment 1 of the present invention is a transmission line used for the MEMS structure, and includes a glass substrate 21, a signal wiring 10, a front surface ground electrode 11, and a back surface ground electrode 14. The glass substrate 21 is used as an example of a dielectric substrate. The glass substrate 21 has a first surface F1 and a second surface F2. The second surface F2 is located on the opposite side of the first surface F1. Further, the glass substrate 21 has a first region on the first surface F1. Further, the glass substrate 21 has a first recess Ca1 formed in the first region of the first surface F1. In other words, the first recess Ca1 defines the first region of the first surface F1. This 1st recessed part Ca1 has the 1st inner surface comprised by the bottom face BT and the side surface. The signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. More specifically, all the signal wirings 10 are disposed on the bottom surface BT of the first recess Ca1. Therefore, the first end of the signal wiring 10 is also disposed on the bottom surface BT of the first recess Ca <b> 1 that is the first region. The signal wiring 10 is provided for transmitting a high frequency signal. The surface ground electrode 11 is provided on the first surface F <b> 1 and is electrically insulated from the signal wiring 10. The back surface ground electrode 14 is disposed on the second surface F2. The back surface ground electrode 14 is separated via the glass substrate 21. Therefore, the back surface ground electrode 14 is electrically insulated from the signal wiring 10.
 図3(a)の信号配線10は、1つの線状の配線であって、その両端において貫通配線12に接触している。図2のベース20における信号配線10に適用する場合、図3の信号配線10の長さ方向の中央部分を取り除くことにより、1対の信号配線10とされる。 The signal wiring 10 in FIG. 3A is one linear wiring, and is in contact with the through wiring 12 at both ends thereof. When applied to the signal wiring 10 in the base 20 of FIG. 2, a pair of signal wirings 10 is formed by removing the central portion in the length direction of the signal wiring 10 of FIG.
 貫通配線12は、ガラス基板21の第1面F1から第2面F2までを貫通している。貫通配線12は、第1面F1側に位置する一端において信号配線10に接触している。貫通配線12は、その第2面F2側に位置する一端において、第2面F2上に配置された裏面電極13と電気的に接続されている。貫通配線12は円柱状の形状を有している。裏面電極13は、貫通配線12と、ガラス基板21の厚み方向において重複している。裏面電極13は、貫通配線12と同じ円形の平面形状を有する。 The through wiring 12 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21. The through wiring 12 is in contact with the signal wiring 10 at one end located on the first surface F1 side. The through wiring 12 is electrically connected to the back surface electrode 13 disposed on the second surface F2 at one end located on the second surface F2 side. The through wiring 12 has a cylindrical shape. The back electrode 13 overlaps the through wiring 12 in the thickness direction of the glass substrate 21. The back electrode 13 has the same circular planar shape as the through wiring 12.
 表面グラウンド電極11には線状の空隙部が設けられている。信号配線は、線状の導体箔で構成されている。信号配線10は、前記空隙部の内側に位置するように、ガラス基板21の上面に配置されている。これにより、信号配線10は、線状のスリットにはさまれる。この線状のスリット及び信号配線10は、信号配線10の幅方向に沿って配列される。表面グラウンド電極11には接地電位が印加されている。信号配線10とその両側の表面グラウンド電極11との間に形成される電界により電磁波が伝送される。また、信号配線10と表面グラウンド電極11との距離に調整することにより伝送線路の特性インピーダンスを任意に設計することができる。信号配線10と表面グラウンド電極11の隙間にはガラス基板21が露出している。これにより、前記信号配線10は、表面グラウンド電極11から電気的に絶縁されている。 The surface ground electrode 11 is provided with a linear gap. The signal wiring is composed of a linear conductor foil. The signal wiring 10 is disposed on the upper surface of the glass substrate 21 so as to be located inside the gap. As a result, the signal wiring 10 is sandwiched between the linear slits. The linear slits and the signal wiring 10 are arranged along the width direction of the signal wiring 10. A ground potential is applied to the surface ground electrode 11. Electromagnetic waves are transmitted by an electric field formed between the signal wiring 10 and the surface ground electrodes 11 on both sides thereof. Further, the characteristic impedance of the transmission line can be arbitrarily designed by adjusting the distance between the signal wiring 10 and the surface ground electrode 11. A glass substrate 21 is exposed in the gap between the signal wiring 10 and the surface ground electrode 11. Thereby, the signal wiring 10 is electrically insulated from the surface ground electrode 11.
 表面グラウンド電極11は、貫通グラウンド配線15に電気的に接続されている。貫通グラウンド配線15は、ガラス基板21の第1面F1から第2面F2までを貫通し、その第1面F1側の一端において表面グラウンド電極11に接触し、その第2面F2側端部において裏面グラウンド電極14に接触している。貫通グラウンド配線15は円柱状の形状を有している。実施形態1では、信号配線10の両側において、対を成す2つの貫通グラウンド配線15が配置されている。 The surface ground electrode 11 is electrically connected to the through ground wiring 15. The through-ground wiring 15 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21, contacts the surface ground electrode 11 at one end on the first surface F1 side, and at the end on the second surface F2 side. It is in contact with the back ground electrode 14. The through-ground wiring 15 has a cylindrical shape. In the first embodiment, two through-ground wirings 15 forming a pair are arranged on both sides of the signal wiring 10.
 裏面グラウンド電極14は、ガラス基板21の第2面F2のうち、裏面電極13が形成された領域及び裏面電極13の周辺領域を除いた部分に配置されている。即ち、裏面グラウンド電極14は、裏面電極13から所定の距離離間している。伝送線路の特性インピーダンスは、裏面グラウンド電極14の裏面電極13からの距離を調整することにより任意の値を持つように設計できる。裏面グラウンド電極14と裏面電極13との隙間にはガラス基板21が露出している。したがって、裏面グラウンド電極14は、裏面電極13から電気的に絶縁されている。 The back surface ground electrode 14 is disposed on a portion of the second surface F2 of the glass substrate 21 excluding the region where the back electrode 13 is formed and the peripheral region of the back electrode 13. That is, the back surface ground electrode 14 is separated from the back surface electrode 13 by a predetermined distance. The characteristic impedance of the transmission line can be designed to have an arbitrary value by adjusting the distance from the back surface electrode 13 to the back surface ground electrode 14. The glass substrate 21 is exposed in the gap between the back ground electrode 14 and the back electrode 13. Therefore, the back surface ground electrode 14 is electrically insulated from the back surface electrode 13.
 図3(c)に示すように、ガラス基板21の第1面F1上には第1凹部Ca1が形成されている。第1凹部Ca1は第2面F2の反対側に位置する底面BT及び側面によって構成されている。第1凹部Ca1は、幅を有している。この第1凹部Ca1の幅は、第1面F1から第2面F2に向かうに伴って、徐々に小さくなっている。また、第1凹部Ca1は、ガラス基板21の幅方向に沿った長さと、ガラス基板21の長さ方向に沿った幅を有している。したがって、第1凹部Ca1は、第1面F1に沿った長さを有している。信号配線10は、底面BTの長さ方向に沿って配置されており、且つ、底面BTの幅方向の中央部分に配置されている。 As shown in FIG. 3 (c), a first recess Ca1 is formed on the first surface F1 of the glass substrate 21. 1st recessed part Ca1 is comprised by the bottom face BT and side surface which are located in the other side of 2nd surface F2. The first recess Ca1 has a width. The width of the first concave portion Ca1 is gradually reduced from the first surface F1 toward the second surface F2. The first recess Ca <b> 1 has a length along the width direction of the glass substrate 21 and a width along the length direction of the glass substrate 21. Accordingly, the first recess Ca1 has a length along the first surface F1. The signal wiring 10 is disposed along the length direction of the bottom surface BT, and is disposed at the center of the bottom surface BT in the width direction.
 図3(c)に示すように、底面BTは、側面と交わる交線を有する。信号配線10の幅方向の一端から交線までの距離は、信号配線10の幅の0~2倍までの範囲が望ましい。また、第1凹部Ca1の側面は、底面BTに対して直角とは異なる所定の角度傾斜している。しかしながら、第1凹部Ca1の側面は、底面BTと直角に交差してもかまわない。 As shown in FIG. 3C, the bottom surface BT has an intersection line intersecting the side surface. The distance from one end of the signal wiring 10 in the width direction to the intersection line is preferably in the range of 0 to 2 times the width of the signal wiring 10. Further, the side surface of the first recess Ca1 is inclined at a predetermined angle different from the right angle with respect to the bottom surface BT. However, the side surface of the first recess Ca1 may intersect the bottom surface BT at a right angle.
 表面グラウンド電極11は、第1凹部Ca1の側面の上端部まで配置されている。換言すれば、表面グラウンド電極11は、第1凹部Ca1を除くガラス基板21の第1面F1全体に配置されている。 The surface ground electrode 11 is disposed up to the upper end of the side surface of the first recess Ca1. In other words, the surface ground electrode 11 is disposed on the entire first surface F1 of the glass substrate 21 excluding the first recess Ca1.
 次に、図3に示した伝送線路の製造方法の一例を説明する。例えば、500μmの厚みを有するガラス基板21に対して、貫通配線(12、15)用のスルーホール及び第1凹部Ca1を、ブラスト加工などを用いて形成する。ここで、スリット状の第1凹部Ca1の深さが200~400μm、底面の幅が100~400μmとなるように形成する。 Next, an example of a method for manufacturing the transmission line shown in FIG. 3 will be described. For example, a through hole for the through wiring (12, 15) and the first recess Ca1 are formed on the glass substrate 21 having a thickness of 500 μm by using blasting or the like. Here, the slit-shaped first recess Ca1 is formed so that the depth is 200 to 400 μm and the bottom width is 100 to 400 μm.
 ガラス基板21の第2面F2上に、金(Au)または銅(Cu)等の金属膜をメッキ処理によって成膜する。このとき、上記した貫通配線(12、15)用のスルーホール内に金属膜が充填される。その後、フォトリソグラフィ技術及びエッチング技術を用いて、図3(b)に示すように、パターン化された裏面グラウンド電極14及び裏面電極13を形成する。 A metal film such as gold (Au) or copper (Cu) is formed on the second surface F2 of the glass substrate 21 by plating. At this time, the metal film is filled in the through hole for the through wiring (12, 15) described above. Thereafter, using the photolithography technique and the etching technique, as shown in FIG. 3B, the patterned back surface ground electrode 14 and back surface electrode 13 are formed.
 同様にして、ガラス基板21の第1面F1上に、AuまたはCu等の金属膜をメッキ処理によって成膜する。その後、フォトリソグラフィ技術及びエッチング技術を用いて、図3(a)に示すように、パターン化された表面グラウンド電極11及び信号配線10を形成する。この時、信号配線10の線幅は、100~300μmとする。これらの設計パラメータによれば、特性インピーダンスが50Ωの伝送線路を製造することができる。 Similarly, a metal film such as Au or Cu is formed on the first surface F1 of the glass substrate 21 by plating. Thereafter, as shown in FIG. 3A, a patterned surface ground electrode 11 and signal wiring 10 are formed by using a photolithography technique and an etching technique. At this time, the line width of the signal wiring 10 is 100 to 300 μm. According to these design parameters, a transmission line having a characteristic impedance of 50Ω can be manufactured.
 次に、図4を参照して、図3(a)~図3(c)に示した伝送線路が奏する作用効果を説明する。図4(a)は比較例に関わる伝送線路の断面図である。図4(b)は本発明の実施形態1に関わる伝送線路の断面図である。 Next, with reference to FIG. 4, the operation and effects of the transmission line shown in FIGS. 3 (a) to 3 (c) will be described. FIG. 4A is a cross-sectional view of a transmission line according to a comparative example. FIG. 4B is a cross-sectional view of the transmission line according to the first embodiment of the present invention.
 比較例及び実施形態1に係わる伝送線路は、共に、ガラス基板21と、表面グラウンド電極11と、裏面グラウンド電極14と、信号配線10とを有している。表面グラウンド電極11は、ガラス基板21の第1面F1に設けられている。裏面グラウンド電極14は、ガラス基板21の第2面F2に設けられている。表面グラウンド電極11は、その中央に線状の空隙が形成されており、前記ガラス基板21の上面は、空隙を介して上方に露出している。信号配線10は、空隙の中央に配置されている。そして、伝送線路は、第1の磁界と第2の磁界と第3の磁界とによって、電磁波を伝送する。第1の磁界は、信号配線10から表面グラウンド電極11に向かって発生する。第2の磁界は、ガラス基板21内部において、信号配線10を囲む方向に発生する。第3の磁界は、ガラス基板21の外部において信号配線10の長手方向に沿った方向に向かって発生する。 Both the transmission line according to the comparative example and the first embodiment have a glass substrate 21, a front surface ground electrode 11, a back surface ground electrode 14, and a signal wiring 10. The surface ground electrode 11 is provided on the first surface F <b> 1 of the glass substrate 21. The back surface ground electrode 14 is provided on the second surface F <b> 2 of the glass substrate 21. The surface ground electrode 11 has a linear gap formed at the center thereof, and the upper surface of the glass substrate 21 is exposed upward via the gap. The signal wiring 10 is disposed at the center of the gap. And a transmission line transmits electromagnetic waves with the 1st magnetic field, the 2nd magnetic field, and the 3rd magnetic field. The first magnetic field is generated from the signal wiring 10 toward the surface ground electrode 11. The second magnetic field is generated in the direction surrounding the signal wiring 10 inside the glass substrate 21. The third magnetic field is generated outside the glass substrate 21 in a direction along the longitudinal direction of the signal wiring 10.
 図4(a)に示す比較例において、信号配線10及び表面グラウンド電極11はガラス基板21の平坦な上面に形成されている。ここで、信号配線10から表面グラウンド電極11に向かう第1の電界ELは、ガラス基板21の内部を貫通する電界と、ガラス基板21の上方の空気層を通過する電界とに分けられる。図4(a)に示す構造の場合、ガラス基板21の内部を通過する電界に対するガラス基板21の情報の空気層を通過する電界の割合は大きくない。 In the comparative example shown in FIG. 4A, the signal wiring 10 and the surface ground electrode 11 are formed on the flat upper surface of the glass substrate 21. Here, the first electric field EL from the signal wiring 10 toward the surface ground electrode 11 is divided into an electric field that penetrates the inside of the glass substrate 21 and an electric field that passes through the air layer above the glass substrate 21. In the case of the structure shown in FIG. 4A, the ratio of the electric field passing through the air layer of the information on the glass substrate 21 to the electric field passing through the inside of the glass substrate 21 is not large.
 これに対して、図4(b)に示す本発明の実施形態1において、信号配線10は第1凹部Ca1の底面の中央部分に形成されている。この場合においても、信号配線10から表面グラウンド電極11に向かう第1の電界ELは、ガラス基板21の内部を貫通する電界と、ガラス基板21の上方の空気層を通過する電界とに分けられる。図4(b)に示す構造の場合、ガラス基板21の内部を貫通する電界に対するガラス基板21の上方の空気層を通過する電界の割合が大きくなる。 On the other hand, in the first embodiment of the present invention shown in FIG. 4B, the signal wiring 10 is formed at the central portion of the bottom surface of the first recess Ca1. Even in this case, the first electric field EL from the signal wiring 10 toward the surface ground electrode 11 is divided into an electric field penetrating the inside of the glass substrate 21 and an electric field passing through the air layer above the glass substrate 21. In the case of the structure shown in FIG. 4B, the ratio of the electric field passing through the air layer above the glass substrate 21 to the electric field penetrating the inside of the glass substrate 21 is increased.
 ガラスやシリコンなどの誘電体基板の誘電正接(タンジェントデルタ)は空気層の誘電正接に比べて大きい。よって、誘電体基板は空気層よりも誘電損失が大きい。したがって、第1凹部Ca1の内部に信号配線10を形成することが好ましい。第1凹部Ca1の内部に信号配線10を形成することにより、伝送線路の誘電損失は低減される。 The dielectric loss tangent (tangent delta) of a dielectric substrate such as glass or silicon is larger than the dielectric loss tangent of the air layer. Therefore, the dielectric substrate has a larger dielectric loss than the air layer. Therefore, it is preferable to form the signal wiring 10 inside the first recess Ca1. By forming the signal wiring 10 inside the first recess Ca1, the dielectric loss of the transmission line is reduced.
 以上説明したように、本実施形態の伝送線路は、ガラス基板21と、信号配線10とを有する。ガラス基板は、その第1面F1に、第1凹部Ca1が形成されている。信号配線10は、第1凹部Ca1の底面BTに配置されている。この場合、信号配線10と表面グラウンド電極11との間に電束が形成される。この電束は、ガラス基板21の内部を通る電束と、ガラス基板21の上方を通る電束とを含んでいる。信号配線10が第1凹部Ca1の底面BTに配置されているため、ガラス基板21の内部を通る電束は、ガラス基板の上方を通る電束よりも多い。言い換えると、ガラス基板21よりも誘電損失の少ない空気を通る電束を増やすことができる。その結果、伝送線路の誘電損失が低減する。 As described above, the transmission line of the present embodiment includes the glass substrate 21 and the signal wiring 10. As for the glass substrate, 1st recessed part Ca1 is formed in the 1st surface F1. The signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. In this case, an electric flux is formed between the signal wiring 10 and the surface ground electrode 11. This electric flux includes an electric flux passing through the inside of the glass substrate 21 and an electric flux passing above the glass substrate 21. Since the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1, the electric flux passing through the inside of the glass substrate 21 is larger than the electric flux passing above the glass substrate. In other words, it is possible to increase the electric flux passing through air having a dielectric loss smaller than that of the glass substrate 21. As a result, the dielectric loss of the transmission line is reduced.
 また、信号配線10は、第1凹部Ca1の底面BT上に配置されている。したがって、平坦な第1面F1上に信号配線10を配置した場合に比べて、信号配線10と裏面グラウンド電極14の距離を短くすることができる。言い換えると、第1凹部Ca1が形成されていないガラス基板21上に信号配線10を配置した場合に比べて、第1凹部Ca1の底面BTに信号配線10を配置した場合の方が信号配線10から裏面グラウンド電極14までの距離が小さくなる。その結果、信号配線10と裏面グラウンド電極14とが電磁的に結合した伝送線路においては、所望のインピーダンスを得ることができる。 The signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. Therefore, the distance between the signal wiring 10 and the back surface ground electrode 14 can be shortened as compared with the case where the signal wiring 10 is disposed on the flat first surface F1. In other words, compared with the case where the signal wiring 10 is arranged on the bottom surface BT of the first concave portion Ca1 from the signal wiring 10 as compared with the case where the signal wiring 10 is arranged on the glass substrate 21 where the first concave portion Ca1 is not formed. The distance to the back ground electrode 14 is reduced. As a result, a desired impedance can be obtained in the transmission line in which the signal wiring 10 and the back surface ground electrode 14 are electromagnetically coupled.
 更に、本実施形態の伝送線路において、ガラス基板21は、その一部分だけ第1凹部Ca1が形成されているため、第1凹部Ca1以外の部分は厚みが確保されている。したがって、ガラス基板21の機械的な強度は確保される。すなわち、本実施形態の伝送線路は、製造中、搬送中、使用中におけるハンドリングも従来と変らず、歩留まりの低下を抑制することができる。
(実施形態2)
 次に、図5(a)~図5(c)を参照して、図2に示すベース20における点線Gで囲んだ部分に適用される、本発明の実施形態2に関わる伝送線路の構成を説明する。図5(a)は、図2に示すベース20における点線Gで囲んだ部分の第1面を示す平面図であり、図5(b)は、第2面を示す平面図であり、図5(c)は、図5(a)のB-B切断面に沿った断面図である。
Furthermore, in the transmission line of this embodiment, since the glass substrate 21 is formed with the first concave portion Ca1 only in a part thereof, the portions other than the first concave portion Ca1 are ensured in thickness. Therefore, the mechanical strength of the glass substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield.
(Embodiment 2)
Next, referring to FIGS. 5A to 5C, the configuration of the transmission line according to the second embodiment of the present invention applied to the portion surrounded by the dotted line G in the base 20 shown in FIG. explain. 5A is a plan view showing a first surface of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG. 5B is a plan view showing a second surface. FIG. 5C is a cross-sectional view taken along the line BB in FIG.
 本発明の実施形態2に関わる伝送線路は、MEMS構造体に用いられる伝送線路である。本実施形態の伝送線路は、ガラス基板21と、信号配線10と、裏面グラウンド電極14とを有する。ガラス基板21は、第1面F1と、第2面F2とを有している誘電体基板である。第1面F1は、第2面F2の反対側に位置する。ガラス基板21は、第1面F1に第1凹部Ca1が形成されている。信号配線10は、第1凹部Ca1の底面BTに配置されている。信号配線10は、高周波信号を伝送するために設けられている。裏面グラウンド電極14は、第2面F2上に配置されている。 The transmission line according to Embodiment 2 of the present invention is a transmission line used for a MEMS structure. The transmission line of the present embodiment includes a glass substrate 21, a signal wiring 10, and a back surface ground electrode 14. The glass substrate 21 is a dielectric substrate having a first surface F1 and a second surface F2. The first surface F1 is located on the opposite side of the second surface F2. As for the glass substrate 21, 1st recessed part Ca1 is formed in the 1st surface F1. The signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. The signal wiring 10 is provided for transmitting a high frequency signal. The back surface ground electrode 14 is disposed on the second surface F2.
 図5(a)~図5(c)の伝送線路は、表面グラウンド電極11及び貫通グラウンド配線15を有さない点において、図3(a)~図3(c)の伝送線路と異なるが、その他の構成は同じである。 The transmission lines in FIGS. 5A to 5C are different from the transmission lines in FIGS. 3A to 3C in that the surface ground electrode 11 and the through-ground wiring 15 are not provided. Other configurations are the same.
 図5(a)の信号配線10は、1つの線状の配線である。信号配線10は、その長さ方向の両端において貫通配線12に電気的に接続している。図2のベース20における信号配線10に適用する場合、図5の信号配線10の中央部分を取り除くことにより、1対の信号配線10とされる。 The signal wiring 10 in FIG. 5A is one linear wiring. The signal wiring 10 is electrically connected to the through wiring 12 at both ends in the length direction. When applied to the signal wiring 10 in the base 20 in FIG. 2, the pair of signal wirings 10 is formed by removing the central portion of the signal wiring 10 in FIG. 5.
 貫通配線12は、ガラス基板21の第1面F1から第2面F2までを貫通している。貫通配線12は、その第1面F1側の一端において信号配線10に電気的に接続されており、その第2面F2側の一端において裏面電極13に電気的に接続されている。貫通配線12は円柱状の形状を有し、裏面電極13は、貫通配線12と、ガラス基板21の厚み方向において重複し、且つ貫通配線12と同じ円形の平面形状を有する。 The through wiring 12 penetrates from the first surface F1 to the second surface F2 of the glass substrate 21. The through wiring 12 is electrically connected to the signal wiring 10 at one end on the first surface F1 side, and is electrically connected to the back electrode 13 at one end on the second surface F2 side. The through wiring 12 has a cylindrical shape, and the back electrode 13 overlaps the through wiring 12 in the thickness direction of the glass substrate 21 and has the same circular planar shape as the through wiring 12.
 図5(c)に示すように、ガラス基板21の第1面F1上には第1凹部Ca1が形成されている。第1凹部Ca1は第2面F2の反対側に位置する底面BT及び側面を有する。第1凹部Ca1は長さ及び幅を有している。信号配線10は、底面BTの長さ方向に沿って底面BTの中央部分に配置されている。 As shown in FIG. 5C, a first recess Ca1 is formed on the first surface F1 of the glass substrate 21. As shown in FIG. The first recess Ca1 has a bottom surface BT and side surfaces located on the opposite side of the second surface F2. The first recess Ca1 has a length and a width. The signal wiring 10 is disposed in the central portion of the bottom surface BT along the length direction of the bottom surface BT.
 以上説明したように、本実施形態の伝送線路において、信号配線10は、第1凹部Ca1の底面BT上に配置されている。したがって、第1凹部Ca1を有さないガラス基板21の上面に信号配線が配置された場合よりも、第1凹部Ca1の底面BT上に信号配線10が配置された場合のほうが、信号配線10から裏面グラウンド電極14までの距離が短い。したがって、信号配線10と裏面グラウンド電極14とが電磁的に結合した本実施形態の伝送線路は、インピーダンスの設計可能範囲を広げることができる。 As described above, in the transmission line of the present embodiment, the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. Therefore, when the signal wiring 10 is arranged on the bottom surface BT of the first concave portion Ca1 from the signal wiring 10 than when the signal wiring is arranged on the upper surface of the glass substrate 21 not having the first concave portion Ca1. The distance to the back ground electrode 14 is short. Therefore, the transmission line of this embodiment in which the signal wiring 10 and the back surface ground electrode 14 are electromagnetically coupled can widen the design range of impedance.
 更に、本実施形態の伝送線路において、ガラス基板21は、その一部分だけ第1凹部Ca1が形成されているため、第1凹部Ca1以外の部分は厚みが確保されている。したがって、ガラス基板21の機械的な強度は確保される。すなわち、本実施形態の伝送線路は、製造中、搬送中、使用中におけるハンドリングも従来と変らず、歩留まりの低下を抑制することができる。 Furthermore, in the transmission line of the present embodiment, since the glass substrate 21 is formed with the first recess Ca1 only in a part thereof, the thickness other than the first recess Ca1 is ensured. Therefore, the mechanical strength of the glass substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield.
 図3(d)及び図5(d)は、上述の実施形態1及び2の変形例を示している。例えば、図3(d)及び図5(d)に示すように、ガラス基板21の第2面F2に第2凹部Ca2を形成してもよい。これにより、第2凹部Ca2は、第2内面を有する。第2凹部Ca2は、第1凹部Ca1と反対側に位置するように形成され、同じ線状の平面形状を有している。より詳しく説明すると、第2凹部Ca2の全周縁が、第1凹部Ca1の全周縁とガラス基板21の厚み方向において重複するように、前記第2凹部Ca2は、前記第1凹部Ca1の反対側に位置する。裏面グラウンド電極14は第2凹部Ca2の第2内面にも配置されている。これにより、信号配線10と裏面グラウンド電極14との距離を更に短くすることができる。よって、インピーダンスの設計可能範囲が更に広がる。 3 (d) and 5 (d) show modified examples of the above-described first and second embodiments. For example, as shown in FIG. 3D and FIG. 5D, a second recess Ca2 may be formed on the second surface F2 of the glass substrate 21. Thereby, 2nd recessed part Ca2 has a 2nd inner surface. 2nd recessed part Ca2 is formed so that it may be located on the opposite side to 1st recessed part Ca1, and has the same linear planar shape. More specifically, the second recess Ca2 is on the opposite side of the first recess Ca1 so that the entire periphery of the second recess Ca2 overlaps with the entire periphery of the first recess Ca1 in the thickness direction of the glass substrate 21. To position. The back surface ground electrode 14 is also disposed on the second inner surface of the second recess Ca2. Thereby, the distance between the signal wiring 10 and the back surface ground electrode 14 can be further shortened. Therefore, the design range of impedance is further expanded.
 また、本発明の実施形態1及び2では、誘電体基板の一例としてガラス基板21について説明した。しかしながら、誘電体基板は、単結晶シリコンからなるシリコン基板や、低温同時焼成セラミックス基板(LTCC基板)も採用することができる。シリコン基板の場合は、フォトリソグラフィ技術及びエッチング技術といった半導体微細加工技術を利用することができる。したがって、シリコン基板からなるベース20は、ガラス基板21からなるベース20よりも容易に加工することができる。特に、機能部30は、シリコンを用いて形成されている。したがって、機能部30とベース20との線膨張係数をおおよそ等しくすることができる。機能部30とベース20との線膨張係数をおおよそ等しくすることにより、線膨張係数の差に起因して機能部30とベース20との間に発生する応力は低減される。なお、シリコン基板としては、高抵抗のシリコンを用いることが望ましい。この場合には、高周波特性(特にスローウェーブモードでの高周波特性)が向上される。 In the first and second embodiments of the present invention, the glass substrate 21 has been described as an example of a dielectric substrate. However, a silicon substrate made of single crystal silicon or a low temperature co-fired ceramic substrate (LTCC substrate) can also be used as the dielectric substrate. In the case of a silicon substrate, a semiconductor fine processing technique such as a photolithography technique and an etching technique can be used. Therefore, the base 20 made of a silicon substrate can be processed more easily than the base 20 made of the glass substrate 21. In particular, the functional unit 30 is formed using silicon. Therefore, the linear expansion coefficients of the functional unit 30 and the base 20 can be made approximately equal. By making the linear expansion coefficients of the functional unit 30 and the base 20 approximately equal, the stress generated between the functional unit 30 and the base 20 due to the difference in linear expansion coefficient is reduced. As the silicon substrate, it is desirable to use high resistance silicon. In this case, high frequency characteristics (particularly, high frequency characteristics in the slow wave mode) are improved.
 誘電体基板がガラス基板21である場合、比較的誘電率が低い物質であるガラスを用いることで高周波特性を向上させることができる。 When the dielectric substrate is the glass substrate 21, high frequency characteristics can be improved by using glass which is a substance having a relatively low dielectric constant.
 低温同時焼成セラミックス基板は、ガラス基板21に比べて、直径が一様な円形状の貫通孔や内部配線(グラウンド層)を容易に形成することができる。貫通孔の直径が一様である場合には、貫通孔の直径が一様でない場合に比べて、高周波特性が向上する。具体的に説明すると、貫通孔の直径が孔の深さに関わらず一様である場合には、孔の深さに応じて孔の径が変化する場合よりも良好な高周波特性を有する。また、基板内部にグラウンド層を設けることにより、インピーダンスを調整することができる。その結果、伝送線路のインピーダンスの設計が容易になる。よって、ガラス基板に比べて、高周波の伝送特性を向上させることができる。 The low-temperature co-fired ceramic substrate can easily form circular through-holes and internal wiring (ground layer) having a uniform diameter as compared with the glass substrate 21. When the diameter of the through hole is uniform, the high frequency characteristics are improved as compared with the case where the diameter of the through hole is not uniform. More specifically, when the diameter of the through hole is uniform regardless of the depth of the hole, it has better high frequency characteristics than when the diameter of the hole changes according to the depth of the hole. Further, the impedance can be adjusted by providing a ground layer inside the substrate. As a result, the transmission line impedance can be easily designed. Therefore, high-frequency transmission characteristics can be improved compared to a glass substrate.
 また、本発明の実施形態では、MEMS構造体の一例として、マイクロリレーについて説明したが、これに限らず、高周波の電気信号を取り扱う、高周波スイッチ、共振器、フィルタ、発振器なども含まれる。
(実施形態3)
 本実施形態について、図6及び図7を用いて説明する。本実施形態のマイクロリレーも、実施形態1におけるマイクロリレーとベース20を除いて同一の構成を有する。従って、実施形態1と同一の構成には同一の符号を付している。そして、実施形態1と同一の構成については、説明を省略している。
In the embodiment of the present invention, the micro relay has been described as an example of the MEMS structure. However, the present invention is not limited to this, and includes a high frequency switch, a resonator, a filter, an oscillator, and the like that handle high frequency electric signals.
(Embodiment 3)
This embodiment will be described with reference to FIGS. The micro relay of the present embodiment also has the same configuration except for the micro relay and the base 20 in the first embodiment. Therefore, the same reference numerals are given to the same components as those in the first embodiment. The description of the same configuration as that of the first embodiment is omitted.
 ベース20は、シリコン基板21と、一対の信号配線10とを備える。シリコン基板21は、直方体状の単結晶シリコンからなる。したがって、シリコン基板21は、長さと幅と厚みとを有する。シリコン基板21の幅方向は、図2のy方向に沿っている。シリコン基板21の長さ方向は、図2のx方向に沿っている。シリコン基板21の厚み方向は、図2のz方向に沿っている。シリコン基板21は、第1面を有している。機能部30は、シリコン基板21の第1面上に配置される。信号配線10は、第1面上に配置されている。信号配線10は、第1面上に配置されている。一方の一対の信号配線10は、シリコン基板21の長手方向の一端に配置されており、他方の一対の信号配線10は、シリコン基板21の長手方向の他端に配置されている。一対の信号配線10は、それぞれ長さと幅とを有している。信号配線10は、シリコン基板21の幅方向に沿った長さを有するように配置されている。一対の信号配線10は、シリコン基板21の幅方向に沿って配置されている。 The base 20 includes a silicon substrate 21 and a pair of signal wirings 10. The silicon substrate 21 is made of rectangular parallelepiped single crystal silicon. Accordingly, the silicon substrate 21 has a length, a width, and a thickness. The width direction of the silicon substrate 21 is along the y direction of FIG. The length direction of the silicon substrate 21 is along the x direction of FIG. The thickness direction of the silicon substrate 21 is along the z direction of FIG. The silicon substrate 21 has a first surface. The functional unit 30 is disposed on the first surface of the silicon substrate 21. The signal wiring 10 is disposed on the first surface. The signal wiring 10 is disposed on the first surface. One pair of signal wirings 10 is disposed at one end in the longitudinal direction of the silicon substrate 21, and the other pair of signal wirings 10 is disposed at the other end in the longitudinal direction of the silicon substrate 21. Each of the pair of signal wirings 10 has a length and a width. The signal wiring 10 is arranged to have a length along the width direction of the silicon substrate 21. The pair of signal wirings 10 are arranged along the width direction of the silicon substrate 21.
 信号配線10は、シリコン基板21の幅方向の一端に位置する第1端と、当該第1端と反対側の第2端とを有している。信号配線の第2端は、シリコン基板21の幅方向の中央に位置する。信号配線10は、第2端に固定接点26を有している。したがって、シリコン基板21の長手方向の両端側それぞれには、一対の固定接点26が配置されている。 The signal wiring 10 has a first end located at one end in the width direction of the silicon substrate 21 and a second end opposite to the first end. The second end of the signal wiring is located at the center in the width direction of the silicon substrate 21. The signal wiring 10 has a fixed contact 26 at the second end. Accordingly, a pair of fixed contacts 26 are disposed on both ends of the silicon substrate 21 in the longitudinal direction.
 固定接点26は、例えば、銅(Cu)や金(Au)などの導電性が良好な金属材料からなる金属薄膜である。このような固定接点26は、スパッタ法や、電気めっき法、真空蒸着法などを利用して形成することができる。また、固定接点26は、単層構造に限らず、例えば、Au層と、Au層とベース20との間に介在されるTi層とからなる多層構造であってもよい。 The fixed contact 26 is a metal thin film made of a metal material having good conductivity such as copper (Cu) or gold (Au). Such a fixed contact 26 can be formed using a sputtering method, an electroplating method, a vacuum deposition method, or the like. The fixed contact 26 is not limited to a single layer structure, and may be a multilayer structure including, for example, an Au layer and a Ti layer interposed between the Au layer and the base 20.
 次に、図6及び図7を参照して、図2に示すベース20における点線Gで囲んだ部分に適用される、本発明の実施形態3に関わる伝送線路の構成を説明する。図6(a)は、図2に示すベース20における点線Gで囲んだ部分の平面図であり、図6(b)は、図6(a)のA-A切断面に沿ったマイクロリレーの断面図である。図6(a)のx方向は図2のx方向すなわちベース20の幅方向であり、図6(a)のy方向は図2のy方向すなわちベース20の長手方向である。 Next, with reference to FIGS. 6 and 7, the configuration of the transmission line according to the third embodiment of the present invention applied to the portion surrounded by the dotted line G in the base 20 shown in FIG. 2 will be described. 6 (a) is a plan view of a portion surrounded by a dotted line G in the base 20 shown in FIG. 2, and FIG. 6 (b) is a diagram of the microrelay along the AA section in FIG. 6 (a). It is sectional drawing. The x direction in FIG. 6A is the x direction in FIG. 2, that is, the width direction of the base 20, and the y direction in FIG. 6A is the y direction in FIG.
 本発明の実施形態3に関わる伝送線路は、MEMS構造体の一例としてのマイクロリレーに用いられる伝送線路である。この伝送線路は、シリコン基板21と、信号配線10と、一対の表面グラウンド電極11と、裏面電極13とを備える。シリコン基板21は、誘電体基板の一例である。シリコン基板21は、第1面と第2面とを有する。第1面は、第2面の反対側に位置する。第1面は、第1凹部Ca1を有する。信号配線10は、高周波信号を伝送するために設けられている。信号配線10は、シリコン基板21の第1面上及び第1凹部Ca1の内部に配置されている。一対の表面グラウンド電極11は、シリコン基板21の第1面上及び第1凹部Ca1の内部に配置されている。また、一対の表面グラウンド電極11は、信号配線10から所定の間隔離間している。また、一対の表面グラウンド電極11は、信号配線10の両側に位置する。一対の表面グラウンド電極11と信号配線10とは、信号配線10の幅方向に沿って配列されている。裏面電極13は、シリコン基板21の第2面F2上に配置されている。 The transmission line according to Embodiment 3 of the present invention is a transmission line used for a micro relay as an example of a MEMS structure. This transmission line includes a silicon substrate 21, a signal wiring 10, a pair of front surface ground electrodes 11, and a back surface electrode 13. The silicon substrate 21 is an example of a dielectric substrate. The silicon substrate 21 has a first surface and a second surface. The first surface is located on the opposite side of the second surface. The first surface has a first recess Ca1. The signal wiring 10 is provided for transmitting a high frequency signal. The signal wiring 10 is disposed on the first surface of the silicon substrate 21 and inside the first recess Ca1. The pair of surface ground electrodes 11 are disposed on the first surface of the silicon substrate 21 and inside the first recess Ca1. The pair of surface ground electrodes 11 are separated from the signal wiring 10 by a predetermined distance. The pair of surface ground electrodes 11 are located on both sides of the signal wiring 10. The pair of surface ground electrodes 11 and the signal wiring 10 are arranged along the width direction of the signal wiring 10. The back electrode 13 is disposed on the second surface F <b> 2 of the silicon substrate 21.
 シリコン基板21は、2つの第1凹部Ca1がx方向に並んで形成されている。言い換えると、シリコン基板21は、その幅方向の一端及び他端のそれぞれに、第1凹部Ca1が設けられている。第1凹部Ca1は、側面及び底面BTとで構成される第1内面を有している。この第1凹部Ca1は、開口面積を有している。詳しく説明すると、第1凹部Ca1は、シリコン基板21の厚み方向に垂直な方向における開口面積を有している。第1凹部Ca1の開口面積は、第1面F1から第2面F2に向かうに伴って、小さくなっている。また、第1内面Ca1は、その第1内面Ca1の上端に位置する周縁と、その第1内面Ca2の下端に位置する周縁とを有する。第1内面Ca1の下端に位置する全周縁は、第1内面Ca1の上端に位置する全周縁よりも内側に位置する。第1凹部Ca1の側面の少なくとも一部は、当該側面が第1面F1に対して鋭角に交わる傾斜面WA1を成している。信号配線10の第1端は、配線傾斜部10aと配線底部10bとを有している。信号配線10の配線傾斜部10aは、第1凹部Ca1の傾斜面WA1上に配置されている。更に、信号配線10の配線底部10bは、第1凹部Ca1の底面BTに配置されている。シリコン基板21は、第1凹部Ca1の底面BTから、第2面F2までを貫通する貫通孔221が形成されている。そして、シリコン基板21は、貫通孔221の内側に位置するように配置された貫通配線12が埋め込まれている。裏面電極13及び信号配線10の配線底部10bは、それぞれ貫通配線に接触している。 The silicon substrate 21 has two first recesses Ca1 arranged in the x direction. In other words, the silicon substrate 21 is provided with first recesses Ca1 at one end and the other end in the width direction. 1st recessed part Ca1 has the 1st inner surface comprised by the side surface and the bottom face BT. The first recess Ca1 has an opening area. More specifically, the first recess Ca <b> 1 has an opening area in a direction perpendicular to the thickness direction of the silicon substrate 21. The opening area of the first recess Ca1 decreases as it goes from the first surface F1 to the second surface F2. Moreover, 1st inner surface Ca1 has the periphery located in the upper end of the 1st inner surface Ca1, and the periphery located in the lower end of the 1st inner surface Ca2. The entire periphery located at the lower end of the first inner surface Ca1 is located inside the entire periphery located at the upper end of the first inner surface Ca1. At least a part of the side surface of the first recess Ca1 forms an inclined surface WA1 where the side surface intersects at an acute angle with respect to the first surface F1. The first end of the signal wiring 10 has a wiring inclined portion 10a and a wiring bottom portion 10b. The wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 of the first recess Ca1. Furthermore, the wiring bottom portion 10b of the signal wiring 10 is disposed on the bottom surface BT of the first recess Ca1. The silicon substrate 21 has a through hole 221 that penetrates from the bottom surface BT of the first recess Ca1 to the second surface F2. In the silicon substrate 21, the through wiring 12 disposed so as to be positioned inside the through hole 221 is embedded. The back electrode 13 and the wiring bottom 10b of the signal wiring 10 are in contact with the through wiring.
 このように、実施形態3において、信号配線10は、配線傾斜部10aと配線底部10bとを有している。配線傾斜部10aは、傾斜面WA1に配置されている。配線底部10bは、底面BTに配置されている。配線底部10bは、貫通配線12を介して底面BT上に配置された裏面電極13に電気的に接続されている。 Thus, in the third embodiment, the signal wiring 10 has the wiring inclined portion 10a and the wiring bottom portion 10b. The wiring inclined portion 10a is disposed on the inclined surface WA1. The wiring bottom portion 10b is disposed on the bottom surface BT. The wiring bottom portion 10 b is electrically connected to the back electrode 13 disposed on the bottom surface BT via the through wiring 12.
 シリコン基板21の第1面F1上に配置された表面グラウンド電極11は、信号配線10から所定の距離離間している。したがって、表面グラウンド電極11は、信号配線10から、電気的に絶縁されている。表面グラウンド電極11と信号配線10との間の所定の距離は、信号配線10の長手方向に沿って一定である。シリコン基板21の外周を取り囲むようにシリコン基板21の第1面上にフレーム電極(環状電極)19が配置されている。フレーム電極(環状電極)19と表面グラウンド電極11とは電気的に接続され、接地電位が印加される。 The surface ground electrode 11 disposed on the first surface F1 of the silicon substrate 21 is separated from the signal wiring 10 by a predetermined distance. Therefore, the surface ground electrode 11 is electrically insulated from the signal wiring 10. The predetermined distance between the surface ground electrode 11 and the signal wiring 10 is constant along the longitudinal direction of the signal wiring 10. A frame electrode (annular electrode) 19 is disposed on the first surface of the silicon substrate 21 so as to surround the outer periphery of the silicon substrate 21. The frame electrode (annular electrode) 19 and the surface ground electrode 11 are electrically connected, and a ground potential is applied.
 表面グラウンド電極11は、電極傾斜部11aと、電極底部11bとを有する。表面グラウンド電極11の電極傾斜部11aは、第1凹部Ca1の傾斜面WA1上に配置されている。表面グラウンド電極11の電極底部11bは、第1凹部Ca1の底面BTまで延長されている。信号配線10の配線傾斜部10aは、表面グラウンド電極11の電極傾斜部11aから、第1の距離離間している。この第1の距離は、信号配線10及び表面グラウンド電極11がシリコン基板21の第2面F2に近づくにつれて変化している。具体的には、第1の距離は、信号配線10及び表面グラウンド電極11がシリコン基板21の第2面F2に近づくにつれて、小さくなっている。これにより、伝送線路を小型化することができる。なお、信号配線10の配線傾斜部10aと表面グラウンド電極11の電極傾斜部11aとの間隔は、第2面F2に近づくに伴って大きくなっていてもかまわない。 The surface ground electrode 11 has an electrode inclined part 11a and an electrode bottom part 11b. The electrode inclined portion 11a of the surface ground electrode 11 is disposed on the inclined surface WA1 of the first recess Ca1. The electrode bottom 11b of the surface ground electrode 11 is extended to the bottom surface BT of the first recess Ca1. The wiring inclined portion 10 a of the signal wiring 10 is separated from the electrode inclined portion 11 a of the surface ground electrode 11 by a first distance. The first distance changes as the signal wiring 10 and the surface ground electrode 11 approach the second surface F2 of the silicon substrate 21. Specifically, the first distance decreases as the signal wiring 10 and the surface ground electrode 11 approach the second surface F <b> 2 of the silicon substrate 21. Thereby, a transmission line can be reduced in size. In addition, the space | interval of the wiring inclination part 10a of the signal wiring 10 and the electrode inclination part 11a of the surface ground electrode 11 may become large as it approaches the 2nd surface F2.
 図6(b)に示すように、機能部30は、ベース20の上に配置されている。カバー40は、機能部30の上に配置されている。したがって、ベース20は、機能部30及びカバー40と共に、積層されている。機能部30内の接点用突片321に設けられた可動接点322は、機能部30内の本体部が揺動することに伴って、1対の信号配線10上の固定接点と同時に接触する。これにより、可動接点322は、一対の信号配線10を短絡させる。 As shown in FIG. 6B, the functional unit 30 is disposed on the base 20. The cover 40 is disposed on the functional unit 30. Therefore, the base 20 is laminated together with the functional unit 30 and the cover 40. The movable contact 322 provided on the contact protrusion 321 in the function unit 30 contacts the fixed contact on the pair of signal wirings 10 as the main body in the function unit 30 swings. Thereby, the movable contact 322 short-circuits the pair of signal wirings 10.
 次に、図7(a)及び図7(b)を参照して、図2に示すベース20における点線Gで囲んだ部分の裏面構成及び図6(a)のB-B切断面における断面構成を説明する。図7(a)に示すように、シリコン基板21は、第2面F2に、裏面電極13と、グラウンド電極14とが設けられている。裏面電極13は、貫通配線12に電気的に接続されている。裏面電極13は、裏面グラウンド電極14と電気的に絶縁されている。裏面電極13は線分形状を有する。裏面電極13は、その一端が貫通配線12に接続され、その他端がシリコン基板21の外周に配置されている。裏面電極13と裏面グラウンド電極14の間には所定の隙間が形成されている。 Next, referring to FIG. 7A and FIG. 7B, the back surface configuration of the portion surrounded by the dotted line G in the base 20 shown in FIG. 2 and the cross-sectional configuration at the BB cut surface of FIG. Will be explained. As shown to Fig.7 (a), the silicon substrate 21 is provided with the back surface electrode 13 and the ground electrode 14 in the 2nd surface F2. The back electrode 13 is electrically connected to the through wiring 12. The back electrode 13 is electrically insulated from the back ground electrode 14. The back electrode 13 has a line segment shape. The back electrode 13 has one end connected to the through wiring 12 and the other end arranged on the outer periphery of the silicon substrate 21. A predetermined gap is formed between the back electrode 13 and the back ground electrode 14.
 図7(b)に示すように、シリコン基板21は、第1凹部Ca1の底面BTからシリコン基板21の第2面F2までを貫通する貫通孔が形成されている。この貫通孔は、貫通配線12の両側に位置している。また、貫通孔222と貫通配線12とは、信号配線10の幅方向に沿って配列されている。シリコン基板21は、貫通グラウンド配線15が設けられており、この貫通グラウンド配線15は、貫通孔222の内側に設けられている。したがって、貫通グラウンド配線15と貫通配線12とは、信号配線10の幅方向に沿って配列されている。また、貫通グラウンド配線15は、貫通配線12からシリコン基板21によって離間している。したがって、貫通グラウンド配線15は、貫通配線12と電気的に絶縁されている。表面グラウンド電極11の電極底部11bは、第1凹部Ca1の底面BTに配置されている。したがって、表面グラウンド電極11の電極底部11bは、裏面グラウンド電極14に、貫通グラウンド配線15によって電気的に接続されている。 As shown in FIG. 7B, the silicon substrate 21 has a through hole penetrating from the bottom surface BT of the first recess Ca1 to the second surface F2 of the silicon substrate 21. The through holes are located on both sides of the through wiring 12. Further, the through hole 222 and the through wiring 12 are arranged along the width direction of the signal wiring 10. The silicon substrate 21 is provided with a through ground wiring 15, and the through ground wiring 15 is provided inside the through hole 222. Therefore, the through ground wiring 15 and the through wiring 12 are arranged along the width direction of the signal wiring 10. Further, the through ground wiring 15 is separated from the through wiring 12 by the silicon substrate 21. Accordingly, the through ground wiring 15 is electrically insulated from the through wiring 12. The electrode bottom 11b of the surface ground electrode 11 is disposed on the bottom surface BT of the first recess Ca1. Therefore, the electrode bottom 11 b of the front surface ground electrode 11 is electrically connected to the back surface ground electrode 14 through the through ground wiring 15.
 信号配線10、表面グラウンド電極11、裏面電極13及び裏面グラウンド電極14は、シリコン基板21に対して密着性の高い導電性の材料を用いることが望ましい。このような導電性材料は、例えば、Au、Cr、Pt、Ti、Ni、Al、Cuなどが挙げられる。また、このような導電性材料は、Au、Cr、Pt、Ti、Ni、Al、Cuなどの合金も上げられる。したがって、信号配線10は、これらの導電性材料や合金からなる導体膜からなることが好ましい。或いは、信号配線10は、これらの導電膜が多層積層されていてもよい。 It is preferable that the signal wiring 10, the front surface ground electrode 11, the back surface electrode 13, and the back surface ground electrode 14 are made of a conductive material having high adhesion to the silicon substrate 21. Examples of such a conductive material include Au, Cr, Pt, Ti, Ni, Al, and Cu. In addition, such conductive materials include alloys such as Au, Cr, Pt, Ti, Ni, Al, and Cu. Therefore, the signal wiring 10 is preferably made of a conductive film made of these conductive materials or alloys. Alternatively, the signal wiring 10 may be formed by laminating these conductive films in multiple layers.
 ここで、図6及び図7に示した伝送線路の製造方法の一例を説明する。まず、(100)結晶面が表出したシリコン基板21を用意する。そして、(100)結晶面が表出したシリコン基板21の第1面F1に対して、水酸化テトラメチルアンモニウム(TMAH)或いは水酸化カリウム(KOH)水溶液などのアルカリ溶液をエッチャントとして、ウェットエッチング処理を施す。これにより、(100)結晶面に対して傾斜する(111)結晶面を露出させる異方性エッチングを行うことができる。よって、例えば、以下のような工程で傾斜面WA1は形成される。まず、シリコン基板21の第1面F1の所定の領域に開口を有するレジストパターンを形成する。続いて、その開口から露出するシリコン基板21の第1面F1に対して選択的に上記のウェットエッチング処理を施す。このようにして、第1凹部Ca1の傾斜面WA1が形成される。 Here, an example of a method for manufacturing the transmission line shown in FIGS. 6 and 7 will be described. First, a silicon substrate 21 with a (100) crystal face exposed is prepared. A wet etching process is performed on the first surface F1 of the silicon substrate 21 on which the (100) crystal plane is exposed, using an alkaline solution such as tetramethylammonium hydroxide (TMAH) or potassium hydroxide (KOH) aqueous solution as an etchant. Apply. Thereby, anisotropic etching which exposes the (111) crystal plane inclined with respect to the (100) crystal plane can be performed. Therefore, for example, the inclined surface WA1 is formed by the following process. First, a resist pattern having an opening in a predetermined region of the first surface F1 of the silicon substrate 21 is formed. Subsequently, the wet etching process is selectively performed on the first surface F1 of the silicon substrate 21 exposed from the opening. In this way, the inclined surface WA1 of the first recess Ca1 is formed.
 また、第1凹部Ca1が、傾斜面WA1に加えて、第1面F1に対して垂直な面を有することを望む場合には、以下の工程を行う。まず、傾斜面WA1を形成する前に、第1面F1に対して垂直な方向のみに選択的にエッチングを行う。このような選択的なエッチングは、ドライエッチングが例示される。これにより、シリコン基板21には、第1面F1に対して垂直な面を有する凹部が形成される。続いて、凹部の垂直な面に、上記エッチャントに反応しないバリア材料をコートする。続いて、シリコン基板にウェットエッチングを行うウェットエッチング工程を施す。これにより、傾斜面WA1を有する凹部を備えたシリコン基板21が得られる。そして、ウェットエッチング工程の後に、バリア材料を除去する。これにより、シリコン基板21は、その第1面F1に、傾斜面WA1と垂直面をを有する側面を有する第1凹部Ca1が形成される。ドライエッチング処理には、ICPエッチング装置を用いられる。ICPエッチング装置でのドライエッチング処理には、SF6とC48の二種類のガスが用いられる。具体的には、SF6によるエッチングと、C48による保護膜の形成が交互に行われる。その結果、シリコン基板21の第1面F1には、アスペクト比の高い溝が形成される。 In addition, when it is desired that the first recess Ca1 has a surface perpendicular to the first surface F1 in addition to the inclined surface WA1, the following steps are performed. First, before forming the inclined surface WA1, etching is selectively performed only in a direction perpendicular to the first surface F1. An example of such selective etching is dry etching. Thereby, a recess having a surface perpendicular to the first surface F1 is formed in the silicon substrate 21. Subsequently, a barrier material that does not react with the etchant is coated on the vertical surface of the recess. Subsequently, a wet etching process for performing wet etching on the silicon substrate is performed. Thereby, the silicon substrate 21 provided with the recessed part which has inclined surface WA1 is obtained. Then, the barrier material is removed after the wet etching process. As a result, the first recess F <b> 1 having a side surface having a surface perpendicular to the inclined surface WA <b> 1 is formed on the first surface F <b> 1 of the silicon substrate 21. An ICP etching apparatus is used for the dry etching process. Two types of gases, SF 6 and C 4 F 8 , are used for the dry etching process in the ICP etching apparatus. Specifically, etching with SF 6 and formation of a protective film with C 4 F 8 are performed alternately. As a result, a groove having a high aspect ratio is formed on the first surface F1 of the silicon substrate 21.
 その後、フォトリソグラフィ技術及びエッチング技術を用いて第1凹部Ca1の底面BTにスルーホールを形成する。続いて、スルーホールの内部に貫通配線12及び貫通グラウンド配線15となる導体を埋め込む。そして、スパッタ法などの物理気相成長(PVD)法、化学気相成長(CVD)法などを用いて、シリコン基板21の第1面F1、第1凹部Ca1の傾斜面WA1及び底面BT上に、同時に、導体膜を成膜する。そして、フォトリソグラフィ技術及びエッチング技術を用いて、図6(a)に示す信号配線10、10bや、表面グラウンド電極11、11bなどのパターニングを行う。そして、レーザーパターニング技術を用いて、傾斜面WA1上に形成される信号配線10a及び表面グラウンド電極11aのパターニングを行う。第2面F2についても同様な処理により、図7(a)に示す裏面電極13及び裏面グラウンド電極14を形成する。 Thereafter, a through hole is formed in the bottom surface BT of the first recess Ca1 by using a photolithography technique and an etching technique. Subsequently, a conductor that becomes the through wiring 12 and the through ground wiring 15 is embedded in the through hole. Then, on the first surface F1 of the silicon substrate 21, the inclined surface WA1 of the first recess Ca1, and the bottom surface BT using a physical vapor deposition (PVD) method such as a sputtering method, a chemical vapor deposition (CVD) method, or the like. At the same time, a conductor film is formed. Then, using the photolithography technique and the etching technique, the signal wirings 10 and 10b and the surface ground electrodes 11 and 11b shown in FIG. 6A are patterned. Then, the signal wiring 10a and the surface ground electrode 11a formed on the inclined surface WA1 are patterned using a laser patterning technique. The back surface electrode 13 and the back surface ground electrode 14 shown in FIG. 7A are also formed on the second surface F2 by a similar process.
 以上説明したように、本発明の実施形態3によれば、以下の作用効果が得られる。 As described above, according to Embodiment 3 of the present invention, the following operational effects can be obtained.
 第1凹部Ca1の側面の少なくとも一部が、その側面がシリコン基板21の第1面F1に対して鋭角に交わる傾斜面WA1をなす。信号配線10の配線傾斜部10aは、傾斜面WA1上に配置されている。更に、第1凹部Ca1は底面BTを有する。シリコン基板21は、底面BTから第2面F2までのシリコン基板21を貫通する貫通孔221を有する。シリコン基板21の貫通孔221の内部には、貫通配線12が埋め込まれている。信号配線10の配線底部10bは、底面BT上に設けられている。信号配線10の配線底部10bは、貫通配線12に電気的に接続されており、且つ、貫通配線12を介して裏面電極13に電気的に接続されている。 At least part of the side surface of the first recess Ca1 forms an inclined surface WA1 whose side surface intersects at an acute angle with respect to the first surface F1 of the silicon substrate 21. The wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1. Further, the first recess Ca1 has a bottom surface BT. The silicon substrate 21 has a through hole 221 that penetrates the silicon substrate 21 from the bottom surface BT to the second surface F2. The through wiring 12 is embedded in the through hole 221 of the silicon substrate 21. The wiring bottom portion 10b of the signal wiring 10 is provided on the bottom surface BT. The wiring bottom 10 b of the signal wiring 10 is electrically connected to the through wiring 12 and is electrically connected to the back electrode 13 through the through wiring 12.
 これにより、シリコン基板21の第1面F1から第2面F2間までを貫通する貫通孔に埋め込まれた貫通配線を介して信号配線10を裏面電極13に電気的に接続する場合に比べて、貫通配線を短くすることができる。傾斜面WA1上に配置された信号配線10の配線傾斜部10aは、貫通配線に比べてインピーダンスの変化が小さい。よって、この構成により、貫通配線によるインピーダンスの不整合が抑制され、結果として高周波の伝送特性を向上させることができる。 Thereby, compared with the case where the signal wiring 10 is electrically connected to the back surface electrode 13 through the through wiring embedded in the through hole penetrating from the first surface F1 to the second surface F2 of the silicon substrate 21, The through wiring can be shortened. The wiring inclined portion 10a of the signal wiring 10 disposed on the inclined surface WA1 has a smaller impedance change than the through wiring. Therefore, with this configuration, impedance mismatch due to the through wiring is suppressed, and as a result, high-frequency transmission characteristics can be improved.
 また、傾斜面WA1はシリコン基板21の第1面F1に対して鋭角に交わるため、例えば、第1面F1と直角を成す垂直面に信号配線10の一部を形成した場合に比べて、急激な電磁場の変化及びインピーダンスの変化を抑制することができる。 In addition, since the inclined surface WA1 intersects the first surface F1 of the silicon substrate 21 at an acute angle, for example, compared with the case where a part of the signal wiring 10 is formed on a vertical surface perpendicular to the first surface F1, the inclined surface WA1 is sharp. It is possible to suppress a change in electromagnetic field and a change in impedance.
 更に、本実施形態の伝送線路において、シリコン基板21は、その一部分だけ第1凹部Ca1が形成されているため、第1凹部Ca1以外の部分は厚みが確保されている。したがって、シリコン基板21の機械的な強度は確保される。すなわち、本実施形態の伝送線路は、製造中、搬送中、使用中におけるハンドリングも従来と変らず、歩留まりの低下を抑制することができる。また、第1凹部Ca1は、シリコン基板21の第2面F2まで貫通していない。したがって、マイクロリレーの内部を封止する場合、シリコン基板21がパッケージ或いはキャップとして機能する。したがって、少ない部材でマイクロリレーを製造することができる。その結果、製造コストは低減され、且つ、マイクロリレーの形状は小型になる。 Furthermore, in the transmission line of the present embodiment, since the silicon substrate 21 has the first recess Ca1 formed only in a part thereof, the thickness is ensured at portions other than the first recess Ca1. Therefore, the mechanical strength of the silicon substrate 21 is ensured. That is, the transmission line according to the present embodiment is handled in the same manner as in the past during manufacture, transportation, and use, and can suppress a decrease in yield. Further, the first recess Ca1 does not penetrate to the second surface F2 of the silicon substrate 21. Therefore, when sealing the inside of the micro relay, the silicon substrate 21 functions as a package or a cap. Therefore, a micro relay can be manufactured with few members. As a result, the manufacturing cost is reduced and the shape of the microrelay is reduced.
 このように、傾斜面WA1上に配置された信号配線の配線傾斜部10aが、シリコン基板21の第2面F2上に配置された裏面電極13に電気的に接続されている。これにより、シリコン基板21の第1面F1から第2面F2間までを貫通する貫通孔に埋め込まれた貫通ビアを介して信号配線10を裏面電極13に電気的に接続する場合に比べて、貫通ビアは短くされる。したがって、貫通ビアによるインピーダンスの不整合が抑制され、結果として高周波の伝送特性を向上させることができる。 As described above, the wiring inclined portion 10a of the signal wiring disposed on the inclined surface WA1 is electrically connected to the back surface electrode 13 disposed on the second surface F2 of the silicon substrate 21. Thereby, compared with the case where the signal wiring 10 is electrically connected to the back surface electrode 13 through the through via embedded in the through hole penetrating from the first surface F1 to the second surface F2 of the silicon substrate 21, The through via is shortened. Therefore, impedance mismatch due to the through via is suppressed, and as a result, high-frequency transmission characteristics can be improved.
 第1凹部Ca1の傾斜面WA1上における信号配線10の配線傾斜部10aは、表面グラウンド電極11の電極傾斜部11aから所定の距離離間している。この所定の距離は、シリコン基板21の第1面F1から第2面F2に向かうに従って変化している。したがって、傾斜面WA1における信号配線10aのインピーダンスを整合させることができる。具体的には、例えば、信号配線10の配線傾斜部10aの線幅は、シリコン基板21の第1面F1から第2面F2に向かうにつれて小さくなっている。また、信号配線10の配線傾斜部10aと表面グラウンド電極11の電極傾斜部11aとの間の距離は、シリコン基板21の第1面F1から第2面F2に向かうにつれて小さくなっている。これにより、伝送線路を小型化することができる。なお、第1凹部Ca1の傾斜面WA1上における信号配線10aの線幅及び信号配線10aと表面グラウンド電極11aとの間隔は、第2面F2に近づくに従って大きくなっていても構わない。 The wiring inclined portion 10a of the signal wiring 10 on the inclined surface WA1 of the first recess Ca1 is separated from the electrode inclined portion 11a of the surface ground electrode 11 by a predetermined distance. This predetermined distance changes as it goes from the first surface F1 of the silicon substrate 21 to the second surface F2. Therefore, the impedance of the signal wiring 10a in the inclined surface WA1 can be matched. Specifically, for example, the line width of the wiring inclined portion 10a of the signal wiring 10 becomes smaller from the first surface F1 of the silicon substrate 21 toward the second surface F2. Further, the distance between the wiring inclined portion 10a of the signal wiring 10 and the electrode inclined portion 11a of the surface ground electrode 11 decreases as it goes from the first surface F1 of the silicon substrate 21 to the second surface F2. Thereby, a transmission line can be reduced in size. Note that the line width of the signal wiring 10a and the distance between the signal wiring 10a and the surface ground electrode 11a on the inclined surface WA1 of the first recess Ca1 may be increased as the second surface F2 is approached.
 図7(b)に示すように、シリコン基板21は、一対の貫通グラウンド配線15が設けられている。貫通グラウンド配線15は、貫通配線12の両側に位置する。また、貫通グラウンド配線15および貫通配線12は、信号配線の幅方向に沿って設けられている。一対の表面グラウンド電極11bと表面グラウンド電極11は、一対の貫通グラウンド配線15によって電気的に接続されている。この構成により、一対の貫通グラウンド配線15が貫通配線12へ電磁結合することを防ぐことができる。その結果、高い高周波の伝送特性を実現することができる。
(実施形態4)
 実施形態4においては、シリコン基板21が、第1凹部Ca1に代えて、穴Ca1を有している。図8(a)は、図2に示すベース20における点線Gで囲んだ部分の表面図である。図8(b)は、図8(a)のC-C切断面に沿ったマイクロリレー全体の断面図である。図8(a)のx方向は図2のx方向すなわちベース20の幅方向である。図8(a)のy方向は図2のy方向すなわちベース20の長手方向である。
As shown in FIG. 7B, the silicon substrate 21 is provided with a pair of through ground wirings 15. The through ground wiring 15 is located on both sides of the through wiring 12. Further, the through ground wiring 15 and the through wiring 12 are provided along the width direction of the signal wiring. The pair of surface ground electrodes 11 b and the surface ground electrode 11 are electrically connected by a pair of through-ground wirings 15. With this configuration, the pair of through ground wirings 15 can be prevented from being electromagnetically coupled to the through wiring 12. As a result, high-frequency transmission characteristics can be realized.
(Embodiment 4)
In the fourth embodiment, the silicon substrate 21 has a hole Ca1 instead of the first recess Ca1. FIG. 8A is a surface view of a portion surrounded by a dotted line G in the base 20 shown in FIG. FIG. 8B is a cross-sectional view of the entire micro relay along the line CC of FIG. 8A. The x direction in FIG. 8A is the x direction in FIG. 2, that is, the width direction of the base 20. The y direction in FIG. 8A is the y direction in FIG. 2, that is, the longitudinal direction of the base 20.
 本発明の実施形態4に関わる伝送線路において、シリコン基板21に形成された穴Ca1は、シリコン基板21の第1面F1から第2面F2まで貫通する。したがって、穴Ca1は底面を有していない。信号配線10の配線傾斜部10aは、穴Ca1の傾斜面WA1上に配置される。しかしながら、穴Ca1は底面を有していないため、信号配線10は、配線底部10bを有していない。同様に、表面グラウンド電極11の電極傾斜部11aは、穴Ca1の傾斜面WA1上に配置される。しかしながら、穴Ca1は、底面を有していないため、表面グラウンド電極11は、電極底部11bを有していない。 In the transmission line according to Embodiment 4 of the present invention, the hole Ca1 formed in the silicon substrate 21 penetrates from the first surface F1 to the second surface F2 of the silicon substrate 21. Therefore, the hole Ca1 does not have a bottom surface. The wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 of the hole Ca1. However, since the hole Ca1 does not have a bottom surface, the signal wiring 10 does not have a wiring bottom 10b. Similarly, the electrode inclined portion 11a of the surface ground electrode 11 is disposed on the inclined surface WA1 of the hole Ca1. However, since the hole Ca1 does not have a bottom surface, the surface ground electrode 11 does not have the electrode bottom 11b.
 図8(b)に示すように、穴Ca1の傾斜面WA1上に配置された信号配線10の配線傾斜部10aは、裏面電極13bに接触している。即ち、信号配線10は、直接的に、裏面電極13bに電気的に接続されている。言い換えると、信号配線10は、貫通配線を介することなく、裏面電極13bに電気的に接続されている。 As shown in FIG. 8B, the wiring inclined portion 10a of the signal wiring 10 arranged on the inclined surface WA1 of the hole Ca1 is in contact with the back electrode 13b. That is, the signal wiring 10 is directly electrically connected to the back surface electrode 13b. In other words, the signal wiring 10 is electrically connected to the back surface electrode 13b without passing through the through wiring.
 図8(c)に示すように、シリコン基板21は、第2面F2から第1面F1に貫通する穴Ca1を備える。また、シリコン基板21は、その第2面F2に、裏面電極13bと裏面グラウンド電極14とを備える。裏面電極13bは、穴Ca1に隣接している。裏面グラウンド電極14は、裏面電極13bの周囲に位置する。図には示されていないが、穴Ca1の傾斜面WA1上に配置された表面グラウンド電極11の電極傾斜部11aは、裏面裏面グラウンド電極14に接触している。すなわち、表面グラウンド電極11は、直接的に、裏面グラウンド電極14に電気的に接続されている。言い換えると、表面グラウンド電極11は、貫通グラウンド配線15を介することなく、裏面グラウンド電極14に電気的に接続されている。 As shown in FIG. 8C, the silicon substrate 21 includes a hole Ca1 penetrating from the second surface F2 to the first surface F1. The silicon substrate 21 includes a back electrode 13b and a back ground electrode 14 on the second surface F2. The back electrode 13b is adjacent to the hole Ca1. The back surface ground electrode 14 is located around the back surface electrode 13b. Although not shown in the drawing, the electrode inclined portion 11a of the front surface ground electrode 11 disposed on the inclined surface WA1 of the hole Ca1 is in contact with the back surface back surface ground electrode. That is, the front surface ground electrode 11 is directly electrically connected to the back surface ground electrode 14. In other words, the front surface ground electrode 11 is electrically connected to the back surface ground electrode 14 without passing through the through-ground wiring 15.
 なお、穴Ca1は、樹脂などの絶縁物によって充填しても良い。この場合、マイクロリレーの内部の気密性を確保することができる。 The hole Ca1 may be filled with an insulator such as resin. In this case, the airtightness inside the micro relay can be ensured.
 その他の構成は、図6及び図7に示した伝送線路の構成を同じであり、説明を省略する。 Other configurations are the same as those of the transmission line shown in FIGS. 6 and 7, and the description thereof is omitted.
 以上説明したように、シリコン基板21は、シリコン基板21の第1面F1から第2面F2まで貫通している穴Ca1を有している。信号配線10の配線傾斜部10aは、傾斜面WA1上に配置されており、裏面電極13bと電気的に接続されている。これにより、シリコン基板21は、貫通ビアを有する必要が無い。したがって、貫通ビアによるインピーダンスの不整合の影響を低減することができる。その結果、高周波の伝送特性をさらに向上させることができる。
(実施形態5)
 実施形態5では、シリコン基板21は、第1凹部Ca1を有しており、この第1凹部Ca1は、第2面F2まで貫通せずに底面BTを有している。また、シリコン基板21は、第2面F2に第2凹部Ca2が設けられている。第2凹部Ca2は、傾斜面WA2と底面とを有する。裏面グラウンド電極14は、シリコン基板21の第2面F2上及び第2凹部Ca2の傾斜面WA2上及び底面上にそれぞれ配置されている。図9(a)は図9(b)のD-D切断面における断面図である。裏面グラウンド電極14は、シリコン基板21から見て、信号配線10と反対側に配置されている。
As described above, the silicon substrate 21 has the hole Ca1 penetrating from the first surface F1 to the second surface F2 of the silicon substrate 21. The wiring inclined portion 10a of the signal wiring 10 is disposed on the inclined surface WA1 and is electrically connected to the back electrode 13b. Thereby, the silicon substrate 21 does not need to have a through via. Therefore, the influence of impedance mismatch due to the through via can be reduced. As a result, high-frequency transmission characteristics can be further improved.
(Embodiment 5)
In the fifth embodiment, the silicon substrate 21 has a first recess Ca1, and the first recess Ca1 has a bottom surface BT without penetrating to the second surface F2. Further, the silicon substrate 21 is provided with a second recess Ca2 on the second surface F2. The second recess Ca2 has an inclined surface WA2 and a bottom surface. The back surface ground electrode 14 is disposed on the second surface F2 of the silicon substrate 21 and on the inclined surface WA2 and the bottom surface of the second recess Ca2. FIG. 9A is a cross-sectional view taken along the line DD in FIG. 9B. The back surface ground electrode 14 is disposed on the side opposite to the signal wiring 10 when viewed from the silicon substrate 21.
 図9(a)に示すように、裏面グラウンド電極14は信号配線10から、所定の距離離間している。この所定の距離は、信号配線10の長手方向に沿って一定である。言い換えると、裏面グラウンド電極14は、シリコン基板21の厚みによって、信号配線10から離間している。このシリコン基板21の厚みは、信号配線10の長手方向に沿って一定である。 As shown in FIG. 9A, the back surface ground electrode 14 is separated from the signal wiring 10 by a predetermined distance. This predetermined distance is constant along the longitudinal direction of the signal wiring 10. In other words, the back surface ground electrode 14 is separated from the signal wiring 10 by the thickness of the silicon substrate 21. The thickness of the silicon substrate 21 is constant along the longitudinal direction of the signal wiring 10.
 また、裏面グラウンド電極14aは、信号配線10aから、所定の距離離間している。この所定の距離は、信号配線10の長手方向に沿って一定である。言い換えると、裏面グラウンド電極14aは、シリコン基板21の厚みによって、信号配線10aから離間している。このシリコン基板21の厚みは、信号配線10の長手方向に沿って一定である。具体的には、第2凹部Ca2は、シリコン基板21の第1面F1において、第1凹部Ca1が形成されていない領域に対向して形成されている。傾斜面Wa2は、第1凹部Ca1の傾斜面WA1に対向する位置に形成されている。 Further, the back surface ground electrode 14a is separated from the signal wiring 10a by a predetermined distance. This predetermined distance is constant along the longitudinal direction of the signal wiring 10. In other words, the back surface ground electrode 14 a is separated from the signal wiring 10 a by the thickness of the silicon substrate 21. The thickness of the silicon substrate 21 is constant along the longitudinal direction of the signal wiring 10. Specifically, the second recess Ca2 is formed on the first surface F1 of the silicon substrate 21 so as to face a region where the first recess Ca1 is not formed. The inclined surface Wa2 is formed at a position facing the inclined surface WA1 of the first recess Ca1.
 本実施形態で示したように、第1凹部Ca1及び第2凹部Ca2の位置及び形状は、裏面グラウンド電極14、14aと信号配線10、10aとの距離が信号配線10、10aの長手方向に沿って一定となるように調整されている。その結果、コプレーナウェーブガイド線路における信号配線10、10aと裏面グラウンド電極14、14a間の距離が一定となる。その結果、高い高周波の伝送特性を実現する伝送線路を設計することができる。 As shown in the present embodiment, the positions and shapes of the first recess Ca1 and the second recess Ca2 are such that the distance between the back ground electrodes 14, 14a and the signal wirings 10, 10a is along the longitudinal direction of the signal wirings 10, 10a. Adjusted to be constant. As a result, the distance between the signal wirings 10 and 10a and the back ground electrodes 14 and 14a in the coplanar waveguide line is constant. As a result, a transmission line that realizes high-frequency transmission characteristics can be designed.
 その他の構成は、図6及び図7に示した伝送線路の構成と同じであり、説明を省略する。 Other configurations are the same as those of the transmission line shown in FIG. 6 and FIG.
 また、実施形態5は、図6及び図7に示した伝送線路において第2面F2側に第2凹部Ca2を形成した場合を示したが、図8に示した伝送線路において第2面F2側に第2凹部Ca2を形成しても、同様な作用効果を得ることができる。 Moreover, although Embodiment 5 showed the case where 2nd recessed part Ca2 was formed in the 2nd surface F2 side in the transmission line shown in FIG.6 and FIG.7, the 2nd surface F2 side in the transmission line shown in FIG. Even if the second concave portion Ca2 is formed, a similar effect can be obtained.
 また、本発明の第1乃至実施形態5では、誘電体基板の一例として単結晶シリコンからなるシリコン基板21について説明したが、誘電体基板は、ガラス基板や、低温同時焼成セラミックス基板(LTCC基板)であっても構わない。それぞれの基板の利点を述べる。先ず、シリコン基板21の場合は、フォトリソグラフィ技術及びエッチング技術といった半導体微細加工技術を利用することができるから、ガラス基板を用いる場合に比べて、ベース20の加工を容易に行うことができる。特に、機能部30は、シリコンを用いて形成されているから、機能部30とベース20との線膨張係数をおおよそ等しくすることができる。そのため、線膨張係数の差に起因する応力を低減することができる。なお、シリコン基板21としては、高抵抗のシリコンを用いることが望ましい。この場合には、高周波特性(特にスローウェーブモードでの高周波特性)を向上させることができる。 In the first to fifth embodiments of the present invention, the silicon substrate 21 made of single crystal silicon has been described as an example of the dielectric substrate. However, the dielectric substrate may be a glass substrate or a low-temperature co-fired ceramic substrate (LTCC substrate). It does not matter. The advantages of each substrate are described. First, in the case of the silicon substrate 21, since the semiconductor fine processing technology such as the photolithography technology and the etching technology can be used, the processing of the base 20 can be easily performed as compared with the case of using the glass substrate. In particular, since the functional unit 30 is formed using silicon, the linear expansion coefficients of the functional unit 30 and the base 20 can be made approximately equal. Therefore, the stress resulting from the difference in linear expansion coefficient can be reduced. As the silicon substrate 21, it is desirable to use high resistance silicon. In this case, high frequency characteristics (particularly, high frequency characteristics in the slow wave mode) can be improved.
 誘電体基板がガラス基板である場合、比較的誘電率が低い物質であるガラスを用いることで高周波特性を向上させることができる。 When the dielectric substrate is a glass substrate, high-frequency characteristics can be improved by using glass which is a substance having a relatively low dielectric constant.
 低温同時焼成セラミックス基板は、ガラス基板に比べて、直径が一様な円形状の貫通孔や内部配線(グラウンド層)を容易に形成することができる。貫通孔の直径が一様である場合には、貫通孔の直径が一様でない場合(例えば、孔の深さに従って径が変化する場合)に比べて、高周波特性が向上する。また、基板内部にグラウンド層を設けることにより、インピーダンスを調整することができ、インピーダンスの設計が容易になる。よって、ガラス基板に比べて、高周波の伝送特性を向上させることができる。 The low-temperature co-fired ceramic substrate can easily form circular through-holes and internal wiring (ground layer) having a uniform diameter as compared with a glass substrate. When the diameter of the through hole is uniform, the high frequency characteristics are improved as compared with the case where the diameter of the through hole is not uniform (for example, when the diameter changes according to the depth of the hole). Further, by providing a ground layer inside the substrate, the impedance can be adjusted, and the impedance design becomes easy. Therefore, high-frequency transmission characteristics can be improved compared to a glass substrate.
 また、本発明の第1乃至実施形態5では、MEMS構造体の一例として、マイクロリレーについて説明したが、これに限らず、高周波の電気信号を取り扱う、高周波スイッチ、共振器、フィルタ、発振器なども含まれる。 In the first to fifth embodiments of the present invention, the micro relay has been described as an example of the MEMS structure. However, the present invention is not limited to this, and a high frequency switch, a resonator, a filter, an oscillator, and the like that handle a high frequency electric signal are also included. included.
 このように、本発明はここでは記載していない様々な実施形態等を包含するということを理解すべきである。したがって、本発明はこの開示から妥当な特許請求の範囲に係る発明特定事項によってのみ限定されるものである。 Thus, it should be understood that the present invention includes various embodiments not described herein. Therefore, the present invention is limited only by the invention specifying matters according to the scope of claims reasonable from this disclosure.

Claims (16)

  1.  誘電体基板と信号配線とを有する伝送線路であって、
     前記誘電体基板は、第1面及び第2面を有しており、前記第2面は、前記第1面と反対側に位置しており、
     前記誘電体基板は、前記第1面に、第1領域を有しており、
     前記誘電体基板は、前記第2面に、裏面電極が設けられており、
     前記信号配線は、信号を伝送するように構成されており、長さと幅とを有しており、長さ方向の一端に第1端を有しており、前記第1端は、前記第1領域に配置されており、前記第1端は、前記裏面電極と電気的に接続されており、
     前記第1領域は、前記裏面電極と、前記誘電体基板の厚み方向において重複していることを特徴とする伝送線路。
    A transmission line having a dielectric substrate and signal wiring,
    The dielectric substrate has a first surface and a second surface, and the second surface is located on the opposite side of the first surface;
    The dielectric substrate has a first region on the first surface;
    The dielectric substrate is provided with a back electrode on the second surface,
    The signal wiring is configured to transmit a signal, has a length and a width, has a first end at one end in the length direction, and the first end is the first end. Disposed in a region, the first end is electrically connected to the back electrode,
    The transmission line, wherein the first region overlaps the back electrode in the thickness direction of the dielectric substrate.
  2.  前記誘電体基板は、その第1面に第1凹部が形成されており、前記第1凹部は前記第1領域を定義しており、
     前記信号配線の一端は、第1内面に配置されていることを特徴とする請求項1に記載の伝送線路。
    The dielectric substrate has a first recess formed on a first surface thereof, and the first recess defines the first region,
    The transmission line according to claim 1, wherein one end of the signal wiring is disposed on the first inner surface.
  3.  前記第1内面は底面を含んでおり、
     前記信号配線の前記第1端は、前記底面に配置されており、
     前記誘電体基板は、前記第1面に、表面グラウンド電極が設けられており、前記表面グラウンド電極は、前記信号配線と電気的に絶縁されており、
     前記誘電体基板は、前記第2面に、裏面グラウンド電極が設けられており、前記裏面グラウンド電極は、前記信号配線と電気的に絶縁されていることを特徴とする請求項2に記載の伝送線路。
    The first inner surface includes a bottom surface;
    The first end of the signal wiring is disposed on the bottom surface;
    The dielectric substrate is provided with a surface ground electrode on the first surface, and the surface ground electrode is electrically insulated from the signal wiring,
    The transmission according to claim 2, wherein the dielectric substrate is provided with a back surface ground electrode on the second surface, and the back surface ground electrode is electrically insulated from the signal wiring. line.
  4.  前記第1凹部は、前記第1面に沿った長さを有しており、
     前記第1内面の底面は、前記第1凹部の長さ方向に沿った長さを有しており、
     前記信号配線の全ては、前記底面に配置されていることを特徴とする請求項3に記載の伝送線路。
    The first recess has a length along the first surface;
    The bottom surface of the first inner surface has a length along the length direction of the first recess,
    The transmission line according to claim 3, wherein all of the signal wires are disposed on the bottom surface.
  5.  前記誘電体基板は、その前記第2面に、第2凹部が形成されており、前記第2凹部は、前記第1凹部と前記誘電体基板の厚み方向において重複するように形成されており、前記第2凹部は、第2内面を有しており、
     前記裏面グラウンド電極は、前記第2面及び前記第2内面に形成されていることを特徴とする請求項3または4に記載の伝送線路。
    The dielectric substrate has a second recess formed on the second surface thereof, and the second recess is formed to overlap the first recess in the thickness direction of the dielectric substrate, The second recess has a second inner surface;
    The transmission line according to claim 3 or 4, wherein the back ground electrode is formed on the second surface and the second inner surface.
  6.  前記第2凹部の周縁は、前記第1凹部の周縁と前記誘電体基板の厚み方向において位置合わせされていることを特徴とする請求項5に記載の伝送線路。
    The transmission line according to claim 5, wherein a peripheral edge of the second concave portion is aligned with a peripheral edge of the first concave portion in a thickness direction of the dielectric substrate.
  7.  前記第1内面は、傾斜面を有しており、前記傾斜面は、前記第1面に対して鋭角に交差するように、前記第1面に対して傾斜しており、
     前記信号配線の第1端の一部は、前記傾斜面に設けられていることを特徴とする請求項2に記載の伝送線路。
    The first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface;
    The transmission line according to claim 2, wherein a part of the first end of the signal wiring is provided on the inclined surface.
  8.  前記第1凹部は、開口面積を有しており、
     前記開口面積は誘電体基板の第1面から第2面に向かうに伴って小さくなるように形成されており、これにより、前記第1凹部は前記傾斜面を有していることを特徴とする請求項7に記載の伝送線路。
    The first recess has an opening area;
    The opening area is formed so as to become smaller from the first surface to the second surface of the dielectric substrate, whereby the first recess has the inclined surface. The transmission line according to claim 7.
  9.  前記第1内面は、さらに底面を有しており、
     前記誘電体基板は、前記第2面から前記底面に貫通する貫通配線が設けられており、前記貫通配線は、前記裏面電極と電気的に接続されており、
     前記信号配線の一端は、前記底面に配置されており、前記貫通配線と電気的に接続されていることを特徴とする請求項7または8に記載の伝送線路。
    The first inner surface further has a bottom surface,
    The dielectric substrate is provided with a through wiring penetrating from the second surface to the bottom surface, and the through wiring is electrically connected to the back electrode,
    The transmission line according to claim 7 or 8, wherein one end of the signal wiring is disposed on the bottom surface and is electrically connected to the through wiring.
  10.  前記誘電体基板は、前記第2面から前記底面に延びる貫通孔が形成されており、前記貫通配線は、前記貫通孔に配置されていることを特徴とする請求項9に記載の伝送線路。
    The transmission line according to claim 9, wherein the dielectric substrate has a through hole extending from the second surface to the bottom surface, and the through wiring is disposed in the through hole.
  11.  前記誘電体基板は、前記第2面に第2凹部が形成されており、
     前記誘電体基板は、前記第2面及び前記第2凹部に、裏面グラウンド電極が設けられており、前記裏面グラウンド電極は、前記裏面電極から電気的に絶縁されており、
     前記裏面グラウンド電極は、前記信号配線から、前記誘電体基板の厚み方向において所定の距離離間しており、
     前記所定の距離は、前記信号配線の長さ方向にわたって一定であることを特徴とする請求項7~10のいずれかに記載の伝送線路。
    The dielectric substrate has a second recess formed on the second surface,
    The dielectric substrate is provided with a back surface ground electrode on the second surface and the second recess, and the back surface ground electrode is electrically insulated from the back surface electrode,
    The back ground electrode is separated from the signal wiring by a predetermined distance in the thickness direction of the dielectric substrate,
    The transmission line according to any one of claims 7 to 10, wherein the predetermined distance is constant over a length direction of the signal wiring.
  12.  前記誘電体基板は、一対の表面グラウンド電極を有しており、
     前記表面グラウンド電極は、前記第1面及び前記傾斜面にわたって設けられており、
     前記表面グラウンド電極は、前記信号配線の両側に位置し、信号配線の幅方向に沿って並んでおり、前記信号配線と電気的に絶縁されるように前記信号配線から離間しており、
     前記信号配線は、配線傾斜部を有しており、前記配線傾斜部は前記傾斜面に位置しており、
     前記表面グラウンド電極は、電極傾斜部を有しており、電極傾斜部は前記傾斜面に位置しており、
     前記配線傾斜部は、前記電極傾斜部から、第1の距離離間しており、
     前記第1の距離は、前記表面グラウンド電極及び前記信号配線が前記第2面に近づくに伴って変化することを特徴とする請求項7~11のいずれかに記載の伝送線路。
    The dielectric substrate has a pair of surface ground electrodes,
    The surface ground electrode is provided over the first surface and the inclined surface,
    The surface ground electrodes are located on both sides of the signal wiring, are arranged along the width direction of the signal wiring, and are separated from the signal wiring so as to be electrically insulated from the signal wiring,
    The signal wiring has a wiring inclined portion, and the wiring inclined portion is located on the inclined surface,
    The surface ground electrode has an electrode inclined portion, the electrode inclined portion is located on the inclined surface,
    The wiring inclined portion is separated from the electrode inclined portion by a first distance,
    12. The transmission line according to claim 7, wherein the first distance changes as the surface ground electrode and the signal wiring approach the second surface.
  13.  前記誘電体基板は、さらに、一対の貫通グラウンド配線を有しており、
     前記一対の貫通グラウンド配線それぞれは、前記誘電体基板の前記第2面から前記第1面に貫通しており、
     前記貫通グラウンド配線は、前記貫通配線の両側に位置しており、前記信号配線の幅方向に沿って配置されており、前記貫通配線と電気的に絶縁されており、
     前記一対の貫通グラウンドは、前記一対の表面グラウンド電極と、それぞれ電気的に接続されていることを特徴とする請求項9または10に記載の伝送線路。
    The dielectric substrate further has a pair of through-ground wirings,
    Each of the pair of through-ground wirings penetrates from the second surface of the dielectric substrate to the first surface,
    The through-ground wiring is located on both sides of the through-wiring, is disposed along the width direction of the signal wiring, and is electrically insulated from the through-wiring,
    The transmission line according to claim 9 or 10, wherein the pair of penetration grounds are electrically connected to the pair of surface ground electrodes, respectively.
  14.  前記誘電体基板は、前記第2面から前記第1面に貫通する穴が形成されており、
     前記穴は、第1内面を有しており、前記第1内面は、前記第1領域を定義しており、
     前記信号配線は、前記第1面から前記第1内面を介して前記裏面電極に至ることを特徴とする請求項1に記載の伝送線路。
    The dielectric substrate has a hole penetrating from the second surface to the first surface,
    The hole has a first inner surface, and the first inner surface defines the first region;
    The transmission line according to claim 1, wherein the signal wiring extends from the first surface to the back electrode through the first inner surface.
  15.  前記第1内面は、傾斜面を有しており、前記傾斜面は、前記第1面に対して鋭角に交差するように、前記第1面に対して傾斜しており、
     前記信号配線の第1端の一部は、前記傾斜面に設けられていることを特徴とする請求項2に記載の伝送線路。
    The first inner surface has an inclined surface, and the inclined surface is inclined with respect to the first surface so as to intersect at an acute angle with respect to the first surface;
    The transmission line according to claim 2, wherein a part of the first end of the signal wiring is provided on the inclined surface.
  16.  前記穴は、絶縁性を有する樹脂により充填されていることを特徴とする請求項14または15に記載の伝送線路。 The transmission line according to claim 14 or 15, wherein the hole is filled with an insulating resin.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04336702A (en) * 1991-05-14 1992-11-24 Mitsubishi Electric Corp Package
JPH0685158A (en) * 1992-09-07 1994-03-25 Matsushita Electric Ind Co Ltd Electric transmission line and manufacture thereof
JPH11266105A (en) * 1998-03-16 1999-09-28 Oki Electric Ind Co Ltd Signal transmission substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04336702A (en) * 1991-05-14 1992-11-24 Mitsubishi Electric Corp Package
JPH0685158A (en) * 1992-09-07 1994-03-25 Matsushita Electric Ind Co Ltd Electric transmission line and manufacture thereof
JPH11266105A (en) * 1998-03-16 1999-09-28 Oki Electric Ind Co Ltd Signal transmission substrate

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