WO2010034815A1 - Method for forming self-aligned electrodes - Google Patents

Method for forming self-aligned electrodes Download PDF

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Publication number
WO2010034815A1
WO2010034815A1 PCT/EP2009/062452 EP2009062452W WO2010034815A1 WO 2010034815 A1 WO2010034815 A1 WO 2010034815A1 EP 2009062452 W EP2009062452 W EP 2009062452W WO 2010034815 A1 WO2010034815 A1 WO 2010034815A1
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WIPO (PCT)
Prior art keywords
layer
transparent
patterned
precursor
forming
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PCT/EP2009/062452
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French (fr)
Inventor
Sören STEUDEL
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Imec
Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek - Tno
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Publication of WO2010034815A1 publication Critical patent/WO2010034815A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes

Definitions

  • This invention relates to a method for the formation of metal patterns, more in particular to a method for the self-aligned formation of metal patterns with respect to another pattern.
  • the preferred technology for organic semiconductor applications on flexible substrates such as foils is based on a bottom-gate bottom-source-drain transistor structure.
  • a gate pattern is defined on the substrate, followed by the deposition of gate dielectric.
  • via holes are needed in the gate dielectric layer.
  • the source and drain contacts are provided.
  • Interconnects between transistors can be created by lines patterned in either the source/drain metal layer or the gate metal layer, and using the via holes in the gate dielectric to connect lines where needed.
  • an organic semiconductor layer is deposited and patterned. This process requires a number of patterning steps.
  • the first layer to be patterned is the gate metal. As such this requires no alignment.
  • the dielectric layer As far as the dielectric layer is concerned, there may be a need for providing via holes through the dielectric layer. However such via holes are usually formed outside the active area of the organic devices. Therefore, misalignments can be compensated by design rules. Patterning of the source and drain contacts is a critical step, and misalignment with respect to the gate may result in a degradation of the yield and the performance of the transistor. Therefore, a very accurate method is needed for aligning the source and drain contacts with respect to the gate.
  • the last layer to be patterned is the organic semiconductor layer. Patterning of this layer also occurs outside the active area of the devices and design rules can accommodate for possible misalignment. Therefore, the most critical and most costly alignment step in a fabrication process of organic transistors on foil is the source and drain alignment with respect to the gate.
  • foils are flexible, design rules for misalignment need to compensate for possible foil deformation (e.g. stretching) between subsequent alignment steps. This is very difficult for the source and drain contact if the foil is not attached to a rigid carrier.
  • WO 2007/057664 a method of patterning a thin film is described in which an intermediate radiation sensitive layer is deposited between a substrate and a thin film layer, and wherein patterned radiation is used to pattern the intermediate radiation sensitive layer and the thin film.
  • the radiation can be provided in a pattern by providing the radiation through a photo-mask.
  • the intermediate layer can be irradiated through the substrate, providing the option of using the substrate itself to achieve patterning.
  • the substrate may comprise a pre-patterned layer that acts as the exposure mask.
  • the patterned layer on the substrate may comprise a gate pattern that may be used as a mask for defining source and drain contacts.
  • an intermediate radiation sensitive layer The radiation used to expose this layer is provided by a UV, electron beam or X-ray source.
  • these radiation sources can not be used for radiation through a standard transparent substrate such as regular glass, display glass and/or different types of transparent plastic foils.
  • RFID radio frequency identification tags
  • active matrix OLED back panels besides low cost processing (e.g. printing) there is also a need for a good transistor performance.
  • the resistance of the interconnects and the contact resistance need to be significantly smaller than the resistance of the transistor channels. Based on this, it can be estimated that the sheet resistance of the source-drain layer needs to be substantially below 10 2 Ohms per square. Otherwise the performance of the organic transistor would be limited by the interconnect resistance rather than by the transistor channel. Therefore, organic conductors such as PEDOT/PSS
  • the present invention provides a method for forming a stack of at least two patterned layers comprising the steps of: providing a first layer (preferably a substrate) transparent (or permeable) to visible light wavelengths, forming, upon said first transparent layer (or said transparent substrate) , a first patterned layer, which is not transparent to said wavelengths, forming, upon said first patterned layer and said first transparent layer (or said transparent substrate), a second transparent layer (or a dielectric layer) , depositing on said second transparent layer (or said dielectric layer) a precursor for forming an electrically conductive layer, irradiating said precursor, through said first transparent layer (or said transparent substrate) and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a (shadow) mask.
  • said first patterned layer is reflective to said visible light wavelengths .
  • a first patterned layer is reflective to said visible light wavelengths .
  • reflective layer refers to a layer reflecting the spectrum of the visible light wavelengths (or radiation) used for irradiating the precursor.
  • said first patterned layer is more than 80%, preferably more than
  • the method of the present invention can comprise the steps of: providing a first layer (preferably a substrate) transparent (or permeable) to visible light wavelengths, depositing and patterning a layer, that is non- transparent to said wavelengths, for forming a first patterned layer, depositing, upon said first patterned layer and said first transparent layer (or said transparent substrate) , a second transparent layer (or a dielectric layer) , depositing on said second transparent layer (or said dielectric layer) a precursor for forming an electrically conductive layer, - irradiating said precursor, through said first transparent layer (or the transparent substrate) and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a (shadow) mask.
  • dielectric layer refers to an electrically non-conductive layer .
  • said stack of at least two patterned layers is formed in a semiconductor device or in a transistor device.
  • said stack of at least two patterned layers is formed in the manufacture of (or is part of) an organic semiconductor device or in an organic transistor device.
  • said stack of at least two patterned layers is formed in the manufacture of (or is part of) a thin film semiconductor device or in a thin film transistor device.
  • said precursor (or compound) is sintered, to form said electrically conductive layer, by the energy provided by the visible light wavelengths (said precursor absorbing the wavelengths of visible light) .
  • Said first patterned layer acts a (shadow) mask allowing said electrically conductive layer (i.e. said second patterned layer) to be formed locally, where said energy is provided.
  • a "transparent layer” or transparent substrate refers to a layer (or a substrate) transparent (i.e. permeable) to visible light wavelengths (or radiation) .
  • a "transparent layer” refers to a layer (or a substrate) allowing the spectrum of the visible light wavelengths used for irradiating said precursor to pass through (i.e. not absorbing the spectrum of the visible light wavelengths used for irradiating said precursor) .
  • the transparency of said first and second transparent layers is more than 80%, preferably more than 90%.
  • the wavelengths of the visible light used are comprised in the range between (about) 400 nm and 800 nm, preferably in the range between (about) 450 nm and 700 nm, more preferably in the range between (about) 450 nm and 650 nm.
  • the wavelength of the visible light used is (about) 532nm.
  • a green laser is used providing said wavelength of the visible light of (about) 532nm.
  • the wavelength of the visible light used is (about) 473nm.
  • a blue solid laser is used providing said wavelength of the visible light of (about) 473nm.
  • the wavelength of the visible light used is (about) 633nm, or (about) 650nm.
  • a HeNe laser providing said wavelength of the visible light of (about) 633nm, or a red solid laser providing said wavelength of the visible light of (about) 650nm, is used.
  • said irradiation is (are) provided by a light beam providing a (narrow) spectrum of wavelengths .
  • said irradiation (or visible light wavelengths) is (are) provided by a monochromatic laser light beam.
  • said irradiation is provided perpendicular to said first transparent layer (or transparent substrate) .
  • the laser power ranges between (about) 1OmW and (about) 2W.
  • the writing speed of a (green) laser providing wavelengths of the visible light of (about) 532nm is (about) 2.5 m/s and said laser has a power of 2W.
  • said precursor (or compound) is deposited using a liquid, more preferably an ink.
  • said liquid (or said ink) comprises said precursor (or compound) and is provided (or applied, or deposited) to form said electrically conductive layer by a liquid processing method.
  • said liquid processing method comprises any method known by a person skilled in the art.
  • said liquid processing method comprises spray coating, printing, slot dying, or spin coating .
  • said liquid (or ink) comprises at least one solvent (in the liquid phase) .
  • said solvent comprises (or consists of) toluene, IsoPropylAlcohol (IPA), acetone, or cyclohexane .
  • said at least one solvent is evaporated during said liquid processing step.
  • said at least one solvent is evaporated after said liquid processing step.
  • said at least one solvent is evaporated at room temperature (for several hours), or by heating the formed structure (or sample) .
  • said heating is performed in a furnace or on a hot plate.
  • said at least one solvent is evaporated before said irradiation step
  • said at least one solvent is evaporated during said irradiation step
  • said at least one solvent is evaporated during said irradiation step (or sintering step) by the energy provided by the visible light wavelengths.
  • said liquid (or ink) comprises stabilizers for the metal nanoparticles .
  • said stabilizers comprise (or consist of) polymers .
  • said polymers comprise (or consist of) n-hexylamine, or olehexylamine .
  • said stabilizers comprise (or consist of) Self Assembled Monolayers (SAM) .
  • SAM Self Assembled Monolayers
  • said Self Assembled Monolayers comprise thiols.
  • said precursor comprises (or consists of) metal nanoparticles .
  • said precursor comprises (or consists of) Au, Ag, or Cu nanoparticles.
  • a green laser is used, providing said wavelength of the visible light of (about) 532nm, in case Au nanoparticles are used.
  • a blue solid laser is used, providing said wavelength of the visible light of (about) 473nm, in case Ag nanoparticles are used.
  • a HeNe laser providing said wavelength of the visible light of
  • the size of (the diameter of) said nanoparticles is comprised in the range between (about) 2 nm and 50 nm.
  • the size of the (diameter of the) Au nanoparticles is (about) 5 nm
  • the size of the (diameter of the) Ag nanoparticles is (about) 10 nm
  • the size of the (diameter of the) Cu nanoparticles is (about) 30 nm
  • said first transparent layer is the substrate.
  • said first transparent layer (or the transparent substrate) comprises (or consists of) glass, or a plastic foil.
  • said glass comprises (or consists of) regular glass, or display glass.
  • said plastic foil comprises (or consists of) polyethylene terephthalate (PET) , polyethylene nafthalate (PEN) , or polyimide.
  • a foil refers to a thin flexible and/or stretchable sheet of material .
  • said first transparent layer (or the transparent substrate) is flexible (and/or stretchable) .
  • said first transparent layer (or the transparent substrate) can comprise (or consist of) a stack of at least two layers.
  • the thickness of said first transparent layer (or the transparent substrate) is comprised in the range between (about) 20 ⁇ m to 500 ⁇ m, preferably, in the range between (about) 20 ⁇ m to lOO ⁇ m.
  • said second transparent layer comprises (or consists of) an organic dielectric material or an inorganic dielectric material.
  • said second transparent layer can comprise (or consist of) a stack of at least two layers.
  • said first patterned layer comprises (or consists of) conductive materials.
  • said first patterned layer comprises (or consists of) metals, conductive metal oxides, or carbon nanotubes.
  • said first patterned layer comprises (or consists of) Al, Ti, Cu, Au, Ni, Ag, ITO (indium tin oxide) , ZnO, Ag-ink, or carbon-nanotube ink.
  • said first patterned layer comprises (or consists of) alloys of metals .
  • said first patterned layer is a metal gate.
  • the width of the gate is comprised in the range between (about) 2 ⁇ m and 500 ⁇ m, preferably, said width of the gate is lower than (about) lOO ⁇ m, more preferably, lower than (about) 20 ⁇ m, most preferably, said width of the gate is (about) 5 ⁇ m.
  • said first patterned layer can be a stack of at least two layers of conductive material, more particularly forming a metal gate.
  • said first patterned layer is provided by any method known by a person skilled in the art.
  • the first patterned layer is provided by a liquid or a vacuum processing method.
  • said liquid processing method comprises spin-coating, spray-coating, printing, or slot dying.
  • said vacuum processing method comprises evaporation, sputtering, laser ablation, Chemical
  • Vapour Deposition ion-beam sputtering, or organic vapour phase deposition.
  • said first patterned layer is provided by etching, printing, or by a lithography process.
  • said second patterned layer constitutes or forms the source and/or drain contact (s) of a (thin film) semiconductor device or a (thin film) transistor device.
  • said source and/or drain contact (s) comprise (s) (or consist (s) of) metal.
  • said source and/or drain contact (s) comprise (s) (or consist (s) of) Au, Ag, or Cu.
  • said formed second patterned layer has a sheet resistance lower than 100 Ohms per square.
  • said irradiation step (or sintering step) is performed at a temperature providing sufficient energy to sinter said precursor to form said electrically conductive layer.
  • said irradiation step (or sintering step) is performed at a temperature in the range of (about) 100°C and 200°C, preferably at a temperature of (about) 150°C.
  • the temperature of the precursor is comprised in the range of (about) 100°C and 200°C, preferably at a temperature of (about) 150°C while (or for) performing the irradiation step (or sintering step) .
  • a method according to the invention further comprises a rinsing step (or cleaning step) for removing the non-sintered precursor.
  • said rinsing step is performed using at least one solvent.
  • said solvent comprises (or consists of) toluene, IsoPropylAlcohol (IPA), acetone, or cyclohexane .
  • a thin film semiconductor layer is deposited on said formed second patterned layer after said rinsing step (or cleaning step) , .
  • the thickness of said thin film semiconductor layer is comprised in the range between (about) 5nm and 5 ⁇ m.
  • depositing said thin films is performed in vacuum.
  • depositing said thin films is performed by evaporation, sputtering, laser ablation, Chemical Vapour Deposition, ion- beam sputtering, or organic vapour phase deposition.
  • depositing said thin films is performed at near-ambient pressure.
  • depositing said thin films is performed by spin-coating, spray-coating, printing, slot dying, or lamination.
  • said semiconductor layer can comprise (or consist of) an anorganic semiconductor layer.
  • said semiconductor layer comprises (or consists of) (metal) oxides (e.g. ZnO), amorphous Si, carbon nanotubes, carbon nanowires, graphene.
  • metal oxides e.g. ZnO
  • amorphous Si e.g. carbon nanotubes, carbon nanowires, graphene.
  • said semiconductor layer can comprise (or consist of) an organic semiconductor layer .
  • said semiconductor layer comprises (or consists of) small molecules such as pentacene, pthalocyanines, fullerenes, or perylenes; soluble small molecules, such as solubilised linear acenes such as TIPS, pentacene possibly formulated in inks that may comprise insulating polymers, polymer semiconductors, or oligomer semiconductors; polymer semiconductors such as polythiophene or poly-aryl amines.
  • said semiconductor layer comprises (or consists of) a material selected from the group consisting of pentacene, pthalocyanines, fullerenes, perylenes, solubilised linear acenes such as TIPS, polythiophene polymer, and poly-aryl amines polymer.
  • said deposited thin film semiconductor layer is patterned.
  • said thin film semiconductor layer is patterned using additive processes (more particularly, direct printing, or deposition through a shadow mask) , or subtractive processes (more particularly, etching, laser ablation, or lift-off techniques) .
  • a method according to the invention can be used for the manufacture of (or for fabricating) organic transistors, more particularly organic thin film transistors .
  • said organic thin film transistors are used in (or part of) organic circuits such as for example radio frequency identification tags (RFID) or active matrix organic light emitting diode (OLED) back panels.
  • RFID radio frequency identification tags
  • OLED active matrix organic light emitting diode
  • a method according to the invention can be used for the manufacture of (or for fabricating) organic circuits such as for example radio frequency identification tags (RFID) or active matrix organic light emitting diode (OLED) back panels .
  • RFID radio frequency identification tags
  • OLED active matrix organic light emitting diode
  • a method according to the invention can be used for aligning a second patterned layer with respect to a first patterned layer.
  • the method of the invention can also be used for improving the alignment of a second patterned layer with respect to a first patterned layer.
  • the method of the invention can also be used for patterning a stack of layers. [0112] The method of the invention can also be used for selectively forming a second patterned layer with respect to a first patterned layer. Short description of the drawings
  • Fig. 1 illustrates a method for forming self- aligned contacts according to one embodiment.
  • Fig. 2 shows absorption curves for a film comprising Au-NP in a polymer (Fig. 2 (a) ) and for a film comprising Ag-NP in a polymer (Fig. 2 (b) ) .
  • Fig. 3 shows a photograph of spray-coated source- drain contacts.
  • Fig. 4 shows I D s-V G s characteristics of pentacene organic thin film transistors with (a) lithographically structured sputtered Au contacts and (b) spray coated Au- nanoparticle contacts.
  • Fig. 5 is a photograph of a laser sintered Au nanoparticle layer on PEN foil.
  • Fig. 6 is a photograph of a laser sintered Au nanoparticle layer on PEN foil after a cleaning step.
  • Fig. 7 shows lines of sintered Au nanoparticles, as obtained after laser writing through a PEN foil.
  • Certain inventive aspects relate to a method for self-aligned definition of a metal pattern on a transparent substrate with respect to another non-transparent pattern, wherein the need for an intermediate radiation sensitive layer is avoided and wherein the method can be used with a broad range of transparent substrates such as for example standard glass substrates and transparent plastic foils.
  • the method can be used for self- aligned definition of the source and drain contacts of thin film transistors, such as for example organic transistors, with respect to the gate.
  • the metal layers to be patterned can for example be provided by a liquid processing method.
  • Certain inventive aspects relate to a method for forming, on a first patterned layer comprising a first material, a second patterned layer comprising a second material in a self-aligned way with respect to said first patterned layer being on a substrate, wherein the method comprises: providing on the substrate a liquid comprising a precursor for the second material, after having provided the first patterned layer; and exposing at least part of the precursor through the substrate to radiation for which the substrate is transparent and for which the first patterned layer is non-transparent, thereby forming the second patterned layer in an area where the precursor is exposed to the radiation.
  • the second patterned layer is preferably an electrically conductive layer, such as a metal layer.
  • the electrically conductive layer has a sheet resistance that is lower than 10 Ohms per square.
  • the precursor comprises metal nanoparticles such as for example Au nanoparticles or Ag nanoparticles .
  • Exposing the precursor (to radiation with the wavelength of the absorption of metal nanoparticle) may for example comprise exposing the precursor to light with a wavelength in the range between 400 nm and 800 nm, for example in the range between 500 nm and 600 nm, e.g. 532 nm. Exposing the precursor (to radiation) may comprise exposing the precursor to laser irradiation.
  • the substrate is a glass substrate or a transparent plastic foil, e.g. a flexible (and/or stretchable) foil.
  • the method is preferably used for forming source and drain contacts of a thin film transistor in a self- aligned way with respect to a gate contact.
  • Certain embodiments relate to a method for forming a second patterned layer comprising a second material in a self-aligned way with respect to a first patterned layer on a substrate.
  • a method for the self-aligned formation of a metal pattern with respect to another pattern more in particular a method for the self-aligned formation of a metal pattern on a transparent substrate with respect to another non- transparent pattern.
  • the method is illustrated for the self-aligned definition of the source and drain contacts with respect to the gate of an organic transistor.
  • the method can be used in other applications wherein self-aligned definition of patterns is needed.
  • the method is further described in the context of devices comprising an organic semiconductor layer.
  • the method can also be used for other than organic devices, e.g. thin-film semiconductor devices such as for example devices comprising semiconducting oxides such as ZnO, amorphous silicon, carbon nanotubes, or graphene layers.
  • thin-film semiconductor devices such as for example devices comprising semiconducting oxides such as ZnO, amorphous silicon, carbon nanotubes, or graphene layers.
  • the term 'transparent' means transparent to visible light, for example light with a wavelength in the range between 400 nm and 800 nm, e.g. in the range between 500 nm and 600 nm, e.g. 532 nm.
  • Methods that may be used for depositing thin (organic) films comprise process performed in vacuum (e.g. evaporation, sputtering, laser ablation, Chemical Vapour Deposition, ion-beam sputtering, organic vapour phase deposition) and process steps performed at near-ambient pressure (e.g. spin-coating, spray-coating, printing, slot dying, lamination) .
  • Processing at near-ambient pressure may include steps that are performed in a controlled environment, e.g. in an environment with controlled oxygen, water vapour or ozone concentration. The patterning steps
  • a gate pattern 11 is defined on a transparent substrate 10, such as for example glass, PET (polyethylene terephthalate) , PEN (polyethylene nafthalate) or polyimide.
  • This gate pattern is preferably a metal pattern, such as for example an Al pattern.
  • Other conductive materials can be used for forming the gate pattern, such as for example Ti, Cu, Au, Ni, Ag, ITO (indium tin oxide), ZnO, Ag-ink, carbon-nanotube ink.
  • the thickness of the gate layer may for example be in the range between 10 nm and 10 ⁇ m, e.g. in the range between 20 nm and 2 ⁇ m. Patterning of the gate metal can for example be done by means of printing techniques or by means of a lithography process. However, other suitable methods known by a person skilled in the art may be used.
  • a dielectric layer 12 is provided on the substrate 10 comprising the gate pattern 11.
  • the thickness of the dielectric layer 12 may for example be in the range between 1 nm and 10 ⁇ m, e.g. in the range between 20 nm and 5 ⁇ m.
  • the dielectric layer 12 may comprise an organic dielectric material (for example a polymer such as e.g. polystyrene, poly-4-venylphenol (PVP), benzcocyclobutene (BCB), polyimide, parylene, PVDF polymers and copolymers, or for example small molecules) or an inorganic dielectric material (such as e.g.
  • the dielectric layer can for example comprise a stack of inorganic dielectric and self-assembled monolayer (SAM) .
  • a layer 13 comprising a precursor for an electrically conductive material is provided, as illustrated in Fig. 1 (b) .
  • This layer 13 is formed from solution, i.e. by applying a liquid or an ink comprising a precursor for an electrically conductive material and comprising at least one solvent. Evaporation of the solvent or solvents from this liquid or ink results in the formation of a solid layer 13. Evaporation of solvents can occur during the application of the liquid or ink, or it can occur in a subsequent step. Evaporation of solvents can for example be activated by heat, e.g. by placing the sample in a furnace or on a hot plate.
  • the liquid or ink may for example comprise metal nanoparticles, e.g. Au, Ag or Cu nanoparticles having a size e.g. in the range between 2 nm and 50 nm.
  • the liquid or ink further comprises solvents such as for example toluene, IsoPropylAlcohol (IPA), acetone or cyclohexane, and it comprises stabilizers for the metal nanoparticles.
  • solvents such as for example toluene, IsoPropylAlcohol (IPA), acetone or cyclohexane
  • These stabilizers may for example comprise polymers such as hexylamine or olehexylamine or Self Assembled Monolayers (SAM) such as for example thiols.
  • the thickness of the solid layer 13 may for example be in the range between 20 nm and 2000 nm.
  • a solid layer 13 comprising metal nanoparticles deposited from solution is generally not electrically conductive after deposition and evaporation of the solvents. Typically the sheet resistance of such a layer is larger than 1000 Ohms per square. It is known that such a layer comprising nanoparticles can be sintered, i.e. exposed to energy such that the nanoparticles fuse to a continuous layer, such as for example an electrically conductive layer with a sheet resistance of 10 Ohms per square of less.
  • the substrate is locally illuminated from the rear side, i.e. the side opposite to the side where the layer comprising nanoparticles has been deposited. Illumination can for example be done by means of laser light 20 with an appropriate wavelength.
  • An appropriate wavelength is a wavelength for which the substrate 10 and the dielectric layer 12 are transparent (preferably more than 80% transparency, preferably more than 90% transparency) , for which the gate layer 11 is not transparent and for which the light is absorbed by the nanoparticles that are present in layer 13.
  • a green laser with a wavelength of 532 nm can be used.
  • a beam of laser light can be scanned over a predetermined area adjacent to the patterned gate layer 11 and including at least a portion of the patterned gate layer 11.
  • the substrate 10 and the dielectric layer 12 are transparent to the laser light 20, and the patterned gate layer 11 is not transparent to the laser light 20, sintering of the nanoparticles in layer 13 only occurs in an area adjacent to the patterned gate layer 11.
  • an electrically conductive layer 14 is only formed in an area adjacent to the patterned gate layer.
  • An edge of the electrically conductive layer 14 is defined by an edge of the patterned gate layer 11.
  • the patterned electrically conductive layer 14 can for example be used for forming the source and/or drain of a thin film transistor. [0136] Therefore, the method can be used for forming source and drain contacts that are self-aligned with a gate pattern .
  • the non-sintered nanoparticles may be rinsed away in a solvent bath, preferably using the same solvent as used for making the nanoparticles solution, and eventually adding ultra-sonic agitation.
  • a solvent bath preferably using the same solvent as used for making the nanoparticles solution, and eventually adding ultra-sonic agitation.
  • the resulting structure is shown in Fig. 1 (d) .
  • a thin film semiconductor layer 15 e.g. an organic semiconductor layer, can be deposited for forming a transistor structure.
  • This organic semiconductor layer 15 may have a thickness in the range between 5 nm and 5 micrometer and may for example comprise small molecules such as pentacene pthalocyanines, fullerenes, or perylenes; soluble small molecules, such as solubilised linear acenes such as TIPS pentacene possibly formulated in inks that may comprise insulating polymers, polymer semiconductors or oligomer semiconductors; polymer semiconductors such as polythiophene or poly-aryl amines; and other thin film semiconductors such as oxides (e.g. ZnO), amorphous Si, carbon nanotubes, graphene, or other classes of thin film semiconductors .
  • small molecules such as pentacene pthalocyanines, fullerenes, or perylenes
  • soluble small molecules such as solubilised linear acenes such as TIPS pentacene possibly formulated in inks that may comprise insulating polymers, polymer semiconductors or oligomer semiconductors
  • Fig. 2 shows absorption curves for two different materials that may be used for forming a layer 13 comprising metal nanoparticles:
  • Fig. 2 (a) illustrates a curve for a film comprising Au nanoparticles in a polymer (n-hexylamine) and
  • Fig. 2 (b) illustrates a curve for a film comprising Ag nanoparticles in a polymer (n-hexylamine) . From these absorption curves it can be concluded that Au nanoparticles may absorb green laser light very well, whereas Ag nanoparticles would absorb only small amounts of green laser energy. The absorption peak of metal nanoparticles depends on the metal as well as on the size of the nanoparticles .
  • the absorption peak can be shifted, for example in a range of ⁇ 30 nm.
  • the absorption is relatively broad, there may be no need for adapting the nanoparticle size for optimizing the absorption.
  • the size of the nanoparticles influences the annealing or sintering temperature. It is known that the temperature needed for annealing or sintering decreases with decreasing nanoparticle size, because of the larger surface- to-volume ratio of smaller nanoparticles.
  • the preferred nanoparticle size depends on the material used. For example, for Au nanoparticles the nanoparticle size is preferably 5 nm or less (diameter) .
  • the annealing temperature is preferably in the range between 100 0 C and 200 0 C.
  • the annealing temperature is influenced by the laser power, writing speed, heat conductivity of the substrate and absorption of the film comprising nanoparticles. A good parameter set can be determined experimentally.
  • Spray coating is a large-area high-throughput deposition method. As compared to other liquid processing techniques such as printing or spin coating, spray coating has as an advantage that issues such as viscosity or choice of the solvent are not critical. For initial tests, a handheld airbrush was used as a spray coater. A 3wt% solution of Au-nanoparticles in Toluene was mixed and uniformly spray coated on a PEN foil.
  • the resulting layer had a thickness in the range between 200 nm and 500 nm and was not electrically conductive. After 400s in a furnace at 150 0 C the electrical conductivity improved, and a sheet resistance of 1 Ohm per square was obtained. [0141] A similar result is obtained performing the laser sintering step according to a method of the invention. [0142] This resistance is several orders of magnitude higher than the resistance of a pure Au layer of similar thickness. This may be related to a significant amount of hexylamine that was used to stabilize the nanoparticles . However, other materials may be used for stabilizing the nanoparticles. For example, thiol stabilized Au nanoparticles may be used. Nevertheless, the resistivity obtained is in the range of practical applications of thin- film transistors.
  • the organic semiconductor pentacene was evaporated.
  • the resulting organic thin film transistor channel had a length of 200 ⁇ m
  • FIG. 4 This is illustrated in Fig. 4, showing the I DS -V G s characteristics of a pentacene organic thin film transistor with lithographically structured sputtered Au contacts (Fig. 4 (a) ) and the I D s-V G s characteristics of a pentacene organic thin film transistor with spray coated Au nanoparticle contacts (Fig. 4 (b) ) .
  • the pentacene layer was deposited in the same process run.
  • laser sintering was investigated for patterning the Au nanoparticle layers. As illustrated in Fig. 2, the absorption peak of the Au nanoparticles is close to the wavelength of a green laser.
  • the gate pattern defined on the foil in a bottom-contact transistor geometry, can be used as a mask that obstructs laser light from sintering e.g. a printed metal ink in an area on top of the gate, while leaving adjacent areas, e.g. source and/or drain areas, open for sintering.
  • Figure 7 shows sintered Au nanoparticle lines that were obtained by sintering with laser light through the foil, with the same process conditions as described above (i.e. writing with a green laser at a speed of 2.5 m/s and a power of 2W) . Based on these results it is concluded that self-aligned source and drain contact definition with respect to a predefined gate contact and without the use of a sacrificial layer is a feasible process.
  • These sintered source and drain contacts are suitable injectors for charge carriers in transistors in thin-film circuits .

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Abstract

The present invention is related to a method for forming a stack of at least two patterned layers comprising the steps of : providing a first layer transparent to visible light wavelengths, - forming, upon said first transparent layer, a first patterned layer, which is not transparent to said wavelengths, - forming, upon said first patterned layer and said first transparent layer, a second transparent layer, - depositing on said second transparent layer a precursor for forming an electrically conductive layer, - irradiating said precursor, through said first transparent layer and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a mask.

Description

METHOD FOR FORMING SELF-ALIGNED ELECTRODES
Field of the invention [0001] This invention relates to a method for the formation of metal patterns, more in particular to a method for the self-aligned formation of metal patterns with respect to another pattern.
Background of the invention
[0002] The preferred technology for organic semiconductor applications on flexible substrates such as foils is based on a bottom-gate bottom-source-drain transistor structure. For forming such a transistor structure, first a gate pattern is defined on the substrate, followed by the deposition of gate dielectric. For circuits, via holes are needed in the gate dielectric layer. Then the source and drain contacts are provided. Interconnects between transistors can be created by lines patterned in either the source/drain metal layer or the gate metal layer, and using the via holes in the gate dielectric to connect lines where needed. Finally an organic semiconductor layer is deposited and patterned. This process requires a number of patterning steps. The first layer to be patterned is the gate metal. As such this requires no alignment. As far as the dielectric layer is concerned, there may be a need for providing via holes through the dielectric layer. However such via holes are usually formed outside the active area of the organic devices. Therefore, misalignments can be compensated by design rules. Patterning of the source and drain contacts is a critical step, and misalignment with respect to the gate may result in a degradation of the yield and the performance of the transistor. Therefore, a very accurate method is needed for aligning the source and drain contacts with respect to the gate. The last layer to be patterned is the organic semiconductor layer. Patterning of this layer also occurs outside the active area of the devices and design rules can accommodate for possible misalignment. Therefore, the most critical and most costly alignment step in a fabrication process of organic transistors on foil is the source and drain alignment with respect to the gate.
[0003] Moreover, as foils are flexible, design rules for misalignment need to compensate for possible foil deformation (e.g. stretching) between subsequent alignment steps. This is very difficult for the source and drain contact if the foil is not attached to a rigid carrier.
[0004] Therefore, there is a need for a convenient method that allows a source and drain definition that is self- aligned with the gate and that may be used on flexible substrates . [0005] In WO 2007/057664 a method of patterning a thin film is described in which an intermediate radiation sensitive layer is deposited between a substrate and a thin film layer, and wherein patterned radiation is used to pattern the intermediate radiation sensitive layer and the thin film. The radiation can be provided in a pattern by providing the radiation through a photo-mask. In the case of transparent substrates the intermediate layer can be irradiated through the substrate, providing the option of using the substrate itself to achieve patterning. In this case the substrate may comprise a pre-patterned layer that acts as the exposure mask. For example, the patterned layer on the substrate may comprise a gate pattern that may be used as a mask for defining source and drain contacts. However, using this method, there is a need for an intermediate radiation sensitive layer. The radiation used to expose this layer is provided by a UV, electron beam or X-ray source. However, these radiation sources can not be used for radiation through a standard transparent substrate such as regular glass, display glass and/or different types of transparent plastic foils. [0006] Considering the potential application of organic thin film transistors in low-cost applications such as for example radio frequency identification tags (RFID) or active matrix OLED back panels, besides low cost processing (e.g. printing) there is also a need for a good transistor performance. For example, in "Comparison of organic diode structures regarding high-frequency rectification behavior in radio-frequency identification tags", Journal of Applied Physics, VoI 99, 114519 (2006), Steudel et al. report the required performance of the rectifier stage in high- frequency organic RFID tags. The performance window is set by a supply voltage in the range of 5V to 10V and a stage delay of a single inverter stage below 5μs. This implies an organic transistor with a charge carrier mobility of μ~lcm2/Vs for a channel length of L=10μm or alternatively a charge carrier mobility of μ~0.3cm2/Vs for a channel length of L=5μm, or equivalent combinations for the channel length and the charge carrier mobility in the semiconductor. The resistance of the interconnects and the contact resistance need to be significantly smaller than the resistance of the transistor channels. Based on this, it can be estimated that the sheet resistance of the source-drain layer needs to be substantially below 102 Ohms per square. Otherwise the performance of the organic transistor would be limited by the interconnect resistance rather than by the transistor channel. Therefore, organic conductors such as PEDOT/PSS
(sheet resistance in the range between 103 and 104 Ohms per square) or Polyaniline (103 Ohms per square) may not be suitable as interconnect material for such applications. A viable solution lies in the liquid processing of inks either based on metal nanoparticles (NP) or metal salts. It has been shown that with such materials a sheet resistance in the range of 1 to 100 Ohms per square can be obtained. [0007] Structuring the source-drain layer for organic circuits by liquid processes opens another challenge. Up to now, only single organic transistors with channel length below 20μm have been demonstrated by any type of printing
(inkjet, off-set print) . Complete circuits require a degree of yield and uniformity (e.g. the edge definition of a source-drain contact needs to be below 10% of the channel- length) that is far away from today's printing technology. [0008] Therefore, there is a need for a good and accurate structuring process for liquid processed metal layers in organic circuits .
Summary of the invention
[0009] The present invention provides a method for forming a stack of at least two patterned layers comprising the steps of: providing a first layer (preferably a substrate) transparent (or permeable) to visible light wavelengths, forming, upon said first transparent layer (or said transparent substrate) , a first patterned layer, which is not transparent to said wavelengths, forming, upon said first patterned layer and said first transparent layer (or said transparent substrate), a second transparent layer (or a dielectric layer) , depositing on said second transparent layer (or said dielectric layer) a precursor for forming an electrically conductive layer, irradiating said precursor, through said first transparent layer (or said transparent substrate) and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a (shadow) mask.
[0010] Preferably, in a method of the invention, said first patterned layer is reflective to said visible light wavelengths . [0011] In the context of the present invention, a
"reflective" layer refers to a layer reflecting the spectrum of the visible light wavelengths (or radiation) used for irradiating the precursor.
[0012] Preferably, in a method of the invention, said first patterned layer is more than 80%, preferably more than
90% reflective.
[0013] The method of the present invention can comprise the steps of: providing a first layer (preferably a substrate) transparent (or permeable) to visible light wavelengths, depositing and patterning a layer, that is non- transparent to said wavelengths, for forming a first patterned layer, depositing, upon said first patterned layer and said first transparent layer (or said transparent substrate) , a second transparent layer (or a dielectric layer) , depositing on said second transparent layer (or said dielectric layer) a precursor for forming an electrically conductive layer, - irradiating said precursor, through said first transparent layer (or the transparent substrate) and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a (shadow) mask. [0014] In the context of the present invention, a
"dielectric layer" refers to an electrically non-conductive layer .
[0015] Preferably, in a method of the invention, said stack of at least two patterned layers is formed in a semiconductor device or in a transistor device.
[0016] More preferably, said stack of at least two patterned layers is formed in the manufacture of (or is part of) an organic semiconductor device or in an organic transistor device. [0017] Most preferably, said stack of at least two patterned layers is formed in the manufacture of (or is part of) a thin film semiconductor device or in a thin film transistor device.
[0018] By performing said irradiation step according to the present invention, said precursor (or compound) is sintered, to form said electrically conductive layer, by the energy provided by the visible light wavelengths (said precursor absorbing the wavelengths of visible light) . Said first patterned layer acts a (shadow) mask allowing said electrically conductive layer (i.e. said second patterned layer) to be formed locally, where said energy is provided. [0019] In the context of the present invention, a "transparent layer" (or transparent substrate) refers to a layer (or a substrate) transparent (i.e. permeable) to visible light wavelengths (or radiation) . [0020] In other words, in the context of the present invention, a "transparent layer" (or transparent substrate) refers to a layer (or a substrate) allowing the spectrum of the visible light wavelengths used for irradiating said precursor to pass through (i.e. not absorbing the spectrum of the visible light wavelengths used for irradiating said precursor) .
[0021] Preferably, in a method of the invention, the transparency of said first and second transparent layers is more than 80%, preferably more than 90%. [0022] Preferably, in a method according to the invention, the wavelengths of the visible light used are comprised in the range between (about) 400 nm and 800 nm, preferably in the range between (about) 450 nm and 700 nm, more preferably in the range between (about) 450 nm and 650 nm.
[0023] Most preferably, in a method of the invention, the wavelength of the visible light used is (about) 532nm. [0024] More particularly, a green laser is used providing said wavelength of the visible light of (about) 532nm. [0025] Most preferably, in a method of the invention, the wavelength of the visible light used is (about) 473nm. [0026] More particularly, a blue solid laser is used providing said wavelength of the visible light of (about) 473nm.
[0027] Most preferably, in a method of the invention, the wavelength of the visible light used is (about) 633nm, or (about) 650nm.
[0028] More particularly, a HeNe laser providing said wavelength of the visible light of (about) 633nm, or a red solid laser providing said wavelength of the visible light of (about) 650nm, is used.
[0029] Preferably, in a method of the invention, said irradiation (or visible light wavelengths) is (are) provided by a light beam providing a (narrow) spectrum of wavelengths . [0030] More preferably, said irradiation (or visible light wavelengths) is (are) provided by a monochromatic laser light beam.
[0031] Preferably, in a method of the invention, said irradiation is provided perpendicular to said first transparent layer (or transparent substrate) .
[0032] Preferably, in a method of the invention, the laser power ranges between (about) 1OmW and (about) 2W. [0033] More preferably, in a method of the invention, the writing speed of a (green) laser providing wavelengths of the visible light of (about) 532nm, is (about) 2.5 m/s and said laser has a power of 2W.
[0034] Preferably, in a method according to the invention, said precursor (or compound) is deposited using a liquid, more preferably an ink. [0035] More preferably, said liquid (or said ink) comprises said precursor (or compound) and is provided (or applied, or deposited) to form said electrically conductive layer by a liquid processing method.
[0036] Preferably, in a method of the invention, said liquid processing method comprises any method known by a person skilled in the art.
[0037] Preferably, said liquid processing method comprises spray coating, printing, slot dying, or spin coating .
[0038] Preferably, in a method of the invention, said liquid (or ink) comprises at least one solvent (in the liquid phase) .
[0039] Preferably, said solvent comprises (or consists of) toluene, IsoPropylAlcohol (IPA), acetone, or cyclohexane . [0040] Preferably, in a method of the invention, said at least one solvent is evaporated during said liquid processing step.
[0041] Preferably, in a method of the invention, said at least one solvent is evaporated after said liquid processing step.
[0042] Preferably, in a method of the invention, said at least one solvent is evaporated at room temperature (for several hours), or by heating the formed structure (or sample) . [0043] Preferably, said heating is performed in a furnace or on a hot plate.
[0044] Preferably, in a method of the invention, said at least one solvent is evaporated before said irradiation step
(or sintering step) . [0045] Preferably, in a method of the invention, said at least one solvent is evaporated during said irradiation step
(or sintering step) . [0046] More particularly, said at least one solvent is evaporated during said irradiation step (or sintering step) by the energy provided by the visible light wavelengths.
[0047] Preferably, in a method of the invention, said liquid (or ink) comprises stabilizers for the metal nanoparticles .
[0048] Preferably, said stabilizers comprise (or consist of) polymers .
[0049] More particularly, said polymers comprise (or consist of) n-hexylamine, or olehexylamine .
[0050] Preferably, said stabilizers comprise (or consist of) Self Assembled Monolayers (SAM) .
[0051] More particularly, said Self Assembled Monolayers comprise thiols. [0052] Preferably, in a method according to the invention, said precursor comprises (or consists of) metal nanoparticles .
[0053] More preferably, said precursor comprises (or consists of) Au, Ag, or Cu nanoparticles. [0054] Preferably, in a method of the invention, a green laser is used, providing said wavelength of the visible light of (about) 532nm, in case Au nanoparticles are used.
[0055] Preferably, in a method of the invention, a blue solid laser is used, providing said wavelength of the visible light of (about) 473nm, in case Ag nanoparticles are used.
[0056] Preferably, in a method of the invention, a HeNe laser, providing said wavelength of the visible light of
(about) 633nm, or a red solid laser, providing said wavelength of the visible light of (about) 650nm, is used, in case Cu nanoparticles are used. [0057] Preferably, in a method of the invention, the size of (the diameter of) said nanoparticles is comprised in the range between (about) 2 nm and 50 nm.
[0058] Preferably, in a method of the invention, the size of the (diameter of the) Au nanoparticles is (about) 5 nm
(or less) .
[0059] Preferably, in a method of the invention, the size of the (diameter of the) Ag nanoparticles is (about) 10 nm
(or less) . [0060] Preferably, in a method of the invention, the size of the (diameter of the) Cu nanoparticles is (about) 30 nm
(or less) .
[0061] Preferably, in a method of the invention, said first transparent layer is the substrate. [0062] Preferably, in a method according to the invention, said first transparent layer (or the transparent substrate) comprises (or consists of) glass, or a plastic foil.
[0063] More particularly, in a method of the invention, said glass comprises (or consists of) regular glass, or display glass.
[0064] More particularly, in a method of the invention, said plastic foil comprises (or consists of) polyethylene terephthalate (PET) , polyethylene nafthalate (PEN) , or polyimide.
[0065] In the context of the present invention, a foil refers to a thin flexible and/or stretchable sheet of material .
[0066] Preferably, in a method according to the invention, said first transparent layer (or the transparent substrate) is flexible (and/or stretchable) . [0067] In a method according to the invention, said first transparent layer (or the transparent substrate) can comprise (or consist of) a stack of at least two layers. [0068] Preferably, in a method according to the invention, the thickness of said first transparent layer (or the transparent substrate) is comprised in the range between (about) 20μm to 500μm, preferably, in the range between (about) 20μm to lOOμm. [0069] Preferably, in a method according to the invention, said second transparent layer comprises (or consists of) an organic dielectric material or an inorganic dielectric material.
[0070] In a method of the invention, said second transparent layer can comprise (or consist of) a stack of at least two layers.
[0071] Preferably, in a method according to the invention, said first patterned layer comprises (or consists of) conductive materials. [0072] Preferably, in a method of the invention, said first patterned layer comprises (or consists of) metals, conductive metal oxides, or carbon nanotubes. [0073] More particularly, in a method of the invention, said first patterned layer comprises (or consists of) Al, Ti, Cu, Au, Ni, Ag, ITO (indium tin oxide) , ZnO, Ag-ink, or carbon-nanotube ink.
[0074] Preferably, in a method of the invention, said first patterned layer comprises (or consists of) alloys of metals . [0075] Preferably, in a method of the invention, said first patterned layer is a metal gate.
[0076] Preferably, the width of the gate is comprised in the range between (about) 2μm and 500μm, preferably, said width of the gate is lower than (about) lOOμm, more preferably, lower than (about) 20μm, most preferably, said width of the gate is (about) 5μm.
[0077] In a method of the invention, said first patterned layer can be a stack of at least two layers of conductive material, more particularly forming a metal gate.
[0078] Preferably, in a method of the invention, said first patterned layer is provided by any method known by a person skilled in the art. [0079] More particularly, the first patterned layer is provided by a liquid or a vacuum processing method.
[0080] Preferably, said liquid processing method comprises spin-coating, spray-coating, printing, or slot dying. [0081] Preferably, said vacuum processing method comprises evaporation, sputtering, laser ablation, Chemical
Vapour Deposition, ion-beam sputtering, or organic vapour phase deposition.
[0082] Preferably, in a method of the invention, said first patterned layer is provided by etching, printing, or by a lithography process.
[0083] Preferably, in a method according to the invention, said second patterned layer constitutes or forms the source and/or drain contact (s) of a (thin film) semiconductor device or a (thin film) transistor device.
[0084] Preferably, said source and/or drain contact (s) comprise (s) (or consist (s) of) metal.
[0085] More preferably, said source and/or drain contact (s) comprise (s) (or consist (s) of) Au, Ag, or Cu. [0086] Preferably, in a method of the invention, said formed second patterned layer has a sheet resistance lower than 100 Ohms per square. [0087] In a method of the invention, said irradiation step (or sintering step) is performed at a temperature providing sufficient energy to sinter said precursor to form said electrically conductive layer. [0088] Preferably, in a method according to the invention, said irradiation step (or sintering step) is performed at a temperature in the range of (about) 100°C and 200°C, preferably at a temperature of (about) 150°C. [0089] More particularly, the temperature of the precursor is comprised in the range of (about) 100°C and 200°C, preferably at a temperature of (about) 150°C while (or for) performing the irradiation step (or sintering step) . [0090] Preferably, a method according to the invention further comprises a rinsing step (or cleaning step) for removing the non-sintered precursor.
[0091] Preferably, said rinsing step (or cleaning step) is performed using at least one solvent. [0092] Preferably, said solvent comprises (or consists of) toluene, IsoPropylAlcohol (IPA), acetone, or cyclohexane .
[0093] Preferably, in a method according to the invention, a thin film semiconductor layer is deposited on said formed second patterned layer after said rinsing step (or cleaning step) , .
[0094] Preferably, the thickness of said thin film semiconductor layer is comprised in the range between (about) 5nm and 5μm. [0095] Preferably, in a method of the invention, depositing said thin films is performed in vacuum.
[0096] More particularly, in a method of the invention, depositing said thin films is performed by evaporation, sputtering, laser ablation, Chemical Vapour Deposition, ion- beam sputtering, or organic vapour phase deposition. [0097] Preferably, in a method of the invention, depositing said thin films is performed at near-ambient pressure.
[0098] More particularly, in a method of the invention, depositing said thin films is performed by spin-coating, spray-coating, printing, slot dying, or lamination. [0099] In a method of the invention, said semiconductor layer can comprise (or consist of) an anorganic semiconductor layer.
[0100] More particularly, in a method of the invention, said semiconductor layer comprises (or consists of) (metal) oxides (e.g. ZnO), amorphous Si, carbon nanotubes, carbon nanowires, graphene.
[0101] In a method of the invention, said semiconductor layer can comprise (or consist of) an organic semiconductor layer . [0102] More particularly, in a method of the invention, said semiconductor layer comprises (or consists of) small molecules such as pentacene, pthalocyanines, fullerenes, or perylenes; soluble small molecules, such as solubilised linear acenes such as TIPS, pentacene possibly formulated in inks that may comprise insulating polymers, polymer semiconductors, or oligomer semiconductors; polymer semiconductors such as polythiophene or poly-aryl amines. [0103] More particularly, in a method of the invention, said semiconductor layer comprises (or consists of) a material selected from the group consisting of pentacene, pthalocyanines, fullerenes, perylenes, solubilised linear acenes such as TIPS, polythiophene polymer, and poly-aryl amines polymer. [0104] Preferably, in a method according to the invention, said deposited thin film semiconductor layer is patterned.
[0105] Preferably, said thin film semiconductor layer is patterned using additive processes (more particularly, direct printing, or deposition through a shadow mask) , or subtractive processes (more particularly, etching, laser ablation, or lift-off techniques) .
[0106] A method according to the invention can be used for the manufacture of (or for fabricating) organic transistors, more particularly organic thin film transistors .
[0107] Preferably, said organic thin film transistors are used in (or part of) organic circuits such as for example radio frequency identification tags (RFID) or active matrix organic light emitting diode (OLED) back panels.
[0108] A method according to the invention can be used for the manufacture of (or for fabricating) organic circuits such as for example radio frequency identification tags (RFID) or active matrix organic light emitting diode (OLED) back panels .
[0109] A method according to the invention can be used for aligning a second patterned layer with respect to a first patterned layer. [0110] The method of the invention can also be used for improving the alignment of a second patterned layer with respect to a first patterned layer.
[0111] The method of the invention can also be used for patterning a stack of layers. [0112] The method of the invention can also be used for selectively forming a second patterned layer with respect to a first patterned layer. Short description of the drawings
[0113] Fig. 1 illustrates a method for forming self- aligned contacts according to one embodiment. [0114] Fig. 2 shows absorption curves for a film comprising Au-NP in a polymer (Fig. 2 (a) ) and for a film comprising Ag-NP in a polymer (Fig. 2 (b) ) .
[0115] Fig. 3 shows a photograph of spray-coated source- drain contacts. [0116] Fig. 4 shows IDs-VGs characteristics of pentacene organic thin film transistors with (a) lithographically structured sputtered Au contacts and (b) spray coated Au- nanoparticle contacts. [0117] Fig. 5 is a photograph of a laser sintered Au nanoparticle layer on PEN foil.
[0118] Fig. 6 is a photograph of a laser sintered Au nanoparticle layer on PEN foil after a cleaning step. [0119] Fig. 7 shows lines of sintered Au nanoparticles, as obtained after laser writing through a PEN foil.
Description of the invention
[0120] Certain inventive aspects relate to a method for self-aligned definition of a metal pattern on a transparent substrate with respect to another non-transparent pattern, wherein the need for an intermediate radiation sensitive layer is avoided and wherein the method can be used with a broad range of transparent substrates such as for example standard glass substrates and transparent plastic foils. [0121] For example, the method can be used for self- aligned definition of the source and drain contacts of thin film transistors, such as for example organic transistors, with respect to the gate. The metal layers to be patterned can for example be provided by a liquid processing method. [0122] Certain inventive aspects relate to a method for forming, on a first patterned layer comprising a first material, a second patterned layer comprising a second material in a self-aligned way with respect to said first patterned layer being on a substrate, wherein the method comprises: providing on the substrate a liquid comprising a precursor for the second material, after having provided the first patterned layer; and exposing at least part of the precursor through the substrate to radiation for which the substrate is transparent and for which the first patterned layer is non-transparent, thereby forming the second patterned layer in an area where the precursor is exposed to the radiation. The second patterned layer is preferably an electrically conductive layer, such as a metal layer. [0123] Preferably, the electrically conductive layer has a sheet resistance that is lower than 10 Ohms per square. [0124] Preferably, the precursor comprises metal nanoparticles such as for example Au nanoparticles or Ag nanoparticles . Exposing the precursor (to radiation with the wavelength of the absorption of metal nanoparticle) may for example comprise exposing the precursor to light with a wavelength in the range between 400 nm and 800 nm, for example in the range between 500 nm and 600 nm, e.g. 532 nm. Exposing the precursor (to radiation) may comprise exposing the precursor to laser irradiation.
[0125] Preferably, the substrate is a glass substrate or a transparent plastic foil, e.g. a flexible (and/or stretchable) foil. [0126] The method is preferably used for forming source and drain contacts of a thin film transistor in a self- aligned way with respect to a gate contact.
[0127] The foregoing inventive aspects, both as to organization and method of operation, together with features and advantages thereof, may best be understood by reference to the following detailed description when read with the accompanying drawings . [0128] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention and how it may be practiced in particular embodiments. However it will be understood that the present invention may be practiced without these specific details. In other instances, well- known methods, procedures and techniques have not been described in detail, so as not to obscure the present invention. While the present invention will be described with respect to particular embodiments and with reference to certain drawings, the reference is not limited hereto. The drawings included and described herein are schematic and are not limiting the scope of the invention. It is also noted that in the drawings, the size of some elements may be exaggerated and, therefore, not drawn to scale for illustrative purposes. [0129] Certain embodiments relate to a method for forming a second patterned layer comprising a second material in a self-aligned way with respect to a first patterned layer on a substrate. For example, one embodiment relates to a method for the self-aligned formation of a metal pattern with respect to another pattern, more in particular a method for the self-aligned formation of a metal pattern on a transparent substrate with respect to another non- transparent pattern. In the further description the method is illustrated for the self-aligned definition of the source and drain contacts with respect to the gate of an organic transistor. However, the method can be used in other applications wherein self-aligned definition of patterns is needed. The method is further described in the context of devices comprising an organic semiconductor layer. However, the method can also be used for other than organic devices, e.g. thin-film semiconductor devices such as for example devices comprising semiconducting oxides such as ZnO, amorphous silicon, carbon nanotubes, or graphene layers. [0130] In the context of the present description, the term 'transparent' means transparent to visible light, for example light with a wavelength in the range between 400 nm and 800 nm, e.g. in the range between 500 nm and 600 nm, e.g. 532 nm.
[0131] Methods that may be used for depositing thin (organic) films comprise process performed in vacuum (e.g. evaporation, sputtering, laser ablation, Chemical Vapour Deposition, ion-beam sputtering, organic vapour phase deposition) and process steps performed at near-ambient pressure (e.g. spin-coating, spray-coating, printing, slot dying, lamination) . Processing at near-ambient pressure may include steps that are performed in a controlled environment, e.g. in an environment with controlled oxygen, water vapour or ozone concentration. The patterning steps
(of the thin (organic) layer or the final active layer) may be based on additive processes (such as e.g. direct printing, deposition through a shadow mask) as well as subtractive processes whereby a pattern is obtained by removing parts of a layer that is deposited e.g. over a complete substrate. Subtractive processes may for example be based on etching, laser ablation or lift-off techniques. [0132] The process flow of a method according to one embodiment is illustrated in Fig. 1. On a transparent substrate 10, such as for example glass, PET (polyethylene terephthalate) , PEN (polyethylene nafthalate) or polyimide, first a gate pattern 11 is defined. This gate pattern is preferably a metal pattern, such as for example an Al pattern. Other conductive materials can be used for forming the gate pattern, such as for example Ti, Cu, Au, Ni, Ag, ITO (indium tin oxide), ZnO, Ag-ink, carbon-nanotube ink. The thickness of the gate layer may for example be in the range between 10 nm and 10 μm, e.g. in the range between 20 nm and 2 μm. Patterning of the gate metal can for example be done by means of printing techniques or by means of a lithography process. However, other suitable methods known by a person skilled in the art may be used.
[0133] In a next step a dielectric layer 12 is provided on the substrate 10 comprising the gate pattern 11. The thickness of the dielectric layer 12 may for example be in the range between 1 nm and 10 μm, e.g. in the range between 20 nm and 5 μm. The dielectric layer 12 may comprise an organic dielectric material (for example a polymer such as e.g. polystyrene, poly-4-venylphenol (PVP), benzcocyclobutene (BCB), polyimide, parylene, PVDF polymers and copolymers, or for example small molecules) or an inorganic dielectric material (such as e.g. SiO2, Ta2O5, BZT (barium zirconate titanate) , Al2θ3, yttriumoxide (YOx, referring to a layer comprising mainly yttrium and oxygen, the integer x indicates that the ratio of yttrium and oxygen in the layer is not fixed, more particularly, Y2Os) , or SiN4) . The dielectric layer can for example comprise a stack of inorganic dielectric and self-assembled monolayer (SAM) .
[0134] On top of the dielectric layer 12 a layer 13 comprising a precursor for an electrically conductive material is provided, as illustrated in Fig. 1 (b) . This layer 13 is formed from solution, i.e. by applying a liquid or an ink comprising a precursor for an electrically conductive material and comprising at least one solvent. Evaporation of the solvent or solvents from this liquid or ink results in the formation of a solid layer 13. Evaporation of solvents can occur during the application of the liquid or ink, or it can occur in a subsequent step. Evaporation of solvents can for example be activated by heat, e.g. by placing the sample in a furnace or on a hot plate. Suitable methods that may be used for applying the liquid or ink are for example spray coating, printing, slot dying or spin coating. As a precursor for an electrically conductive material, the liquid or ink may for example comprise metal nanoparticles, e.g. Au, Ag or Cu nanoparticles having a size e.g. in the range between 2 nm and 50 nm. The liquid or ink further comprises solvents such as for example toluene, IsoPropylAlcohol (IPA), acetone or cyclohexane, and it comprises stabilizers for the metal nanoparticles. These stabilizers may for example comprise polymers such as hexylamine or olehexylamine or Self Assembled Monolayers (SAM) such as for example thiols. The thickness of the solid layer 13 may for example be in the range between 20 nm and 2000 nm. A solid layer 13 comprising metal nanoparticles deposited from solution is generally not electrically conductive after deposition and evaporation of the solvents. Typically the sheet resistance of such a layer is larger than 1000 Ohms per square. It is known that such a layer comprising nanoparticles can be sintered, i.e. exposed to energy such that the nanoparticles fuse to a continuous layer, such as for example an electrically conductive layer with a sheet resistance of 10 Ohms per square of less.
[0135] As shown in Fig. l(c), the substrate is locally illuminated from the rear side, i.e. the side opposite to the side where the layer comprising nanoparticles has been deposited. Illumination can for example be done by means of laser light 20 with an appropriate wavelength. An appropriate wavelength is a wavelength for which the substrate 10 and the dielectric layer 12 are transparent (preferably more than 80% transparency, preferably more than 90% transparency) , for which the gate layer 11 is not transparent and for which the light is absorbed by the nanoparticles that are present in layer 13. For example, in case of Au nanoparticles a green laser with a wavelength of 532 nm can be used. A beam of laser light can be scanned over a predetermined area adjacent to the patterned gate layer 11 and including at least a portion of the patterned gate layer 11. As the substrate 10 and the dielectric layer 12 are transparent to the laser light 20, and the patterned gate layer 11 is not transparent to the laser light 20, sintering of the nanoparticles in layer 13 only occurs in an area adjacent to the patterned gate layer 11. Thus, an electrically conductive layer 14 is only formed in an area adjacent to the patterned gate layer. An edge of the electrically conductive layer 14 is defined by an edge of the patterned gate layer 11. The patterned electrically conductive layer 14 can for example be used for forming the source and/or drain of a thin film transistor. [0136] Therefore, the method can be used for forming source and drain contacts that are self-aligned with a gate pattern .
[0137] After annealing or sintering, the non-sintered nanoparticles may be rinsed away in a solvent bath, preferably using the same solvent as used for making the nanoparticles solution, and eventually adding ultra-sonic agitation. The resulting structure is shown in Fig. 1 (d) . On top of this structure a thin film semiconductor layer 15, e.g. an organic semiconductor layer, can be deposited for forming a transistor structure. This organic semiconductor layer 15 may have a thickness in the range between 5 nm and 5 micrometer and may for example comprise small molecules such as pentacene pthalocyanines, fullerenes, or perylenes; soluble small molecules, such as solubilised linear acenes such as TIPS pentacene possibly formulated in inks that may comprise insulating polymers, polymer semiconductors or oligomer semiconductors; polymer semiconductors such as polythiophene or poly-aryl amines; and other thin film semiconductors such as oxides (e.g. ZnO), amorphous Si, carbon nanotubes, graphene, or other classes of thin film semiconductors .
[0138] Fig. 2 shows absorption curves for two different materials that may be used for forming a layer 13 comprising metal nanoparticles: Fig. 2 (a) illustrates a curve for a film comprising Au nanoparticles in a polymer (n-hexylamine) and Fig. 2 (b) illustrates a curve for a film comprising Ag nanoparticles in a polymer (n-hexylamine) . From these absorption curves it can be concluded that Au nanoparticles may absorb green laser light very well, whereas Ag nanoparticles would absorb only small amounts of green laser energy. The absorption peak of metal nanoparticles depends on the metal as well as on the size of the nanoparticles . By modifying the size of the nanoparticles, the absorption peak can be shifted, for example in a range of ± 30 nm. However, considering that the absorption is relatively broad, there may be no need for adapting the nanoparticle size for optimizing the absorption.
[0139] The size of the nanoparticles influences the annealing or sintering temperature. It is known that the temperature needed for annealing or sintering decreases with decreasing nanoparticle size, because of the larger surface- to-volume ratio of smaller nanoparticles. The preferred nanoparticle size depends on the material used. For example, for Au nanoparticles the nanoparticle size is preferably 5 nm or less (diameter) . In embodiments of the present invention the annealing temperature is preferably in the range between 1000C and 2000C. The annealing temperature is influenced by the laser power, writing speed, heat conductivity of the substrate and absorption of the film comprising nanoparticles. A good parameter set can be determined experimentally. It is well within the capabilities of the person skilled in the art to determine a suitable parameter set for use in a method according to the present invention. [0140] Experiments have been done wherein layers comprising Au nanoparticles were applied on a transparent substrate by means of spray coating. Spray coating is a large-area high-throughput deposition method. As compared to other liquid processing techniques such as printing or spin coating, spray coating has as an advantage that issues such as viscosity or choice of the solvent are not critical. For initial tests, a handheld airbrush was used as a spray coater. A 3wt% solution of Au-nanoparticles in Toluene was mixed and uniformly spray coated on a PEN foil. The resulting layer had a thickness in the range between 200 nm and 500 nm and was not electrically conductive. After 400s in a furnace at 1500C the electrical conductivity improved, and a sheet resistance of 1 Ohm per square was obtained. [0141] A similar result is obtained performing the laser sintering step according to a method of the invention. [0142] This resistance is several orders of magnitude higher than the resistance of a pure Au layer of similar thickness. This may be related to a significant amount of hexylamine that was used to stabilize the nanoparticles . However, other materials may be used for stabilizing the nanoparticles. For example, thiol stabilized Au nanoparticles may be used. Nevertheless, the resistivity obtained is in the range of practical applications of thin- film transistors.
[0143] To evaluate the injection properties of Au contacts formed by sintering of Au nanoparticles, an organic thin film transistor with a common gate structure was fabricated on a Siθ2/Si wafer. For forming the source and drain contacts Au nanoparticles were spray-coated on the wafer through a shadow mask.
[0144] After the sintering step, the organic semiconductor pentacene was evaporated. The resulting organic thin film transistor channel had a length of 200μm
(as illustrated in Fig. 3) . The electrical characteristics were similar to those of a pentacene thin film transistor with sputtered Au contacts patterned by photolithography.
This is illustrated in Fig. 4, showing the IDS-VGs characteristics of a pentacene organic thin film transistor with lithographically structured sputtered Au contacts (Fig. 4 (a) ) and the IDs-VGs characteristics of a pentacene organic thin film transistor with spray coated Au nanoparticle contacts (Fig. 4 (b) ) . For both types of transistors, the pentacene layer was deposited in the same process run. [0145] For patterning the Au nanoparticle layers, laser sintering was investigated. As illustrated in Fig. 2, the absorption peak of the Au nanoparticles is close to the wavelength of a green laser. Writing with a green laser at a speed of 2.5 m/s and a power of 2W, well defined lines and structures have been achieved on a PEN foil. The realized line-width corresponds to the spot size of the laser used (about 20μm) with a channel-length below 20μm. This is illustrated in Fig. 5, for direct laser writing with a green laser of a 500 nm thick spray-coated Au nanoparticle layer (1.5 wt% Au nanoparticles with a particle size of 5 nm, 1.5 wt% hexylamine, 97 wt% toluene) . In a subsequent step, the non-sintered Au nanoparticles were rinsed away with Toluene. This process resulted in clean sintered Au tracks on the foil, as illustrated in Fig. 6. The resulting lines had a sheet resistance of 2 Ohms per square. [0146] Experiments were done wherein the visible laser light penetrates through a foil to the Au nanoparticle ink, to assess a self-aligned process according to certain embodiments. With such a process the gate pattern, defined on the foil in a bottom-contact transistor geometry, can be used as a mask that obstructs laser light from sintering e.g. a printed metal ink in an area on top of the gate, while leaving adjacent areas, e.g. source and/or drain areas, open for sintering. Figure 7 shows sintered Au nanoparticle lines that were obtained by sintering with laser light through the foil, with the same process conditions as described above (i.e. writing with a green laser at a speed of 2.5 m/s and a power of 2W) . Based on these results it is concluded that self-aligned source and drain contact definition with respect to a predefined gate contact and without the use of a sacrificial layer is a feasible process. These sintered source and drain contacts are suitable injectors for charge carriers in transistors in thin-film circuits .

Claims

1. A method for forming a stack of at least two patterned layers comprising the steps of: - providing a first layer transparent to visible light wavelengths, forming, upon said first transparent layer, a first patterned layer, which is not transparent to said wavelengths, - forming, upon said first patterned layer and said first transparent layer, a second transparent layer, - depositing on said second transparent layer a precursor for forming an electrically conductive layer, irradiating said precursor, through said first transparent layer and said second transparent layer, with visible light wavelengths for forming a second patterned layer, said first patterned layer acting as a mask.
2. A method according to claim 1, wherein the wavelengths of the visible light used are comprised in the range between 400 nm and 800 nm, preferably in the range between 450 nm and 700 nm, more preferably in the range between 450 nm and 650 nm.
3. A method according to claim 1 or 2, wherein said precursor is deposited using a liquid.
4. A method according to claim 3, wherein said precursor comprises metal nanoparticles .
5. A method according to any of claims 1 to 4, wherein said first transparent layer comprises glass, or a plastic foil.
6. A method according to any of claims 1 to 5, wherein said first transparent layer is flexible.
7. A method according to any of claims 1 to 6, wherein said second transparent layer comprises an organic dielectric material or an inorganic dielectric material.
8. A method according to any of claims 1 to 7, wherein said first patterned layer comprises conductive materials .
9. A method according to any of claims 1 to 8, wherein said second patterned layer comprises source and/or drain contact (s) of a semiconductor device or a transistor device.
10. A method according to any of claims 1 to 9, wherein said irradiation step is performed at a temperature in the range of 100°C and 200°C, preferably at a temperature of 150°C.
11. A method according to any of claims 1 to 10, comprising a rinsing step for removing the non-sintered precursor .
12. A method according to claim 11, wherein after said rinsing step a thin film semiconductor layer is deposited on said formed second patterned layer.
13. A method according to claim 12, wherein said deposited thin film semiconductor layer is patterned.
14. A method according to any of claims 1 to 13, for the manufacture of organic thin film transistors.
15. A method according to any of claims 1 to 13, for aligning a second patterned layer with respect to a first patterned layer.
PCT/EP2009/062452 2008-09-25 2009-09-25 Method for forming self-aligned electrodes WO2010034815A1 (en)

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