WO2010013764A1 - チップ実装装置 - Google Patents

チップ実装装置 Download PDF

Info

Publication number
WO2010013764A1
WO2010013764A1 PCT/JP2009/063542 JP2009063542W WO2010013764A1 WO 2010013764 A1 WO2010013764 A1 WO 2010013764A1 JP 2009063542 W JP2009063542 W JP 2009063542W WO 2010013764 A1 WO2010013764 A1 WO 2010013764A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
mounting apparatus
holding means
pressurizing
chip mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2009/063542
Other languages
English (en)
French (fr)
Inventor
寺田勝美
川上幹夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toray Engineering Co Ltd
Original Assignee
Toray Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Engineering Co Ltd filed Critical Toray Engineering Co Ltd
Publication of WO2010013764A1 publication Critical patent/WO2010013764A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00Packaging processes not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • H10W72/07141Means for applying energy, e.g. ovens or lasers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • H10W72/07178Means for aligning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Wire Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

 チップ保持手段と、チップ保持手段に加圧力を付与する加圧付与手段と、加圧付与手段を装置高さ方向に移動可能に制御する駆動制御手段とを備え、基板の電極にチップのバンプをハンダ接合させるチップ実装装置であって、チップ保持手段の加熱からチップのバンプの溶融までの間のチップ保持手段の伸び量を予測し、チップ保持手段の伸び量の予測値に基づき駆動制御手段に補正指令を入力して加圧付与手段の高さ位置を制御する予測制御手段を備えたことを特徴とするチップ実装装置。生産タクトタイムを短縮することができ、高い信頼性で集積回路素子などのチップをプリント基板等の基板に実装することができる。
PCT/JP2009/063542 2008-07-30 2009-07-30 チップ実装装置 Ceased WO2010013764A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008-195771 2008-07-30
JP2008195771A JP5801526B2 (ja) 2008-07-30 2008-07-30 チップ実装装置

Publications (1)

Publication Number Publication Date
WO2010013764A1 true WO2010013764A1 (ja) 2010-02-04

Family

ID=41610463

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2009/063542 Ceased WO2010013764A1 (ja) 2008-07-30 2009-07-30 チップ実装装置

Country Status (3)

Country Link
JP (1) JP5801526B2 (ja)
KR (1) KR101591125B1 (ja)
WO (1) WO2010013764A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160005709A1 (en) * 2013-12-17 2016-01-07 Kulicke And Soffa Industries, Inc. Methods of operating bonding machines for bonding semiconductor elements, and bonding machines

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101258394B1 (ko) * 2010-05-19 2013-04-30 파나소닉 주식회사 반도체 발광 소자의 실장 방법과 실장 장치
JP5847390B2 (ja) * 2010-10-28 2016-01-20 東レエンジニアリング株式会社 実装装置および実装方法
KR102949513B1 (ko) 2023-05-15 2026-04-09 코스텍시스템(주) 칩 접합 장비와 이를 포함하는 칩 접합 시스템 및 그 접합 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031993A (ja) * 2001-07-13 2003-01-31 Matsushita Electric Ind Co Ltd 電子部品の実装装置及び実装方法
WO2007066559A1 (ja) * 2005-12-06 2007-06-14 Toray Engineering Co., Ltd. チップ実装装置およびチップ実装方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4522881B2 (ja) * 2005-02-15 2010-08-11 パナソニック株式会社 電子部品の実装方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031993A (ja) * 2001-07-13 2003-01-31 Matsushita Electric Ind Co Ltd 電子部品の実装装置及び実装方法
WO2007066559A1 (ja) * 2005-12-06 2007-06-14 Toray Engineering Co., Ltd. チップ実装装置およびチップ実装方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160005709A1 (en) * 2013-12-17 2016-01-07 Kulicke And Soffa Industries, Inc. Methods of operating bonding machines for bonding semiconductor elements, and bonding machines
US9478516B2 (en) * 2013-12-17 2016-10-25 Kulicke And Soffa Industries, Inc. Methods of operating bonding machines for bonding semiconductor elements, and bonding machines

Also Published As

Publication number Publication date
JP5801526B2 (ja) 2015-10-28
KR101591125B1 (ko) 2016-02-02
JP2010034341A (ja) 2010-02-12
KR20110050472A (ko) 2011-05-13

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