WO2009136718A3 - 반도체 소자 및 그 제조방법 - Google Patents

반도체 소자 및 그 제조방법 Download PDF

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Publication number
WO2009136718A3
WO2009136718A3 PCT/KR2009/002353 KR2009002353W WO2009136718A3 WO 2009136718 A3 WO2009136718 A3 WO 2009136718A3 KR 2009002353 W KR2009002353 W KR 2009002353W WO 2009136718 A3 WO2009136718 A3 WO 2009136718A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor element
production method
method therefor
composition
growth substrate
Prior art date
Application number
PCT/KR2009/002353
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English (en)
French (fr)
Other versions
WO2009136718A2 (ko
Inventor
송준오
Original Assignee
엘지이노텍주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지이노텍주식회사 filed Critical 엘지이노텍주식회사
Priority to US12/990,943 priority Critical patent/US8633508B2/en
Publication of WO2009136718A2 publication Critical patent/WO2009136718A2/ko
Publication of WO2009136718A3 publication Critical patent/WO2009136718A3/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

실시예에 따른 반도체 소자는 성장 기판; 상기 성장 기판 상에 RexSiy(0≤x≤2, 0≤y≤2)의 조성을 갖는 제1 버퍼층; 및 상기 버퍼층 상에 InxAlyGa1-x-yN(0≤x, 0≤y, x+y≤1)의 조성을 갖는 그룹 3족 질화물계 단결정 반도체층을 포함한다.
PCT/KR2009/002353 2008-05-04 2009-05-04 반도체 소자 및 그 제조방법 WO2009136718A2 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/990,943 US8633508B2 (en) 2008-05-04 2009-05-04 Semiconductor element and a production method therefor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2008-0041605 2008-05-04
KR1020080041605A KR20090115826A (ko) 2008-05-04 2008-05-04 그룹 3족 질화물계 반도체 소자용 버퍼층 및 그 제조 방법

Publications (2)

Publication Number Publication Date
WO2009136718A2 WO2009136718A2 (ko) 2009-11-12
WO2009136718A3 true WO2009136718A3 (ko) 2010-01-14

Family

ID=41265144

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/002353 WO2009136718A2 (ko) 2008-05-04 2009-05-04 반도체 소자 및 그 제조방법

Country Status (3)

Country Link
US (1) US8633508B2 (ko)
KR (1) KR20090115826A (ko)
WO (1) WO2009136718A2 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5966289B2 (ja) * 2011-09-16 2016-08-10 富士通株式会社 半導体基板の製造方法及び半導体装置の製造方法
KR102002898B1 (ko) 2012-09-04 2019-07-23 삼성전자 주식회사 반도체 버퍼 구조체 및 이를 포함하는 반도체 소자
US20220149802A1 (en) * 2019-02-28 2022-05-12 Sang Jeong An High purity piezoelectric thin film and method of manufacturing element using same thin film
KR102315908B1 (ko) * 2019-03-25 2021-10-21 안상정 고순도 AlxGa1-xN (0.5≤x≤1) 압전 박막을 제조하는 방법 및 이 박막을 이용하는 장치
KR102227213B1 (ko) * 2019-04-19 2021-03-12 안상정 고순도 AlxGa1-xN (0.5≤x≤1) 압전 박막 및 이 박막을 이용하는 소자를 제조하는 방법
KR102301861B1 (ko) * 2019-02-28 2021-09-14 안상정 고순도 AlxGa1-xN (0.5≤x≤1) 압전 박막을 제조하는 방법 및 이 박막을 이용하는 장치
KR102480141B1 (ko) * 2020-09-04 2022-12-22 웨이브로드 주식회사 압전 박막을 제조하는 방법 및 이 박막을 이용하는 소자
KR20210005989A (ko) * 2021-01-08 2021-01-15 안상정 고순도 AlxGa1-xN (0.5≤x≤1) 압전 박막 및 이 박막을 이용하는 소자를 제조하는 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0746670B2 (ja) * 1991-06-07 1995-05-17 日本電気株式会社 薄膜キャパシタ
JP3813740B2 (ja) * 1997-07-11 2006-08-23 Ｔｄｋ株式会社 電子デバイス用基板

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4978052A (en) * 1986-11-07 1990-12-18 Olin Corporation Semiconductor die attach system
DE69205063T2 (de) * 1991-05-16 1996-02-29 Nec Corp Dünnschichtkondensator.

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0746670B2 (ja) * 1991-06-07 1995-05-17 日本電気株式会社 薄膜キャパシタ
JP3813740B2 (ja) * 1997-07-11 2006-08-23 Ｔｄｋ株式会社 電子デバイス用基板

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ALI, I ET AL.: "Properties of semiconducting rhenium silicide thin film grown epitaxially on silicon (111)", APPLIED SURFACE SCIENCE, vol. 102, August 1996 (1996-08-01), pages 147 - 150 *

Also Published As

Publication number Publication date
KR20090115826A (ko) 2009-11-09
WO2009136718A2 (ko) 2009-11-12
US20110140102A1 (en) 2011-06-16
US8633508B2 (en) 2014-01-21

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