WO2009116116A1

WO2009116116A1 - Plasma display device

Info

Publication number: WO2009116116A1
Application number: PCT/JP2008/000629
Authority: WO
Inventors: 大塚晃; 坂本哲也; 高木彰浩
Original assignee: 株式会社日立製作所
Priority date: 2008-03-18
Filing date: 2008-03-18
Publication date: 2009-09-24

Abstract

A plasma display device includes a plasma display panel on which a pair of display electrodes and an address electrode are provided and a driving unit. A first gap for generating sustain discharge between a maintaining electrode and a scanning electrode constituting the pair of display electrodes is formed. A second gap is formed between the maintaining electrode of one of the pairs of display electrodes adjacent to each other and the scanning electrode of the other. The driving unit applies a bias voltage to the maintaining electrode, applies a scan voltage sequentially to the scanning electrode, and selectively applies an address voltage to the address electrode, during an address period. A difference voltage between the bias voltage and the scan voltage is set to be smaller than a discharge start voltage between the maintaining electrode and the scanning electrode adjacent to each other with the first gap therebetween and larger than a discharge start voltage between the maintaining electrode and the scanning electrode adjacent to each other with the second gap therebetween. As a result, an address operation can be speeded up and image quality can be improved.

Description

Plasma display device

The present invention relates to a plasma display device.

The plasma display device (PDP device) has a plasma display panel (PDP) and a drive unit for driving the PDP. A PDP is composed of two glass substrates (a front glass substrate and a back glass substrate) bonded together, and displays an image by generating a discharge in a space (discharge space) formed between the glass substrates. To do. The cells corresponding to the pixels in the image are self-luminous, and are coated with phosphors that generate red, green, and blue visible light in response to ultraviolet rays generated by discharge.

Generally, the rear glass substrate has a partition wall coated with the above-described phosphor, and the inner surface of the front glass substrate is covered with a protective layer that protects the dielectric layer from electric discharge. Note that the protective layer is formed of a material having a high secondary electron emission characteristic due to the collision of cations in order to easily generate discharge. In the PDP, in order to display an image with multiple gradations, a field for displaying one screen includes, for example, a plurality of subfields having a reset period, an address period, and a sustain period.

A PDP having a three-electrode structure having an X electrode, a Y electrode, and an address electrode displays an image, for example, by generating a sustain discharge between the X electrode and the Y electrode during the sustain period. A cell that generates a sustain discharge (a cell to be lit) is selected by generating an address discharge selectively between the Y electrode and the address electrode in the address period. When a delay time (discharge delay) from application of a voltage to an address electrode until generation of an address discharge is large, a malfunction that does not generate an address discharge may occur. A cell in which no address discharge has occurred does not light because a sustain discharge does not occur. For this reason, the pixel corresponding to the cell is not displayed, and the image quality deteriorates.

In order to reduce the discharge delay of the address discharge, a plasma display panel has been proposed in which the priming effect due to the discharge in the reset period that is performed before the address discharge is maintained for a long time (see, for example, Patent Document 1).
Japanese Patent No. 3878635

An address operation for selectively generating an address discharge between the Y electrode and the address electrode is performed for each display line in the address period. In recent years, display lines for one screen have been increased due to high definition of PDP and the like, and the address operation time of each display line (the period assigned to each display line in the address period) tends to be shortened.

In the PDP using the priming effect due to the discharge in the reset period, for example, the priming particles may not be sufficiently obtained on the display line where the address operation is performed toward the end of the address period. Here, the priming particles are charged particles for generating a discharge of free electrons or ions. When the time allocated for the address operation is short, there is a possibility that address discharge does not occur in a cell in which sufficient priming particles cannot be obtained.

An object of the present invention is to improve image quality by speeding up the address operation.

The plasma display device has a plasma display panel (PDP) and a drive unit. The PDP has a plurality of display electrode pairs constituted by sustain electrodes and scan electrodes extending in a first direction, and a plurality of address electrodes extending in a second direction intersecting the first direction. A first gap for generating a sustain discharge is formed between the sustain electrode and the scan electrode constituting the display electrode pair, and the first gap is formed between one sustain electrode and the other scan electrode of the display electrode pair adjacent to each other. Two gaps are formed. The driving unit applies a bias voltage to the sustain electrodes, sequentially applies a scan voltage to the scan electrodes, and selectively applies the address voltage to the address electrodes during an address period for generating an address discharge. For example, the difference voltage between the bias voltage and the scan voltage is smaller than the discharge start voltage between the sustain electrode and the scan electrode adjacent to each other across the first gap when the address voltage is not applied to the address electrode, and the address voltage Is set to be larger than the discharge start voltage between the sustain electrode and the scan electrode adjacent to each other across the second gap in a state where no voltage is applied to the address electrode. The difference voltage between the address voltage and the scan voltage is set to be larger than the discharge start voltage for generating an address discharge between the address electrode and the scan electrode.

In the present invention, the address operation can be speeded up and the image quality can be improved.

It is a figure which shows the PDP apparatus in one Embodiment. It is a figure which shows the principal part of PDP shown in FIG. It is a figure which shows the outline | summary of PDP shown in FIG. FIG. 4 is a view showing a cross section taken along line A-A ′ of the PDP shown in FIG. 3. It is a figure which shows the outline | summary of the circuit part shown in FIG. FIG. 3 is a diagram illustrating an example of a subfield discharging operation for displaying an image on the PDP illustrated in FIG. 2. It is a figure which shows the principal part of PDP in another embodiment. FIG. 8 is a view showing a cross section taken along line A-A ′ of the PDP shown in FIG. 7. It is a figure which shows the modification of PDP shown in FIG. It is a figure which shows another modification of PDP shown in FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. A plasma display device (hereinafter also referred to as a PDP device) includes a plasma display panel 10 having a square plate shape (hereinafter also referred to as a PDP), an optical filter 20 provided on the image display surface 16 side (light output side) of the PDP 10, A front housing 30 disposed on the image display surface 16 side of the PDP 10, a rear housing 40 and a base chassis 50 disposed on the back surface 18 side of the PDP 10, and attached to the rear housing 40 side of the base chassis 50 to drive the PDP 10. A double-sided adhesive sheet 70 for attaching the PDP 10 to the base chassis 50. Since the circuit unit 60 includes a plurality of components, the circuit unit 60 is indicated by a dashed box in the figure.

The PDP 10 includes a front substrate portion 12 (first substrate) that forms the image display surface 16 and a rear substrate portion 14 (second substrate) that faces the front substrate portion 12. A discharge space (cell) (not shown) is formed between the front substrate portion 12 and the rear substrate portion 14. The front substrate unit 12 and the back substrate unit 14 are formed of, for example, a glass substrate. The optical filter 20 is affixed to a protective glass (not shown) attached to the opening 32 of the front housing 30. The optical filter 20 may have a function of shielding electromagnetic waves. The optical filter 20 may be directly attached to the image display surface 16 side of the PDP 10 instead of the protective glass.

FIG. 2 shows details of the main part of the PDP 10 shown in FIG. An arrow D1 in the drawing indicates the first direction D1, and an arrow D2 indicates the second direction D2 orthogonal to the first direction D1 in a plane parallel to the image display surface. As described above, the discharge spaces DS1 and DS2 are formed between the front substrate portion 12 and the rear substrate portion 14 (more specifically, the concave portion of the rear substrate portion 14). For example, in this embodiment, the discharge space DS1 is a space for generating a sustain discharge or the like, and the discharge space DS2 is a space for generating a weak discharge (a triangle mark shown in an address period ADR in FIG. 6 described later).

The front substrate portion 12 includes an X electrode XE (sustain electrode) and a Y electrode YE that extend in the first direction D1 on the surface of the glass substrate FS that faces the glass substrate RS (the lower side in the figure). It has a display electrode pair EP composed of (scanning electrodes). The X electrode XE (sustain electrode) includes an X bus electrode Xb (first electrode of the sustain electrode) and an X transparent electrode Xt (second electrode of the sustain electrode), and the Y electrode YE (scan electrode) is the Y bus electrode. Yb (first electrode of scanning electrode) and Y transparent electrode Yt (second electrode of scanning electrode) are included.

The X bus electrode Xb and the Y bus electrode Yb are provided so as to extend in the first direction D1 and are spaced from each other. The X transparent electrode Xt is connected to the X bus electrode Xb and extends in the second direction D2 toward the Y bus electrode Yb that forms a pair with the X bus electrode Xb. The Y transparent electrode Yt is connected to the Y bus electrode Yb and extends in the second direction D2 toward the X bus electrode Xb paired with the Y bus electrode Yb. In the illustrated example, the X transparent electrode Xt and the Y transparent electrode Yt face each other along the first direction D1.

For example, the X bus electrode Xb and the Y bus electrode Yb are electrodes that are opaque to visible light formed of a metal material or the like, and the X transparent electrode Xt and the Y transparent electrode Yt are visible electrodes formed of an ITO film or the like. It is a transparent electrode that transmits light. Then, a discharge (sustain discharge) is repeatedly generated at the display electrode pair EP (more specifically, between the X transparent electrode Xt and the Y transparent electrode Yt) constituted by the X electrode XE and the Y electrode YE.

The transparent electrodes Xt and Yt may be disposed on the entire surface between the bus electrodes Xb and Yb to which the transparent electrodes Xt and Yt are connected and the glass substrate FS. Further, an electrode integral with the bus electrodes Xb and Yb may be formed in place of the transparent electrodes Xt and Yt by the same material (metal material or the like) as the bus electrodes Xb and Yb.

The electrodes Xb, Xt, Yb, Yt are covered with the dielectric layer DL1. For example, the dielectric layer DL1 is an insulating film such as a silicon dioxide film formed by a CVD method. A plurality of address electrodes AE extending in a direction orthogonal to the bus electrodes Xb and Yb (second direction D2) are provided on the dielectric layer DL1 (lower side in the drawing). Thus, the PDP of this embodiment has three electrodes (electrodes XE, YE, AE) on the front substrate portion 12.

The address electrode AE and the dielectric layer DL1 are covered with a protective layer PL. For example, the protective layer PL is formed of an MgO film having high secondary electron emission characteristics due to cation collision in order to easily generate discharge.

The rear substrate portion 14 facing the front substrate portion 12 through the discharge spaces DS1 and DS2 is formed in parallel with each other on the glass base RS, and is a lattice-shaped barrier rib composed of barrier ribs BR10, BR20, BR22. have. For example, the barrier rib BR10 extends in the second direction D2 and is disposed along the address electrode AE. The partition BR20 (first partition) extends in the first direction D1 and is disposed along the bus electrode Yb, and the partition BR22 (second partition) extends in the first direction D1 and the bus electrode Xb. It is arranged along.

The discharge space DS1 is formed in a region surrounded by the barrier ribs BR20 and BR22 arranged along the bus electrodes Xb and Yb constituting the display electrode pair EP and the barrier rib BR10 adjacent to each other. Then, red (R) and green (G) are excited by ultraviolet rays on the side surfaces of the barrier ribs BR10, BR20, BR22 on the discharge space DS1 side and on the glass substrate RS in the region where the discharge space DS1 is formed. , Phosphors PHr, PHg, and PHb that generate blue (B) visible light are respectively applied. Hereinafter, the phosphors PHr, PHg, and PHb are also referred to as phosphors PH when they are not distinguished for each color of visible light.

The discharge space DS2 is formed in a region surrounded by the barrier ribs BR20 and BR22 arranged along one bus electrode Xb and the other bus electrode Yb of the display electrode pair EP adjacent to each other and the barrier rib BR10 adjacent to each other. The In this embodiment, the phosphor PH is not applied to the side surface of the partition walls BR10, BR20, BR22 on the discharge space DS2 side and the glass substrate RS in the region where the discharge space DS2 is formed.

One pixel of the PDP 10 is composed of three cells that generate red, green, and blue light. For example, in this embodiment, one cell (one color pixel) is formed in the same region as each discharge space DS1. As described above, the PDP 10 is configured by arranging cells in a matrix to display an image and alternately arranging a plurality of types of cells that generate light of different colors. Although not particularly illustrated, a display line is constituted by cells formed along the display electrode pair EP (bus electrodes Xb, Yb).

The PDP 10 is configured by bonding the front substrate portion 12 and the rear substrate portion 14 so that the protective layer PL and the partition wall BR10 are in contact with each other, and enclosing a discharge gas such as Ne or Xe in the discharge spaces DS1 and DS2. In the example shown in the figure, a gap (described later) is formed between the barrier ribs BR20, BR22 and the front substrate portion 12 (more specifically, the protective layer PL) due to a step of the protective layer PL along the thickness of the address electrode AE. A gap S1) shown in FIG. 4 is provided. Note that a gap may be provided between the partition walls BR20 and BR22 and the front substrate portion 12 by forming the top portions of the partition walls BR20 and BR22 lower than the top portion of the partition wall BR10. Alternatively, a gap may be provided between the barrier ribs BR20, BR22 and the front substrate portion 12 by providing a groove or the like along the first direction D1 at the top of the barrier ribs BR20, BR22.

FIG. 3 shows an outline of the PDP 10 shown in FIG. 3 shows the state of the electrodes Xb, Xt, Yb, Yt, AE and the barrier ribs BR10, BR20, BR22 as viewed from the image display surface side (upper side in FIG. 2). The meanings of the arrows in the figure are the same as those in FIG.

The display electrode pairs EP (od) and EP (ev) are alternately arranged along the second direction D2 at intervals. Here, reference numerals od and ev in parentheses of the display electrode pair EP (od) and EP (ev) in the figure indicate the odd group od and the even group ev, respectively. For example, the odd-numbered group od is configured by the display electrode pairs EP that are arranged oddly from the top (upper side in FIG. 5 described later) of the display electrode pairs EP arranged in the second direction D2. The odd-numbered group od may be constituted by the display electrode pairs EP that are arranged oddly from the tail (lower side in FIG. 5 described later) of the display electrode pairs EP arranged in the second direction D2. Good. The even group ev is constituted by the display electrode pairs EP excluding the display electrode pair EP of the odd group od. Hereinafter, the display electrode pair EP (od) and EP (ev) are also referred to as the display electrode pair EP when the odd group od and the even group ev are not distinguished.

The first gap GP1 is formed between the transparent electrodes Xt and Yt that generate a sustain discharge. That is, the first gap GP1 is formed between the sustain electrode XE and the scan electrode YE constituting the display electrode pair EP. The second gap GP2 is formed, for example, between the display electrode pair EP (od) and the display electrode pair EP (ev). That is, the second gap GP2 includes one sustain electrode XE of the display electrode pair EP adjacent to each other (more specifically, the sustain electrode XE adjacent to the other display electrode pair EP) and the other scan electrode YE (more Specifically, it is formed between the scanning electrode YE) adjacent to one display electrode pair EP. In the example of the figure, the second gap GP2 is formed between the bus electrode Yb of the display electrode pair EP (od) and the bus electrode Xb of the display electrode pair EP (ev) and between the bus electrode Xb of the display electrode pair EP (od). Xb and the bus electrode Yb of the display electrode pair EP (ev) are formed respectively.

When viewed from the image display surface side, the partition wall BR20 is disposed to extend in the first direction D1 between the first gap GP1 and the second gap GP2 adjacent to each other with the scanning electrode YE interposed therebetween. In other words, the scan electrode YE has a portion located on the first gap GP1 side (for example, a part of the transparent electrode Yt) and a portion located on the second gap GP2 side (for example, the bus electrode Yb) with respect to the partition wall BR20. And divided. When viewed from the image display surface side, the partition wall BR22 extends in the first direction D1 between the first gap GP1 and the second gap GP2 that are adjacent to each other with the sustain electrode XE interposed therebetween. That is, the sustain electrode XE is a part located on the first gap GP1 side (for example, a part of the transparent electrode Xt) and a part located on the second gap GP2 side (for example, the bus electrode Xb) with respect to the partition wall BR22. And divided.

The cell C1 (and the discharge space DS1 shown in FIG. 2 described above) is formed in a region surrounded by the barrier ribs BR20 and BR22 adjacent to each other with the first gap GP1 interposed therebetween and the barrier rib BR10 adjacent to each other. In other words, as described above, the cell C1 is formed in a region surrounded by the barrier ribs BR20 and BR22 arranged along the bus electrodes Xb and Yb constituting the display electrode pair EP and the barrier rib BR10 adjacent to each other. Is done. Further, the above-described discharge space DS2 shown in FIG. 2 is formed in a region surrounded by the barrier ribs BR20 and BR22 adjacent to each other across the second gap GP2 and the barrier rib BR10 adjacent to each other.

The address electrode AE extends in the second direction D2 through each cell C1, and is disposed between the partition wall BR10 and the transparent electrode Yt. Note that when viewed from the image display surface side, the address electrode AE may be disposed at a position partially overlapping the partition wall BR10 or may be disposed at a position partially overlapping the transparent electrodes Yt and Xt.

As described above, in each cell C1, the transparent electrode Yt faces both the address electrode AE and the transparent electrode Xt. Therefore, an address discharge can be generated between the address electrode AE and the transparent electrode Yt of the cell C1 of interest by applying a voltage between the address electrode AE and the scan electrode YE of the cell C1 of interest. Further, by applying a voltage between the sustain electrode XE and the scan electrode YE, a sustain discharge can be generated between the transparent electrode Xt and the transparent electrode Yt of the cell C1 selected by the address discharge.

Note that the address electrode AE is disposed at a position away from the transparent electrode Yt of the cell C1 adjacent to the address electrode AE (in the drawing, the transparent electrode Yt on the left side of the address electrode AE) via the partition wall BR10. For this reason, when an address discharge is generated between the address electrode AE and the transparent electrode Yt of the target cell C1, it is possible to prevent erroneous discharge from occurring in the cells C1 other than the target cell C1.

FIG. 4 shows a cross section of the PDP 10 along the line A-A ′ of FIG. The meanings of the arrows in the figure are the same as those in FIG. As described above, the barrier ribs BR20 and BR22 are provided with a gap S1 between the front substrate portion 12 (more specifically, the protective layer PL). Further, the phosphor PH is provided between the barrier ribs BR20 and BR22 except for the barrier ribs BR20 and BR22 adjacent to each other with the second gap GP2 interposed therebetween.

The first gap GP1 is located on the discharge space DS1, and the second gap GP2 is located on the discharge space DS2. Therefore, in this embodiment, a discharge is generated between the scan electrode YE and the sustain electrode XE adjacent to each other with the second gap GP2 interposed therebetween (for example, a weak discharge indicated by a triangle mark in an address period ADR in FIG. 6 described later). Thus, priming particles can be generated in the discharge space DS2. Here, the priming particles are charged particles for generating a discharge of free electrons, ions, etc., and are most frequently generated immediately after the discharge and gradually decrease. The priming particles diffuse around. Therefore, the priming particles generated in the discharge space DS2 are supplied to the discharge space DS1 through the gap S1 formed between the partition wall BR20 and the front substrate portion 12 (more specifically, the protective layer PL). The

In the discharge space DS1 supplied with the priming particles, the discharge delay can be reduced. Here, the discharge delay is a delay time from when a voltage is applied between the electrodes until discharge is generated. For example, a discharge delay td shown in FIG. 6 to be described later is a delay time from the application of the address voltage Vsa to the address electrode AE until the address discharge is generated. In this embodiment, by supplying priming particles from the discharge space DS2 to the discharge space DS1, the discharge delay of the address discharge generated in the discharge space DS1 can be reduced, and the address discharge can be reliably generated in a short time. As a result, the cell C1 to be lit can be reliably selected, and the image quality can be improved.

In this embodiment, since the phosphor PH is not applied between the barrier ribs BR20 and BR22 adjacent to each other with the second gap GP2 interposed therebetween, visible light that reduces the contrast of the image (visible light unnecessary for image display) ) Can be prevented from being emitted from the discharge space DS2. The visible light generated by the weak discharge in the discharge space DS2 is much weaker than the visible light emitted from the phosphor PH, and thus does not affect the image contrast.

In order to simplify the process of applying the phosphor PH to the barrier ribs BR10, BR20, BR22, etc., the phosphor PH may be applied between the barrier ribs BR20, BR22 adjacent to each other across the second gap GP2. Even in this case, since the bus electrodes Xb and Yb are formed of a material that is opaque to visible light, visible light that passes through the glass substrate FS from the discharge space DS2 toward the glass substrate FS. The amount of can be reduced. That is, it is possible to prevent visible light (visible light that is unnecessary for image display) that lowers the contrast of the image from being emitted from the discharge space DS1.

FIG. 5 shows an outline of the circuit unit 60 shown in FIG. In FIG. 5, the description of the voltage applied to the electrodes YE and AE in the reset period RST shown in FIG. The circuit unit 60 includes an X driver XDRV, a Y driver YDRV, an address driver ADRV, a power supply unit PWR, and a control unit CNT. The drivers XDRV, YDRV, and ADRV operate as a drive unit that drives the PDP 10.

For example, the X driver XDRV commonly applies the voltage Vb1 or the voltage Vb2 to the bus electrode Xb of the display electrode pair EP (od) during an address period ADR shown in FIG. Further, the X driver XDRV applies the voltage Vb2 in common to the bus electrode Xb of the display electrode pair EP (ev) when the voltage Vb1 is applied to the bus electrode Xb of the display electrode pair (od), and the voltage Vb2 Is applied to the bus electrode Xb of the display electrode pair (od), the voltage Vb1 is commonly applied to the bus electrode Xb of the display electrode pair EP (ev). Further, the X driver XDRV alternately applies voltages −Vs / 2 and Vs / 2 to the bus electrode Xb of the display electrode pair EP (od) during a sustain period SUS shown in FIG. −Vs / 2 is alternately applied to the bus electrode Xb of the display electrode pair EP (ev).

The Y driver YDRV sequentially applies the scan voltage −Vsc to the bus electrode Yb in the address period ADR shown in FIG. Further, the Y driver YDRV alternately applies the voltages Vs / 2 and Vs / 2 to the bus electrode Yb of the display electrode pair EP (od) in the sustain period SUS shown in FIG. 6, and the voltages −Vs / 2 and Vs / 2 is alternately applied to the bus electrode Yb of the display electrode pair EP (ev). The address driver ADRV selectively applies the address voltage Vsa to the address electrode AE during the address period ADR shown in FIG.

The power supply unit PWR generates power supply voltages Vs / 2, -Vs / 2, -Vsc, Vsa, etc. to be supplied to the drivers XDRV, YDRV, ADRV. The control unit CNT controls operations of the drivers XDRV, YDRV, and ADRV. For example, the control unit CNT selects a subfield to be used based on the image data R0-7, G0-7, and B0-7, and outputs control signals YCNT, XCNT, and ACNT to the drivers YDRV, XDRV, and ADRV. Here, the subfield is a field obtained by dividing one field for displaying one screen of the PDP 10, and the number of sustain discharges is set for each subfield. A multi-tone image is displayed by selecting a subfield to be used for each cell C1 constituting the pixel.

FIG. 6 shows an example of the discharge operation of the subfield SF for displaying an image on the PDP 10 shown in FIG. FIG. 6 shows an example of the subfield SF in which the number of discharge cycles is set to 2 (the number of sustain discharges is 4). In the figure, the asterisk indicates the occurrence of discharge, and the triangular mark indicates the occurrence of weak discharge. Note that the waveform voltages of the electrodes XE, YE, and AE shown in FIG. 6 are respectively applied to the electrodes XE, YE, and AE by the drivers XDRV, YDRV, and ADRV shown in FIG.

The symbols od and ev in parentheses of the electrodes XE (od), YE (od), XE (ev), and YE (ev) in the figure indicate the odd group od and the even group ev, respectively. For example, the electrodes XE (od) and YE (od) indicate the sustain electrode XE and the scan electrode YE that form the display electrode pair EP (od) of the odd group od, respectively. Hereinafter, when the odd group od and the even group ev are not distinguished, the electrodes XE (od) and XE (ev) are also referred to as electrodes XE, and the electrodes YE (od) and YE (ev) are also referred to as electrodes YE.

Each subfield SF is composed of, for example, a reset period RST, an address period ADR, a sustain period SUS, and an erase period ERS. Note that the erase period ERS is defined as being included in the sustain period SUS because it is a period for generating a discharge for reducing the wall charge of only the lit cells.

First, in the reset period RST, a negative voltage (blunt wave) that gently falls is applied to the sustain electrode XE, and a positive voltage is applied to the scan electrode YE (FIG. 6A). The sustain electrode XE is maintained at a negative write voltage, and a positive write voltage (write blunt wave) that gradually increases is applied to the scan electrode YE (FIG. 6B). As a result, a weak discharge is generated, and positive and negative wall charges are accumulated in the sustain electrode XE and the scan electrode YE, respectively, while suppressing light emission of the cell. Next, a positive adjustment voltage is applied to the sustain electrode XE, and a negative adjustment voltage (adjusted obtuse wave) is applied to the scan electrode YE (FIG. 6C). Thereby, the amount of wall charges accumulated in sustain electrode XE and scan electrode YE can be adjusted. For example, the positive adjustment voltage is the same voltage as the voltage Vs / 2, and the lowest negative adjustment voltage is a voltage higher than the voltage −Vs / 2.

In the address period ADR, an address operation for selectively generating an address discharge between the scan electrode YE and the address electrode AE (an address operation for selecting a cell to be lit) is sequentially performed for each display line. In this embodiment, the address operation is sequentially performed for each odd-numbered display line (a display line constituted by cells formed along the odd-numbered group of display electrode pairs EP (od)) in the address period ADR (od). After that, in the address period ADR (ev), it is performed for each even-numbered display line (a display line constituted by cells formed along the display electrode pair EP (ev) in the even-numbered group). For example, the address operation is the first, third, fifth,..., Last odd number, second, fourth, sixth,..., Counting from the upper side of the PDP 10 shown in FIG. This is performed in the order of the last even-numbered display line.

In the address period ADR (od), the first voltage Vb1 (bias voltage) and the scan pulse (scan voltage −Vsc) are applied to the sustain electrode XE (od) and the scan electrode YE (od), respectively (FIG. 6D). ). The scan pulse indicated by the waveform of the scan electrode YE (od) is sequentially applied to the scan electrode YE (od) in order to select a cell to be lit for each display line. Further, the second voltage Vb2 (bias voltage) and the ground voltage GND are applied to the sustain electrode XE (ev) and the scan electrode YE (od), respectively (FIG. 6 (e)). Then, an address pulse (address voltage Vsa) is applied to the address electrode AE corresponding to the lighted cell (FIG. 6 (f)).

A weak discharge is generated between the scan electrode YE (od) to which the scan voltage −Vsc is applied and the sustain electrode XE (ev) to which the second voltage Vb2 is applied. Due to this weak discharge, priming particles are generated as described above with reference to FIG. In the cell selected by the scan pulse and the address pulse, a discharge is temporarily generated between the scan electrode YE and the address electrode AE (address discharge), and this discharge is used as a trigger between the sustain electrode XE and the scan electrode YE. A temporary discharge (address discharge) occurs. Negative and positive wall charges are accumulated in the sustain electrode XE and the scan electrode YE where the address discharge has occurred. Thereby, a cell to be lit in the sustain period SUS is selected. In a cell in which the address voltage Vsa is not applied to the address voltage AE, between the scan electrode YE (od) to which the scan voltage −Vsc is applied and the sustain electrode XE (od) to which the first voltage Vb1 is applied. No weak discharge occurs.

As described above with reference to FIG. 4, in this embodiment, by generating priming particles, the address discharge delay time td can be reduced. Since the priming particles are diffused up to several display lines ahead, the priming particles are also supplied to the discharge space DS1 of the display line where the address operation is performed thereafter. That is, the priming particles generated by the address operation and the priming particles generated by the address operation previously performed are supplied to the discharge space DS1 of the display line during the address operation. Is done. Thereby, the priming particles are sufficiently supplied to the discharge space DS1, and the delay time td of the address discharge can be reduced.

In this embodiment, the absolute value of the difference voltage between the second voltage Vb2 and the scan voltage −Vsc (the sum of the voltage Vb2 and the voltage Vsc) is the difference voltage between the first voltage Vb1 and the scan voltage −Vsc (the voltage Vb1 and the voltage Vsc). It is set larger than the absolute value of (sum). For example, a voltage equal to or higher than the discharge start voltage VF2 is applied between the scan electrode YE (od) and the sustain electrode XE (ev), and the scan electrode YE (od) and the sustain electrode XE constituting the display electrode pair EP (od). A voltage lower than the discharge start voltage VF1 is applied during (od). Here, the discharge start voltage VF1 is the lowest voltage that generates a discharge between the scan electrode YE (od) and the sustain electrode XE (od) adjacent to each other when the address voltage Vsa is not applied to the address voltage AE. . That is, the discharge start voltage VF1 is a discharge between the scan electrode YE and the sustain electrode XE adjacent to each other across the first gap GP1 shown in FIG. 3 described above with the address voltage Vsa not applied to the address voltage AE. This is the starting voltage.

When the address voltage Vsa is not applied to the address voltage AE, the discharge start voltage VF2 is between the display electrode pairs EP (od) and EP (ev) adjacent to each other (for example, the scan electrode YE (od) and the sustain electrode XE). (Between (ev)) is the lowest voltage that generates a discharge. That is, the discharge start voltage VF2 is a discharge between the scan electrode YE and the sustain electrode XE adjacent to each other across the second gap GP2 shown in FIG. 3 described above in a state where the address voltage Vsa is not applied to the address voltage AE. This is the starting voltage. In the example of FIG. 6, the discharge start voltage VF1 is the same as the discharge start voltage VF2, and the discharge start voltages VF1 and VF2 are shown in the waveform of the sustain electrode XE with the scan voltage −Vsc as a reference. The discharge start voltage VF1 may be a voltage different from the discharge start voltage VF2.

The difference voltage between the address voltage Vsa and the scan voltage −Vsc (the sum of the voltage Vsa and the voltage Vsc) is equal to or higher than the lowest voltage (discharge start voltage VF3) that generates a discharge between the address electrode AE and the scan electrode YE. In the figure, the discharge start voltage VF3 is shown in the waveform of the address electrode AE with the scan voltage −Vsc as a reference.

In the address period ADR (ev), the first voltage Vb1 (bias voltage) and the scan pulse (scan voltage −Vsc) are applied to the sustain electrode XE (ev) and the scan electrode YE (ev), respectively (FIG. 6G). ). Further, the second voltage Vb2 (bias voltage) and the ground voltage GND are applied to the sustain electrode XE (od) and the scan electrode YE (ev), respectively (FIG. 6 (n)). Then, an address pulse (address voltage Vsa) is applied to the address electrode AE corresponding to the lighted cell (FIG. 6 (i)).

A weak discharge is generated between the scan electrode YE (ev) to which the scan voltage −Vsc is applied and the sustain electrode XE (od) to which the second voltage Vb2 is applied. In the cell selected by the scan pulse and the address pulse, a discharge is temporarily generated between the scan electrode YE and the address electrode AE (address discharge), and this discharge is used as a trigger between the sustain electrode XE and the scan electrode YE. A temporary discharge (address discharge) occurs. Negative and positive wall charges are accumulated in the sustain electrode XE and the scan electrode YE where the address discharge has occurred. Thereby, a cell to be lit in the sustain period SUS is selected. In a cell in which the address voltage Vsa is not applied to the address voltage AE, between the scan electrode YE (ev) to which the scan voltage −Vsc is applied and the sustain electrode XE (ev) to which the first voltage Vb1 is applied. No weak discharge occurs.

As described above, in this embodiment, in the address period ADR, a weak discharge is generated between the scan electrode YE to which the scan voltage −Vsc is applied and the sustain electrode XE to which the second voltage Vb2 is applied. Generate particles. Thereby, in this embodiment, the address discharge delay time td can be reduced, and the address operation can be performed at high speed. As a result, in this embodiment, the image quality can be improved.

As described above, during the address period ADR (od), the sustain electrodes XE (od) and XE (ev) are maintained at the voltages Vb1 and Vb2, respectively, and during the address period ADR (ev), the sustain electrode XE (od). , XE (ev) are maintained at voltages Vb2 and Vb1, respectively. As a result, in this embodiment, the power consumption of a circuit (for example, the X driver XDRV shown in FIG. 5 described above) for applying a voltage to the sustain electrode XE can be reduced.

In the sustain period SUS, first, negative and positive sustain pulses (voltage −Vs / 2 and voltage Vs / 2) are applied to the sustain electrode XE (od) and the scan electrode YE (od), respectively (FIG. 6 ( j)). Accordingly, a sustain discharge is generated in the cells selected in the address period ADR among the cells of the odd-numbered display lines. Further, positive and negative sustain pulses (voltage Vs / 2 and voltage −Vs / 2) are applied to sustain electrode XE (ev) and scan electrode YE (ev), respectively (FIG. 6 (k)). In the cell selected in the address period ADR, since negative and positive wall charges are accumulated in the sustain electrode XE and the scan electrode YE, respectively, the sustain electrode (ev) to which the voltage Vs / 2 is applied and the voltage −Vs / No discharge occurs between the scanning electrode YE (ev) to which 2 is applied.

In this embodiment, since the same voltage (for example, voltage −Vs / 2) is applied to sustain electrode XE (od) and scan electrode YE (ev), sustain electrode XE (od) and scan electrode YE (ev) It is possible to prevent erroneous discharge from occurring. In addition, since the same voltage (voltage Vs / 2) is applied to sustain electrode XE (ev) and scan electrode YE (od), erroneous discharge occurs between sustain electrode XE (ev) and scan electrode YE (od). Can be prevented. At the beginning of the sustain period SUS (FIG. 6 (k)), the ground voltage GND may be applied to the sustain electrode XE (ev) and the scan electrode YE (ev), respectively.

Next, positive and negative sustain pulses (voltage Vs / 2 and voltage −Vs / 2) are applied to sustain electrode XE (od) and scan electrode YE (od), respectively (FIG. 6 (l)). In the cell in which discharge has occurred immediately before (FIG. 6 (j)) (lighted cell), discharge (sustain discharge) is generated between the sustain electrode XE and the scan electrode YE, and the discharge state is maintained. Negative and positive sustain pulses (voltage −Vs / 2 and voltage Vs / 2) are applied to sustain electrode XE (ev) and scan electrode YE (ev), respectively (FIG. 6 (m)). As a result, a sustain discharge is generated in the cells selected in the address period ADR among the cells of the even-numbered display lines. As described above, the sustain pulses having different polarities are repeatedly applied to the sustain electrode XE and the scan electrode YE, so that discharge (sustain discharge) is repeatedly performed in the sustain period SUS in the cells that have undergone address discharge.

At the end of the sustain period SUS, after the positive and negative sustain pulses (voltage Vs / 2 and voltage −Vs / 2) are applied to the sustain electrode XE (ev) and the scan electrode YE (ev), respectively, the ground voltage GND is The voltage is applied to sustain electrode XE (od) and scan electrode YE (od) (FIG. 6 (n)). When ground voltage GND is applied to sustain electrode XE (od) and scan electrode YE (od), positive and negative sustain pulses (voltage Vs / 2 and voltage −Vs / 2) are applied to sustain electrode XE (ev) and Each is applied to the scanning electrode YE (ev) (FIG. 6 (o)).

In the erasing period ERS, an erasing pulse in which negative and positive voltages gradually change is applied to the sustain electrode XE, and positive and negative sustain pulses (voltage Vs / 2 and voltage −Vs / 2 are applied to the scanning electrode YE. ) Is applied to generate a weak discharge (FIG. 6 (p, q)). As a result, the wall charge is reduced and the erasure is completed. In the cell that is not addressed in the next subfield SF, the discharge is not generated even if the sustain pulse is applied in the next sustain period SUS.

As described above, in this embodiment, weak discharge is generated between the scan electrode YE (od) to which the scan voltage −Vsc is applied and the sustain electrode XE (ev) to which the second voltage Vb2 is applied, thereby generating priming particles. Let Thereby, in this embodiment, the delay time td of the address discharge can be reduced, and the address operation of each display line can be performed at high speed. As a result, in this embodiment, the image quality can be improved.

FIG. 7 shows a main part of the PDP 10 in another embodiment. FIG. 7 shows the state of the electrodes XE, YE2, AE and the barrier ribs BR10, BR21 as viewed from the image display surface side (upper side in FIG. 2). In this embodiment, the PDP 10 is provided with a partition BR21 and a scan electrode YE2 instead of the partition BR20 and the scan electrode YE of FIG. 3 described above, and the partition BR22 is omitted from the configuration of FIG. Other configurations and a PDP apparatus using the PDP 10 of this embodiment are the same as those shown in FIGS. The discharge operation for displaying an image on the PDP 10 of this embodiment is the same as that in FIG. For example, the waveform voltages of the electrodes XE, YE, and AE shown in FIG. 6 are applied to the electrodes XE, YE2, and AE, respectively, by the drivers XDRV, YDRV, and ADRV shown in FIG. The same elements as those described in FIGS. 1 to 6 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The scan electrode YE2 is connected to the bus electrode Yb and the transparent electrode Yt, and has a protrusion Yp that protrudes to the opposite side of the area where the sustain electrode XE paired with the scan electrode YE2 is disposed with respect to the bus electrode Yb. ing. For example, the protrusion Yp is an electrode that is made of a metal material or the like and is opaque to visible light. That is, the scanning electrode YE2 is formed such that a portion located on the second gap GP2 side with respect to the partition wall BR21 is opaque to visible light. The protruding portion Yp may be formed integrally with the bus electrode Yb using the same material as the bus electrode Yb.

The second gap GP2 is formed between the projecting portion Yp and the sustain electrode XE (more specifically, the bus electrode Xb) adjacent to the projecting portion Yp. That is, the second gap GP2 includes one sustain electrode XE (more specifically, the bus electrode Xb) and the other scan electrode YE (more specifically, the protruding portion Yp) of the display electrode pair EP adjacent to each other. Formed between.

When viewed from the image display surface side, the partition wall BR21 (first partition wall) is disposed so as to extend in the first direction D1 between the first gap GP1 and the second gap GP2 that are adjacent to each other with the scanning electrode YE2 interposed therebetween. . The cell C1 (and a discharge space DS1 shown in FIG. 8 to be described later) is formed in a region surrounded by the barrier ribs BR10 and BR21, and the barrier ribs BR10 and BR21 constitute a side wall of the cell C1. That is, in this embodiment, in the cell C1 adjacent to each other across the partition wall BR21, the first gap GP1 and the second gap GP2 adjacent to the scan electrode YE2 of one cell C1 are one cell C1 and the other cell C1. Formed respectively.

FIG. 8 shows a cross section of the PDP 10 along the line A-A ′ of FIG. Note that cells C1 (od) and C1 (ev) in the figure respectively indicate an odd-numbered display line cell C1 and an even-numbered display line cell C1. As described above, the discharge space DS1 is formed in a region surrounded by the barrier ribs BR10 and BR21. The phosphor PH is provided between the adjacent barrier ribs BR21. That is, the phosphors PH (phosphors PHr, PHg, phosphors PHr, PHg, respectively) that generate visible light of red, green, and blue on the side surfaces of the barrier ribs BR10, BR21 and on the glass substrate RS in a portion surrounded by the barrier ribs BR10, BR21. PHb) is applied respectively.

The first gap GP1 and the second gap GP2 are located on the discharge space DS1. Therefore, in this embodiment, the weak discharge between the protrusion Yp (scan electrode YE) and the sustain electrode XE adjacent to each other across the second gap GP2 (the weak discharge indicated by the triangle mark of the address period ADR in FIG. 6 described above). ) Occurs in the discharge space DS1. Note that the discharge space DS1 in which the weak discharge is generated is a discharge space DS1 adjacent to the discharge space DS1 of the cell C1 to which the scan voltage −Vsc is applied with the partition wall BR21 interposed therebetween. The priming particles generated by the weak discharge are applied with the scan voltage −Vsc through the gap S1 formed between the partition wall BR21 and the front substrate portion 12 (more specifically, the protective layer PL). It is supplied to the discharge space DS1 of the cell C1. As described above, since the priming particles diffuse to several display lines, the priming particles are also supplied to the discharge space DS1 of the display line to which the scan voltage −Vsc is applied thereafter.

In the discharge space DS1 supplied with the priming particles, the discharge delay td shown in FIG. 6 described above can be reduced, and the address discharge can be reliably generated in a short time. As a result, the cell C1 to be lit can be reliably selected, and the image quality can be improved.

As described above, the bus electrode Xb and the protrusion Yp are made of a material that is opaque to visible light. For this reason, in this embodiment, the amount of visible light generated by the weak discharge between the bus electrode Xb and the protruding portion Yp and passing through the glass substrate FS out of the visible light from the phosphor PH toward the glass substrate FS is determined. Less. That is, in this embodiment, it is possible to prevent the visible light (visible light unnecessary for image display) that reduces the contrast of the image from being emitted from the discharge space DS1.

In this embodiment, since a weak discharge is generated between the protrusion Yp and the bus electrode Xb, the amount of wall charge accumulated in the electrode XE by the weak discharge is equal to the amount of wall charge accumulated in the protrusion Yp. The same. In other words, in this embodiment, the amount of wall charges stored in the electrodes XE and YE2 (Yp) by the weak discharge is set as the wall charge stored in the electrodes XE and YE2 by the address discharge between the transparent electrodes Xt and Yt, respectively. It can be very small compared to the amount. Therefore, in this embodiment, the amount of wall charges accumulated due to weak discharge can be reduced, and it is possible to reliably prevent erroneous discharge from occurring in the cell C1 that is not lit during the sustain period SUS. As described above, also in this embodiment, the same effect as that of the embodiment described with reference to FIGS. 1 to 6 can be obtained.

In the above-described embodiment, an example in which one pixel includes three cells (red (R), green (G), and blue (B)) has been described. The present invention is not limited to such an embodiment. For example, one pixel may be composed of four or more cells. Alternatively, one pixel may be composed of cells that generate colors other than red (R), green (G), and blue (B), and one pixel may be red (R), green (G), A cell that generates a color other than blue (B) may be included.

In the above-described embodiment, the example in which the second direction D2 is orthogonal to the first direction D1 has been described. The present invention is not limited to such an embodiment. For example, the second direction D2 may intersect the first direction D1 in a substantially perpendicular direction (for example, 90 ° ± 5 °). Also in this case, the same effect as the above-described embodiment can be obtained.

In the above-described embodiment, the example in which the address electrode AE is provided on the front substrate portion 12 has been described. The present invention is not limited to such an embodiment. For example, as shown in FIG. 9, the address electrode AE may be provided on the back substrate portion 14. In FIG. 9, the plurality of address electrodes AE extending in the second direction D2 are provided on the glass base RS of the back substrate portion 14 and covered with the dielectric layer DL2. On the dielectric layer DL2, a lattice-like partition wall made up of the partition walls BR10, BR20, BR22 is formed. Also in this case, the same effect as the above-described embodiment can be obtained.

In the above-described embodiment, the example in which the transparent electrodes Xt and Yt are arranged at positions facing each other along the first direction D1 has been described. The present invention is not limited to such an embodiment. For example, as shown in FIG. 10, the transparent electrodes Xt and Yt may be arranged at positions facing each other along the second direction D2. FIG. 10 shows the state of the electrode electrodes Xb, Xt2, Yb, Yt2, AE and the barrier ribs BR10, BR21, BR22 as viewed from the image display surface side. In the example of FIG. 10, transparent electrodes Xt2 and Yt2 are provided instead of the transparent electrodes Xt and Yt shown in FIG. Other configurations are the same as those in FIG. The transparent electrode Xt2 and the transparent electrode Yt2 face each other along the second direction D2. The transparent electrode Yt2 is disposed between the address electrode AE and the transparent electrode Xt2. The first gap GP1 is formed along the second direction D2 between the transparent electrode Xt2 and the transparent electrode Yt2 adjacent to each other (for example, a portion surrounded by a broken line in FIG. 10). That is, the first gap GP1 is formed between the sustain electrode XE and the scan electrode YE constituting the display electrode pair EP. Also in this case, the same effect as the above-described embodiment can be obtained.

In the above-described embodiment, an example in which grid-like partition walls are provided on the back substrate portion 14 has been described. The present invention is not limited to such an embodiment. For example, the partition provided on the back substrate portion 14 may be a striped partition (only the partition BR10) obtained by omitting the partition BR21 from the configuration shown in FIG. Also in this case, the same effect as the above-described embodiment can be obtained.

In the embodiment described above, the address operation is sequentially performed for each odd-numbered display line in the address period ADR (od), and then performed for each even-numbered display line in the address period ADR (ev). Said. The present invention is not limited to such an embodiment. For example, the address operation may be performed alternately on the odd-numbered display lines and the even-numbered display lines (for example, in order from the display line on the upper side of the PDP 10 shown in FIG. 5 described above). In this case, the voltages Vb1 and Vb2 are alternately applied to the sustain electrodes XE (od) and XE (ev) in synchronization with the scan voltage −Vsc.

For example, a display line in which an address operation is being performed and a display line in which an address operation is subsequently performed are adjacent to each other.

For example, when the address operation is sequentially performed from the upper display line of the PDP 10 illustrated in FIG. 5, the display line in the middle of the address operation and the display line in which the address operation is subsequently performed are Are adjacent to each other. Therefore, the discharge space DS1 of the display line in which the address operation is performed is adjacent to the discharge space DS2 (or the discharge space DS1) in which priming particles are generated by the address operation performed before the address operation. Thereby, in this case, more priming particles can be supplied to the discharge space DS1 of the display line in which the address operation is performed. Also in this case, the same effect as that of the above-described embodiment is obtained except that the power consumption of a circuit for applying a voltage to the sustain electrode XE (for example, the X driver XDRV shown in FIG. 5 described above) can be reduced. Obtainable.

In the above-described embodiment, the example in which the voltages Vb1 and Vb2 are set to different voltages has been described. The present invention is not limited to such an embodiment. For example, when the discharge start voltage VF2 is smaller than the discharge start voltage VF1, the voltages Vb1 and Vb2 may be set to the same voltage (bias voltage) between the voltage VF1 and the voltage VF2. Also in this case, the difference voltage between the bias voltages (voltages Vb1, Vb2) and the scan voltage −Vsc is set smaller than the discharge start voltage VF1 and larger than the discharge start voltage VF2. When the voltages Vb1 and Vb2 are the same, for example, even when the address operation is sequentially performed from the display line on the upper side of the PDP 10 shown in FIG. 5, a circuit for applying a voltage to the sustain electrode XE (for example, The power consumption of the X driver XDRV shown in FIG. 5 described above can be reduced. Also in this case, the same effect as the above-described embodiment can be obtained.

As described above, the present invention has been described in detail. However, the above-described embodiment and its modification are merely examples of the present invention, and the present invention is not limited thereto. Obviously, modifications can be made without departing from the scope of the present invention.

The present invention can be applied to a plasma display device.

Claims

A plurality of display electrode pairs configured by sustain electrodes and scan electrodes extending in a first direction and a plurality of address electrodes extending in a second direction intersecting the first direction are provided, and the display electrode pairs A first gap for generating a sustain discharge is formed between the sustain electrode and the scan electrode constituting the display electrode, and a first gap is formed between one of the sustain electrodes and the other scan electrode of the display electrode pair adjacent to each other. A plasma display panel in which two gaps are formed;
A driving unit that applies a bias voltage to the sustain electrode, sequentially applies a scan voltage to the scan electrode, and selectively applies an address voltage to the address electrode in an address period for generating an address discharge;
A difference voltage between the bias voltage and the scan voltage is smaller than a discharge start voltage between the sustain electrode and the scan electrode adjacent to each other across the first gap in a state where the address voltage is not applied to the address electrode. And, it is set larger than the discharge start voltage between the sustain electrode and the scan electrode adjacent to each other across the second gap in a state where the address voltage is not applied to the address electrode,
The plasma display apparatus according to claim 1, wherein a difference voltage between the address voltage and the scan voltage is set larger than a discharge start voltage for generating an address discharge between the address electrode and the scan electrode.
The plasma display device according to claim 1, wherein
The driving unit applies a first voltage as the bias voltage to the sustain electrode adjacent to the scan electrode to which the scan voltage is applied across the first gap in the address period, A second voltage is applied as the bias voltage to the sustain electrode adjacent to the scan electrode to which the scan voltage is applied across the second gap,
The absolute value of the difference voltage between the second voltage and the scan voltage is set larger than the absolute value of the difference voltage between the first voltage and the scan voltage.
The plasma display device according to claim 2, wherein
The display electrode pairs arranged in the second direction include an odd-numbered group composed of odd-numbered display electrode pairs counted from the head or tail, and display electrode pairs excluding the odd-numbered display electrode pairs. Divided into an even group consisting of
The driving unit sequentially applies the scan voltage to one of the scan electrodes of the odd group and the even group and then sequentially applies the scan voltage to the other scan electrode in the address period. A plasma display device.
The plasma display device according to claim 1, wherein
The plasma display panel is:
A first substrate provided with the display electrode pair;
A second substrate facing the first substrate;
A gap is formed between the first substrate and the first substrate that is provided on the second substrate and extends in the first direction between the first and second gaps adjacent to each other across the scanning electrode. A plasma display device comprising: a first partition wall.
The plasma display device according to claim 4, wherein
The plasma display panel is:
And a second barrier rib provided on the second substrate and extending in the first direction between the first and second gaps adjacent to each other with the sustain electrode interposed therebetween. Plasma display device.
The plasma display device according to claim 5, wherein
The plasma display panel includes a phosphor that generates visible light,
The plasma display device, wherein the phosphor is provided between the first and second partitions except for the first and second partitions adjacent to each other across the second gap.
The plasma display device according to claim 4, wherein
The scan electrode includes a protruding portion that protrudes on the opposite side to a region where the sustain electrode that is paired with the scan electrode is disposed,
The plasma display apparatus, wherein the second gap is formed between the sustain electrode adjacent to the protrusion and the protrusion.
The plasma display device according to claim 4, wherein
The sustain electrode includes a first electrode extending in the first direction adjacent to the second gap, and a second electrode connected to the first electrode,
The first electrode is opaque to visible light,
2. The plasma display apparatus according to claim 1, wherein a portion of the scan electrode positioned on the second gap side with respect to the first partition is formed opaque to visible light.