WO2009060533A1 - データ転送回路及びその調整方法 - Google Patents

データ転送回路及びその調整方法 Download PDF

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Publication number
WO2009060533A1
WO2009060533A1 PCT/JP2007/071798 JP2007071798W WO2009060533A1 WO 2009060533 A1 WO2009060533 A1 WO 2009060533A1 JP 2007071798 W JP2007071798 W JP 2007071798W WO 2009060533 A1 WO2009060533 A1 WO 2009060533A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
signal
output
data transfer
input
Prior art date
Application number
PCT/JP2007/071798
Other languages
English (en)
French (fr)
Inventor
Toshihide Tsuzuki
Hirotoshi Inoue
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/071798 priority Critical patent/WO2009060533A1/ja
Priority to JP2009539917A priority patent/JP4605304B2/ja
Publication of WO2009060533A1 publication Critical patent/WO2009060533A1/ja
Priority to US12/770,030 priority patent/US8339162B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018592—Coupling arrangements; Interface arrangements using field effect transistors only with a bidirectional operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

　本発明は、データ転送回路は、信号を出力する第一の出力回路と、信号が入力する第一の入力回路とを有するバッファ回路と、入力する信号を出力する第二の出力回路と、該第二の出力回路から入力する信号を出力する第二の入力回路とを有する試験回路と、該試験回路の該第二の出力回路に信号を入力し、該試験回路の該第二の入力回路から出力される信号に基づいて、該バッファ回路の該第一の出力回路の出力を調整する調整回路とを有することを特徴とする。そのため、双方向バッファの信号の送受信方向の制御を行うことなく出力ドライバの調整を行うことができる。
PCT/JP2007/071798 2007-11-09 2007-11-09 データ転送回路及びその調整方法 WO2009060533A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/071798 WO2009060533A1 (ja) 2007-11-09 2007-11-09 データ転送回路及びその調整方法
JP2009539917A JP4605304B2 (ja) 2007-11-09 2007-11-09 データ転送回路及びその調整方法
US12/770,030 US8339162B2 (en) 2007-11-09 2010-04-29 Circuit device and method of controlling circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/071798 WO2009060533A1 (ja) 2007-11-09 2007-11-09 データ転送回路及びその調整方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/770,030 Continuation US8339162B2 (en) 2007-11-09 2010-04-29 Circuit device and method of controlling circuit device

Publications (1)

Publication Number Publication Date
WO2009060533A1 true WO2009060533A1 (ja) 2009-05-14

Family

ID=40625448

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/071798 WO2009060533A1 (ja) 2007-11-09 2007-11-09 データ転送回路及びその調整方法

Country Status (3)

Country Link
US (1) US8339162B2 (ja)
JP (1) JP4605304B2 (ja)
WO (1) WO2009060533A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012169471A (ja) * 2011-02-15 2012-09-06 Fujitsu Ltd 電子装置、電子装置の電源電圧制御方法、半導体装置、半導体装置の電源電圧制御方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9520878B1 (en) * 2014-10-30 2016-12-13 Altera Corporation Methods and apparatus for transmitting a signal in a single direction using bidirectional driver circuits

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04243349A (ja) * 1991-01-18 1992-08-31 Toshiba Corp 変復調装置および同装置における送出レベル設定方法
JP2000181591A (ja) * 1998-12-18 2000-06-30 Pfu Ltd Ｌｖｄｓインタフェース信号振幅設定機能を備える情報処理装置及びｌｖｄｓインタフェース信号振幅設定方法
JP2000341177A (ja) * 1999-05-31 2000-12-08 Sanyo Electric Co Ltd 画像信号伝送装置
JP2006148389A (ja) * 2004-11-18 2006-06-08 Sony Corp 信号伝送システム

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3156638B2 (ja) 1997-06-24 2001-04-16 日本電気株式会社 出力インピーダンス調整回路内蔵半導体集積回路
KR100477808B1 (ko) * 2002-05-21 2005-03-21 주식회사 하이닉스반도체 듀티 사이클 교정이 가능한 디지털 디엘엘 장치 및 듀티사이클 교정 방법
JP2006060751A (ja) 2004-08-24 2006-03-02 Ricoh Co Ltd 出力装置、差動出力装置、半導体レーザ変調駆動装置、画像形成装置及び電子機器
JP2007036546A (ja) 2005-07-26 2007-02-08 Nec Electronics Corp インピーダンス調整回路と方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04243349A (ja) * 1991-01-18 1992-08-31 Toshiba Corp 変復調装置および同装置における送出レベル設定方法
JP2000181591A (ja) * 1998-12-18 2000-06-30 Pfu Ltd Ｌｖｄｓインタフェース信号振幅設定機能を備える情報処理装置及びｌｖｄｓインタフェース信号振幅設定方法
JP2000341177A (ja) * 1999-05-31 2000-12-08 Sanyo Electric Co Ltd 画像信号伝送装置
JP2006148389A (ja) * 2004-11-18 2006-06-08 Sony Corp 信号伝送システム

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012169471A (ja) * 2011-02-15 2012-09-06 Fujitsu Ltd 電子装置、電子装置の電源電圧制御方法、半導体装置、半導体装置の電源電圧制御方法

Also Published As

Publication number Publication date
JPWO2009060533A1 (ja) 2011-03-17
US20100207668A1 (en) 2010-08-19
JP4605304B2 (ja) 2011-01-05
US8339162B2 (en) 2012-12-25

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