WO2009016794A1 - Epitaxial wafer manufacturing method and epitaxial wafer - Google Patents

Epitaxial wafer manufacturing method and epitaxial wafer Download PDF

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Publication number
WO2009016794A1
WO2009016794A1 PCT/JP2008/001740 JP2008001740W WO2009016794A1 WO 2009016794 A1 WO2009016794 A1 WO 2009016794A1 JP 2008001740 W JP2008001740 W JP 2008001740W WO 2009016794 A1 WO2009016794 A1 WO 2009016794A1
Authority
WO
WIPO (PCT)
Prior art keywords
epitaxial wafer
resistivity
layer
ion implanted
single crystal
Prior art date
Application number
PCT/JP2008/001740
Other languages
French (fr)
Japanese (ja)
Inventor
Wei Feig Qu
Hiroyuki Kobayashi
Ryuji Sayama
Shoichi Takamizawa
Kiyoshi Mitani
Naohisa Toda
Hitoshi Mogi
Original Assignee
Shin-Etsu Handotai Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co., Ltd. filed Critical Shin-Etsu Handotai Co., Ltd.
Publication of WO2009016794A1 publication Critical patent/WO2009016794A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02634—Homoepitaxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Physical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

Provided is an epitaxial wafer manufacturing method wherein an epitaxial layer is formed on a silicon single crystal substrate. In the method, only carbon ions are implanted into an N-type silicon single crystal substrate to form a carbon ion implanted layer, then, on the surface of the N-type silicon single crystal substrate whereupon the carbon ion implanted layer is formed, the epitaxial layer is formed so that the thickness of a region where resistivity transits from the epitaxial layer toward the carbon ion implanted layer is 2μm or less. Thus, the low-resistivity ion implanted layer, the high-resistivity epitaxial layer and the region where the resistivity transmits between such layers are sharply formed, and a problem of generating contamination due to heavy metal impurity is eliminated.
PCT/JP2008/001740 2007-07-31 2008-07-02 Epitaxial wafer manufacturing method and epitaxial wafer WO2009016794A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-199569 2007-07-31
JP2007199569A JP2009038124A (en) 2007-07-31 2007-07-31 Epitaxial wafer manufacturing method and epitaxial wafer

Publications (1)

Publication Number Publication Date
WO2009016794A1 true WO2009016794A1 (en) 2009-02-05

Family

ID=40304038

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/001740 WO2009016794A1 (en) 2007-07-31 2008-07-02 Epitaxial wafer manufacturing method and epitaxial wafer

Country Status (3)

Country Link
JP (1) JP2009038124A (en)
TW (1) TW200924065A (en)
WO (1) WO2009016794A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015035467A (en) * 2013-08-08 2015-02-19 株式会社Sumco Method for manufacturing laminated wafer, and laminated wafer

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011125305A1 (en) * 2010-04-08 2011-10-13 信越半導体株式会社 Silicon epitaxial wafer, method for manufacturing silicon epitaxial wafer, and method for manufacturing semiconductor element or integrated circuit
JP6442817B2 (en) * 2013-08-20 2018-12-26 株式会社Sumco Epitaxial wafer manufacturing method and epitaxial wafer
JP6427894B2 (en) * 2014-02-21 2018-11-28 株式会社Sumco Epitaxial wafer manufacturing method
JP6318728B2 (en) * 2014-03-13 2018-05-09 株式会社Sumco Manufacturing method of semiconductor epitaxial wafer, semiconductor epitaxial wafer, and manufacturing method of solid-state imaging device
JP6427946B2 (en) * 2014-05-13 2018-11-28 株式会社Sumco Epitaxial silicon wafer manufacturing method, epitaxial silicon wafer, and solid-state imaging device manufacturing method
JP2017123477A (en) * 2017-02-28 2017-07-13 株式会社Sumco Method for manufacturing semiconductor epitaxial wafer, semiconductor epitaxial wafer, and method for manufacturing solid-state imaging device
JP2017175143A (en) * 2017-05-01 2017-09-28 株式会社Sumco Semiconductor epitaxial wafer manufacturing method, semiconductor epitaxial wafer, and solid-state imaging element manufacturing method
JP6361779B2 (en) * 2017-05-01 2018-07-25 株式会社Sumco Epitaxial silicon wafer manufacturing method, epitaxial silicon wafer, and solid-state imaging device manufacturing method
JP2017175145A (en) * 2017-05-01 2017-09-28 株式会社Sumco Semiconductor epitaxial wafer manufacturing method, semiconductor epitaxial wafer, and solid-state imaging element manufacturing method
JP2017183736A (en) * 2017-05-11 2017-10-05 株式会社Sumco Method for manufacturing semiconductor epitaxial wafer, semiconductor epitaxial wafer, and method for manufacturing solid state image sensor
JP7188299B2 (en) 2019-07-02 2022-12-13 信越半導体株式会社 Carbon-doped silicon single crystal wafer and its manufacturing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5524482A (en) * 1978-08-09 1980-02-21 Nec Corp Mono-cyrstalline silicon
JPH06163410A (en) * 1992-09-25 1994-06-10 Sony Corp Epitaxial wafer and manufacturer thereof
JP2002353434A (en) * 2001-05-22 2002-12-06 Sony Corp Method of manufacturing for solid-state image pickup device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5524482A (en) * 1978-08-09 1980-02-21 Nec Corp Mono-cyrstalline silicon
JPH06163410A (en) * 1992-09-25 1994-06-10 Sony Corp Epitaxial wafer and manufacturer thereof
JP2002353434A (en) * 2001-05-22 2002-12-06 Sony Corp Method of manufacturing for solid-state image pickup device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015035467A (en) * 2013-08-08 2015-02-19 株式会社Sumco Method for manufacturing laminated wafer, and laminated wafer

Also Published As

Publication number Publication date
TW200924065A (en) 2009-06-01
JP2009038124A (en) 2009-02-19

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