WO2008155967A1 - Carte avec un composant encastré et son procédé de fabrication - Google Patents

Carte avec un composant encastré et son procédé de fabrication Download PDF

Info

Publication number
WO2008155967A1
WO2008155967A1 PCT/JP2008/059165 JP2008059165W WO2008155967A1 WO 2008155967 A1 WO2008155967 A1 WO 2008155967A1 JP 2008059165 W JP2008059165 W JP 2008059165W WO 2008155967 A1 WO2008155967 A1 WO 2008155967A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
component
built
board
manufacturing
Prior art date
Application number
PCT/JP2008/059165
Other languages
English (en)
Japanese (ja)
Inventor
Satoru Noda
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Priority to JP2009520404A priority Critical patent/JP5007746B2/ja
Publication of WO2008155967A1 publication Critical patent/WO2008155967A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/82009—Pre-treatment of the connector or the bonding area
    • H01L2224/8203—Reshaping, e.g. forming vias
    • H01L2224/82035—Reshaping, e.g. forming vias by heating means
    • H01L2224/82039—Reshaping, e.g. forming vias by heating means using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

L'invention concerne l'amélioration apportée à la rectitude des conducteurs de trou d'interconnexion ou des conducteurs de trou traversant pour connecter des électrodes externes d'un composant de puce noyé dans une couche isolante d'une carte ayant un composant encastré dans les couches d'électrode sur la couche isolante. Les électrodes externes (4a, 4b) d'un composant de puce (3) noyé dans une couche isolante (2) ont des parties étendues (42a) sur la surface supérieure. Les parties étendues (42) comprennent des positions (42a) où des conducteurs de trou d'interconnexion (5) sont formés, et sont aplaties au moins dans les positions pour éliminer la courbure de la surface. Par conséquent, la rectitude des conducteurs de trou d'interconnexion (5) ou des conducteurs de trou traversant formés dans la couche isolante (2) est améliorée.
PCT/JP2008/059165 2007-06-15 2008-05-20 Carte avec un composant encastré et son procédé de fabrication WO2008155967A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009520404A JP5007746B2 (ja) 2007-06-15 2008-05-20 部品内蔵基板

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007158995 2007-06-15
JP2007-158995 2007-06-15

Publications (1)

Publication Number Publication Date
WO2008155967A1 true WO2008155967A1 (fr) 2008-12-24

Family

ID=40156126

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/059165 WO2008155967A1 (fr) 2007-06-15 2008-05-20 Carte avec un composant encastré et son procédé de fabrication

Country Status (2)

Country Link
JP (2) JP5007746B2 (fr)
WO (1) WO2008155967A1 (fr)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011071111A1 (fr) * 2009-12-09 2011-06-16 株式会社村田製作所 Substrat en résine avec composant électronique et module de circuit électronique incorporés
CN102695366A (zh) * 2011-03-23 2012-09-26 揖斐电株式会社 电子部件内置电路板及其制造方法
JP2015211097A (ja) * 2014-04-25 2015-11-24 国立研究開発法人産業技術総合研究所 部品内蔵基板
JP2016105453A (ja) * 2014-09-01 2016-06-09 株式会社村田製作所 電子部品内蔵基板
JP2016149484A (ja) * 2015-02-13 2016-08-18 Tdk株式会社 積層コンデンサ
JP2016149487A (ja) * 2015-02-13 2016-08-18 Tdk株式会社 積層コンデンサ
JP2019117957A (ja) * 2019-04-24 2019-07-18 国立研究開発法人産業技術総合研究所 部品内蔵基板

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101497192B1 (ko) 2012-12-27 2015-02-27 삼성전기주식회사 전자부품 내장 인쇄회로기판 및 그 제조방법
CN105379437B (zh) * 2013-08-29 2018-04-27 株式会社村田制作所 部件一体型片的制造方法、内置有电子部件的树脂多层基板的制造方法、以及树脂多层基板

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08144083A (ja) * 1994-11-17 1996-06-04 Taiyo Yuden Co Ltd 電子部品のメッキ後処理方法
JP2002100875A (ja) * 1999-09-02 2002-04-05 Ibiden Co Ltd プリント配線板およびコンデンサ
JP2003282332A (ja) * 2002-03-25 2003-10-03 Murata Mfg Co Ltd セラミック電子部品、及びセラミック電子部品の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4685251B2 (ja) * 2000-02-09 2011-05-18 日本特殊陶業株式会社 配線基板の製造方法
JP4945842B2 (ja) * 2000-04-05 2012-06-06 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
JP4530605B2 (ja) * 2002-02-25 2010-08-25 京セラ株式会社 コンデンサ素子内蔵多層配線基板
JP2005236067A (ja) * 2004-02-20 2005-09-02 Dainippon Printing Co Ltd 配線基板と配線基板の製造方法、および半導パッケージ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08144083A (ja) * 1994-11-17 1996-06-04 Taiyo Yuden Co Ltd 電子部品のメッキ後処理方法
JP2002100875A (ja) * 1999-09-02 2002-04-05 Ibiden Co Ltd プリント配線板およびコンデンサ
JP2003282332A (ja) * 2002-03-25 2003-10-03 Murata Mfg Co Ltd セラミック電子部品、及びセラミック電子部品の製造方法

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011071111A1 (fr) * 2009-12-09 2011-06-16 株式会社村田製作所 Substrat en résine avec composant électronique et module de circuit électronique incorporés
CN102648671A (zh) * 2009-12-09 2012-08-22 株式会社村田制作所 电子部件内置树脂基板及电子电路模块
JP5229401B2 (ja) * 2009-12-09 2013-07-03 株式会社村田製作所 電子部品内蔵樹脂基板および電子回路モジュール
CN102695366A (zh) * 2011-03-23 2012-09-26 揖斐电株式会社 电子部件内置电路板及其制造方法
US9113575B2 (en) 2011-03-23 2015-08-18 Ibiden Co., Ltd. Wiring board with built-in electronic component and method for manufacturing the same
JP2015211097A (ja) * 2014-04-25 2015-11-24 国立研究開発法人産業技術総合研究所 部品内蔵基板
JP2016105453A (ja) * 2014-09-01 2016-06-09 株式会社村田製作所 電子部品内蔵基板
KR20170036772A (ko) * 2014-09-01 2017-04-03 가부시키가이샤 무라타 세이사쿠쇼 전자부품 내장 기판
KR101972797B1 (ko) * 2014-09-01 2019-04-29 가부시키가이샤 무라타 세이사쿠쇼 전자부품 내장 기판
US10356908B2 (en) 2014-09-01 2019-07-16 Murata Manufacturing Co., Ltd. Electronic component containing substrate
JP2016149484A (ja) * 2015-02-13 2016-08-18 Tdk株式会社 積層コンデンサ
JP2016149487A (ja) * 2015-02-13 2016-08-18 Tdk株式会社 積層コンデンサ
CN105895372A (zh) * 2015-02-13 2016-08-24 Tdk株式会社 层叠电容器
CN105895372B (zh) * 2015-02-13 2019-03-29 Tdk株式会社 层叠电容器
JP2019117957A (ja) * 2019-04-24 2019-07-18 国立研究開発法人産業技術総合研究所 部品内蔵基板

Also Published As

Publication number Publication date
JPWO2008155967A1 (ja) 2010-08-26
JP2012019247A (ja) 2012-01-26
JP5007746B2 (ja) 2012-08-22

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