WO2008149876A1 - Chip resistor - Google Patents

Chip resistor Download PDF

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Publication number
WO2008149876A1
WO2008149876A1 PCT/JP2008/060251 JP2008060251W WO2008149876A1 WO 2008149876 A1 WO2008149876 A1 WO 2008149876A1 JP 2008060251 W JP2008060251 W JP 2008060251W WO 2008149876 A1 WO2008149876 A1 WO 2008149876A1
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WIPO (PCT)
Prior art keywords
thick film
electrode
surface electrode
resistor
electrodes
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Application number
PCT/JP2008/060251
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French (fr)
Japanese (ja)
Inventor
Takahiro Matsui
Hisakazu Nagata
Seiji Karasawa
Original Assignee
Koa Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Koa Corporation filed Critical Koa Corporation
Priority to CN200880017675XA priority Critical patent/CN101681702B/en
Publication of WO2008149876A1 publication Critical patent/WO2008149876A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/003Thick film resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C1/00Details
    • H01C1/14Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
    • H01C1/148Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/006Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C17/00Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/02Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistors with envelope or housing

Definitions

  • the present invention relates to a thick film rectangular chip resistor, and more particularly to a configuration of an electrode having improved resistance to sulfur gas.
  • End face electrodes 1 8, 1 9 connecting the thick film upper surface electrodes 1 2, 1 3 and the thick film lower surface electrodes 1 4, 1 5, thick film upper surface electrodes 1 2, 1 2, 1 and 3, and end face electrodes 1 8 and 1 9 and thick film lower surface electrodes 1 4 and 1 5, and metal layers 2 0 and 2 1 are provided.
  • an Ag-based material or an Ag_Pd-based material is generally used as the material for the thick film upper surface electrode 1 2 or 1 3 or the thick film lower surface electrode 1 4 or 1 5.
  • an Ag-based material or an Ag_Pd-based material is generally used as the material for the thick film upper surface electrode 1 2 or 1 3 or the thick film lower surface electrode 1 4 or 1 5.
  • the Ag-based material of the top electrodes 12 and 13 forms silver sulfide, which causes poor continuity and disconnection. There is a problem that it may occur.
  • the following publications have proposed a countermeasure.
  • the second upper surface electrode layer 5 formed using a thick film Ag paste is provided so as to overlap a part of the first upper surface electrode layer 2. Proposed (see summary). Since the second upper surface electrode layer 5 is formed so as to overlap a part of the upper surface of the protective layer 6, the first upper surface electrode layer 2 is not eroded by the sulfide gas and hardly breaks. Is described.
  • a first upper electrode layer 3 made of a silver-based thick film on an alumina substrate 1 and a noble metal thin film completely covering the first upper electrode layer 3 are disclosed. It is proposed to provide a second upper surface electrode layer 4 and a ruthenium-based resistance layer 2 that overlaps a part of the second upper surface electrode layer 4.
  • the noble metal-based thin film uses a gold resinate (column 0 0 10 10), which describes that the sulfidation of the first upper surface electrode layer 3 is prevented.
  • the upper surface electrode protective layer is formed on the upper surface of the upper surface electrode layer 22, which is a lower layer of a portion where the protective layer 40 and the mech layer 26 are in contact with each other. It is proposed that the upper electrode protective layer 23 is formed of a material excellent in sulfur resistance, for example, a silver-based thick film containing 5.0% or more of palladium. Yes. As a result, even if a material with no sulfation resistance is used for the upper electrode layer 22, the upper electrode layer 22 will not be sulfided. It is described that it can be eliminated (column 0 0 0 7).
  • an electrode protective layer that protects an Ag-based electrode from sulfidation in Japanese Patent Application Laid-Open No. 7-166960, the second upper surface electrode layer 5;
  • the second upper surface electrode layer 4 is formed in Japanese Patent No. 1 764 40 2 and the upper surface electrode protective layer 2 3) is formed in Japanese Patent Application Laid-Open No. 2 0 0-02-064 2003. Therefore, since the number of layers of the upper electrode increases, there is a problem that the manufacturing process increases and the manufacturing cost increases. Disclosure of the invention
  • the present invention has been made based on the above-described circumstances, and an object of the present invention is to provide a chip resistor having high resistance to sulfur gas without increasing the number of manufacturing steps.
  • the chip resistor of the present invention includes a pair of thick film upper electrodes disposed on the upper and lower surfaces of the ceramic substrate, a pair of thick film lower electrodes, and a thick film disposed between the pair of thick film upper electrodes.
  • a resistor, a protective film covering the thick film resistor, an end surface electrode connecting the thick film upper surface electrode and the thick film lower surface electrode disposed on an end surface of the ceramic substrate, and the protective film covered In a chip resistor comprising a non-thick film upper electrode portion and a metal layer covering the end face electrode and the thick film lower electrode, the metal material contained in the thick film upper electrode is mainly Ag. It is characterized by further including P d and A u as components.
  • the metal material contained in the thick film upper surface electrode By including P and A as the main component, the forces S and Ag are further enhanced, and the resistance to sulfidation gas is increased, and the sulfidation of the thick film top electrode mainly composed of Ag-based material is extremely advanced. It can suppress well. That is, according to the configuration of the thick film upper surface electrode of the present invention, even when exposed to the sulfurizing atmosphere in the sulfidation test, the thick film upper surface electrode is not even discolored and no change in appearance is recognized. Therefore, it is possible to provide a chip resistor having high resistance to sulfur gas without increasing the number of processes only by changing the composition of the electrode paste material.
  • FIG. 1 is a cross-sectional view of a chip resistor according to an embodiment of the present invention.
  • 2A to 2G are cross-sectional views showing the manufacturing process of the chip resistor.
  • Fig. 3 is a cross-sectional view of a conventional chip resistor.
  • FIG. 1 shows the chip resistor of the present invention
  • FIG. 2 shows the manufacturing process.
  • the same or corresponding members or elements will be described with the same reference numerals.
  • the chip resistor of the present invention is the same as the conventional chip resistor except that the metal material of the thick film upper surface electrodes 2 2 and 2 3 is mainly composed of Ag and further includes P d and A u. It's not different. That is, as shown in FIG. 1, a pair of thick film upper surface electrodes 2 2, 2 3 and a pair of thick film lower surface electrodes 14 4, 15 disposed on the upper and lower surfaces of the alumina ceramic substrate 11 1, and a pair of upper surface electrodes And a ruthenium oxide thick film resistor 16 placed between 2 2 and 2 3.
  • the metal material contained in the thick film upper surface electrodes 2 2 and 2 3 is The main component is Ag. 1 to 15 to 25%, preferably Au force S1 to 20 wt%.
  • the metal material is mainly composed of Ag, and more!
  • An electrode material containing 5 d and A u is used, and for the thick film lower surface electrodes 14 and 15, an Ag-based or Ag-Pd-based electrode material not including A u is used as before.
  • the protective film 17 covering the thick film resistor 16, the thick film upper surface electrodes 2 2, 2 3 and the thick film lower surface electrode 14 disposed on the end surface of the alumina ceramic substrate 11 1, End electrodes 1 8 and 1 9 are connected to 1 5.
  • a coating layer 2 covering the portions of the thick film upper surface electrodes 2 2 and 2 3 that are not covered with the protective film 17, the end surface electrodes 18 and 19, and the thick film lower surface electrodes 14 and 15. 0, 2 1 are provided.
  • the protective film 17 is composed of two layers of a first protective coat 17 a made of a glass-based insulating material and a second protective coat 17 b made of an epoxy resin-based insulating material.
  • the end electrodes 18 and 19 are composed of Ni thin films formed by sputtering.
  • the plating layers 20 and 21 are composed of a base coating layer such as Ni and a plating layer such as Sn.
  • the boundary portion A between the protective film 17 and the plating layer 20 is located on the thick film upper surface electrode 22, and the boundary portion B between the protective film 17 and the coating layer 21 is the upper surface. Located on electrodes 2 3.
  • sulfide gas enters from the boundary portions A and B between the protective film 17 and the plating layers 20 and 21, and the thick film upper surface electrode of the present invention is used to effectively sulfidize the intrusion portion. Can be suppressed.
  • the metal material contained in the thick film upper surface electrodes 2 2 and 2 3 contains Ag as a main component, and? The reason why it is preferable to include 1 to 15 to 25% and an Au force S1 to 20 wt% in terms of improving resistance to sulfur gas will be described. This is based on the experimental results described below.
  • an electrode material paste consisting of 17 to 20 wt% organic component, 2 to 3 wt% glass component, and the remaining metal components shown in the table below is prepared.
  • This electrode material paste is printed and fired on the ceramic substrate of Samples 1-11, heated to approximately 100 ° C in a liquid containing sulfur, and immersed for 300 hours to observe the change. did.
  • the organic components almost disappear during firing, so the mixing ratio of the metal components in the electrode material is shown in the table below.
  • the appearance observation results are as shown in the table below.
  • Sample 1 is Ag 10 0 wt%
  • Sample 2 is Ag 9 5 wt% and P d 5 wt%
  • Sample 3 is Ag 9 0 wt% and P d 1 0 wt%
  • Sample 4 is Ag 85 wt% and P d 15 wt%
  • Sample 5 is Ag 80 wt% and P d 20 wt%.
  • Sample 1 of Ag 1 OO wt% turned quite black in the sulfidation test, and as the ratio of P d increased, the degree of discoloration decreased, but 20 g of P d was added to Ag. Even things are discolored.
  • sample 6 ⁇ L 1 fixes wt% of Pd to 20%, sample 6 is A u 5 wt% and Ag 7 5 wt%, and sample 7 is A u 1 0 wt% and Ag 7 0 wt%, Sample 8 is A ul 5 wt% and Ag 6 5 w t%, sample 9 is A u 2 0 wt% and Ag 6 0 wt%, sample 1 0 is A u 2 5 wt% and Ag 5 5 wt%, and sample 1 1 is A u 3 0 wt% and A g 50 wt%.
  • the blending amount of Pd is preferably 15 to 25 wt%.
  • the metal material of the electrode paste is mainly composed of Ag and Pd force 1
  • the content of 5 to 25 wt% and the Au force of 1 to 20 wt% is preferable from the viewpoint of improving the resistance to sulfur gas.
  • a more preferable range of Au is 3 to 10 wt% as a range in which a sufficient discoloration suppressing effect can be obtained.
  • an alumina ceramic substrate 11 is prepared.
  • one chip resistor is shown, but a multi-layer ceramic substrate is actually used.
  • thick film upper surface electrodes 2 2 and 2 3 and thick film lower surface electrodes 14 and 15 are formed.
  • Thick film upper surface electrodes 2 2 and 2 3 are mainly composed of organic component, glass component and Ag, and contain? (1 to 15 to 25%, Au force l to 20 wt%, the rest
  • An electrode material paste made of a metal component of Ag is prepared, an electrode pattern is formed by screen printing, and then fired, whereas the bottom electrodes 14 and 15 are mounted on the mounting side. This is an electrode and is not affected by the presence of sulfur gas, so prepare an Ag-based electrode material paste that does not contain Au as before, form an electrode pattern by screen printing, and fire it. By forming.
  • a thick film resistor 16 that straddles the thick film upper surface electrodes 2 2 and 2 3 is formed by screen printing and baking a ruthenium oxide paste.
  • the conventional Ag type or A In the case of g—P d-based electrode the Ag component diffuses into the thick film resistor 16 and causes a change in resistance.
  • it is an Ag-based electrode containing A u and P d, A The diffusion of g to the resistor is suppressed, and the change in resistance value can be suppressed.
  • the first protective coat 17a made of a glass material covering the resistor 16 is formed, and the resistance value is adjusted by laser trimming of the resistor 16 as necessary.
  • a second protective coat 17 b made of a resin material such as an epoxy resin is formed. As a result, a protective film 17 composed of the first protective coat 17 a and the second protective coat 17 b is formed.
  • the multi-chip substrate is divided into pieces corresponding to each chip resistor, and as shown in Fig. 2F, the end face electrodes 1 8 and 1 9 are connected to the top face electrodes 2 2 and 2 3 and the bottom face electrode 1 4 , 1 5 and 5 are connected.
  • the end electrodes 18 and 19 are Ni-based thin films formed by sputtering.
  • FIG. 2G the portions of the upper surface electrodes 2 2 and 2 3 that are not covered with the protective film 17, the end surface electrodes 1 8 and 1 9, and the lower surface electrodes 1 4 and 1 5 are covered.
  • the plating layers 2 0 and 2 1 are provided. Thereby, the chip resistor of the present invention is completed.
  • the manufacturing process of the chip resistor of the present invention has conventionally used an Ag-based or Ag-Pd-based electrode material paste, whereas Pd is 15 to 25 wt%, A u
  • the difference is that the electrode material paste composed of a metal component containing 1 to 20 wt% of the material and the balance being Ag is used, and the other points are not changed. Accordingly, it is possible to manufacture a highly resistant chip resistor that does not even cause discoloration of the upper surface electrode with respect to the sulfur gas without increasing the number of processes only by changing the composition of the electrode paste.
  • the present invention employs a material with extremely high resistance to sulfidation for the upper surface electrode, even if it is used in an atmosphere containing sulfur gas, a sulfidation breakage occurs in the upper surface electrode. It can be used for thick film chip resistors that may be used in an atmosphere containing sulfur gas, such as for car electronics, power supplies, and machine tools.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Non-Adjustable Resistors (AREA)
  • Details Of Resistors (AREA)

Abstract

Disclosed is a chip resistor comprising a pair of thick film upper electrodes (22, 23) and a pair of thick film lower electrodes (14, 15) respectively arranged on the upper and lower sides of a ceramic substrate (11), a thick film resistive element (16) arranged over the pair of thick film upper electrodes, a protective film (17) covering the thick film resistive element, end face electrodes (18, 19) arranged on the end faces of the ceramic substrate for connecting the thick film upper electrodes with the thick film lower electrodes, and plating layers (20, 21) covering the portions of the thick film upper electrodes, which are not covered by the protective film, the end face electrodes and the thick film lower electrodes. In this chip resistor, a metal material contained in the thick film upper electrodes (22, 23) is mainly composed of Ag, while further containing Pd and Au.

Description

明細書 チップ抵抗器 技術分野  Specification Chip Resistor Technical Field
本発明は、 厚膜角形チップ抵抗器に係り、 特に硫化ガスに対して耐 性を高めた電極の構成に関する。 背景技術  The present invention relates to a thick film rectangular chip resistor, and more particularly to a configuration of an electrode having improved resistance to sulfur gas. Background art
厚膜角形チップ抵抗器においては、 図 3に示すよ うに、 セラミ ック ス基板 1 1の上下面にそれぞれ配置した一対の厚膜上面電極 1 2, 1 3 と一対の厚膜下面電極 1 4, 1 5 と、 一対の厚膜上面電極 1 2 , 1 3間にまたがって配置した厚膜抵抗体 1 6 と、 抵抗体 1 6を覆う保護 膜 1 7と、セラミ ツクス基板 1 1の端面に配置した厚膜上面電極 1 2 , 1 3 と厚膜下面電極 1 4, 1 5 とを接続する端面電極 1 8 , 1 9 と、 保護膜 1 7に覆われていない厚膜上面電極 1 2, 1 3の部分と端面電 極 1 8 , 1 9 と厚膜下面電極 1 4, 1 5 とを覆うメ ツキ層 2 0, 2 1 とを備えている。  In the thick film square chip resistor, as shown in FIG. 3, a pair of thick film upper surface electrodes 1 2 and 1 3 and a pair of thick film lower surface electrodes 14 disposed on the upper and lower surfaces of the ceramic substrate 11 respectively. , 15, a thick film resistor 16 placed between a pair of thick film upper surface electrodes 1 2, 1 3, a protective film 17 covering the resistor 16, and an end face of the ceramic substrate 11 End face electrodes 1 8, 1 9 connecting the thick film upper surface electrodes 1 2, 1 3 and the thick film lower surface electrodes 1 4, 1 5, thick film upper surface electrodes 1 2, 1 2, 1 and 3, and end face electrodes 1 8 and 1 9 and thick film lower surface electrodes 1 4 and 1 5, and metal layers 2 0 and 2 1 are provided.
厚膜上面電極 1 2, 1 3または厚膜下面電極 1 4, 1 5の材料と し て、 一般に A g系材料または A g _ P d系材料が用いられる。 しかし ながら、 そのよ うな厚膜チップ抵抗器を硫化ガスが含まれる雰囲気で 使用した場合に、 特に上面電極 1 2, 1 3の A g系材料が硫化銀を形 成し、 導通不良や断線が生じる場合があるという課題がある。 そのよ うな課題に対して、 例えば以下の公報等により対応案が提案されてい る。  As the material for the thick film upper surface electrode 1 2 or 1 3 or the thick film lower surface electrode 1 4 or 1 5, an Ag-based material or an Ag_Pd-based material is generally used. However, when such a thick film chip resistor is used in an atmosphere containing sulfide gas, the Ag-based material of the top electrodes 12 and 13 forms silver sulfide, which causes poor continuity and disconnection. There is a problem that it may occur. In response to such issues, for example, the following publications have proposed a countermeasure.
特開平 7— 1 6 9 6 0 1号公報では、 第 1上面電極層 2の一部に重 なるように、 厚膜 A gペース トを用いて形成した第 2上面電極層 5を 設けることが提案されている (要約参照)。 第 2上面電極層 5は、 保護 層 6の上面の一部に重なるよ うに形成されているので、 第 1上面電極 層 2は硫化ガスに浸食されることなく、 断線を起こしにく くなること が記載されている。  In Japanese Patent Application Laid-Open No. 7-1696001, the second upper surface electrode layer 5 formed using a thick film Ag paste is provided so as to overlap a part of the first upper surface electrode layer 2. Proposed (see summary). Since the second upper surface electrode layer 5 is formed so as to overlap a part of the upper surface of the protective layer 6, the first upper surface electrode layer 2 is not eroded by the sulfide gas and hardly breaks. Is described.
特開平 7— 1 7 6 4 0 2号公報では、アルミナ基板 1上の銀系厚膜に よる第一上面電極層 3 と、第一上面電極層 3を完全に覆う貴金属系薄膜 による第二上面電極層 4、第二上面電極層 4の一部に重なるルテニゥム 系の抵抗層 2を設けることが提案されている。ここで、貴金属系薄膜は、 金一レジネートを用いており (0 0 1 0欄)、 これにより第 1上面電極 層 3の硫化が妨げられることが記載されている。 In Japanese Patent Application Laid-Open No. 7-1764020, a first upper electrode layer 3 made of a silver-based thick film on an alumina substrate 1 and a noble metal thin film completely covering the first upper electrode layer 3 are disclosed. It is proposed to provide a second upper surface electrode layer 4 and a ruthenium-based resistance layer 2 that overlaps a part of the second upper surface electrode layer 4. Here, the noble metal-based thin film uses a gold resinate (column 0 0 10 10), which describes that the sulfidation of the first upper surface electrode layer 3 is prevented.
特開 2 0 0 2— 0 6 4 0 0 3号公報では、保護層 4 0 とメ ッキ層 2 6 の接する部分の下層であって、 上面電極層 2 2の上面に、 上面電極保護 層 2 3が形成され、 この上面電極保護層 2 3は、 耐硫化特性に優れた材 質、 例えば、 パラジウムが 5 . 0 %以上含有した銀系厚膜により形成さ れていることが提案されている。 これにより、 上面電極層 2 2に、 耐硫 化特性のない材質を使用しても、上面電極層 2 2が硫化されることがな いので、断線等チップ抵抗器の故障を引き起こす危険性をなくすことが できることが記載されている (0 0 0 7欄) 。  In Japanese Patent Laid-Open No. 2 0 0 2-0 6 4 0 0 3, the upper surface electrode protective layer is formed on the upper surface of the upper surface electrode layer 22, which is a lower layer of a portion where the protective layer 40 and the mech layer 26 are in contact with each other. It is proposed that the upper electrode protective layer 23 is formed of a material excellent in sulfur resistance, for example, a silver-based thick film containing 5.0% or more of palladium. Yes. As a result, even if a material with no sulfation resistance is used for the upper electrode layer 22, the upper electrode layer 22 will not be sulfided. It is described that it can be eliminated (column 0 0 0 7).
しかしながら、 上記公報に記載の方法では、 いずれも A g系の電極 を硫化から保護する電極保護層 (特開平 7 - 1 6 9 6 0 1号公報では 第 2上面電極層 5、 特開平 7 - 1 7 6 4 0 2号公報では第 2上面電極 層 4、 特開 2 0 0 2— 0 6 4 0 0 3号公報では上面電極保護層 2 3 ) を形成するものである。 従って、 上面電極の層数が増えるため、 製造 工程が増えてしまい、 製造コス トが上昇するという課題がある。 発明の開示  However, in any of the methods described in the above publications, an electrode protective layer that protects an Ag-based electrode from sulfidation (in Japanese Patent Application Laid-Open No. 7-166960, the second upper surface electrode layer 5; The second upper surface electrode layer 4 is formed in Japanese Patent No. 1 764 40 2 and the upper surface electrode protective layer 2 3) is formed in Japanese Patent Application Laid-Open No. 2 0 0-02-064 2003. Therefore, since the number of layers of the upper electrode increases, there is a problem that the manufacturing process increases and the manufacturing cost increases. Disclosure of the invention
本発明は上述した事情に基づいてなされたもので、 製造工程を増加 させることなく、 硫化ガスに対して高い耐性を有するチップ抵抗器を 提供することを目的とする。  The present invention has been made based on the above-described circumstances, and an object of the present invention is to provide a chip resistor having high resistance to sulfur gas without increasing the number of manufacturing steps.
本発明のチップ抵抗器は、 セラミ ツクス基板の上下面にそれぞれ配 置した一対の厚膜上面電極と、 一対の厚膜下面電極と、 前記一対の厚 膜上面電極間にまたがって配置した厚膜抵抗体と、 前記厚膜抵抗体を 覆う保護膜と、 前記セラミ ックス基板の端面に配置した前記厚膜上面 電極と前記厚膜下面電極とを接続する端面電極と、 前記保護膜に覆わ れていない前記厚膜上面電極の部分と前記端面電極と前記厚膜下面電 極とを覆うメ ツキ層とを備えたチップ抵抗器において、 前記厚膜上面 電極に含まれる金属材料が、 A gを主成分と し、 更に P d と A uを含 むことを特徴とする。  The chip resistor of the present invention includes a pair of thick film upper electrodes disposed on the upper and lower surfaces of the ceramic substrate, a pair of thick film lower electrodes, and a thick film disposed between the pair of thick film upper electrodes. A resistor, a protective film covering the thick film resistor, an end surface electrode connecting the thick film upper surface electrode and the thick film lower surface electrode disposed on an end surface of the ceramic substrate, and the protective film covered In a chip resistor comprising a non-thick film upper electrode portion and a metal layer covering the end face electrode and the thick film lower electrode, the metal material contained in the thick film upper electrode is mainly Ag. It is characterized by further including P d and A u as components.
本発明のチップ抵抗器によれば、 厚膜上面電極に含まれる金属材料 力 S、 A gを主成分と し、 更に P dと A uを含むことで、 .硫化ガスに対 する耐性を高め、 A g系材料を主体とする厚膜上面電極の硫化の進行 をきわめて良好に抑制することができる。 すなわち、 本発明の厚膜上 面電極の構成によれば、 硫化試験において硫化雰囲気に曝しても、 厚 膜上面電極に変色すら生ぜず、外観上の変化が認められない。従って、 電極ペース ト材料の組成を変更するのみで、 工程を増加させることな く、 硫化ガスに対して高い耐性を有するチップ抵抗器を提供すること ができる。 According to the chip resistor of the present invention, the metal material contained in the thick film upper surface electrode By including P and A as the main component, the forces S and Ag are further enhanced, and the resistance to sulfidation gas is increased, and the sulfidation of the thick film top electrode mainly composed of Ag-based material is extremely advanced. It can suppress well. That is, according to the configuration of the thick film upper surface electrode of the present invention, even when exposed to the sulfurizing atmosphere in the sulfidation test, the thick film upper surface electrode is not even discolored and no change in appearance is recognized. Therefore, it is possible to provide a chip resistor having high resistance to sulfur gas without increasing the number of processes only by changing the composition of the electrode paste material.
また、 厚膜抵抗体の焼成に際して、 通常の A g系または A g— P d 系電極であると、 厚膜抵抗体の部分に A g成分が拡散し、 抵抗値変化 の原因になるが、 A uと P dを含む A g系電極であると、 A gの厚膜 抵抗体への拡散が抑制され、 抵抗値変化を抑制できる。 従って、 電極 ペース ト材料の組成を変更するのみで、 抵抗値の高い安定性を有する チップ抵抗器を提供することができる。 図面の簡単な説明  Also, when firing a thick film resistor, if it is a normal Ag-based or Ag-Pd-based electrode, the Ag component diffuses into the thick film resistor, causing a change in resistance value. In the case of an Ag-based electrode containing A u and P d, diffusion of Ag into the thick film resistor is suppressed, and a change in resistance value can be suppressed. Therefore, it is possible to provide a chip resistor having high resistance value stability only by changing the composition of the electrode paste material. Brief Description of Drawings
図 1は、 本発明の一実施形態のチップ抵抗器の断面図である。 FIG. 1 is a cross-sectional view of a chip resistor according to an embodiment of the present invention.
図 2 A乃至図 2 Gは、 上記チップ抵抗器の製造工程を示す断面図であ る。 2A to 2G are cross-sectional views showing the manufacturing process of the chip resistor.
図 3は、 従来のチップ抵抗器の断面図である。 発明を実施するための最良の形態 Fig. 3 is a cross-sectional view of a conventional chip resistor. BEST MODE FOR CARRYING OUT THE INVENTION
以下、本発明の一実施形態について、添付図面を参照して説明する。 図 1は本発明のチップ抵抗器を示し、 図 2はその製造工程を示す。 な お、 各図中、 同一または相当する部材または要素には、 同一の符号を 付して説明する。  Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 1 shows the chip resistor of the present invention, and FIG. 2 shows the manufacturing process. In the drawings, the same or corresponding members or elements will be described with the same reference numerals.
本発明のチップ抵抗器は、 厚膜上面電極 2 2, 2 3の金属材料が A gを主成分と し、 更に P dと A uを含む点を除いて、 従来技術のチッ プ抵抗器と異なるものではない。 すなわち、 図 1に示すように、 アル ミナセラミ ツタス基板 1 1の上下面に配置した一対の厚膜上面電極 2 2, 2 3と一対の厚膜下面電極 1 4, 1 5と、 一対の上面電極 2 2, 2 3間にまたがって配置した酸化ルテニウム系厚膜抵抗体 1 6とを備 えている。 ここで、 厚膜上面電極 2 2 , 2 3に含まれる金属材料が、 A gを主成分と し、 ? 1カ 1 5〜2 5 %、 A u力 S l〜2 0 w t % 含まれることが好ましい。 このよ うに、 坻 ^体 1 6 と直接接続される 上面電極 2 2 , 2 3にのみ、 金属材料が、 A gを主成分と し、 更に!5 d と A uを含む電極材料を用い、 厚膜下面電極 1 4 , 1 5には、 従来 どおり A uを含まない A g系または A g— P d系の電極材料が用いら れる。 The chip resistor of the present invention is the same as the conventional chip resistor except that the metal material of the thick film upper surface electrodes 2 2 and 2 3 is mainly composed of Ag and further includes P d and A u. It's not different. That is, as shown in FIG. 1, a pair of thick film upper surface electrodes 2 2, 2 3 and a pair of thick film lower surface electrodes 14 4, 15 disposed on the upper and lower surfaces of the alumina ceramic substrate 11 1, and a pair of upper surface electrodes And a ruthenium oxide thick film resistor 16 placed between 2 2 and 2 3. Here, the metal material contained in the thick film upper surface electrodes 2 2 and 2 3 is The main component is Ag. 1 to 15 to 25%, preferably Au force S1 to 20 wt%. In this way, only the upper surface electrodes 2 2 and 2 3 that are directly connected to the 体 ^ body 1 6, the metal material is mainly composed of Ag, and more! An electrode material containing 5 d and A u is used, and for the thick film lower surface electrodes 14 and 15, an Ag-based or Ag-Pd-based electrode material not including A u is used as before.
さらに、 このチップ抵抗器では、 厚膜抵抗体 1 6を覆う保護膜 1 7 と、 アルミナセラミ ックス基板 1 1の端面に配置した厚膜上面電極 2 2, 2 3 と厚膜下面電極 1 4, 1 5 とを接続する端面電極 1 8, 1 9 とを備える。 また、 保護膜 1 7に覆われていない厚膜上面電極 2 2 , 2 3の部分と、 端面電極 1 8, 1 9 と、 厚膜下面電極 1 4, 1 5 とを 被覆するメ ツキ層 2 0, 2 1 とを備える。 保護膜 1 7は、 ガラス系絶 縁材料の第 1保護コート 1 7 a と、 エポキシ樹脂系絶縁材料の第 2保 護コート 1 7 b との二層から構成される。 端面電極 1 8, 1 9は、 ス パッタリ ングにより形成した N i の薄膜から構成される。 メ ツキ層 2 0, 2 1は、 N i等の下地メ ツキ層と S n等のメ ツキ層とから構成さ れる。  Further, in this chip resistor, the protective film 17 covering the thick film resistor 16, the thick film upper surface electrodes 2 2, 2 3 and the thick film lower surface electrode 14 disposed on the end surface of the alumina ceramic substrate 11 1, End electrodes 1 8 and 1 9 are connected to 1 5. In addition, a coating layer 2 covering the portions of the thick film upper surface electrodes 2 2 and 2 3 that are not covered with the protective film 17, the end surface electrodes 18 and 19, and the thick film lower surface electrodes 14 and 15. 0, 2 1 are provided. The protective film 17 is composed of two layers of a first protective coat 17 a made of a glass-based insulating material and a second protective coat 17 b made of an epoxy resin-based insulating material. The end electrodes 18 and 19 are composed of Ni thin films formed by sputtering. The plating layers 20 and 21 are composed of a base coating layer such as Ni and a plating layer such as Sn.
従って、 図示するように、 保護膜 1 7 とメ ツキ層 2 0の境界部分 A が厚膜上面電極 2 2上に位置し、 保護膜 1 7 とメ ツキ層 2 1の境界部 分 Bが上面電極 2 3上に位置する。 これにより、 保護膜 1 7 とメ ツキ 層 2 0, 2 1の境界部分 A, Bから硫化ガスが浸入するが、 その浸入 部分に本発明の厚膜上面電極を用いることで、 効果的に硫化の進行を 抑制することができる。  Therefore, as shown in the figure, the boundary portion A between the protective film 17 and the plating layer 20 is located on the thick film upper surface electrode 22, and the boundary portion B between the protective film 17 and the coating layer 21 is the upper surface. Located on electrodes 2 3. As a result, sulfide gas enters from the boundary portions A and B between the protective film 17 and the plating layers 20 and 21, and the thick film upper surface electrode of the present invention is used to effectively sulfidize the intrusion portion. Can be suppressed.
次に、 厚膜上面電極 2 2 , 2 3に含まれる金属材料が、 A gを主成 分と し、 ? 1カ 1 5〜2 5 % 、 A u力 S l〜2 0 w t %含まれるこ とが硫化ガスに対する耐性向上の点で好ましい根拠について説明する。 これは以下に述べる実験結果に基づく ものである。  Next, the metal material contained in the thick film upper surface electrodes 2 2 and 2 3 contains Ag as a main component, and? The reason why it is preferable to include 1 to 15 to 25% and an Au force S1 to 20 wt% in terms of improving resistance to sulfur gas will be described. This is based on the experimental results described below.
まず、 上面電極材料と して、 有機成分 1 7〜 2 0 w t %とガラス成 分 2〜3 w t %と残部下表の金属成分からなる電極材料ペース トを準 備する。 この電極材料ペース トを試料 1〜 1 1のセラミ ックス基板上 に印刷焼成し、 硫黄が含まれる液体中で約 1 0 0°Cに加熱し、 3 0 0 0時間浸漬してその変化を観察した。 なお、 有機成分は焼成時にほと んど消失するので、 電極材料における金属成分の配合割合は、 下表の とおり となり、 外観の観察結果も下表のとおりである First, as the upper electrode material, an electrode material paste consisting of 17 to 20 wt% organic component, 2 to 3 wt% glass component, and the remaining metal components shown in the table below is prepared. This electrode material paste is printed and fired on the ceramic substrate of Samples 1-11, heated to approximately 100 ° C in a liquid containing sulfur, and immersed for 300 hours to observe the change. did. The organic components almost disappear during firing, so the mixing ratio of the metal components in the electrode material is shown in the table below. The appearance observation results are as shown in the table below.
[表 1 ] 電極材料における金属成分の配合割合と硫化試験結果  [Table 1] Mixing ratio of metal components in electrode materials and sulfidation test results
Figure imgf000007_0001
Figure imgf000007_0001
試料 1は A g 1 0 0 w t %であり、 試料 2は A g 9 5 w t %と P d 5 w t %であり、 試料 3は A g 9 0 w t %と P d 1 0 w t %であり、 試料 4は A g 8 5 w t %と P d 1 5 w t %であり、 試料 5は A g 8 0 w t %と P d 2 0 w t %である。試料 1の A g 1 O O w t %のものは、 硫化試験でかなり黒く変色し、 P dの比率が上昇するに従い、 変色の 程度は薄くなるが、 A gに P dを 2 0 w t %配合したものでも、 変色 が生じている。 Sample 1 is Ag 10 0 wt%, Sample 2 is Ag 9 5 wt% and P d 5 wt%, Sample 3 is Ag 9 0 wt% and P d 1 0 wt%, Sample 4 is Ag 85 wt% and P d 15 wt%, and Sample 5 is Ag 80 wt% and P d 20 wt%. Sample 1 of Ag 1 OO wt% turned quite black in the sulfidation test, and as the ratio of P d increased, the degree of discoloration decreased, but 20 g of P d was added to Ag. Even things are discolored.
これに対して、 試料 6〜: L 1は、 P dの w t %を 2 0 %に固定し、 試料 6は A u 5 w t %と A g 7 5 w t %であり、 試料 7は A u 1 0 w t %と A g 7 0 w t %であり、 試料 8は A u l 5 w t %と A g 6 5 w t %であり、 試料 9は A u 2 0 w t %と A g 6 0 w t %であり、 試料 1 0は A u 2 5 w t %と A g 5 5 w t %であり、 試料 1 1は A u 3 0 w t %と A g 5 0 w t %である。 A uを 5 w t %含む試料 6では、 同 じ P d 2 0 w t %の試料 5 と比較して、 変色が著しく低減した。 すな わち、 A uを配合することで、 変色を抑制できることが判明した。 A uを 5 w t %より も少なく した試料は示していないが、 A uを配合し ていれば変色の抑制効果があるため、 A uは 1 w t %以上含まれてい ればよい。 On the other hand, sample 6 ~: L 1 fixes wt% of Pd to 20%, sample 6 is A u 5 wt% and Ag 7 5 wt%, and sample 7 is A u 1 0 wt% and Ag 7 0 wt%, Sample 8 is A ul 5 wt% and Ag 6 5 w t%, sample 9 is A u 2 0 wt% and Ag 6 0 wt%, sample 1 0 is A u 2 5 wt% and Ag 5 5 wt%, and sample 1 1 is A u 3 0 wt% and A g 50 wt%. In sample 6 containing 5 wt% of Au, the discoloration was remarkably reduced compared to sample 5 of the same P d 20 wt%. In other words, it was found that discoloration can be suppressed by adding Au. A sample with less than 5 wt% of Au is not shown, but if it is mixed with Au, there is an effect of suppressing discoloration, so it is sufficient that Au is contained in an amount of 1 wt% or more.
また、 A uを 2 0 w t %以上配合しても、 変色に大きな改善が見ら れないため、 主に材料コス トの観点から、 A uは 2 0 w t %以下とす ることが好ましい。 また、 上記の硫化試験の結果から、 P dの配合量 は 1 5〜 2 5 w t %が好ましく、 係る観点から、 電極ペース トの金属 材料が、 A gを主成分と し、 P d力 1 5〜 2 5 w t %、 A u力 1〜 2 0 w t %含まれることが硫化ガスに対する耐性向上の点で好ましい。 更に、 材料コス トの観点等から、 十分な変色抑制効果が得られる範囲 と して、 より好ましい A uの配合範囲は 3〜 1 0 w t %である。  Further, since no significant improvement in discoloration can be seen even if 20 wt% or more of Au is blended, it is preferable that A u is 20 wt% or less mainly from the viewpoint of material cost. Further, from the result of the above sulfidation test, the blending amount of Pd is preferably 15 to 25 wt%. From this viewpoint, the metal material of the electrode paste is mainly composed of Ag and Pd force 1 The content of 5 to 25 wt% and the Au force of 1 to 20 wt% is preferable from the viewpoint of improving the resistance to sulfur gas. Furthermore, from the viewpoint of material cost and the like, a more preferable range of Au is 3 to 10 wt% as a range in which a sufficient discoloration suppressing effect can be obtained.
次に、 図 2 A乃至図 2 Gを参照して、 本発明のチップ抵抗器の製造 工程について説明する。  Next, a manufacturing process of the chip resistor of the present invention will be described with reference to FIGS. 2A to 2G.
まず、 図 2 Aに示すよ うに、 アルミナセラミ ッタス基板 1 1 を準備 する。 図示の例はチップ抵抗器 1個分を示すが、 実際には多数個取り のセラミ ックス基板が用いられる。 次に、 図 2 Bに示すよ うに、 厚膜 上面電極 2 2 , 2 3および厚膜下面電極 1 4 , 1 5を形成する。 厚膜 上面電極 2 2 , 2 3は、 有機成分とガラス成分と A gを主成分と し、 ? (1カ 1 5〜 2 5 %、 A u力 l〜 2 0 w t %含まれ、 残部が A g である金属成分からなる電極材料ペース トを準備し、 スク リ ーン印刷 により電極パターンを形成し、 焼成することで形成する。 これに対し て、 下面電極 1 4 , 1 5は実装側の電極であり、 硫化ガスが存在して もその影響を受けないので、 従来どおり A uを含まない A g系の電極 材料ペース トを準備し、スク リーン印刷により電極パターンを形成し、 焼成することで形成する。  First, as shown in FIG. 2A, an alumina ceramic substrate 11 is prepared. In the example shown, one chip resistor is shown, but a multi-layer ceramic substrate is actually used. Next, as shown in FIG. 2B, thick film upper surface electrodes 2 2 and 2 3 and thick film lower surface electrodes 14 and 15 are formed. Thick film upper surface electrodes 2 2 and 2 3 are mainly composed of organic component, glass component and Ag, and contain? (1 to 15 to 25%, Au force l to 20 wt%, the rest An electrode material paste made of a metal component of Ag is prepared, an electrode pattern is formed by screen printing, and then fired, whereas the bottom electrodes 14 and 15 are mounted on the mounting side. This is an electrode and is not affected by the presence of sulfur gas, so prepare an Ag-based electrode material paste that does not contain Au as before, form an electrode pattern by screen printing, and fire it. By forming.
次に、 図 2 Cに示すように、 酸化ルテニウム系ペース トをスク リー ン印刷し、 焼成することで、 厚膜上面電極 2 2 , 2 3にまたがる厚膜 抵抗体 1 6を形成する。 焼成に際して、 従来どおりの A g系または A g— P d系電極であると、厚膜抵抗体 1 6の部分に A g成分が拡散し、 抵抗値変化の原因になるが、 A u と P dを含む A g系電極であると A gの抵抗体への拡散が抑制され、 抵抗値変化を抑制できる。 Next, as shown in FIG. 2C, a thick film resistor 16 that straddles the thick film upper surface electrodes 2 2 and 2 3 is formed by screen printing and baking a ruthenium oxide paste. When firing, the conventional Ag type or A In the case of g—P d-based electrode, the Ag component diffuses into the thick film resistor 16 and causes a change in resistance. However, if it is an Ag-based electrode containing A u and P d, A The diffusion of g to the resistor is suppressed, and the change in resistance value can be suppressed.
次に、 図 2 Dに示すように、 抵抗体 1 6を覆うガラス材料からなる 第 1保護コート 1 7 aを形成し、 必要に応じて抵抗体 1 6のレーザト リ ミングにより抵抗値を調整する。 さ らに、 図 2 Eに示すように、 ェ ポキシ樹脂等の樹脂材料からなる第 2保護コート 1 7 bを形成する。 これにより、 第 1保護コー ト 1 7 a と第 2保護コート 1 7 b とからな る保護膜 1 7が形成される。  Next, as shown in FIG. 2D, the first protective coat 17a made of a glass material covering the resistor 16 is formed, and the resistance value is adjusted by laser trimming of the resistor 16 as necessary. . Further, as shown in FIG. 2E, a second protective coat 17 b made of a resin material such as an epoxy resin is formed. As a result, a protective film 17 composed of the first protective coat 17 a and the second protective coat 17 b is formed.
次に、 多数個取り基板を各チップ抵抗器に対応した個片に分割し、 図 2 Fに示すように、 端面電極 1 8, 1 9を上面電極 2 2, 2 3 と下 面電極 1 4 , 1 5 とに接続するよ うに形成する。 端面電極 1 8, 1 9 は、 N i 系薄膜をスパッタリ ングにより形成したものである。さ らに、 図 2 Gに示すように、 保護膜 1 7に覆われていない上面電極 2 2 , 2 3の部分と端面電極 1 8, 1 9 と下面電極 1 4 , 1 5 とを被覆するメ ツキ層 2 0 , 2 1を設ける。 これにより、 本発明のチップ抵抗器が完 成する。  Next, the multi-chip substrate is divided into pieces corresponding to each chip resistor, and as shown in Fig. 2F, the end face electrodes 1 8 and 1 9 are connected to the top face electrodes 2 2 and 2 3 and the bottom face electrode 1 4 , 1 5 and 5 are connected. The end electrodes 18 and 19 are Ni-based thin films formed by sputtering. Furthermore, as shown in FIG. 2G, the portions of the upper surface electrodes 2 2 and 2 3 that are not covered with the protective film 17, the end surface electrodes 1 8 and 1 9, and the lower surface electrodes 1 4 and 1 5 are covered. The plating layers 2 0 and 2 1 are provided. Thereby, the chip resistor of the present invention is completed.
この本発明のチップ抵抗器の製造工程は、 従来は A g系または A g - P d系の電極材料ペース トを用いていたのに対し、 P dが 1 5〜 2 5 w t %、 A uが 1〜 2 0 w t %含まれ、 残部が A gである金属成分 からなる電極材料ペース トを用いる点が相違するのみで、 その他の点 では変わるものではない。従って、電極ペース トの組成の変更のみで、 工程数を増加させることなく、 硫化ガスに対して上面電極に変色すら 生じない耐性の高いチップ抵抗器を製造することが可能となる。  The manufacturing process of the chip resistor of the present invention has conventionally used an Ag-based or Ag-Pd-based electrode material paste, whereas Pd is 15 to 25 wt%, A u However, the difference is that the electrode material paste composed of a metal component containing 1 to 20 wt% of the material and the balance being Ag is used, and the other points are not changed. Accordingly, it is possible to manufacture a highly resistant chip resistor that does not even cause discoloration of the upper surface electrode with respect to the sulfur gas without increasing the number of processes only by changing the composition of the electrode paste.
なお、硫化試験のデータは、試料 1〜 1 1のものについてであるが、 本発明者等はその他にも多数の試験を行っており、 これらの経験から 本発明が導き出されたことを付言する次第である。  The data for the sulfidation test are for samples 1-11, but the inventors have conducted many other tests and add that the present invention was derived from these experiences. It depends on you.
これまで本発明の一実施形態について説明したが、 本発明は上述の 実施形態に限定されず、 その技術的思想の範囲内において種々異なる 形態にて実施されてよいことは言うまでもない。 産業上の利用可能性  Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea. Industrial applicability
本発明は、上面電極に極めて耐硫化性の高い材料を採用しているため、 硫化ガスが含まれる雰囲気で使用されても、上面電極には硫化断線が生 ぜず、 カーエレク トロ二タス、 電源、 工作機械等の用途などの硫化ガス が含まれる雰囲気で使用される可能性がある厚膜チップ抵抗器に利用 可能である。 Since the present invention employs a material with extremely high resistance to sulfidation for the upper surface electrode, even if it is used in an atmosphere containing sulfur gas, a sulfidation breakage occurs in the upper surface electrode. It can be used for thick film chip resistors that may be used in an atmosphere containing sulfur gas, such as for car electronics, power supplies, and machine tools.

Claims

請求の範囲 The scope of the claims
1 . セラミ ツクス基板の上下面にそれぞれ配置した一対の厚膜上面 電極と、 一対の厚膜下面電極と、 1. a pair of thick film upper surface electrodes respectively disposed on the upper and lower surfaces of the ceramic substrate; a pair of thick film lower surface electrodes;
前記一対の厚膜上面電極間にまたがって配置した厚膜抵抗体と、 前記厚膜抵抗体を覆う保護膜と、  A thick film resistor disposed between the pair of thick film upper surface electrodes, a protective film covering the thick film resistor,
前記セラミ ックス基板の端面に配置した前記厚膜上面電極と前記厚 膜下面電極とを接続する端面電極と、  An end surface electrode connecting the thick film upper surface electrode and the thick film lower surface electrode disposed on the end surface of the ceramic substrate;
前記保護膜に覆われていない前記厚膜上面電極の部分と前記端面電 極と前記厚膜下面電極とを覆うメ ツキ層とを備え、  A portion of the thick film upper surface electrode not covered with the protective film, a metal layer covering the end face electrode and the thick film lower surface electrode;
前記厚膜上面電極に含まれる金属材料が、 A gを主成分と し、 更に P d と A uを含むことを特徴とするチップ抵抗器。  The chip resistor, wherein the metal material contained in the thick film upper surface electrode contains Ag as a main component and further contains P d and Au.
2 . 前記保護膜と前記メ ツキ層の境界部分が、 前記厚膜上面電極の 上に位置することを特徴とする請求項 1記載のチップ抵抗器。 2. The chip resistor according to claim 1, wherein a boundary portion between the protective film and the plating layer is located on the thick film upper surface electrode.
3 . 前記厚膜上面電極に含まれる金属材料が、 P dが 1 5〜 2 5 w t %、 A uが 1〜 2 0 w t %、 残部が A gであることを特徴とする請 求項 1記載のチップ抵抗器。 3. The metal material contained in the thick film upper surface electrode is characterized in that Pd is 15 to 25 wt%, A u is 1 to 20 wt%, and the balance is Ag. Chip resistor described.
4 . 前記厚膜抵抗体と直接接続される前記厚膜上面電極にのみ、 金 属材料が、 A gを主成分と し、 さらに P d と A uを含む電極材料を用 いたことを特徴とする請求項 1記載のチップ抵抗器。 4. Only for the thick film upper surface electrode directly connected to the thick film resistor, the metal material is made of an electrode material containing Ag as a main component and further containing P d and Au. The chip resistor according to claim 1.
5. セラミ ックス基板に、 ? (1カ 1 5〜 2 5 %、 A u力 1〜 2 0 w t %含まれ、 残部が A gである金属成分からなる電極材料ペース トを用いて厚膜上面電極を形成し、 5. On the ceramic substrate? (Thick film upper electrode is formed using an electrode material paste made of a metal component containing 1 to 15 to 25%, Au force of 1 to 20 wt%, and the balance being Ag.
A uを含まない A g系の電極材料ペース トを用いて厚膜下面電極を 形成し、  A thick film bottom electrode is formed using an Ag electrode paste that does not contain Au,
酸化ルテニウム系ペース トを用いて、 前記厚膜上面電極にまたがる 厚膜抵抗体を形成し、  Using a ruthenium oxide paste, a thick film resistor is formed across the thick film upper surface electrode,
前記厚膜抵抗体を覆う保護膜を形成し、  Forming a protective film covering the thick film resistor;
前記厚膜上面電極と前記厚膜下面電極とに接続するように、 端面電 極を形成し、 前記端面電極は N i 系薄膜をスパッタ リ ングにより形成 し、  An end face electrode is formed so as to be connected to the thick film upper surface electrode and the thick film lower surface electrode, and the end face electrode is formed by forming a Ni-based thin film by sputtering,
前記保護膜に覆われていない前記厚膜上面電極の部分と前記端面電 極と前記厚膜下面電極とを覆うメ ッキ層を形成することを特徴とする 抵抗器の製造方法。  A method of manufacturing a resistor, comprising: forming a mech layer covering a portion of the thick film upper surface electrode not covered with the protective film, the end face electrode, and the thick film lower surface electrode.
PCT/JP2008/060251 2007-05-31 2008-05-28 Chip resistor WO2008149876A1 (en)

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