WO2008123289A1 - Film de nitrure de silicium et dispositif de mémoire non volatile à semi-conducteurs - Google Patents

Film de nitrure de silicium et dispositif de mémoire non volatile à semi-conducteurs Download PDF

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Publication number
WO2008123289A1
WO2008123289A1 PCT/JP2008/055679 JP2008055679W WO2008123289A1 WO 2008123289 A1 WO2008123289 A1 WO 2008123289A1 JP 2008055679 W JP2008055679 W JP 2008055679W WO 2008123289 A1 WO2008123289 A1 WO 2008123289A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon nitride
nitride film
memory device
semiconductor memory
plasma
Prior art date
Application number
PCT/JP2008/055679
Other languages
English (en)
Japanese (ja)
Inventor
Seiichi Miyazaki
Masayuki Kohno
Tatsuo Nishita
Toshio Nakanishi
Yoshihiro Hirota
Original Assignee
Tokyo Electron Limited
Hiroshima University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2007254273A external-priority patent/JP2008270706A/ja
Application filed by Tokyo Electron Limited, Hiroshima University filed Critical Tokyo Electron Limited
Priority to CN200880009852XA priority Critical patent/CN101641783B/zh
Priority to US12/532,681 priority patent/US20100140683A1/en
Publication of WO2008123289A1 publication Critical patent/WO2008123289A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

La présente invention concerne un film de nitrure de silicium présentant d'excellentes performances de stockage de charge et efficace comme couche de stockage de charge pour un dispositif de mémoire à semi-conducteurs. Le film de nitrure de silicium, qui a une densité de pièges sensiblement uniforme dans le sens de l'épaisseur du film, présente de hautes performances de stockage de charge. Le film de nitrure de silicium est formé par CVD par plasma à l'aide d'un appareil de traitement par plasma (100) dans lequel des micro-ondes sont introduites dans une chambre (1) par une antenne plate (31) comportant une pluralité de trous. Le plasma est généré par les micro-ondes en introduisant dans la chambre (1) un gaz de matière qui contient un composé contenant de l'azote et un composé contenant du silicium, puis le film de nitrure de silicium est déposé sur la surface d'un corps devant être traitée par le plasma.
PCT/JP2008/055679 2007-03-26 2008-03-26 Film de nitrure de silicium et dispositif de mémoire non volatile à semi-conducteurs WO2008123289A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN200880009852XA CN101641783B (zh) 2007-03-26 2008-03-26 氮化硅膜和非易失性半导体存储器件
US12/532,681 US20100140683A1 (en) 2007-03-26 2008-03-26 Silicon nitride film and nonvolatile semiconductor memory device

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007079852 2007-03-26
JP2007-079852 2007-03-26
JP2007254273A JP2008270706A (ja) 2007-03-26 2007-09-28 窒化珪素膜および不揮発性半導体メモリ装置
JP2007-254273 2007-09-28

Publications (1)

Publication Number Publication Date
WO2008123289A1 true WO2008123289A1 (fr) 2008-10-16

Family

ID=39830777

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/055679 WO2008123289A1 (fr) 2007-03-26 2008-03-26 Film de nitrure de silicium et dispositif de mémoire non volatile à semi-conducteurs

Country Status (1)

Country Link
WO (1) WO2008123289A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010113928A1 (fr) * 2009-03-31 2010-10-07 東京エレクトロン株式会社 Procédé de formation d'un film de nitrure de silicium, procédé de fabrication d'un dispositif de mémoire à semi-conducteur et appareil de dépôt en phase vapeur assisté par plasma
US8198671B2 (en) * 2009-04-22 2012-06-12 Applied Materials, Inc. Modification of charge trap silicon nitride with oxygen plasma

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1140682A (ja) * 1997-07-18 1999-02-12 Sony Corp 不揮発性半導体記憶装置及びその製造方法
WO2001069665A1 (fr) * 2000-03-13 2001-09-20 Tadahiro Ohmi Procede de formation de pellicule dielectrique
JP2004214506A (ja) * 2003-01-07 2004-07-29 Sony Corp 不揮発性半導体メモリ装置の動作方法
JP2004235519A (ja) * 2003-01-31 2004-08-19 Renesas Technology Corp 不揮発性半導体記憶装置
JP2004241781A (ja) * 2003-02-07 2004-08-26 Samsung Electronics Co Ltd メモリ機能を有する単電子トランジスタおよびその製造方法
JP2005347679A (ja) * 2004-06-07 2005-12-15 Renesas Technology Corp 不揮発性半導体記憶装置の製造方法
JP2006190990A (ja) * 2004-12-10 2006-07-20 Toshiba Corp 半導体装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1140682A (ja) * 1997-07-18 1999-02-12 Sony Corp 不揮発性半導体記憶装置及びその製造方法
WO2001069665A1 (fr) * 2000-03-13 2001-09-20 Tadahiro Ohmi Procede de formation de pellicule dielectrique
JP2004214506A (ja) * 2003-01-07 2004-07-29 Sony Corp 不揮発性半導体メモリ装置の動作方法
JP2004235519A (ja) * 2003-01-31 2004-08-19 Renesas Technology Corp 不揮発性半導体記憶装置
JP2004241781A (ja) * 2003-02-07 2004-08-26 Samsung Electronics Co Ltd メモリ機能を有する単電子トランジスタおよびその製造方法
JP2005347679A (ja) * 2004-06-07 2005-12-15 Renesas Technology Corp 不揮発性半導体記憶装置の製造方法
JP2006190990A (ja) * 2004-12-10 2006-07-20 Toshiba Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010113928A1 (fr) * 2009-03-31 2010-10-07 東京エレクトロン株式会社 Procédé de formation d'un film de nitrure de silicium, procédé de fabrication d'un dispositif de mémoire à semi-conducteur et appareil de dépôt en phase vapeur assisté par plasma
US8198671B2 (en) * 2009-04-22 2012-06-12 Applied Materials, Inc. Modification of charge trap silicon nitride with oxygen plasma

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