WO2008102610A1 - メモリコントローラ、不揮発性記憶装置、及び不揮発性記憶システム - Google Patents

メモリコントローラ、不揮発性記憶装置、及び不揮発性記憶システム Download PDF

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Publication number
WO2008102610A1
WO2008102610A1 PCT/JP2008/051256 JP2008051256W WO2008102610A1 WO 2008102610 A1 WO2008102610 A1 WO 2008102610A1 JP 2008051256 W JP2008051256 W JP 2008051256W WO 2008102610 A1 WO2008102610 A1 WO 2008102610A1
Authority
WO
WIPO (PCT)
Prior art keywords
nonvolatile storage
integration
memory controller
storage device
integration process
Prior art date
Application number
PCT/JP2008/051256
Other languages
English (en)
French (fr)
Inventor
Masahiro Nakanishi
Tetsushi Kasahara
Takefumi Sugai
Hironori Mori
Kunihiro Maki
Kazuaki Tamura
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/526,089 priority Critical patent/US20100318723A1/en
Priority to JP2009500122A priority patent/JPWO2008102610A1/ja
Publication of WO2008102610A1 publication Critical patent/WO2008102610A1/ja

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

Abstract

 不揮発性記憶装置は複数のメモリコントローラを有し、夫々のメモリコントローラに集約処理部と集約同期部とを設ける。集約処理部は集約同期部からの信号に基づいて前記テンポラリ物理ブロックの有効データを他の物理ブロックに集約する。集約同期部は一方のメモリコントローラで集約処理が必要な場合に同期信号を他方のメモリコントローラに送出し、他方のメモリコントローラについても集約処理を同時に行う。こうすれば複数のメモリコントローラを有する不揮発性記憶装置において、集約処理に要する時間を短くでき、高速で書き込み処理を行うことができる。
PCT/JP2008/051256 2007-02-23 2008-01-29 メモリコントローラ、不揮発性記憶装置、及び不揮発性記憶システム WO2008102610A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/526,089 US20100318723A1 (en) 2007-02-23 2008-01-29 Memory controller, nonvolatile memory device, and nonvolatile memory system
JP2009500122A JPWO2008102610A1 (ja) 2007-02-23 2008-01-29 メモリコントローラ、不揮発性記憶装置、及び不揮発性記憶システム

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007043495 2007-02-23
JP2007-043495 2007-02-23

Publications (1)

Publication Number Publication Date
WO2008102610A1 true WO2008102610A1 (ja) 2008-08-28

Family

ID=39709889

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/051256 WO2008102610A1 (ja) 2007-02-23 2008-01-29 メモリコントローラ、不揮発性記憶装置、及び不揮発性記憶システム

Country Status (3)

Country Link
US (1) US20100318723A1 (ja)
JP (1) JPWO2008102610A1 (ja)
WO (1) WO2008102610A1 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011048522A2 (en) * 2009-10-21 2011-04-28 Zikbit Ltd. Neighborhood operations for parallel processing
JP2011154556A (ja) * 2010-01-27 2011-08-11 Toshiba Corp 半導体記憶装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002324008A (ja) * 2001-04-26 2002-11-08 Tdk Corp メモリコントローラ、メモリコントローラを備えるフラッシュメモリシステム及びフラッシュメモリの制御方法
JP2005018779A (ja) * 2003-06-24 2005-01-20 Research In Motion Ltd メモリ不足およびグレースフルシャットダウンの検出
WO2005026963A1 (de) * 2003-09-10 2005-03-24 Hyperstone Ag Verwaltung gelöschter blöcke in flash-speichern
WO2005106673A1 (ja) * 2004-04-28 2005-11-10 Matsushita Electric Industrial Co., Ltd. 不揮発性記憶装置及びデータ書込み方法
JP2007249509A (ja) * 2006-03-15 2007-09-27 Matsushita Electric Ind Co Ltd 不揮発性記憶装置のデータ管理方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4812192B2 (ja) * 2001-07-27 2011-11-09 パナソニック株式会社 フラッシュメモリ装置、及び、それに記憶されたデータのマージ方法
KR100598097B1 (ko) * 2003-12-29 2006-07-07 삼성전자주식회사 듀얼 칩 패키지
JP5002201B2 (ja) * 2006-06-30 2012-08-15 株式会社東芝 メモリシステム

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002324008A (ja) * 2001-04-26 2002-11-08 Tdk Corp メモリコントローラ、メモリコントローラを備えるフラッシュメモリシステム及びフラッシュメモリの制御方法
JP2005018779A (ja) * 2003-06-24 2005-01-20 Research In Motion Ltd メモリ不足およびグレースフルシャットダウンの検出
WO2005026963A1 (de) * 2003-09-10 2005-03-24 Hyperstone Ag Verwaltung gelöschter blöcke in flash-speichern
WO2005106673A1 (ja) * 2004-04-28 2005-11-10 Matsushita Electric Industrial Co., Ltd. 不揮発性記憶装置及びデータ書込み方法
JP2007249509A (ja) * 2006-03-15 2007-09-27 Matsushita Electric Ind Co Ltd 不揮発性記憶装置のデータ管理方法

Also Published As

Publication number Publication date
JPWO2008102610A1 (ja) 2010-05-27
US20100318723A1 (en) 2010-12-16

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