WO2008100415A4 - Système de mémoire non volatile - Google Patents

Système de mémoire non volatile Download PDF

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Publication number
WO2008100415A4
WO2008100415A4 PCT/US2008/001669 US2008001669W WO2008100415A4 WO 2008100415 A4 WO2008100415 A4 WO 2008100415A4 US 2008001669 W US2008001669 W US 2008001669W WO 2008100415 A4 WO2008100415 A4 WO 2008100415A4
Authority
WO
WIPO (PCT)
Prior art keywords
memory
data structures
logical data
logical
physical
Prior art date
Application number
PCT/US2008/001669
Other languages
English (en)
Other versions
WO2008100415A3 (fr
WO2008100415A2 (fr
Inventor
Zining Wu
Lau Nguyen
Pantas Sutardja
Chi-Kong Lee
Tony Yoon
Original Assignee
Marvell World Trade Ltd
Zining Wu
Lau Nguyen
Pantas Sutardja
Chi-Kong Lee
Tony Yoon
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marvell World Trade Ltd, Zining Wu, Lau Nguyen, Pantas Sutardja, Chi-Kong Lee, Tony Yoon filed Critical Marvell World Trade Ltd
Publication of WO2008100415A2 publication Critical patent/WO2008100415A2/fr
Publication of WO2008100415A3 publication Critical patent/WO2008100415A3/fr
Publication of WO2008100415A4 publication Critical patent/WO2008100415A4/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0688—Non-volatile semiconductor memory arrays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0661—Format or protocol conversion arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

La présente invention concerne un système de mémoire non volatile (NV) comprenant un module de commande de mémoire qui code des données afin de former des structures de données logiques codées. Le système selon l'invention comprend également une mémoire NV, qui comprend X réseaux contenant des structures de données physiques dont la taille diffère de celle des structures de données logiques codées. Le module de commande de mémoire exécute un processus d'écriture/lecture vers/de la mémoire NV en accord avec les structures de données logiques codées. X est un entier supérieur ou égal à 1.
PCT/US2008/001669 2007-02-09 2008-02-08 Système de mémoire non volatile WO2008100415A2 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US88907807P 2007-02-09 2007-02-09
US60/889,078 2007-02-09
US12/025,371 2008-02-04
US12/025,371 US8019959B2 (en) 2007-02-09 2008-02-04 Nonvolatile memory system

Publications (3)

Publication Number Publication Date
WO2008100415A2 WO2008100415A2 (fr) 2008-08-21
WO2008100415A3 WO2008100415A3 (fr) 2008-11-27
WO2008100415A4 true WO2008100415A4 (fr) 2009-01-08

Family

ID=39686850

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/001669 WO2008100415A2 (fr) 2007-02-09 2008-02-08 Système de mémoire non volatile

Country Status (3)

Country Link
US (4) US8019959B2 (fr)
TW (1) TWI478171B (fr)
WO (1) WO2008100415A2 (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010045445A2 (fr) * 2008-10-15 2010-04-22 Marvell World Trade Ltd. Architecture pour des systèmes de stockage de données
US8255661B2 (en) * 2009-11-13 2012-08-28 Western Digital Technologies, Inc. Data storage system comprising a mapping bridge for aligning host block size with physical block size of a data storage device
TWI497293B (zh) * 2009-12-17 2015-08-21 Ibm 固態儲存裝置內之資料管理
TWI455144B (zh) 2010-07-22 2014-10-01 Silicon Motion Inc 使用於快閃記憶體的控制方法與控制器
WO2012053015A2 (fr) * 2010-10-22 2012-04-26 Jana, Tejaswini, Ramesh Compression et décompression de données à grande vitesse dans une mémoire à semi-conducteurs
US8452914B2 (en) 2010-11-26 2013-05-28 Htc Corporation Electronic devices with improved flash memory compatibility and methods corresponding thereto
CA3017181C (fr) * 2010-12-10 2023-07-18 Sun Patent Trust Procede de generation de signaux et dispositif de generation de signaux
US9354988B2 (en) * 2011-03-28 2016-05-31 Sap Se Allocation strategies for data storage applications
TWI467590B (zh) * 2011-07-11 2015-01-01 Phison Electronics Corp 資料處理方法、記憶體控制器及記憶體儲存裝置
US9311969B2 (en) 2011-07-22 2016-04-12 Sandisk Technologies Inc. Systems and methods of storing data
CN104220991B (zh) * 2012-03-16 2017-08-29 马维尔国际贸易有限公司 用于允许数据在nand闪存上的有效存储的架构
US9418607B2 (en) * 2013-08-07 2016-08-16 Parade Technologies, Ltd. Utilizing gray code to reduce power consumption in display system
US9436550B2 (en) * 2013-10-31 2016-09-06 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for internal disk drive data compression
US9280456B2 (en) 2013-11-12 2016-03-08 Micron Technology, Inc. Mapping between program states and data patterns
US10078456B2 (en) * 2014-09-04 2018-09-18 National Instruments Corporation Memory system configured to avoid memory access hazards for LDPC decoding
US9633737B2 (en) 2014-11-18 2017-04-25 SK Hynix Inc. Semiconductor device
KR20160059174A (ko) * 2014-11-18 2016-05-26 에스케이하이닉스 주식회사 반도체 장치
JP6885030B2 (ja) * 2016-11-18 2021-06-09 ソニーグループ株式会社 送信装置、及び、送信方法
US10496330B1 (en) * 2017-10-31 2019-12-03 Pure Storage, Inc. Using flash storage devices with different sized erase blocks
US10453490B2 (en) * 2017-12-19 2019-10-22 Panasonic Intellectual Property Management Co., Ltd. Optical disc device
TWI685850B (zh) 2018-08-22 2020-02-21 大陸商深圳大心電子科技有限公司 記憶體管理方法以及儲存控制器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6757800B1 (en) * 1995-07-31 2004-06-29 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6684289B1 (en) * 2000-11-22 2004-01-27 Sandisk Corporation Techniques for operating non-volatile memory systems with data sectors having different sizes than the sizes of the pages and/or blocks of the memory
US6591330B2 (en) * 2001-06-18 2003-07-08 M-Systems Flash Disk Pioneers Ltd. System and method for flexible flash file
EP1713085A1 (fr) 2002-10-28 2006-10-18 SanDisk Corporation Usage automatisé nivelant les systèmes de stockage non volatiles
US7631138B2 (en) * 2003-12-30 2009-12-08 Sandisk Corporation Adaptive mode switching of flash memory address mapping based on host usage characteristics
US7210077B2 (en) * 2004-01-29 2007-04-24 Hewlett-Packard Development Company, L.P. System and method for configuring a solid-state storage device with error correction coding
US7334179B2 (en) * 2004-06-04 2008-02-19 Broadcom Corporation Method and system for detecting and correcting errors while accessing memory devices in microprocessor systems
EP1712984A1 (fr) * 2005-04-15 2006-10-18 Deutsche Thomson-Brandt Gmbh Méthode et système d'accès à des blocs logiques de données dans un système de stockage comprenant plusieurs mémoires connectées à au moins un bus commun
US7739576B2 (en) * 2006-08-31 2010-06-15 Micron Technology, Inc. Variable strength ECC

Also Published As

Publication number Publication date
WO2008100415A3 (fr) 2008-11-27
US20120023284A1 (en) 2012-01-26
US20140173197A1 (en) 2014-06-19
US8219775B2 (en) 2012-07-10
TW200842893A (en) 2008-11-01
WO2008100415A2 (fr) 2008-08-21
TWI478171B (zh) 2015-03-21
US20120278545A1 (en) 2012-11-01
US8874874B2 (en) 2014-10-28
US20080195810A1 (en) 2008-08-14
US8019959B2 (en) 2011-09-13
US8539195B2 (en) 2013-09-17

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