WO2008093626A1 - チップ素子およびその製造方法 - Google Patents

チップ素子およびその製造方法 Download PDF

Info

Publication number
WO2008093626A1
WO2008093626A1 PCT/JP2008/051166 JP2008051166W WO2008093626A1 WO 2008093626 A1 WO2008093626 A1 WO 2008093626A1 JP 2008051166 W JP2008051166 W JP 2008051166W WO 2008093626 A1 WO2008093626 A1 WO 2008093626A1
Authority
WO
WIPO (PCT)
Prior art keywords
glass
electrode
glass paste
formation
glass layer
Prior art date
Application number
PCT/JP2008/051166
Other languages
English (en)
French (fr)
Inventor
Tatsuya Tsujiguchi
Nobuyoshi Honda
Original Assignee
Murata Manufacturing Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co., Ltd. filed Critical Murata Manufacturing Co., Ltd.
Priority to JP2008556079A priority Critical patent/JP4935828B2/ja
Publication of WO2008093626A1 publication Critical patent/WO2008093626A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1903—Structure including wave guides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Abstract

　絶縁性材であるケイ酸系ガラスを主成分とし感光性材を添加したガラスペーストを親基板に塗布する。次に、フォトマスクを用いてガラスペーストを感光させて固化する。次に、固化していないガラスペーストを除去して開口を設ける。次に、ガラスペーストを焼成してガラス層を形成する。以上の一連の工程に続いて、ガラス層の形成の後、ガラス層の開口の底面の銀電極上に、複数のメッキ層を形成してボンディング用電極を形成する。以上の工程により、ワイヤボンディングに用いる電極における金属材使用量を低減しながら、また、電極形成に係るレジストを不要にしてチップ素子を製造し、製造コストの抑制と高性能化とを図る。
PCT/JP2008/051166 2007-02-01 2008-01-28 チップ素子およびその製造方法 WO2008093626A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008556079A JP4935828B2 (ja) 2007-02-01 2008-01-28 チップ素子およびその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007023090 2007-02-01
JP2007-023090 2007-02-01

Publications (1)

Publication Number Publication Date
WO2008093626A1 true WO2008093626A1 (ja) 2008-08-07

Family

ID=39673938

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/051166 WO2008093626A1 (ja) 2007-02-01 2008-01-28 チップ素子およびその製造方法

Country Status (2)

Country Link
JP (1) JP4935828B2 (ja)
WO (1) WO2008093626A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016122846A (ja) * 2012-06-14 2016-07-07 スカイワークス ソリューションズ, インコーポレイテッドSkyworks Solutions, Inc. パワーアンプモジュールを含む関連するシステム、デバイス、および方法
US9679869B2 (en) 2011-09-02 2017-06-13 Skyworks Solutions, Inc. Transmission line for high performance radio frequency applications
US9859231B2 (en) 2011-03-03 2018-01-02 Skyworks Solutions, Inc. Radio frequency integrated circuit module

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60195961A (ja) * 1984-03-19 1985-10-04 Hitachi Ltd 半導体装置
JP2003060428A (ja) * 2001-08-21 2003-02-28 Hitachi Ltd 高周波回路装置及びその製造方法
JP2004519961A (ja) * 2001-04-06 2004-07-02 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ マイクロ波回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06283566A (ja) * 1993-03-25 1994-10-07 Fuji Electric Co Ltd 半導体装置およびその製造方法
JP2002016176A (ja) * 2000-06-29 2002-01-18 Kyocera Corp 配線基板およびその接続構造
JP3531603B2 (ja) * 2000-11-14 2004-05-31 株式会社村田製作所 高周波フィルタおよびそれを用いたフィルタ装置およびそれらを用いた電子装置
KR100632577B1 (ko) * 2004-05-03 2006-10-09 삼성전기주식회사 인쇄회로기판의 전해 금도금 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60195961A (ja) * 1984-03-19 1985-10-04 Hitachi Ltd 半導体装置
JP2004519961A (ja) * 2001-04-06 2004-07-02 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ マイクロ波回路
JP2003060428A (ja) * 2001-08-21 2003-02-28 Hitachi Ltd 高周波回路装置及びその製造方法

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9859231B2 (en) 2011-03-03 2018-01-02 Skyworks Solutions, Inc. Radio frequency integrated circuit module
US10937759B2 (en) 2011-09-02 2021-03-02 Skyworks Solutions, Inc. Radio frequency transmission line
US9679869B2 (en) 2011-09-02 2017-06-13 Skyworks Solutions, Inc. Transmission line for high performance radio frequency applications
US10529686B2 (en) 2011-09-02 2020-01-07 Skyworks Solutions, Inc. Mobile device with radio frequency transmission line
US10090812B2 (en) 2012-06-14 2018-10-02 Skyworks Solutions, Inc. Power amplifier modules with bonding pads and related systems, devices, and methods
US9887668B2 (en) 2012-06-14 2018-02-06 Skyworks Solutions, Inc. Power amplifier modules with power amplifier and transmission line and related systems, devices, and methods
JP2016122846A (ja) * 2012-06-14 2016-07-07 スカイワークス ソリューションズ, インコーポレイテッドSkyworks Solutions, Inc. パワーアンプモジュールを含む関連するシステム、デバイス、および方法
KR101921686B1 (ko) * 2012-06-14 2018-11-26 스카이워크스 솔루션즈, 인코포레이티드 와이어 본드 패드 및 관련된 시스템, 장치, 및 방법을 포함하는 전력 증폭기 모듈
US9847755B2 (en) 2012-06-14 2017-12-19 Skyworks Solutions, Inc. Power amplifier modules with harmonic termination circuit and related systems, devices, and methods
KR20200056463A (ko) * 2012-06-14 2020-05-22 스카이워크스 솔루션즈, 인코포레이티드 고조파 종단 회로를 포함하는 전력 증폭기 모듈 및 관련된 시스템, 장치, 및 방법
US10771024B2 (en) 2012-06-14 2020-09-08 Skyworks Solutions, Inc. Power amplifier modules including transistor with grading and semiconductor resistor
US9660584B2 (en) 2012-06-14 2017-05-23 Skyworks Solutions, Inc. Power amplifier modules including wire bond pad and related systems, devices, and methods
KR102250612B1 (ko) 2012-06-14 2021-05-10 스카이워크스 솔루션즈, 인코포레이티드 고조파 종단 회로를 포함하는 전력 증폭기 모듈 및 관련된 시스템, 장치, 및 방법
US11451199B2 (en) 2012-06-14 2022-09-20 Skyworks Solutions, Inc. Power amplifier systems with control interface and bias circuit

Also Published As

Publication number Publication date
JP4935828B2 (ja) 2012-05-23
JPWO2008093626A1 (ja) 2010-05-20

Similar Documents

Publication Publication Date Title
WO2011037323A3 (ko) 광배향막 제조용 자외선 고투과 이중 선 격자 편광판 및 이의 제조방법
JP2013062314A5 (ja)
WO2007104171A3 (fr) Procede de fabrication par liga-uv d'une structure metallique multicouche a couches adjacentes non entierement superposees, et structure obtenue
TW200741761A (en) Inductor element and method for production thereof, and semiconductor module with inductor element
TW200508317A (en) Resin molded product production process, metal structure production process, and resin molded product
WO2007136656A3 (en) Colored masking for forming transparent structures
CN103872227B (zh) 一种360度发光的led灯丝光源的制造方法
MY159204A (en) Superfine-patterned mask, method for production thereof, and method employing the same for forming superfine-pattern
DE602006020367D1 (de) Verfahren zur Herstellung von gebundenen Substraten und dazugehöriges Substrat
JP2011142217A5 (ja)
WO2008093626A1 (ja) チップ素子およびその製造方法
TW200746968A (en) Method for fabricating electrical connecting structure of circuit board
CN102074641A (zh) 一种led封装方法、led和led照明装置
CN101466205B (zh) 电路板的制作方法
WO2009072493A1 (ja) 感光性接着剤、半導体装置及び半導体装置の製造方法
WO2011065788A3 (en) Printed circuit board and method of manufacturing the same
TW200630003A (en) Wiring pattern formation method, manufacturing method for multi layer wiring substrate, and electronic device
FR2935067B1 (fr) Procede de fabrication d'une structure semi-conductrice plan de masse enterre
TW201327934A (zh) 發光二極體封裝結構及其螢光薄膜的製造方法
JP2017505540A5 (ja)
CN204333029U (zh) 一种360度发光led基板结构和led光源
CN102537753A (zh) 背光膜片及其制造方法与成型设备
CN102709407B (zh) Led封装挡墙的制造方法
TW200741350A (en) Method of manufacturing metal electrode
TW200736673A (en) Method of manufacturing color filter substrate

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08703975

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2008556079

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08703975

Country of ref document: EP

Kind code of ref document: A1