WO2008078404A1 - Silicon epitaxial wafer and its manufacturing method, semiconductor device manufacturing method, and soi wafer manufacturing method - Google Patents

Silicon epitaxial wafer and its manufacturing method, semiconductor device manufacturing method, and soi wafer manufacturing method Download PDF

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Publication number
WO2008078404A1
WO2008078404A1 PCT/JP2007/001414 JP2007001414W WO2008078404A1 WO 2008078404 A1 WO2008078404 A1 WO 2008078404A1 JP 2007001414 W JP2007001414 W JP 2007001414W WO 2008078404 A1 WO2008078404 A1 WO 2008078404A1
Authority
WO
WIPO (PCT)
Prior art keywords
manufacturing
layer
wafer
semiconductor device
silicon epitaxial
Prior art date
Application number
PCT/JP2007/001414
Other languages
French (fr)
Japanese (ja)
Inventor
Satoshi Oka
Nobuhiko Noto
Original Assignee
Shin-Etsu Handotai Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co., Ltd. filed Critical Shin-Etsu Handotai Co., Ltd.
Publication of WO2008078404A1 publication Critical patent/WO2008078404A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

A silicon epitaxial wafer comprises a strained SiGe layer, a Si protective layer formed on the strained SiGe layer, and an epitaxial Si layer on the Si protective layer, all formed on a silicon substrate. The wafer is characterized in that a high-concentration Si layer is formed in at least either the space between the silicon substrate and the strained SiGe layer or the space between the Si protective layer and the epitaxial Si layer. By enabling high gettering ability, easy film-thickness control at the device process steps, and facilitating the film thinning step of the silicon substrate after fabricating a device, a silicon epitaxial wafer enabling the total cost of semiconductor device fabrication to be lowered can be provided.
PCT/JP2007/001414 2006-12-26 2007-12-17 Silicon epitaxial wafer and its manufacturing method, semiconductor device manufacturing method, and soi wafer manufacturing method WO2008078404A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006-349004 2006-12-26
JP2006349004A JP5045095B2 (en) 2006-12-26 2006-12-26 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
WO2008078404A1 true WO2008078404A1 (en) 2008-07-03

Family

ID=39562201

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/001414 WO2008078404A1 (en) 2006-12-26 2007-12-17 Silicon epitaxial wafer and its manufacturing method, semiconductor device manufacturing method, and soi wafer manufacturing method

Country Status (3)

Country Link
JP (1) JP5045095B2 (en)
TW (1) TW200845142A (en)
WO (1) WO2008078404A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8420514B2 (en) 2009-07-16 2013-04-16 Sumco Corporation Epitaxial silicon wafer and method for manufacturing same

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5380912B2 (en) * 2008-06-10 2014-01-08 株式会社Ｓｕｍｃｏ Film thickness measuring method, epitaxial wafer manufacturing method, and epitaxial wafer
JP2012038973A (en) * 2010-08-09 2012-02-23 Siltronic Ag Silicon wafer and method of producing the same
JP6447439B2 (en) * 2015-09-28 2019-01-09 信越半導体株式会社 Manufacturing method of bonded SOI wafer

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1050714A (en) * 1996-07-30 1998-02-20 Sumitomo Sitix Corp Silicon substrate and manufacture thereof
JP2000349267A (en) * 1999-03-26 2000-12-15 Canon Inc Method of fabricating semiconductor member
JP2003151987A (en) * 2001-11-19 2003-05-23 Mitsubishi Heavy Ind Ltd Semiconductor substrate and manufacturing method thereof
JP2003229423A (en) * 2001-09-10 2003-08-15 Internatl Business Mach Corp <Ibm> Method of measuring property of film deposited by cvd apparatus and method of controlling process

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1050714A (en) * 1996-07-30 1998-02-20 Sumitomo Sitix Corp Silicon substrate and manufacture thereof
JP2000349267A (en) * 1999-03-26 2000-12-15 Canon Inc Method of fabricating semiconductor member
JP2003229423A (en) * 2001-09-10 2003-08-15 Internatl Business Mach Corp <Ibm> Method of measuring property of film deposited by cvd apparatus and method of controlling process
JP2003151987A (en) * 2001-11-19 2003-05-23 Mitsubishi Heavy Ind Ltd Semiconductor substrate and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8420514B2 (en) 2009-07-16 2013-04-16 Sumco Corporation Epitaxial silicon wafer and method for manufacturing same

Also Published As

Publication number Publication date
JP2008159976A (en) 2008-07-10
JP5045095B2 (en) 2012-10-10
TW200845142A (en) 2008-11-16

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