WO2008075686A1 - Wiring board and method for manufacturing the same - Google Patents

Wiring board and method for manufacturing the same Download PDF

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Publication number
WO2008075686A1
WO2008075686A1 PCT/JP2007/074325 JP2007074325W WO2008075686A1 WO 2008075686 A1 WO2008075686 A1 WO 2008075686A1 JP 2007074325 W JP2007074325 W JP 2007074325W WO 2008075686 A1 WO2008075686 A1 WO 2008075686A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductor
caster
hole
dividing
wiring board
Prior art date
Application number
PCT/JP2007/074325
Other languages
French (fr)
Japanese (ja)
Inventor
Keiichi Morikane
Satoshi Nagao
Original Assignee
Koa Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koa Corporation filed Critical Koa Corporation
Publication of WO2008075686A1 publication Critical patent/WO2008075686A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09181Notches in edge pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Definitions

  • the present invention relates to a wiring board obtained from a large number of large-sized boards and a manufacturing method thereof, and in particular,
  • the present invention relates to an improvement in castor conductor (side conductor) provided on the side surface of the wiring board.
  • a wiring board on which an electronic circuit element such as a semiconductor element is mounted is obtained by dividing a large-sized board obtained by firing a green sheet laminate along vertical and horizontal dividing lines. It is supposed to be.
  • a large number of wiring board regions are partitioned by dividing lines, and wiring patterns and caster conductors are provided in each wiring board region.
  • the caster conductor is a force provided on the inner wall of the through-hole drilled in the dividing line in a large-sized substrate. Since the dividing surface along this dividing line is the side surface of each wiring substrate, there are a large number of caster conductors.
  • a castor conductor is formed on the wall surface in the recessed groove on the side surface of the removed wiring board.
  • the caster conductor and the wiring pattern are connected at appropriate places, and connected to the wiring pattern by electronic circuit element force S wire bonding or the like mounted on the upper surface of the wiring board, and the mother board on which the wiring board is mounted.
  • the caster conductor is soldered on the solder land of the board.
  • the electronic circuit element on the wiring board is electrically connected to the external circuit via the caster conductor.
  • FIG. 6 is a perspective view showing a caster conductor of a conventional wiring board.
  • concave cutouts 3 and 4 are provided on the side surface of the ceramic substrate 2, and a highly conductive material such as silver is formed on the wall surfaces of the cutouts 3 and 4.
  • a caster conductor 5 having a predetermined thickness is formed.
  • a wiring pattern connected to the caster conductor 5 is provided on the inner layer and the outer layer of the wiring board 1, and an electronic circuit element is mounted on the upper surface of the wiring board 1.
  • These electronic circuit elements and wiring patterns are connected by wire bonding or the like.
  • the surface of the caster conductor 5 is knitted to improve solder wettability and prevent silver solder erosion.
  • a not-shown plating layer such as a Kell layer is applied (see, for example, Patent Document 1).
  • FIG. 7 is an explanatory view showing a manufacturing process of the conventional wiring board shown in FIG.
  • a large substrate 6 shown in FIG. 7 is obtained by firing a laminate of green sheets on which necessary conductive portions are formed, and is divided by vertical and horizontal dividing lines 7 and 8.
  • a large number of wiring boards 1 are obtained by dividing the large-sized board 6 along the dividing lines 7 and 8 so as to correspond to the board 1.
  • the large substrate 6 has a number of through holes 10 at predetermined positions overlapping the dividing lines 7 and 8, and an undivided caster conductor 5 having a predetermined thickness is formed on the inner wall of each through hole 10. Is provided.
  • the through-hole 10 is divided into two parts on the side surface of the wiring substrate 1 that has been removed.
  • the caster conductor 5 is provided on each of the inner wall of the notch 3 and the inner wall of the notch 4 divided into four parts.
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2003-179176 (Page 3-5, Fig. 3)
  • the caster conductor 5 of the wiring board 1 that is taken in large numbers from the large board 6 is formed on the inner wall of the through hole 10 that overlaps the dividing lines 7 and 8, so that the large board 6 Even if a plating process is applied to the caster conductor 5 before dividing it, the end face (split surface) of the caster conductor 5 that matches the dividing line 7 and the dividing line 8 remains on the plating layer. It becomes a non-sticky area that does not exist. Then, if the wiring board 1 is mounted on the mother board while the end face of the castor conductor 5 is not scratched, the silver component in the caster conductor 5 will cause solder erosion at the end face. Is significantly reduced.
  • the large-sized substrate 6 is divided by a method such as half-cutting or dicing while the dividing lines 7 and 8 and the caster conductor 5 are overlapped. Since there is a force S, and the part where ceramic and metal are mixed becomes a split surface, there is a problem in that the split property is difficult, and there is a problem that burrs, chips, dirt, etc. are likely to occur on the split surface.
  • the present invention has been made in view of such a state of the art, and a first object of the present invention is to perform a plating process on the entire surface of a caster conductor in the state of a large-sized substrate for multi-piece production.
  • An object of the present invention is to provide a wiring board that can be applied and has good division.
  • a second object of the present invention is to provide a method for manufacturing a wiring board that is powerful.
  • a grooved notch extending to both the upper and lower surfaces is provided on the side surface of the ceramic substrate, and a plating layer is provided on the wall surface in the notch.
  • a wiring board having a plurality of ceramic substrates taken by dividing a large-sized substrate along a dividing line, the notches of the ceramic substrate having a width thereof A pair of exposed wall surfaces that are not covered by the caster conductor and located at both ends of the direction, and a coated wall surface that is located between the pair of exposed wall surfaces and is covered by the caster conductor.
  • the caster conductor provided on the side wall is separated from the side surface via the exposed wall surface.
  • the ceramic substrate may be a single layer. However, if the ceramic substrate is a multilayer substrate, it is preferable because it can be applied to a general wiring substrate.
  • a through hole for a caster conductor is provided at a predetermined position including the vicinity of a dividing line of a multi-sheet green sheet.
  • a castoration conductor that is spaced apart from the dividing line by filling the recess not overlapping with the through-hole at the peripheral edge in the through-hole by punching in the green sheet; And a caster conductor forming process for cutting off the conductive material filled in the other part of the through-hole, and the caster guide
  • a dividing step of dividing the large substrate into individual pieces along the dividing line, and a plurality of wiring boards having the caster conductors are taken by the dividing step.
  • a through hole that crosses the dividing line and partially overlaps the through hole is formed in a green sheet.
  • the conductive material that faces the through hole is left in the recess separated from the dividing line at the peripheral edge in the through hole, so that the conductive material can be used as a caster conductor. Therefore, before dividing a large-sized board for multi-piece production into pieces, a plating layer can be applied to the entire surface of the castor conductor of each wiring board, and a process for applying a process to the caster conductor.
  • the post-processing process of mounting electronic circuit elements and conducting continuity tests, etc. can also be performed in the state of a large substrate, greatly improving productivity without sacrificing reliability. High The ability to turn S is possible. Also, since the dividing line of the large-sized substrate and the caster conductor do not overlap each other, the dividing property is improved, so that the dividing surface is less likely to be clogged, chipped or soiled.
  • a multilayer body forming process is performed in which a plurality of green sheets are stacked and thermocompression bonded. If it is made into a multilayer substrate, since it can apply to manufacture of a general wiring board, it is preferable.
  • the caster conductor provided on the inner wall of the cutout on the side surface of the ceramic substrate is separated from the side surface via the exposed wall surface of the cutout.
  • a plating layer can be applied to the entire surface of the castor conductor conductor exposed without overlapping the dividing lines. Therefore, the working efficiency of the plating process performed on the caster conductor is improved, and the post-etching process, in which an electronic circuit element is mounted and a continuity test is performed, can be performed in the state of a large substrate. As a result, productivity can be significantly increased without impairing reliability. Further, since the dividing line of the large-sized substrate and the caster conductor do not overlap, the dividing property is improved, so that the dividing surface becomes clogged, chipped, soiled or the like.
  • a through-hole that partially overlaps the through-hole across a dividing line is formed.
  • the conductive material facing the through hole is left in a recess separated from the dividing line at the peripheral edge in the through hole, and the conductive material is made into a castor conductor.
  • a plating layer can be applied to the entire surface of the castor conductor of each wiring board, and a process for applying a process to the caster conductor.
  • the post-processing process of mounting electronic circuit elements and conducting continuity tests, etc. can also be performed in the state of a large substrate, greatly improving productivity without sacrificing reliability. Can be increased.
  • the dividing line of the large substrate and the caster conductor do not overlap each other, the dividing property is improved, so that the dividing surface is free of chips, chips, dirt, etc. It becomes ⁇
  • FIG. 1 is a perspective view showing a caster conductor of a wiring board according to an embodiment of the present invention
  • FIG. 2 is a diagram of the caster conductor.
  • Cross-sectional views and FIGS. 3 to 5 are manufacturing process diagrams of the wiring board.
  • a wiring board 11 shown in FIGS. 1 and 2 includes a multilayer ceramic substrate 12 on which an electronic circuit element (not shown) is mounted on the upper surface, and not shown provided on an inner layer and an outer layer of the ceramic substrate 12.
  • a wiring pattern and a caster conductor 15 having a good conductive material such as silver provided on inner walls of the cutouts 13 and 14 on the side surface of the ceramic substrate 12 are provided.
  • both end portions in the width direction are exposed wall surfaces 13 a and 14 a that are not covered with the caster conductor 15.
  • the coated wall surfaces 13b and 14b of the notches 13 and 14 coated on the caster conductor 15 are formed deeper and grooved than the exposed wall surfaces 13a and 14a, respectively.
  • the wiring pattern of this wiring board 11 is connected to caster conductors 15 at appropriate places, and this wiring pattern and electronic circuit elements are connected by wire bonding or the like. Further, since the caster conductor 15 is soldered on a solder land of a mother board (not shown) on which the wiring board 11 is mounted, the electronic circuit elements on the wiring board 11 pass through the caster conductor 15. It will be electrically connected to the external circuit. In order to improve solder wettability and prevent silver solder erosion, a plating layer 16 made of nickel, gold or the like is deposited on the entire surface of the caster conductor 15.
  • a notch 13 formed by dividing a through hole 23 described later into two and a through hole 24 described later are divided into four.
  • Notches 14 are provided at a plurality of locations.
  • caster conductors 15 are provided at the innermost portions where the covering wall surfaces 13b and 14b are formed.
  • the notches 13 and 14 are each formed in the shape of a concave groove extending to both the upper and lower surfaces of the ceramic substrate 12.
  • the caster conductor 15 covering the coated wall surface 13b in the notch 13 is a pair of exposed wall surfaces 13a.
  • a substantially semi-cylindrical surface is formed by the surface of the caster conductor 15 and both exposed wall surfaces 13a. It is. Similarly, the castor conductor 15 that covers the coated wall 14b in the notch 14 is exposed between the pair of exposed walls 14a and 14a, and the surface of the caster conductor 15 and both exposed walls 14a As a result, a quadruple cylindrical surface is formed. Therefore, the castor conductor 15 in the notch 13 is separated from the side surface of the ceramic substrate 12 via the exposed wall surface 13a, and the castor conductor 15 in the notch 14 is separated from the ceramic substrate via the exposed wall surface 14a. Separated from 12 sides.
  • a large number of wiring boards 11 are obtained by dividing the large board 28 (see FIG. 5) along the dividing lines 21 and 22, so that the divided surface of the large board 28 is the wiring board. 11th aspect. Since the side surface of the wiring board 11 and the caster conductors 15 in the notches 13 and 14 are separated from each other through the exposed wall surface 13a and the exposed wall surface 14a, each wiring board 11 in the state of the large board 28.
  • the caster conductor 15 can be separated from the destructive IJ lines 21 and 22 in advance. In other words, since the wiring board 11 can be exposed by forming caster conductors 15 at positions where they do not overlap with the dividing surface during the manufacturing process,
  • the plating layer 16 can be applied to the entire surface of the caster conductor 15 of the wiring board 11.
  • FIG. 3 (a) punching is performed at a predetermined position where it overlaps with the vertical and horizontal dividing lines 21 and 22 of the multi-sheet green sheet 20.
  • a number of through-holes 23 and 24 for caster conductor 15 are drilled by a machine.
  • the through hole 23 that overlaps only the dividing line 21 or only the dividing line 22 is formed into a hole having a shape of figure 8 in plan view by connecting two round holes.
  • the through hole 24 that overlaps the intersecting part of the harm ij lines 21 and 22 has a shape like a four-leaf clover in plan view by connecting four round holes. Also, when drilling these through holes 23, 24, do not drill through holes for wiring patterns (not shown).
  • FIG. 3 (b) silver paste 25 is filled into the snorkel wheels 23 and 24 and the wiring pattern through holes.
  • FIG. 3 (c) and FIG. 4 which is an enlarged view of the A part thereof, the round hole-shaped through hole 26 that partially overlaps the through hole 23 across the dividing line 21 or the dividing line 22 is obtained.
  • the green sheet 20 is drilled with a round hole-shaped through hole 27 that partially overlaps the tool 24.
  • the silver paste 25 in the through-hole 23 is filled in the crescent-shaped recess 23a in plan view that does not overlap with the through-hole 26 and is separated from the dividing lines 21 and 22. !
  • the silver paste 25 remains and becomes the castor conductor 15, and the silver paste 25 filled in the other part of the through hole 23 is the green that exists between the other part and the adjacent dividing line.
  • the sheet 20 is cut together with the wall.
  • caster conductors 15 are formed at two opposite positions by punching the silver paste 25 in the through hole 23 through the through hole 26, and formed between each caster conductor 15 and the adjacent dividing line.
  • the inner wall of the through-hole 26 is the exposed wall surface 13a.
  • the through hole 26 and the through hole 23 form a hole having a shape in which the two notches 13 face each other and communicate with each other. It will be.
  • the silver paste 25 in the through hole 24 does not overlap with the through hole 27 and is separated from the dividing lines 21 and 22. Only the silver paste 25 filled in 24a remains and becomes the castor conductor 15, and the silver paste 25 filled in the other part of the through hole 24 has a dividing line adjacent to the other part. It is cut out together with the wall of the green sheet 20 existing between the two.
  • caster conductors 15 are formed at four equally spaced locations by punching the silver paste 25 in the through holes 24 through the through holes 27, and between the caster conductors 15 and the adjacent divided lines.
  • the inner wall of the formed through hole 27 becomes the exposed wall surface 14a.
  • the through hole 27 and the through hole 24 form a hole having a shape in which the four notches 14 face each other and communicate with each other. It will be.
  • the wiring pattern or the like is printed on the green sheet 20, and then a predetermined number of green sheets 20 are stacked on a stacking jig (not shown), which is not shown in a vacuum pack state. It is made into a laminated body by putting in a press machine and thermocompression bonding. Then, by firing this laminate, a large-sized substrate 28 for multi-piece production as shown in FIG. 5 is obtained.
  • This large substrate 28 has a small area 29 divided by vertical and horizontal dividing lines 21 and 22 and each wiring. Corresponds to board 11.
  • the plating layer 16 is attached to each caster conductor 5.
  • the castor conductors 15 in the respective small regions 29 are not overlapped with the dividing lines 21 and 22 and are exposed to the through holes 26 and the through holes 27. Therefore, the caster conductors 15 in the state of the large substrate 28 are formed.
  • a plating layer 16 can be applied to the entire surface of the substrate.
  • a large number of wiring substrates 11 as shown in FIGS. 1 and 2 can be obtained. In this dividing step, the dividing surface of the large substrate 28 along the dividing lines 21 and 22 becomes the side surface of each wiring substrate 11.
  • the through hole 26 is divided into two parts to form the notches 13 of the respective wiring boards 11, and the through hole 27 is divided into four parts to form the notches 14 of the respective wiring boards 11.
  • the silver paste (conductive material) 25 is filled in the through holes 23 and 24 for the castor conductor 15, and then divided.
  • the recesses 23a and 24a in each of the snorley wheels 23 and 24 are formed.
  • the caster conductor 15 can be formed on the front.
  • These caster conductors 15 are exposed to the through holes 26 and 27 so as to be separated from the destructive IJ lines 21 and 22, so that before the large-sized substrate 28 for taking a large number of pieces is divided into pieces,
  • the force S can be applied to the plating layer 16 on the entire surface of the caster conductor 15 of each wiring board 11. Therefore, the working efficiency of the plating process performed on the caster conductor 15 is improved, and the electronic circuit element is mounted to conduct a continuity test, etc., and the process after the plating process is also in the state of the large board 28. Can be implemented. Therefore, the silver component in the caster conductor 15 can be prevented from being eroded by solder and the reliability can be ensured, and the productivity can be greatly increased.
  • the large-sized substrate 28 has a good dividing property, and therefore, the dividing surface is less likely to be chipped or soiled. The improvement of the non-defective product rate can be expected.
  • the separations other than the recesses 23a, 24a in the snorley wheels 23, 24 are performed. Since the existing silver paste (conductive material) 25 is cut together with the wall portion of the adjacent green sheet 20, there is no possibility that the silver paste 25 remains in an undesired location. Moreover, the through holes 23, 24 and the through holes 26, 27 can be accurately drilled with a normal punching machine or the like. Therefore, it is easy to form a desired caster conductor 15, and high reliability is easily ensured.
  • the shape of the snorley wheel 23, 24 and the through holes 26, 27 can be selected as appropriate. In short, the portions of the through holes for caster conductors that do not overlap with the through holes are filled. Depending on the conductive material, the shape is such that a castor conductor is formed that is separated from the dividing line of the large substrate and exposed to the through hole! /!
  • the power described in connection with the wiring substrate 11 in which the ceramic substrate 12 is a multilayer substrate and the manufacturing method thereof, and the present invention can be applied even if the ceramic substrate is a single-layer wiring substrate. Needless to say.
  • FIG. 1 is a perspective view showing a caster conductor of a wiring board according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of the caster conductor.
  • FIG. 3 is a manufacturing process diagram of the wiring board.
  • FIG. 4 is an enlarged view of part A in FIG.
  • FIG. 5 is a manufacturing process diagram of the wiring board.
  • FIG. 6 is a perspective view showing a caster conductor of a conventional wiring board.
  • FIG. 7 is an explanatory view showing a manufacturing process of the conventional wiring board shown in FIG. 6.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

[PROBLEMS] To provide a wiring board, which permits plating to be performed over the entire surface of a castellation conductor in a state of a large substrate for taking out many wiring boards, and can be excellently divided from the substrate, and to provide a method for manufacturing such wiring board. [MEANS FOR SOLVING PROBLEMS] A large substrate (28) is divided into many wiring boards (11). In the wiring board, a castellation conductor (15) is arranged in notches (13, 14) on the side surface of a ceramic substrate (12). A plating layer (16) is applied on the entire surface of the castellation conductor (15). The both end portions of the notches (13, 14) in the width direction, however, are exposed wall surfaces (13a, 14a) not coated with the castellation conductor (15). Therefore, each castellation conductor (15) is separated from the side surface of the ceramic substrate (12).

Description

明 細 書  Specification
配線基板およびその製造方法  Wiring board and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は、大判基板から多数個取りされる配線基板とその製造方法とに係り、特に TECHNICAL FIELD [0001] The present invention relates to a wiring board obtained from a large number of large-sized boards and a manufacturing method thereof, and in particular,
、配線基板の側面に設けられるキャスタレーシヨン導体 (側面導体)の改良に関する。 背景技術 The present invention relates to an improvement in castor conductor (side conductor) provided on the side surface of the wiring board. Background art
[0002] 一般的に、半導体素子等の電子回路素子が搭載される配線基板は、グリーンシー トの積層体を焼成してなる大判基板を縦横の分割ラインに沿って分割して多数個取 りされるようになっている。この大判基板には多数個分の配線基板領域が分割ライン によって区画されており、各配線基板領域に配線パターンやキャスタレーシヨン導体 が設けられている。ここで、キャスタレーシヨン導体は、大判基板においては分割ライ ンに穿設されたスルーホールの内壁に設けられている力 この分割ラインに沿う分割 面が各配線基板の側面となるため、多数個取りされた配線基板の側面の凹溝内の壁 面にキャスタレーシヨン導体が形成されている。このキャスタレーシヨン導体と配線パ ターンは適宜個所で接続されており、配線基板の上面に搭載された電子回路素子 力 Sワイヤボンディング等によって配線パターンと接続されると共に、配線基板が実装 される母基板の半田ランド上でキャスタレーシヨン導体が半田付けされるようになって いる。これにより、配線基板上の電子回路素子がキャスタレーシヨン導体を介して外 部回路と電気的に接続されることとなる。  [0002] Generally, a wiring board on which an electronic circuit element such as a semiconductor element is mounted is obtained by dividing a large-sized board obtained by firing a green sheet laminate along vertical and horizontal dividing lines. It is supposed to be. In this large substrate, a large number of wiring board regions are partitioned by dividing lines, and wiring patterns and caster conductors are provided in each wiring board region. Here, the caster conductor is a force provided on the inner wall of the through-hole drilled in the dividing line in a large-sized substrate. Since the dividing surface along this dividing line is the side surface of each wiring substrate, there are a large number of caster conductors. A castor conductor is formed on the wall surface in the recessed groove on the side surface of the removed wiring board. The caster conductor and the wiring pattern are connected at appropriate places, and connected to the wiring pattern by electronic circuit element force S wire bonding or the like mounted on the upper surface of the wiring board, and the mother board on which the wiring board is mounted. The caster conductor is soldered on the solder land of the board. As a result, the electronic circuit element on the wiring board is electrically connected to the external circuit via the caster conductor.
[0003] 図 6は従来の配線基板のキャスタレーシヨン導体を示す斜視図である。同図に示す 配線基板 1には、セラミック基板 2の側面に凹溝状の切欠き 3, 4が設けられており、こ れら切欠き 3, 4内の壁面に銀等の良導電性材料からなる所定の厚みのキャスタレ一 シヨン導体 5が形成されている。また、図示していないが、この配線基板 1の内層や外 層にはキャスタレーシヨン導体 5と接続された配線パターンが設けられていると共に、 配線基板 1の上面に電子回路素子が搭載されており、これら電子回路素子と配線パ ターンとがワイヤボンディング等によって接続されている。なお、通常、キャスタレーシ ヨン導体 5の表面には半田濡れ性の向上や銀の半田喰われ防止を図るために、ニッ ケル層等の図示せぬメツキ層が被着されている(例えば、特許文献 1参照)。 FIG. 6 is a perspective view showing a caster conductor of a conventional wiring board. In the wiring board 1 shown in the figure, concave cutouts 3 and 4 are provided on the side surface of the ceramic substrate 2, and a highly conductive material such as silver is formed on the wall surfaces of the cutouts 3 and 4. A caster conductor 5 having a predetermined thickness is formed. Although not shown, a wiring pattern connected to the caster conductor 5 is provided on the inner layer and the outer layer of the wiring board 1, and an electronic circuit element is mounted on the upper surface of the wiring board 1. These electronic circuit elements and wiring patterns are connected by wire bonding or the like. Normally, the surface of the caster conductor 5 is knitted to improve solder wettability and prevent silver solder erosion. A not-shown plating layer such as a Kell layer is applied (see, for example, Patent Document 1).
[0004] 図 7は図 6に示す従来の配線基板の製造過程を示す説明図である。図 7に示す大 判基板 6は、所要の導電部を形成したグリーンシートの積層体を焼成したものであり、 縦横の分割ライン 7, 8によって区画されて!/、る小領域 9が各配線基板 1に対応して!/ヽ るため、この大判基板 6を分割ライン 7, 8に沿って分割することにより配線基板 1が多 数個取りされる。また、大判基板 6には分割ライン 7, 8と重なり合う所定位置に多数の スルーホール 10が穿設されており、各スルーホール 10の内壁に所定の厚みの未分 割なキャスタレーシヨン導体 5が設けられている。つまり、この大判基板 6は分割ライン 7, 8に沿う分割面が各配線基板 1の側面となるため、多数個取りされた配線基板 1の 側面には、スルーホール 10を 2分割してなる切欠き 3の内壁と 4分割してなる切欠き 4 の内壁にそれぞれキャスタレーシヨン導体 5が設けられた状態となる。なお、スルーホ ール 10の内壁にキャスタレーシヨン導体 5を形成する際には、スルーホール 10内に 銀ペースト等の導電材料を充填した後、このスルーホール 10の中央部に貫通孔 10a を穿設して該導電材料の一部を取り除くことにより、残存する導電材料によって所定 の厚みの未分割なキャスタレーシヨン導体 5を形成できる。 FIG. 7 is an explanatory view showing a manufacturing process of the conventional wiring board shown in FIG. A large substrate 6 shown in FIG. 7 is obtained by firing a laminate of green sheets on which necessary conductive portions are formed, and is divided by vertical and horizontal dividing lines 7 and 8. A large number of wiring boards 1 are obtained by dividing the large-sized board 6 along the dividing lines 7 and 8 so as to correspond to the board 1. The large substrate 6 has a number of through holes 10 at predetermined positions overlapping the dividing lines 7 and 8, and an undivided caster conductor 5 having a predetermined thickness is formed on the inner wall of each through hole 10. Is provided. In other words, since the divided surface along the dividing lines 7 and 8 is the side surface of each wiring substrate 1 in this large-sized substrate 6, the through-hole 10 is divided into two parts on the side surface of the wiring substrate 1 that has been removed. The caster conductor 5 is provided on each of the inner wall of the notch 3 and the inner wall of the notch 4 divided into four parts. When forming the castor conductor 5 on the inner wall of the through hole 10, after filling the through hole 10 with a conductive material such as silver paste, the through hole 10a is formed in the center of the through hole 10. By providing and removing a part of the conductive material, an undivided caster conductor 5 having a predetermined thickness can be formed by the remaining conductive material.
特許文献 1 :特開 2003— 179176号公報(第 3— 5頁、図 3)  Patent Document 1: Japanese Unexamined Patent Publication No. 2003-179176 (Page 3-5, Fig. 3)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] 前述したように大判基板 6から多数個取りされる配線基板 1のキャスタレーシヨン導 体 5は、分割ライン 7, 8と重なり合うスルーホール 10の内壁に形成されたものなので 、大判基板 6を分割する前にメツキ処理を施してキャスタレーシヨン導体 5にメツキ層を 被着させたとしても、分割ライン 7や分割ライン 8に合致するキャスタレーシヨン導体 5 の端面(分割面)はメツキ層の存しない無メツキ領域になってしまう。そして、キャスタレ ーシヨン導体 5の該端面が無メツキのまま配線基板 1が母基板上に実装されると、キヤ スタレーシヨン導体 5中の銀成分が該端面で半田喰われを起こしてしまうので、信頼 性は著しく低下する。 [0005] As described above, the caster conductor 5 of the wiring board 1 that is taken in large numbers from the large board 6 is formed on the inner wall of the through hole 10 that overlaps the dividing lines 7 and 8, so that the large board 6 Even if a plating process is applied to the caster conductor 5 before dividing it, the end face (split surface) of the caster conductor 5 that matches the dividing line 7 and the dividing line 8 remains on the plating layer. It becomes a non-sticky area that does not exist. Then, if the wiring board 1 is mounted on the mother board while the end face of the castor conductor 5 is not scratched, the silver component in the caster conductor 5 will cause solder erosion at the end face. Is significantly reduced.
[0006] そこで、キャスタレーシヨン導体 5中の銀成分の半田喰われを防止するためには大 判基板 6を分割して得た個片(配線基板 1)にメツキ処理を施す必要がある力 このよ うにすると、大判基板 6の状態で行うメツキ処理と比べて作業効率が低下するのみな らず、電子回路素子を搭載して導通検査等を行うというメツキ処理後の工程も大判基 板 6の状態では実施できなくなってしまうので、生産性が低下して製造コストの上昇を 余儀なくされてしまう。 [0006] Therefore, in order to prevent the solder component of the silver component in the caster conductor 5 from being eroded, it is necessary to subject the individual pieces (wiring board 1) obtained by dividing the large board 6 to a plating process. This As a result, not only the work efficiency is reduced compared to the plating process performed in the state of the large-sized substrate 6, but also the process after the plating process in which an electronic circuit element is mounted and the continuity test is performed is in the state of the large-sized substrate 6. In this case, it becomes impossible to implement, and productivity is reduced and manufacturing costs are inevitably increased.
[0007] また、従来の製造方法では、分割ライン 7, 8とキャスタレーシヨン導体 5とが重なり合 つた状態のまま、ハーフカットやダイシング等の手法で大判基板 6の分割作業を行う ことになる力 S、セラミックと金属が混在する部位が分割面となるため分割性に難があり 、分割面にバリや欠け、汚れ等が生じやすいという問題があった。  [0007] In the conventional manufacturing method, the large-sized substrate 6 is divided by a method such as half-cutting or dicing while the dividing lines 7 and 8 and the caster conductor 5 are overlapped. Since there is a force S, and the part where ceramic and metal are mixed becomes a split surface, there is a problem in that the split property is difficult, and there is a problem that burrs, chips, dirt, etc. are likely to occur on the split surface.
[0008] 本発明は、このような従来技術の実情に鑑みてなされたもので、その第 1の目的は 、多数個取り用の大判基板の状態でキャスタレーシヨン導体の全表面にメツキ処理を 施すことができて分割性も良好な配線基板を提供することにある。また、本発明の第 2の目的は、力、かる配線基板の製造方法を提供することにある。  [0008] The present invention has been made in view of such a state of the art, and a first object of the present invention is to perform a plating process on the entire surface of a caster conductor in the state of a large-sized substrate for multi-piece production. An object of the present invention is to provide a wiring board that can be applied and has good division. In addition, a second object of the present invention is to provide a method for manufacturing a wiring board that is powerful.
課題を解決するための手段  Means for solving the problem
[0009] 上記第 1の目的を達成するために、本発明では、上下両面に至る凹溝状の切欠き が側面に設けられたセラミック基板と、前記切欠き内の壁面に設けられてメツキ層が 被着されたキャスタレーシヨン導体とを備え、前記セラミック基板が大判基板を分割ラ インに沿って分割することにより多数個取りされる配線基板において、前記セラミック 基板の前記切欠きが、その幅方向両端部に位置して前記キャスタレーシヨン導体に 被覆されない一対の露出壁面と、これら一対の露出壁面の間に位置して前記キャス タレーシヨン導体によって被覆される被覆壁面とを有し、この被覆壁面に設けられた 前記キャスタレーシヨン導体が前記露出壁面を介して前記側面と離隔して!/、るとレ、う 構成にした。 [0009] In order to achieve the first object, in the present invention, in the present invention, a grooved notch extending to both the upper and lower surfaces is provided on the side surface of the ceramic substrate, and a plating layer is provided on the wall surface in the notch. A wiring board having a plurality of ceramic substrates taken by dividing a large-sized substrate along a dividing line, the notches of the ceramic substrate having a width thereof A pair of exposed wall surfaces that are not covered by the caster conductor and located at both ends of the direction, and a coated wall surface that is located between the pair of exposed wall surfaces and is covered by the caster conductor. The caster conductor provided on the side wall is separated from the side surface via the exposed wall surface.
[0010] このように構成された配線基板は、セラミック基板の側面の切欠きの内壁に設けら れたキャスタレーシヨン導体が該切欠きの露出壁面を介して該側面と離隔させてある ため、多数個取り用の大判基板の状態で、分割ラインと重なり合わずに露出するキヤ スタレーシヨン導体の全表面にメツキ層を被着させることができる。それゆえ、キャスタ レーシヨン導体に施すメツキ処理工程の作業効率が向上すると共に、電子回路素子 を搭載して導通検査等を行うというメツキ処理後の工程も大判基板の状態で実施でき るようになり、信頼性を損なうことなく生産性を大幅に高めることが可能となる。また、 大判基板の分割ラインとキャスタレーシヨン導体とが重なり合わないことから分割性が 良好となり、よって分割面にノ リや欠け、汚れ等が生じに《なる。 [0010] In the wiring board configured as described above, since the castor conductor provided on the inner wall of the cutout on the side surface of the ceramic substrate is separated from the side surface via the exposed wall surface of the cutout, In the state of a large-sized substrate for taking a large number of pieces, a plating layer can be deposited on the entire surface of the castor conductor conductor exposed without overlapping the dividing lines. Therefore, the working efficiency of the plating process applied to the caster conductor is improved, and the post-meshing process of mounting an electronic circuit element and conducting continuity inspection etc. can be performed in the state of a large substrate. As a result, productivity can be significantly increased without impairing reliability. In addition, since the dividing line of the large substrate and the caster conductor do not overlap, the dividing property is improved, and therefore, the dividing surface becomes clogged, chipped, soiled, and the like.
[0011] 上記構成の配線基板において、セラミック基板は単層であってもよいが、セラミック 基板が多層基板であれば、一般的な配線基板に適用できるため好ましレ、。 In the wiring board having the above configuration, the ceramic substrate may be a single layer. However, if the ceramic substrate is a multilayer substrate, it is preferable because it can be applied to a general wiring substrate.
[0012] また、上記第 2の目的を達成するために、本発明による配線基板の製造方法では、 多数個取り用のグリーンシートの分割ライン近傍を含む所定位置にキャスタレーショ ン導体用のスルーホールを多数穿設して、これらスルーホールに導電材料を充填す る導電材料充填工程と、この導電材料充填工程後に、前記分割ラインを横断して前 記スルーホールと部分的に重なり合う貫通孔を前記グリーンシートに穿設することに よって、前記スルーホール内の周縁部で前記貫通孔と重なり合わない凹所に充填さ れている前記導電材料を前記分割ラインから離隔して存するキャスタレーシヨン導体 となすと共に、該スルーホール内の他所に充填されている前記導電材料を切除する キャスタレーシヨン導体形成工程と、このキャスタレーシヨン導体形成工程後に前記グ リーンシートを焼成して多数個取り用の大判基板を得る焼成工程と、この焼成工程後 に前記キャスタレーシヨン導体の表面にメツキ層を被着させるメッキエ程と、このメツキ 工程後に前記大判基板を前記分割ラインに沿って個片に分割する分割工程とを含 み、前記分割工程によって前記キャスタレーシヨン導体を有する配線基板が多数個 取りされるようにした。  [0012] In order to achieve the second object, in the method for manufacturing a wiring board according to the present invention, a through hole for a caster conductor is provided at a predetermined position including the vicinity of a dividing line of a multi-sheet green sheet. A conductive material filling step for filling the through holes with a conductive material, and after the conductive material filling step, through holes that partially overlap the through holes across the dividing line are formed. A castoration conductor that is spaced apart from the dividing line by filling the recess not overlapping with the through-hole at the peripheral edge in the through-hole by punching in the green sheet; And a caster conductor forming process for cutting off the conductive material filled in the other part of the through-hole, and the caster guide A firing process for firing the green sheet after the forming process to obtain a large-sized substrate for taking a large number of pieces, a plating process for depositing a plating layer on the surface of the caster conductor conductor after the firing process, and the plating process And a dividing step of dividing the large substrate into individual pieces along the dividing line, and a plurality of wiring boards having the caster conductors are taken by the dividing step.
[0013] このような配線基板の製造方法では、キャスタレーシヨン導体用のスルーホールに 導電材料を充填させた後に、分割ラインを横断して該スルーホールと部分的に重なり 合う貫通孔をグリーンシートに穿設することによって、該スルーホール内の周縁部で 分割ラインから離隔した凹所に該貫通孔を臨む導電材料を残存させて、該導電材料 をキャスタレーシヨン導体となすことができる。そのため、多数個取り用の大判基板を 個片に分割する前に、各配線基板のキャスタレーシヨン導体の全表面にメツキ層を被 着させることができて、キャスタレーシヨン導体に施すメツキ処理工程の作業効率が向 上すると共に、電子回路素子を搭載して導通検査等を行うというメツキ処理後の工程 も大判基板の状態で実施できるようになり、信頼性を損なうことなく生産性を大幅に高 めること力 S可能となる。また、大判基板の分割ラインとキャスタレーシヨン導体とが重な り合わないことから分割性が良好となり、よって分割面にノ リや欠け、汚れ等が生じに くくなる。 [0013] In such a method of manufacturing a wiring board, after filling a through hole for a caster conductor with a conductive material, a through hole that crosses the dividing line and partially overlaps the through hole is formed in a green sheet. The conductive material that faces the through hole is left in the recess separated from the dividing line at the peripheral edge in the through hole, so that the conductive material can be used as a caster conductor. Therefore, before dividing a large-sized board for multi-piece production into pieces, a plating layer can be applied to the entire surface of the castor conductor of each wiring board, and a process for applying a process to the caster conductor. As well as improving the work efficiency, the post-processing process of mounting electronic circuit elements and conducting continuity tests, etc., can also be performed in the state of a large substrate, greatly improving productivity without sacrificing reliability. High The ability to turn S is possible. Also, since the dividing line of the large-sized substrate and the caster conductor do not overlap each other, the dividing property is improved, so that the dividing surface is less likely to be clogged, chipped or soiled.
[0014] 上記の製造方法において、キャスタレーシヨン導体形成工程後にグリーンシートを 複数枚積層して加熱圧着する積層体形成工程を行レ \この積層体形成工程後に焼 成工程を行うことにより大判基板を多層基板となしておけば、一般的な配線基板の製 造に適用できるため好ましい。  [0014] In the above manufacturing method, after the caster conductor formation process, a multilayer body forming process is performed in which a plurality of green sheets are stacked and thermocompression bonded. If it is made into a multilayer substrate, since it can apply to manufacture of a general wiring board, it is preferable.
発明の効果  The invention's effect
[0015] 本発明の配線基板は、セラミック基板の側面の切欠きの内壁に設けられたキャスタ レーシヨン導体が該切欠きの露出壁面を介して該側面と離隔させてあるため、多数 個取り用の大判基板の状態で、分割ラインと重なり合わずに露出するキャスタレーシ ヨン導体の全表面にメツキ層を被着させることができる。それゆえ、キャスタレーシヨン 導体に施すメツキ処理工程の作業効率が向上すると共に、電子回路素子を搭載して 導通検査等を行うというメツキ処理後の工程も大判基板の状態で実施できるようにな り、信頼性を損なうことなく生産性を大幅に高めることが可能となる。また、大判基板 の分割ラインとキャスタレーシヨン導体とが重なり合わないことから分割性が良好となり 、よって分割面にノ リや欠け、汚れ等が生じに《なる。  [0015] In the wiring board of the present invention, the caster conductor provided on the inner wall of the cutout on the side surface of the ceramic substrate is separated from the side surface via the exposed wall surface of the cutout. In the state of a large substrate, a plating layer can be applied to the entire surface of the castor conductor conductor exposed without overlapping the dividing lines. Therefore, the working efficiency of the plating process performed on the caster conductor is improved, and the post-etching process, in which an electronic circuit element is mounted and a continuity test is performed, can be performed in the state of a large substrate. As a result, productivity can be significantly increased without impairing reliability. Further, since the dividing line of the large-sized substrate and the caster conductor do not overlap, the dividing property is improved, so that the dividing surface becomes clogged, chipped, soiled or the like.
[0016] また、本発明による配線基板の製造方法は、キャスタレーシヨン導体用のスルーホ ールに導電材料を充填させた後に、分割ラインを横断して該スルーホールと部分的 に重なり合う貫通孔をグリーンシートに穿設することによって、該スルーホール内の周 縁部で分割ラインから離隔した凹所に該貫通孔を臨む導電材料を残存させて、該導 電材料をキャスタレーシヨン導体となすことができる。そのため、多数個取り用の大判 基板を個片に分割する前に、各配線基板のキャスタレーシヨン導体の全表面にメツキ 層を被着させることができて、キャスタレーシヨン導体に施すメツキ処理工程の作業効 率が向上すると共に、電子回路素子を搭載して導通検査等を行うというメツキ処理後 の工程も大判基板の状態で実施できるようになり、信頼性を損なうことなく生産性を大 幅に高めることが可能となる。また、大判基板の分割ラインとキャスタレーシヨン導体と が重なり合わないことから分割性が良好となり、よって分割面にノ リや欠け、汚れ等が 生じに《なる。 [0016] Further, in the method for manufacturing a wiring board according to the present invention, after filling a through hole for a caster conductor with a conductive material, a through-hole that partially overlaps the through-hole across a dividing line is formed. By piercing the green sheet, the conductive material facing the through hole is left in a recess separated from the dividing line at the peripheral edge in the through hole, and the conductive material is made into a castor conductor. Can do. Therefore, before dividing the large-sized substrate for multi-piece production into pieces, a plating layer can be applied to the entire surface of the castor conductor of each wiring board, and a process for applying a process to the caster conductor. In addition to improving work efficiency, the post-processing process of mounting electronic circuit elements and conducting continuity tests, etc., can also be performed in the state of a large substrate, greatly improving productivity without sacrificing reliability. Can be increased. In addition, since the dividing line of the large substrate and the caster conductor do not overlap each other, the dividing property is improved, so that the dividing surface is free of chips, chips, dirt, etc. It becomes <<
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0017] 発明の実施の形態を図面を参照して説明すると、図 1は本発明の実施形態例に係 る配線基板のキャスタレーシヨン導体を示す斜視図、図 2は該キャスタレーシヨン導体 の断面図、図 3〜図 5は該配線基板の製造工程図である。  An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing a caster conductor of a wiring board according to an embodiment of the present invention, and FIG. 2 is a diagram of the caster conductor. Cross-sectional views and FIGS. 3 to 5 are manufacturing process diagrams of the wiring board.
[0018] 図 1および図 2に示す配線基板 11は、図示せぬ電子回路素子が上面に搭載される 多層構造のセラミック基板 12と、このセラミック基板 12の内層や外層に設けられた図 示せぬ配線パターンと、セラミック基板 12の側面の切欠き 13, 14の内壁に設けられ た銀等の良導電性材料力 なるキャスタレーシヨン導体 15とを備えている。各切欠き 13, 14の内壁のうち、幅方向両端部はそれぞれキャスタレーシヨン導体 15に被覆さ れない露出壁面 13a, 14aとなっている。また、キャスタレーシヨン導体 15に被覆され ている各切欠き 13, 14の被覆壁面 13b, 14bは、それぞれ露出壁面 13a, 14aよりも 深レ、溝状に形成されてレ、る。この配線基板 11の配線パターンは適宜個所でキャスタ レーシヨン導体 15と接続されており、この配線パターンと電子回路素子とがワイヤボ ンデイング等によって接続されるようになっている。また、キャスタレーシヨン導体 15は 、この配線基板 11が実装される図示せぬ母基板の半田ランド上で半田付けされるた め、配線基板 11上の電子回路素子がキャスタレーシヨン導体 15を介して外部回路と 電気的に接続されることとなる。なお、半田濡れ性の向上や銀の半田喰われ防止を 図るために、キャスタレーシヨン導体 15の全表面にはニッケルや金等からなるメツキ 層 16が被着させてある。  A wiring board 11 shown in FIGS. 1 and 2 includes a multilayer ceramic substrate 12 on which an electronic circuit element (not shown) is mounted on the upper surface, and not shown provided on an inner layer and an outer layer of the ceramic substrate 12. A wiring pattern and a caster conductor 15 having a good conductive material such as silver provided on inner walls of the cutouts 13 and 14 on the side surface of the ceramic substrate 12 are provided. Of the inner walls of the notches 13 and 14, both end portions in the width direction are exposed wall surfaces 13 a and 14 a that are not covered with the caster conductor 15. Further, the coated wall surfaces 13b and 14b of the notches 13 and 14 coated on the caster conductor 15 are formed deeper and grooved than the exposed wall surfaces 13a and 14a, respectively. The wiring pattern of this wiring board 11 is connected to caster conductors 15 at appropriate places, and this wiring pattern and electronic circuit elements are connected by wire bonding or the like. Further, since the caster conductor 15 is soldered on a solder land of a mother board (not shown) on which the wiring board 11 is mounted, the electronic circuit elements on the wiring board 11 pass through the caster conductor 15. It will be electrically connected to the external circuit. In order to improve solder wettability and prevent silver solder erosion, a plating layer 16 made of nickel, gold or the like is deposited on the entire surface of the caster conductor 15.
[0019] キャスタレーシヨン導体 15の構造について詳しく説明すると、セラミック基板 12の側 面には、後述するスルーホール 23を 2分割してなる切欠き 13と、後述するスルーホ ール 24を 4分割してなる切欠き 14とが、それぞれ複数個所に設けられている。各切 欠き 13, 14内において、被覆壁面 13b, 14bが形成されている最奥部にはそれぞれ キャスタレーシヨン導体 15が設けられている。切欠き 13, 14はいずれもセラミック基 板 12の上下両面に至る凹溝状に形成されており、切欠き 13内で被覆壁面 13bを被 覆するキャスタレーシヨン導体 15がー対の露出壁面 13a, 13aの間に露出して、該キ ヤスタレーシヨン導体 15の表面と両露出壁面 13aとによってほぼ半円筒面が形成さ れている。同様に、切欠き 14内で被覆壁面 14bを被覆するキャスタレーシヨン導体 1 5がー対の露出壁面 14a, 14aの間に露出して、該キャスタレーシヨン導体 15の表面 と両露出壁面 14aとによってほぼ 4分割円筒面が形成されている。したがって、切欠 き 13内のキャスタレーシヨン導体 15は露出壁面 13aを介してセラミック基板 12の側面 と離隔しており、切欠き 14内のキャスタレーシヨン導体 15は露出壁面 14aを介してセ ラミック基板 12の側面と離隔している。 [0019] The structure of the caster conductor 15 will be described in detail. On the side surface of the ceramic substrate 12, a notch 13 formed by dividing a through hole 23 described later into two and a through hole 24 described later are divided into four. Notches 14 are provided at a plurality of locations. In each of the notches 13 and 14, caster conductors 15 are provided at the innermost portions where the covering wall surfaces 13b and 14b are formed. The notches 13 and 14 are each formed in the shape of a concave groove extending to both the upper and lower surfaces of the ceramic substrate 12. The caster conductor 15 covering the coated wall surface 13b in the notch 13 is a pair of exposed wall surfaces 13a. , 13a, and a substantially semi-cylindrical surface is formed by the surface of the caster conductor 15 and both exposed wall surfaces 13a. It is. Similarly, the castor conductor 15 that covers the coated wall 14b in the notch 14 is exposed between the pair of exposed walls 14a and 14a, and the surface of the caster conductor 15 and both exposed walls 14a As a result, a quadruple cylindrical surface is formed. Therefore, the castor conductor 15 in the notch 13 is separated from the side surface of the ceramic substrate 12 via the exposed wall surface 13a, and the castor conductor 15 in the notch 14 is separated from the ceramic substrate via the exposed wall surface 14a. Separated from 12 sides.
[0020] 後述するように、配線基板 11は大判基板 28 (図 5参照)を分割ライン 21 , 22に沿つ て分割することにより多数個取りされるため、大判基板 28の分割面が配線基板 11の 側面となる。そして、この配線基板 11の側面と切欠き 13, 14内のキャスタレーシヨン 導体 15とが露出壁面 13aや露出壁面 14aを介して離隔させてあるため、大判基板 2 8の状態で各配線基板 11のキャスタレーシヨン導体 15を予め分害 IJライン 21 , 22から 離隔させておくこと力 Sできる。つまり、この配線基板 11は製造過程でキャスタレーショ ン導体 15を分割面と重なり合わない位置に形成して露出させておくことができるため 、多数個取りされる前の大判基板 28の状態で各配線基板 11のキャスタレーシヨン導 体 15の全表面にメツキ層 16を被着させることが可能である。  [0020] As will be described later, a large number of wiring boards 11 are obtained by dividing the large board 28 (see FIG. 5) along the dividing lines 21 and 22, so that the divided surface of the large board 28 is the wiring board. 11th aspect. Since the side surface of the wiring board 11 and the caster conductors 15 in the notches 13 and 14 are separated from each other through the exposed wall surface 13a and the exposed wall surface 14a, each wiring board 11 in the state of the large board 28. The caster conductor 15 can be separated from the destructive IJ lines 21 and 22 in advance. In other words, since the wiring board 11 can be exposed by forming caster conductors 15 at positions where they do not overlap with the dividing surface during the manufacturing process, The plating layer 16 can be applied to the entire surface of the caster conductor 15 of the wiring board 11.
[0021] 配線基板 11の製造方法について詳しく説明すると、まず、図 3 (a)に示すように、多 数個取り用のグリーンシート 20の縦横の分割ライン 21 , 22と重なり合う所定位置に、 パンチングマシン等によってキャスタレーシヨン導体 15用のスルーホール 23, 24を 多数穿設する。このとき、分割ライン 21のみ、または分割ライン 22のみと重なり合うス ルーホール 23は、 2個の丸孔を連ねることによって平面視形状が 8の字のような孔と なす。他方、分害 ijライン 21 , 22の交差部と重なり合うスルーホール 24は、 4個の丸孔 を連ねることによって平面視形状が四つ葉クローバのような孔となす。また、これらス ルーホール 23, 24を穿設する際に、図示せぬ配線パターン用のスルーホールも穿 し ね \。  [0021] The manufacturing method of the wiring board 11 will be described in detail. First, as shown in FIG. 3 (a), punching is performed at a predetermined position where it overlaps with the vertical and horizontal dividing lines 21 and 22 of the multi-sheet green sheet 20. A number of through-holes 23 and 24 for caster conductor 15 are drilled by a machine. At this time, the through hole 23 that overlaps only the dividing line 21 or only the dividing line 22 is formed into a hole having a shape of figure 8 in plan view by connecting two round holes. On the other hand, the through hole 24 that overlaps the intersecting part of the harm ij lines 21 and 22 has a shape like a four-leaf clover in plan view by connecting four round holes. Also, when drilling these through holes 23, 24, do not drill through holes for wiring patterns (not shown).
[0022] 次に、図 3 (b)に示すように、スノレーホ一ノレ 23, 24や配線パターン用スルーホール に銀ペースト 25を充填する。しかる後、図 3 (c)やその A部拡大図である図 4に示すよ うに、分割ライン 21または分割ライン 22を横断してスルーホール 23と部分的に重なり 合う丸孔形状の貫通孔 26と、分割ライン 21および分割ライン 22を横断してスルーホ ール 24と部分的に重なり合う丸孔形状の貫通孔 27とを、グリーンシート 20に穿設す る。こうして貫通孔 26を設けることによって、スルーホール 23内の銀ペースト 25のうち 、貫通孔 26と重なり合わず分割ライン 21 , 22からは離隔している平面視三日月形の 凹所 23aに充填されて!/、る銀ペースト 25だけが残存してキャスタレーシヨン導体 15と なり、該スルーホール 23内の他所に充填されている銀ペースト 25は、該他所と近傍 の分割ラインとの間に存するグリーンシート 20の壁部と共に切除される。つまり、スル 一ホール 23内の銀ペースト 25を貫通孔 26で打ち抜くことによって相対向する 2箇所 にキャスタレーシヨン導体 15が形成され、各キャスタレーシヨン導体 15と近傍の分割 ラインとの間に形成される貫通孔 26の内壁が前記露出壁面 13aとなる。また、残存す るスルーホール 23の内壁は前記被覆壁面 13bとなるため、貫通孔 26およびスルー ホール 23によって、 2箇所の前記切欠き 13を向き合わせて連通させた形状の孔が形 成されることになる。 Next, as shown in FIG. 3 (b), silver paste 25 is filled into the snorkel wheels 23 and 24 and the wiring pattern through holes. After that, as shown in FIG. 3 (c) and FIG. 4 which is an enlarged view of the A part thereof, the round hole-shaped through hole 26 that partially overlaps the through hole 23 across the dividing line 21 or the dividing line 22 is obtained. Through the dividing line 21 and dividing line 22. The green sheet 20 is drilled with a round hole-shaped through hole 27 that partially overlaps the tool 24. By providing the through-hole 26 in this way, the silver paste 25 in the through-hole 23 is filled in the crescent-shaped recess 23a in plan view that does not overlap with the through-hole 26 and is separated from the dividing lines 21 and 22. ! /, Only the silver paste 25 remains and becomes the castor conductor 15, and the silver paste 25 filled in the other part of the through hole 23 is the green that exists between the other part and the adjacent dividing line. The sheet 20 is cut together with the wall. In other words, caster conductors 15 are formed at two opposite positions by punching the silver paste 25 in the through hole 23 through the through hole 26, and formed between each caster conductor 15 and the adjacent dividing line. The inner wall of the through-hole 26 is the exposed wall surface 13a. In addition, since the inner wall of the remaining through hole 23 becomes the covering wall surface 13b, the through hole 26 and the through hole 23 form a hole having a shape in which the two notches 13 face each other and communicate with each other. It will be.
[0023] 同様に、貫通孔 27を設けることによって、スルーホール 24内の銀ペースト 25のうち 、貫通孔 27と重なり合わず分割ライン 21 , 22からは離隔している平面視三日月形の 凹所 24aに充填されて!/、る銀ペースト 25だけが残存してキャスタレーシヨン導体 15と なり、該スルーホール 24内の他所に充填されている銀ペースト 25は、該他所と近傍 の分割ラインとの間に存するグリーンシート 20の壁部と共に切除される。つまり、スル 一ホール 24内の銀ペースト 25を貫通孔 27で打ち抜くことによって等間隔な 4箇所に キャスタレーシヨン導体 15が形成され、各キャスタレーシヨン導体 15と近傍の分割ラ インとの間に形成される貫通孔 27の内壁が前記露出壁面 14aとなる。また、残存する スルーホール 24の内壁は前記被覆壁面 14bとなるため、貫通孔 27およびスルーホ ール 24によって、 4箇所の前記切欠き 14を向き合わせて連通させた形状の孔が形 成されることになる。  Similarly, by providing the through hole 27, the silver paste 25 in the through hole 24 does not overlap with the through hole 27 and is separated from the dividing lines 21 and 22. Only the silver paste 25 filled in 24a remains and becomes the castor conductor 15, and the silver paste 25 filled in the other part of the through hole 24 has a dividing line adjacent to the other part. It is cut out together with the wall of the green sheet 20 existing between the two. In other words, caster conductors 15 are formed at four equally spaced locations by punching the silver paste 25 in the through holes 24 through the through holes 27, and between the caster conductors 15 and the adjacent divided lines. The inner wall of the formed through hole 27 becomes the exposed wall surface 14a. Further, since the inner wall of the remaining through hole 24 becomes the covering wall surface 14b, the through hole 27 and the through hole 24 form a hole having a shape in which the four notches 14 face each other and communicate with each other. It will be.
[0024] この後、グリーンシート 20に前記配線パターン等を印刷し、次いで、所定枚数のグ リーンシート 20を図示せぬ積層治具に積層して、これを真空パック状態で図示せぬ 静水圧プレス装置に入れて加熱圧着することにより積層体となす。そして、この積層 体を焼成することにより、図 5に示すような多数個取り用の大判基板 28を得る。この大 判基板 28は、縦横の分割ライン 21 , 22によって区画されている小領域 29が各配線 基板 11に対応している。 [0024] Thereafter, the wiring pattern or the like is printed on the green sheet 20, and then a predetermined number of green sheets 20 are stacked on a stacking jig (not shown), which is not shown in a vacuum pack state. It is made into a laminated body by putting in a press machine and thermocompression bonding. Then, by firing this laminate, a large-sized substrate 28 for multi-piece production as shown in FIG. 5 is obtained. This large substrate 28 has a small area 29 divided by vertical and horizontal dividing lines 21 and 22 and each wiring. Corresponds to board 11.
[0025] 次に、大判基板 28の表面に露出する導体部分にニッケルメツキや金メッキを施し、 各キャスタレーシヨン導体 5にメツキ層 16を被着させる。このとき、各小領域 29のキヤ スタレーシヨン導体 15は、分割ライン 21 , 22とは重なり合わず貫通孔 26や貫通孔 27 に露出しているため、大判基板 28の状態で各キャスタレーシヨン導体 15の全表面に メツキ層 16を被着させることができる。しかる後、この大判基板 28を分割ライン 21 , 2 2に沿って分割することにより、図 1および図 2に示すような配線基板 11が多数個取り できる。なお、この分割工程で、分割ライン 21 , 22に沿う大判基板 28の分割面は各 配線基板 11の側面となる。また、貫通孔 26が二分割されて各配線基板 11の切欠き 13が形成されると共に、貫通孔 27が四分割されて各配線基板 11の切欠き 14が形 成される。 Next, nickel plating or gold plating is applied to the conductor portion exposed on the surface of the large substrate 28, and the plating layer 16 is attached to each caster conductor 5. At this time, the castor conductors 15 in the respective small regions 29 are not overlapped with the dividing lines 21 and 22 and are exposed to the through holes 26 and the through holes 27. Therefore, the caster conductors 15 in the state of the large substrate 28 are formed. A plating layer 16 can be applied to the entire surface of the substrate. Thereafter, by dividing the large substrate 28 along the dividing lines 21 and 22, a large number of wiring substrates 11 as shown in FIGS. 1 and 2 can be obtained. In this dividing step, the dividing surface of the large substrate 28 along the dividing lines 21 and 22 becomes the side surface of each wiring substrate 11. Further, the through hole 26 is divided into two parts to form the notches 13 of the respective wiring boards 11, and the through hole 27 is divided into four parts to form the notches 14 of the respective wiring boards 11.
[0026] このように本実施形態例にあっては、配線基板 11の製造過程で、キャスタレーショ ン導体 15用のスルーホール 23, 24に銀ペースト(導電材料) 25を充填させた後に、 分割ライン 21 , 22を横断してスルーホール 23, 24と部分的に重なり合う貫通孔 26, 27をグリーンシー卜 20に穿設することによって、各スノレーホ一ノレ 23, 24内の凹所 23 a, 24aにキャスタレーシヨン導体 15が形成できるようになつている。そして、これらキ ヤスタレーシヨン導体 15は分害 IJライン 21 , 22から離隔して貫通孔 26や貫通孔 27に 露出しているため、多数個取り用の大判基板 28を個片に分割する前に、各配線基 板 11のキャスタレーシヨン導体 15の全表面にメツキ層 16を被着させること力 Sできる。 それゆえ、キャスタレーシヨン導体 15に施すメツキ処理工程の作業効率が向上すると 共に、電子回路素子を搭載して導通検査等を行うと!、ぅメツキ処理後の工程も大判基 板 28の状態で実施することができる。したがって、キャスタレーシヨン導体 15中の銀 成分の半田喰われを防止して信頼性を確保しつつ、生産性を大幅に高めることがで きる。し力、も、分割ライン 21 , 22とキャスタレーシヨン導体 15とが重なり合わないので、 大判基板 28の分割性は良好であり、それゆえ分割面にノ リゃ欠け、汚れ等が生じに くくなつて良品率の向上が期待できる。  As described above, in the present embodiment example, in the process of manufacturing the wiring substrate 11, the silver paste (conductive material) 25 is filled in the through holes 23 and 24 for the castor conductor 15, and then divided. By drilling through holes 26 and 27 in the green sea ridges 20 that cross the lines 21 and 22 and partially overlap the through holes 23 and 24, the recesses 23a and 24a in each of the snorley wheels 23 and 24 are formed. The caster conductor 15 can be formed on the front. These caster conductors 15 are exposed to the through holes 26 and 27 so as to be separated from the destructive IJ lines 21 and 22, so that before the large-sized substrate 28 for taking a large number of pieces is divided into pieces, The force S can be applied to the plating layer 16 on the entire surface of the caster conductor 15 of each wiring board 11. Therefore, the working efficiency of the plating process performed on the caster conductor 15 is improved, and the electronic circuit element is mounted to conduct a continuity test, etc., and the process after the plating process is also in the state of the large board 28. Can be implemented. Therefore, the silver component in the caster conductor 15 can be prevented from being eroded by solder and the reliability can be ensured, and the productivity can be greatly increased. However, since the dividing lines 21 and 22 and the caster conductor 15 do not overlap each other, the large-sized substrate 28 has a good dividing property, and therefore, the dividing surface is less likely to be chipped or soiled. The improvement of the non-defective product rate can be expected.
[0027] また、本実施形態例では、キャスタレーシヨン導体 15を形成するために行う貫通孔 26 , 27の打ち抜き工程で、スノレーホ一ノレ 23, 24内の凹所 23a, 24a以外の 分 ίこ 存する銀ペースト(導電材料) 25を隣接するグリーンシート 20の壁部と一括して切除 するため、不所望箇所に銀ペースト 25が残存する虞がない。しかも、スルーホール 2 3, 24や貫通孔 26, 27は通常のパンチングマシン等で正確に穿設することができる 。それゆえ、所望のキャスタレーシヨン導体 15を形成することが容易で、高信頼性が 確保しやすい。 [0027] In the present embodiment, in the punching process of the through holes 26, 27 performed to form the castor conductor 15, the separations other than the recesses 23a, 24a in the snorley wheels 23, 24 are performed. Since the existing silver paste (conductive material) 25 is cut together with the wall portion of the adjacent green sheet 20, there is no possibility that the silver paste 25 remains in an undesired location. Moreover, the through holes 23, 24 and the through holes 26, 27 can be accurately drilled with a normal punching machine or the like. Therefore, it is easy to form a desired caster conductor 15, and high reliability is easily ensured.
[0028] なお、スノレーホ一ノレ 23, 24や貫通孔 26 , 27の形状は適宜選択可能であり、要は、 キャスタレーシヨン導体用のスルーホールのうち貫通孔と重なり合わない部分に充填 されて!/、る導電材料によって、大判基板の分割ラインから離隔して該貫通孔に露出 するキャスタレーシヨン導体が形成されるような形状に設定されて!/、ればよ!/、。  [0028] It should be noted that the shape of the snorley wheel 23, 24 and the through holes 26, 27 can be selected as appropriate. In short, the portions of the through holes for caster conductors that do not overlap with the through holes are filled. Depending on the conductive material, the shape is such that a castor conductor is formed that is separated from the dividing line of the large substrate and exposed to the through hole! /!
[0029] また、上記実施形態例では、セラミック基板 12が多層基板である配線基板 11とそ の製造方法について説明した力、セラミック基板が単層の配線基板であっても本発 明を適用できることは言うまでもない。  [0029] Further, in the above embodiment, the power described in connection with the wiring substrate 11 in which the ceramic substrate 12 is a multilayer substrate and the manufacturing method thereof, and the present invention can be applied even if the ceramic substrate is a single-layer wiring substrate. Needless to say.
図面の簡単な説明  Brief Description of Drawings
[0030] [図 1]本発明の実施形態例に係る配線基板のキャスタレーシヨン導体を示す斜視図 である。  FIG. 1 is a perspective view showing a caster conductor of a wiring board according to an embodiment of the present invention.
[図 2]該キャスタレーシヨン導体の断面図である。  FIG. 2 is a cross-sectional view of the caster conductor.
[図 3]該配線基板の製造工程図である。  FIG. 3 is a manufacturing process diagram of the wiring board.
[図 4]図 3の A部拡大図である。  FIG. 4 is an enlarged view of part A in FIG.
[図 5]該配線基板の製造工程図である。  FIG. 5 is a manufacturing process diagram of the wiring board.
[図 6]従来の配線基板のキャスタレーシヨン導体を示す斜視図である。  FIG. 6 is a perspective view showing a caster conductor of a conventional wiring board.
[図 7]図 6に示す従来の配線基板の製造過程を示す説明図である。  7 is an explanatory view showing a manufacturing process of the conventional wiring board shown in FIG. 6.
符号の説明  Explanation of symbols
[0031] 11 配線基板 [0031] 11 Wiring board
12 セラミック基板  12 Ceramic substrate
13, 14 切欠き  13, 14 notch
13a, 14a 露出壁面  13a, 14a Exposed wall
13b, 14b 被覆壁面  13b, 14b coated wall
15 キャスタレーシヨン導体 メツキ層 15 Castor conductor Metsuki layer
グリーンシート, 22 分割ライン, 24 スノレーホ一ノレa, 24a 凹所  Green sheet, 22 split lines, 24 snorho honore, 24a recess
銀ペースト (導電材料), 27 貫通孔  Silver paste (conductive material), 27 Through hole
大判基板  Large format board

Claims

請求の範囲 The scope of the claims
[1] 上下両面に至る凹溝状の切欠きが側面に設けられたセラミック基板と、前記切欠き 内の壁面に設けられてメツキ層が被着されたキャスタレーシヨン導体とを備え、前記セ ラミック基板が大判基板を分割ラインに沿って分割することにより多数個取りされる配 線基板において、  [1] A ceramic substrate provided with a concave groove-like notch extending on both upper and lower sides on a side surface and a castor conductor conductor provided on a wall surface in the notch and having a plating layer attached thereto, In a wiring board where a large number of ceramic substrates are taken by dividing a large substrate along the dividing line,
前記セラミック基板の前記切欠きが、その幅方向両端部に位置して前記キャスタレ ーシヨン導体に被覆されない一対の露出壁面と、これら一対の露出壁面の間に位置 して前記キャスタレーシヨン導体によって被覆される被覆壁面とを有し、この被覆壁面 に設けられた前記キャスタレーシヨン導体が前記露出壁面を介して前記側面と離隔し て!/ヽることを特徴とする配線基板。  The notches of the ceramic substrate are located at both ends in the width direction and are covered with the caster conductors between a pair of exposed wall surfaces not covered with the caster conductors, and between the exposed wall surfaces. A wiring board, wherein the caster conductor provided on the coated wall surface is spaced from the side surface via the exposed wall surface.
[2] 請求項 1の記載において、前記セラミック基板が多層基板であることを特徴とする配[2] The arrangement according to claim 1, wherein the ceramic substrate is a multilayer substrate.
/锒基板。 / 锒 board.
[3] 多数個取り用のグリーンシートの分割ライン近傍を含む所定位置にキャスタレーショ ン導体用のスルーホールを多数穿設して、これらスルーホールに導電材料を充填す る導電材料充填工程と、  [3] A conductive material filling step in which a number of through holes for castor conductors are drilled at predetermined positions including the vicinity of the dividing line of a multi-sheet green sheet, and the through holes are filled with a conductive material.
この導電材料充填工程後に、前記分割ラインを横断して前記スルーホールと部分 的に重なり合う貫通孔を前記グリーンシートに穿設することによって、前記スルーホー ル内の周縁部で前記貫通孔と重なり合わない凹所に充填されている前記導電材料 を前記分割ラインから離隔して存するキャスタレーシヨン導体となすと共に、該スルー ホール内の他所に充填されている前記導電材料を切除するキャスタレーシヨン導体 形成工程と、  After the conductive material filling step, a through-hole that partially overlaps the through-hole across the dividing line is formed in the green sheet so that it does not overlap the through-hole at a peripheral edge in the through-hole. A caster conductor conductor forming step for forming a caster conductor that is spaced apart from the dividing line, and cutting off the conductive material that is filled in the other part of the through hole. When,
このキャスタレーシヨン導体形成工程後に前記グリーンシートを焼成して多数個取り 用の大判基板を得る焼成工程と、  A firing step of firing the green sheet after the caster conductor forming step to obtain a large-sized substrate for multiple pieces,
この焼成工程後に前記キャスタレーシヨン導体の表面にメツキ層を被着させるメツキ 工程と、  A plating step of depositing a plating layer on the surface of the caster conductor after the firing step;
このメツキ工程後に前記大判基板を前記分割ラインに沿って個片に分割する分割 工程とを含み、  A dividing step of dividing the large-sized substrate into pieces along the dividing line after the mating step,
前記分割工程によって前記キャスタレーシヨン導体を有する配線基板が多数個取り されるようにしたことを特徴とする配線基板の製造方法。 In the dividing step, a large number of wiring boards having the caster conductor are obtained. A method of manufacturing a wiring board, characterized by being made.
請求項 3の記載において、前記キャスタレーシヨン導体形成工程後に前記グリーン シートを複数枚積層して加熱圧着する積層体形成工程を行い、この積層体形成ェ 程後に前記焼成工程を行うことにより前記大判基板を多層基板となしたことを特徴と する配線基板の製造方法。  4. The method according to claim 3, wherein after the caster conductor formation step, a plurality of green sheets are laminated and subjected to thermocompression bonding, and the firing step is performed after the laminate formation step. A method of manufacturing a wiring board, characterized in that the board is a multilayer board.
PCT/JP2007/074325 2006-12-18 2007-12-18 Wiring board and method for manufacturing the same WO2008075686A1 (en)

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JP2006-339987 2006-12-18

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JP5456843B2 (en) * 2012-05-24 2014-04-02 三菱電機株式会社 Power supply
JP2014045012A (en) * 2012-08-24 2014-03-13 Kyocera Corp Multi-piece wiring board
JP6258679B2 (en) * 2013-11-29 2018-01-10 京セラ株式会社 Wiring board and electronic device
JP6321477B2 (en) * 2014-07-14 2018-05-09 京セラ株式会社 Electronic component storage package, package assembly, and method of manufacturing electronic component storage package
WO2016129705A1 (en) 2015-02-13 2016-08-18 パイクリスタル株式会社 Method for forming laminated circuit board, and laminated circuit board formed using same

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JP2005093846A (en) * 2003-09-19 2005-04-07 Murata Mfg Co Ltd Method for manufacturing multilayer ceramic substrate and multilayer ceramic substrate

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JP2000196240A (en) * 1998-12-24 2000-07-14 Kyocera Corp Stacked circuit board
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