WO2008064176A3 - Procédé et système d'amélioration de la lithographie à faisceau de particules - Google Patents

Procédé et système d'amélioration de la lithographie à faisceau de particules Download PDF

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Publication number
WO2008064176A3
WO2008064176A3 PCT/US2007/085135 US2007085135W WO2008064176A3 WO 2008064176 A3 WO2008064176 A3 WO 2008064176A3 US 2007085135 W US2007085135 W US 2007085135W WO 2008064176 A3 WO2008064176 A3 WO 2008064176A3
Authority
WO
WIPO (PCT)
Prior art keywords
polygonal
shaped
contour
cell pattern
particle beam
Prior art date
Application number
PCT/US2007/085135
Other languages
English (en)
Other versions
WO2008064176A2 (fr
Inventor
Akira Fujimura
James Fong
Takashi Mitsuhashi
Shohei Matsushita
Original Assignee
D2S Inc
Akira Fujimura
James Fong
Takashi Mitsuhashi
Shohei Matsushita
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by D2S Inc, Akira Fujimura, James Fong, Takashi Mitsuhashi, Shohei Matsushita filed Critical D2S Inc
Publication of WO2008064176A2 publication Critical patent/WO2008064176A2/fr
Publication of WO2008064176A3 publication Critical patent/WO2008064176A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174—Particle-beam lithography, e.g. electron beam lithography
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Analytical Chemistry (AREA)
  • Electron Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

L'invention concerne un procédé de lithographie à faisceau de particules telle que la lithographie à faisceau d'électrons (EB), comprenant la formation d'une pluralité de schémas cellulaires sur un masque de pochoir et la formation d'un ou de plusieurs schémas cellulaires avec un contour de forme polygonale. Un premier schéma cellulaire de forme polygonale est exposé à un faisceau de particules de façon à projeter le premier schéma cellulaire de forme polygonale sur un substrat. Un second schéma cellulaire de forme polygonale, ayant un contour qui correspond au contour du premier schéma cellulaire de forme polygonale est exposé au faisceau de particules tel qu'un faisceau d'électrons, de façon à projeter le second schéma cellulaire de forme polygonale sur le plan adjacent au premier schéma cellulaire de forme polygonale pour former ainsi une cellule combinée, le contour du premier schéma cellulaire de forme polygonale correspondant au contour du second schéma cellulaire de forme polygonale. Le contour de forme polygonale des premier et second schémas cellulaires peut comprendre un contour de forme rectiligne.
PCT/US2007/085135 2006-11-21 2007-11-19 Procédé et système d'amélioration de la lithographie à faisceau de particules WO2008064176A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/603,603 2006-11-21
US11/603,603 US7897522B2 (en) 2006-11-21 2006-11-21 Method and system for improving particle beam lithography

Publications (2)

Publication Number Publication Date
WO2008064176A2 WO2008064176A2 (fr) 2008-05-29
WO2008064176A3 true WO2008064176A3 (fr) 2008-07-31

Family

ID=39416005

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/085135 WO2008064176A2 (fr) 2006-11-21 2007-11-19 Procédé et système d'amélioration de la lithographie à faisceau de particules

Country Status (3)

Country Link
US (1) US7897522B2 (fr)
TW (1) TW200839459A (fr)
WO (1) WO2008064176A2 (fr)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7777204B2 (en) * 2005-12-01 2010-08-17 Cadence Design Systems, Inc. System and method of electron beam writing
US7579606B2 (en) * 2006-12-01 2009-08-25 D2S, Inc. Method and system for logic design for cell projection particle beam lithography
US20120219886A1 (en) 2011-02-28 2012-08-30 D2S, Inc. Method and system for forming patterns using charged particle beam lithography with variable pattern dosage
US9323140B2 (en) 2008-09-01 2016-04-26 D2S, Inc. Method and system for forming a pattern on a reticle using charged particle beam lithography
US8017288B2 (en) * 2008-09-01 2011-09-13 D2S, Inc. Method for fracturing circular patterns and for manufacturing a semiconductor device
US8669023B2 (en) 2008-09-01 2014-03-11 D2S, Inc. Method for optical proximity correction of a reticle to be manufactured using shaped beam lithography
US8057970B2 (en) * 2008-09-01 2011-11-15 D2S, Inc. Method and system for forming circular patterns on a surface
US7754401B2 (en) * 2008-09-01 2010-07-13 D2S, Inc. Method for manufacturing a surface and integrated circuit using variable shaped beam lithography
CN102138106A (zh) * 2008-09-01 2011-07-27 D2S公司 用于光学邻近校正的方法、使用字符投影光刻的光罩的设计和制造
US8017286B2 (en) * 2008-09-01 2011-09-13 D2S, Inc. Method for design and manufacture of a reticle using a two-dimensional dosage map and charged particle beam lithography
US7901850B2 (en) * 2008-09-01 2011-03-08 D2S, Inc. Method and system for design of a reticle to be manufactured using variable shaped beam lithography
US7759027B2 (en) * 2008-09-01 2010-07-20 D2S, Inc. Method and system for design of a reticle to be manufactured using character projection lithography
US9341936B2 (en) 2008-09-01 2016-05-17 D2S, Inc. Method and system for forming a pattern on a reticle using charged particle beam lithography
US7901845B2 (en) * 2008-09-01 2011-03-08 D2S, Inc. Method for optical proximity correction of a reticle to be manufactured using character projection lithography
US7981575B2 (en) * 2008-09-01 2011-07-19 DS2, Inc. Method for optical proximity correction of a reticle to be manufactured using variable shaped beam lithography
US7759026B2 (en) * 2008-09-01 2010-07-20 D2S, Inc. Method and system for manufacturing a reticle using character projection particle beam lithography
US7799489B2 (en) * 2008-09-01 2010-09-21 D2S, Inc. Method for design and manufacture of a reticle using variable shaped beam lithography
US9164372B2 (en) 2009-08-26 2015-10-20 D2S, Inc. Method and system for forming non-manhattan patterns using variable shaped beam lithography

Citations (4)

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US5459771A (en) * 1994-04-01 1995-10-17 University Of Central Florida Water laser plasma x-ray point source and apparatus
US5986292A (en) * 1996-12-27 1999-11-16 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated logic circuit device
US6037820A (en) * 1997-12-12 2000-03-14 Fujitsu Limited Clock distribution circuit in a semiconductor integrated circuit
US20020175298A1 (en) * 2001-05-23 2002-11-28 Akemi Moniwa Method of manufacturing semiconductor device

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JPH03174716A (ja) 1989-08-07 1991-07-29 Hitachi Ltd 電子ビーム描画装置および描画方式
JP2663063B2 (ja) 1991-06-12 1997-10-15 富士通株式会社 荷電ビーム露光方法
JP3478058B2 (ja) 1997-05-30 2003-12-10 株式会社日立製作所 荷電粒子線描画装置
JP2000031885A (ja) 1998-07-16 2000-01-28 Ntt Mobil Communication Network Inc 移動局正常接続確認方法
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JP2001332468A (ja) * 2000-05-19 2001-11-30 Nikon Corp マスク、荷電粒子線露光方法、荷電粒子線露光装置及びデバイス製造方法
JP3983990B2 (ja) 2000-06-13 2007-09-26 株式会社東芝 回路パターンの設計方法と荷電粒子ビーム露光方法及び記録媒体
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GB2413694A (en) 2004-04-30 2005-11-02 Ims Nanofabrication Gmbh Particle-beam exposure apparatus
JP4187703B2 (ja) 2004-08-10 2008-11-26 富士通マイクロエレクトロニクス株式会社 ブロックマスクを利用した荷電粒子ビーム露光データの生成方法及び荷電粒子ビーム露光方法
GB0425324D0 (en) 2004-11-17 2004-12-22 Univ Edinburgh Assay method
JP4867163B2 (ja) 2004-12-06 2012-02-01 富士通セミコンダクター株式会社 荷電粒子ビーム露光方法及び装置、荷電粒子ビーム露光データ作成方法及びプログラム、並びに、ブロックマスク
US7777204B2 (en) 2005-12-01 2010-08-17 Cadence Design Systems, Inc. System and method of electron beam writing
US7953582B2 (en) 2006-11-21 2011-05-31 Cadence Design Systems, Inc. Method and system for lithography simulation and measurement of critical dimensions
US7902528B2 (en) 2006-11-21 2011-03-08 Cadence Design Systems, Inc. Method and system for proximity effect and dose correction for a particle beam writing device
US7772575B2 (en) 2006-11-21 2010-08-10 D2S, Inc. Stencil design and method for cell projection particle beam lithography
US7579606B2 (en) 2006-12-01 2009-08-25 D2S, Inc. Method and system for logic design for cell projection particle beam lithography

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459771A (en) * 1994-04-01 1995-10-17 University Of Central Florida Water laser plasma x-ray point source and apparatus
US5986292A (en) * 1996-12-27 1999-11-16 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated logic circuit device
US6037820A (en) * 1997-12-12 2000-03-14 Fujitsu Limited Clock distribution circuit in a semiconductor integrated circuit
US20020175298A1 (en) * 2001-05-23 2002-11-28 Akemi Moniwa Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
WO2008064176A2 (fr) 2008-05-29
TW200839459A (en) 2008-10-01
US20080116399A1 (en) 2008-05-22
US7897522B2 (en) 2011-03-01

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