WO2008050476A1

WO2008050476A1 - Method for manufacturing epitaxial silicon wafer, and epitaxial silicon wafer

Info

Publication number: WO2008050476A1
Application number: PCT/JP2007/001143
Authority: WO
Inventors: Masato Ohnishi; Takeshi Arai
Original assignee: Shin-Etsu Handotai Co., Ltd.
Priority date: 2006-10-27
Filing date: 2007-10-19
Publication date: 2008-05-02
Also published as: JP2008105914A; JP5140990B2

Abstract

A method for manufacturing epitaxial silicon wafers includes a natural oxide film removing step and an epitaxial growth step. In the method, an epitaxial silicon layer is grown by using a susceptor whereupon many through holes are formed and by having a rate of a hydrogen gas flow quantity to a material gas flow quantity in the epitaxial growth step satisfy the inequality of hydrogen flow quantity (slm)/material gas flow quantity (slm) ≥4. Thus, when the susceptor having many through holes is used for manufacturing the epitaxial silicon wafer, nanotopological unevenness generated on a second main surface can be reduced.

Description

Specification

Manufacturing method of epoxy silicon wafer and epitaxial silicon wafer

Technical field

[0001] The present invention relates to a method for manufacturing an epitaxial silicon wafer, in which an epitaxial silicon layer is grown on the silicon wafer. Background art

[0002] When manufacturing a semiconductor device, an epitaxial silicon wafer in which an epitaxial silicon layer is formed on the silicon wafer may be used.

[0003] A general method for manufacturing an epitaxial silicon wafer is as follows. First, a mirror-polished silicon wafer (silicon single crystal wafer) is prepared and cleaned by RCA cleaning or the like. A natural oxide film is formed on the entire surface of the silicon wafer by the SC_1 cleaning and SC-2 cleaning during the RCA cleaning process. Next, a silicon wafer is placed on the susceptor in the chamber. Next, by supplying a reducing gas such as hydrogen gas into the chamber, an oxide film (including a natural oxide film) covering the surface on which epitaxial growth is performed (hereinafter sometimes referred to as the first main surface) Is removed. Next, a source gas containing silicon (monosilane, trichlorosilane, silicon tetrachloride, etc.) and hydrogen gas as a carrier gas are introduced into the chamber, and the first silicon single crystal wafer heated to high temperature is introduced. A silicon single crystal layer (epitaxial silicon layer) is grown on the main surface (hereinafter, sometimes simply referred to as “epitaxial growth”).

[0004] However, according to such a conventional method for manufacturing an epitaxial silicon wafer, there are the following problems.

During the hydrogen treatment, hydrogen gas slightly wraps around not only the first main surface but also the surface opposite to the first main surface (hereinafter sometimes referred to as the second main surface). The natural oxide film on the second main surface is removed unevenly. Then, in the next epitaxial growth, silicon grows locally in the portion where the natural oxide film has been removed, forming irregularities. Such minute irregularities may be visually observed as “cloudy” with a density called “halo”. Such minute irregularities are distorted as particles when performing particle measurement, and there is a problem that accurate particle measurement cannot be performed.

Another problem is that the in-plane resistivity distribution deteriorates due to autodoping or the like in which doppins diffused outward from the second main surface side enter the first main surface side and are taken into the epitaxial silicon layer. It was.

[0005] In order to solve such a problem, in Japanese Translation of PCT International Publication No. 2 0 0 3—5 3 2 6 1 2, a susceptor having a large number of through holes in a portion on which a wafer is placed is used as a susceptor. In addition, a method is disclosed in which epitaxial growth is performed after the natural oxide film on the second main surface is completely removed by sufficiently supplying a reducing gas to the second main surface side of the wafer. This method prevents deterioration of the in-plane resistivity distribution of the epitaxial silicon layer due to auto-doping, reduces halo generated on the second main surface, and enables stable particle measurement on the second main surface. I can do it now.

However, when a susceptor having a large number of through-holes is used, silicon is deposited on the second main surface of the wafer at a position corresponding to the through-hole of the susceptor during the epitaxial growth. There are problems such as the formation of minute changes in thickness (nanotopology irregularities) in the local surface area of wafers, commonly referred to as

Disclosure of the invention

[0006] Therefore, the present invention has been made in view of such a problem, and when a susceptor having a large number of through-holes is used in manufacturing an epitaxial silicon wafer, the nano-particle generated on the second main surface is produced. Reduces the occurrence of topology irregularities It is an object of the present invention to provide a method for manufacturing an epitaxial silicon wafer that can be manufactured.

[0007] The present invention has been made to solve the above-described problem, and at least the upper surface of a susceptor disposed in a chamber and having a counterbore portion on which a silicon wafer / is placed, The silicon wafer is placed with its second main surface facing the susceptor, and hydrogen treatment is performed by flowing hydrogen gas into the chamber and heating to remove the natural oxide film of the silicon wafer. An epitaxy comprising: a film removal step; and an epitaxial growth step of growing an epitaxial silicon layer on the first main surface of the silicon wafer by flowing and heating at least a source gas and hydrogen gas in the chamber. In the silicon wafer manufacturing method, a susceptor in which a number of through holes are formed in a counterbore portion of the susceptor is used, and the susceptor is placed on the susceptor. The second main surface side of the silicon wafer is subjected to hydrogen treatment so that the entire surface of the silicon wafer is in contact with the hydrogen gas during the hydrogen treatment, and the flow rate of hydrogen gas flowing in the epitaxial growth step A method of manufacturing an epitaxial silicon wafer, characterized in that the epitaxial silicon layer is grown by setting the ratio of the flow rate of the source gas to hydrogen flow rate (sI m) / source gas flow rate (slm) ≥4. provide.

[0008] Thus, after performing the natural oxide film removal process using a susceptor having a large number of through holes, the ratio of the flow rate of the hydrogen gas and the flow rate of the source gas in the epitaxial growth process is set to the hydrogen flow rate. (Slm) / Raw material gas flow rate (sI m) ≥4, the epitaxial silicon layer manufacturing method that grows the epitaxial silicon layer has a good in-plane resistance distribution of the epitaxial silicon layer. In addition, it is possible to manufacture an epitaxial silicon wafer in which stable particle measurement can be performed on the second main surface, and the nanotopology unevenness of the second main surface is reduced.

[0009] In this case, it is preferable that the plurality of through holes are evenly arranged in the counterbore portion of the susceptor.

[0010] In this way, a large number of through holes are evenly arranged in the counterbore of the susceptor. For example, during hydrogen treatment, hydrogen gas can be supplied more uniformly to the second main surface of the silicon wafer placed on the susceptor, so that the natural oxide film on the second main surface can be more uniformly removed. it can. As a result, the in-plane resistance distribution of the epitaxial silicon layer is good, and in the epitaxial silicon wafer of the quality that can perform more stable particle measurement on the second main surface, Nanotopology unevenness can be reduced.

[001 1] The present invention also relates to an epitaxial silicon wafer manufactured by the above method, wherein the nanotopology on the second main surface is 12 nm or less. Provide silicon wafers.

[0012] Thus, the nanotopology of the second main surface manufactured by the above method is

1 2 nm or less (when using a 2 X 2 mm window, when the surface displacement of the nanotopology is 12 nm or less, the area ratio for determining defects exceeds 0.05%) With epitaxial silicon wafers, the in-plane resistivity distribution of the epitaxial silicon layer is good, stable particle measurement can be performed on the second main surface, and nanotopology on the second main surface. —Epitaxial silicon wafer with reduced unevenness.

[0013] According to the method for manufacturing an epitaxial silicon wafer according to the present invention, a good in-plane resistivity distribution of the epitaxial silicon layer can be obtained, and stable particle measurement can be performed on the second main surface. Even if a susceptor having a large number of through-holes is used as a susceptor for the purpose of obtaining an epitaxial silicon wafer that can be performed, the unevenness of the nanotopology on the second main surface is reduced. Epitaxial silicon wafers can be manufactured with reduced. As a result, the in-plane resistance distribution of the epitaxial silicon layer is good, stable particle measurement can be performed on the second main surface, and high-quality unevenness of the nanotopology on the second main surface is reduced. Epitaxial silicon can be manufactured.

Brief Description of Drawings FIG. 1 is a graph showing the relationship between the ratio of hydrogen gas flow rate to raw material gas flow rate and the nanotopology of the second main surface obtained by experiments.

FIG. 2 is a schematic sectional view of an epitaxy growth apparatus used in the present invention.

FIG. 3 is an enlarged schematic view showing an example of a susceptor used in the present invention, where (a) is a schematic plan view and (b) is a schematic cross-sectional view.

FIG. 4 is a schematic sectional view showing another example of a susceptor used in the present invention.

FIG. 5 is a flowchart showing a process flow of a manufacturing method of an epitaxial silicon wafer to which the present invention is applied.

BEST MODE FOR CARRYING OUT THE INVENTION

[0015] Hereinafter, the present invention will be described in more detail.

As described above, when epitaxial growth is performed using a susceptor having a large number of through-holes, silicon is deposited on the second main surface of the wafer at a position corresponding to the through-holes of the susceptor. There were problems such as the formation of irregularities. In recent years, even with such irregularities in nanotopology, the adverse effects of such irregularities have become ignorable, and further improvement in wafer quality is desired.

[0016] The present inventors have repeatedly studied a method for suppressing the occurrence of such unevenness of nanotopology when a susceptor having a large number of through-holes is used as a susceptor. It has been found that by increasing the flow rate of the hydrogen gas that serves as the carrier gas in the growth process, the source gas can be diluted to reduce the flow of the source gas toward the second main surface. That is, the inventors of the present invention, when performing epitaxial growth after performing hydrogen treatment using a susceptor having a large number of through holes, if the ratio of the hydrogen gas flow rate to the raw material gas flow rate exceeds a predetermined value, The present invention has been completed by conceiving that an epitaxial silicon wafer can be manufactured while suppressing the formation of irregularities of nanotopology locally on the second main surface. [001 7] Hereinafter, the present invention will be described more specifically with reference to the drawings, but the present invention is not limited thereto.

An outline of the procedure of the manufacturing method of the epitaxial silicon wafer to which the present invention is applied is shown in FIG.

First, in step (a), a silicon wafer for growing an epitaxial silicon layer is prepared. Depending on the specifications, a silicon mirror wafer having a predetermined diameter, conductivity type, resistivity, and plane orientation may be prepared.

[0018] Next, in step (b), the silicon wafer is appropriately subjected to cleaning such as R CA cleaning. The cleaning method in this cleaning step may be one in which the concentration and type of the chemical solution are changed within a normal range in addition to typical R CA cleaning. For example, cleaning with ozone water may be used. Further, the cleaning in the step (b) often keeps the surface of the silicon wafer hydrophilic in order to prevent adhesion of particles, but is not limited to this. RCA cleaning or cleaning with ozone water can keep the surface of the silicon wafer hydrophilic, and a natural oxide film is formed on the surface of the silicon wafer. After washing with such a chemical solution, washing with pure water or drying may be performed.

[001 9] After step (c), the silicon wafer is transferred to the epitaxial growth apparatus for processing. A schematic diagram of an example of an epitaxial growth apparatus used in step (c) and subsequent steps is shown in FIG.

The epitaxy growth apparatus 51 includes a chamber 52, a susceptor 71 disposed inside the chamber 1, a susceptor support means 5 3 that supports the susceptor from below, and can freely rotate up and down, and the chamber 52. Wafer transfer port for loading and unloading wafers to the outside, 5 4 Gas supply pipes for supplying various gases into the chamber 5 5 Gas supply pipes 5 5 A hydrogen gas supply means (not shown) for supplying hydrogen gas into the chamber, a raw material gas supply means (not shown) for supplying a raw material gas such as silane, and a gas exhaust pipe for discharging various gases from the chamber 1 5 7 The heating means 5 8 provided outside the chamber 52, the silicon wafer is transferred into the chamber 1, and the silicon wafer is transferred from the chamber 52. It is composed of wafer transfer means (not shown) for transferring c.

Furthermore, FIG. 3 shows an enlarged schematic view of the susceptor 71 used in the present invention. Fig 3

(a) is a plan view, and FIG. 3 (b) is a cross-sectional view. The susceptor 71 may have a left pin through hole 73 formed therein. The lift pin 75 is passed through the lift pin through hole 73.

Further, lift pin lifting / lowering means capable of moving the lift pin 75 up and down relatively with respect to the susceptor may be provided inside the chamber 52.

A counterbore 7 2 for positioning a silicon wafer to be placed is formed in the susceptor 71, and a large number of through holes 74 are formed on substantially the entire surface of the counterbore 72. The through-hole 74 may have any size and shape that allows gas to flow smoothly. For example, the through-hole 74 may be cylindrical and have a diameter of 1 mm. . Also, the number of through holes is not particularly limited. For example, if the opening density is 0.1 openings / cm ² or more, the gas is on the second main surface side of the wafer. It is preferable because it can be supplied more uniformly.

[0021] The through holes of the susceptor 71 are preferably formed so as to be evenly arranged so that the opening density thereof is substantially uniform at the spot facing portion 72. In addition, in order to make it easier for the gas contacting the second main surface of the silicon wafer to be replaced, the susceptor 71 has a space between the silicon wafer W to be placed as shown in FIG. In addition to supporting only the peripheral edge of the silicon wafer / from below, a large number of through holes 74 are formed in the countersink of a susceptor having a known shape. If so, the present invention can be applied.

Using the epitaxial growth apparatus 51 having such a susceptor 71, an epitaxial silicon layer is grown on the first main surface of the silicon wafer as follows.

[0023] First, in the step (c), the silicon wafer is transferred into the chamber 52 using a wafer transfer means (not shown) and the second main surface is opposed to the susceptor. 7 Place on the counterbore part 7 of 1. As a method for placing the silicon wafer on the susceptor 71, a commonly used placement method can be applied in addition to the method using the lift pins 75.

At the point of loading the silicon // in the channel, a natural oxide film has grown slightly on the surface of the silicon wafer.

[0024] Next, in the natural oxide film removing step (d), hydrogen gas is introduced into the chamber 52 through the gas introduction pipe 55 from the hydrogen gas supply means into the chamber 52, and the heating means 5 8 Heat treatment with 8 to remove the natural oxide film formed on the silicon wafer surface.

A large amount of hydrogen gas is supplied to the first main surface side of the silicon wafer, and the oxide film on the first main surface is removed by heating. On the other hand, the hydrogen gas is sufficiently supplied also to the second main surface side of the silicon wafer by the large number of through holes 74 formed in the susceptor 71, and the natural oxide film is almost uniformly removed. Thus, a region that is locally unevenly removed remains. At this time, if a large number of through-holes 74 formed in the susceptor 71 are evenly arranged in the counterbore 72, the hydrogen gas can be more reliably brought into contact with the second main surface. The natural oxide film on the second main surface side can be removed more uniformly.

The heating temperature and heating time during the hydrogen treatment may be set in any way as long as the natural oxide film on the silicon wafer surface, particularly the natural oxide film on the second main surface, can be efficiently removed. 80 ° C or higher, 1 minute or longer

Next, in the step (e), an epitaxial silicon layer is grown on the first main surface of the silicon wafer. This epitaxial growth is performed by introducing a source gas such as monosilane, trichlorosilane, or silicon tetrachloride and a hydrogen gas as a carrier gas into the chamber 52 and heating. At this time, the flow rate of the carrier hydrogen gas is set to a predetermined value or more. Since the desired carrier hydrogen gas flow rate depends on the concentration of the raw material gas, it is specified by the ratio of the hydrogen gas flow rate and the raw material gas flow rate. Carrier hydrogen By increasing the gas flow rate, the source gas is sufficiently diluted, and the amount of the source gas supplied around the second main surface side of the silicon wafer is reduced. For this reason, local nanotopology irregularities on the second main surface are suppressed.

In this way, an epitaxial silicon wafer in which an epitaxial silicon layer is formed on the first main surface of the silicon wafer can be manufactured. This epitaxial silicon wafer has a good in-plane resistivity distribution of the epitaxial silicon layer, can perform stable particle measurement on the second main surface, and The unevenness of the nanotopology on the second main surface is reduced.

[0027] In order to obtain a specific numerical value of the ratio of the flow rate of the hydrogen gas and the flow rate of the raw material gas so that the effects of the present invention can be obtained, an epitaxial silicon wafer is actually manufactured as follows. The experiment was conducted.

[0028] (Experiment)

An epitaxial silicon wafer was manufactured according to the procedure shown in FIG.

As a silicon wafer, a p-type silicon single crystal wafer having a diameter of 30 Om m and a plane orientation (1 0 0) was prepared (a) and cleaned with ozone water (b).

[0029] The silicon wafer was loaded into an epitaxial growth apparatus having a susceptor having a large number of through holes as shown in FIG. 3 (c). The volume of the chamber is about 3.5 I. The temperature at the time of carry-in was 700 ° C. Next, while hydrogen gas was introduced into the chamber at a flow rate of 60 s I m, the temperature was raised to 1 130 ° C for 45 seconds, and then hydrogen treatment was performed at 1 130 ° C for 1 minute ( d). Next, trichlorosilane was introduced into the chamber as a source gas containing silicon while flowing carrier hydrogen gas at a predetermined flow rate, and epitaxial growth was performed for 120 seconds while maintaining 1130 ° C. (E). In addition, the flow rate of trichlorosilane was constant at 16 s I m and the flow rate of the carrier hydrogen gas was changed to manufacture an epitaxial silicon wafer. The carrier hydrogen gas flow rate and the corresponding carrier hydrogen flow rate to the trichlorosilane flow rate are listed in Table 1. . In each of these cases, epitaxial silicon wafers were manufactured as described above. In Table 1, “TCS” is an abbreviation for trichlorosilane.

[0030] [Table 1]

[0031] The nanotopology of the second main surface was measured for each of the epitaxial silicon wafers thus manufactured.

The nanotopology measurement method in this specification is as follows. First, the irregularities with a wavelength of 2 Omm or less are extracted using the principle of optical interference. Next, on the other hand, the entire surface of the wafer is scanned in an area of 2 mm X 2 mm (this is called the window 1), and the height difference is obtained. This difference in height is given to the center of the window. Next, the horizontal axis represents the threshold value (threshold value), and the vertical axis represents the area ratio of the portion having the height difference exceeding the threshold value in the window. In this threshold curve, the threshold value at which the vertical axis is 0.05% is taken as the value of nanotopology.

[0032] Fig. 1 shows the relationship between the nanotopology of the second main surface obtained in this way and the hydrogen flow rate (sIm) / source gas flow rate (slm). The curve in the graph is an approximate curve.

[0033] From the results in FIG. 1, the ratio between the hydrogen gas flow rate and the raw material gas flow rate and the value of the nanotopology have a very strong correlation. In particular, the ratio between the hydrogen gas flow rate and the raw material gas flow rate. If hydrogen flow rate (slm) / source gas flow rate (slm) ≥ 4, It can be seen that the nanotopology of the second major surface can be about 12 nm or less. Such a nanotopology level is a high-quality epitaxial silicon wafer that cannot be visually confirmed and has few adverse effects in later processes.

That is, in the epitaxial growth process, if the hydrogen flow rate (s l m) / the raw material gas flow rate (s l m) is 4 or more, the unevenness of the nanotopology can be sufficiently reduced. Further, in order to reduce the unevenness of the nanotopology, it is preferable to set the hydrogen flow rate (s l m) / source gas flow rate (s I m) to 5 or more. In this case, the nanotopology of the second main surface can be about 10 nm or less. In addition, the upper limit value of the ratio of the hydrogen gas flow rate to the raw material gas flow rate is not particularly limited, but the upper limit value is limited depending on the specifications of the apparatus, for example, the hydrogen flow rate (slm) / the raw material gas flow rate. (Slm) should be 9 or less.

In the case of a chamber used for normal epitaxial growth, the ratio of the hydrogen gas flow rate to the raw material gas flow rate according to the present invention can be applied as it is.

[0035] Similar results were obtained with other types of epitaxial growth apparatuses having different chamber capacities. Example

Hereinafter, the present invention will be described more specifically with reference to examples of the present invention. However, the present invention is not limited to these examples.

(Example 1)

Similar to the experiment, an epitaxial silicon wafer was manufactured according to the procedure shown in Fig. 5.

[0037] As a silicon wafer, a p-type silicon single crystal wafer having a diameter of 300 mm and a plane orientation (100) was prepared (a) and subjected to RCA cleaning (b).

[0038] The silicon wafer was loaded into an epitaxial growth apparatus having a susceptor having a large number of through holes as shown in Fig. 3 (c). In addition, the temperature at loading Was 700 ° C. Next, while hydrogen gas was introduced into the chamber at a flow rate of 60 s I m, the temperature was raised to 1 1300 ° C for 45 seconds, and then hydrogen treatment was performed at 1 1300 ° C for 1 minute (d). Next, while flowing carrier hydrogen gas at a flow rate of 80 s I m, trichlorosilane was introduced into the chamber at a flow rate of 16 s I m and maintained at 1 1 30 ° C for 120 seconds for epitaxial growth. Went (e). At this time, the hydrogen flow rate (sI m) / source gas flow rate (slm) is approximately 5.

[0039] From the image of the nanotopology of the second main surface of the epitaxial silicon wafer manufactured as described above, the region measured as the unevenness of the nanotopology in any region of the second main surface is There was almost no. In addition, no traces corresponding to the through-holes of the acceptor were visually observed.

[0040] (Example 2)

As in Example 1, however, an epitaxial silicon wafer was manufactured with a carrier hydrogen gas flow rate of 70 s I m in the epitaxial growth process. At this time, the hydrogen flow rate (s l m) / source gas flow rate (s l m) is approximately 4.38.

From the image of the nanotopology of the second main surface of the epitaxial silicon wafer manufactured in this way, there was almost no area measured as the unevenness of the nanotopology in any region of the second main surface. . In addition, no traces corresponding to the through-holes of the acceptor were visually observed.

[0041] (Comparative Example 1)

As in Example 1, however, an epitaxial silicon wafer was manufactured with a carrier hydrogen gas flow rate of 60 s I m in the epitaxial growth process. At this time, the hydrogen flow rate (s l m) / source gas flow rate (s l m) is approximately 3.75.

From the image of the nanotopology of the second main surface of the epitaxial silicon wafer manufactured in this way, The measured area appeared. In addition, a slight unevenness was observed visually at a part of the peripheral portion of the second main surface corresponding to the through hole of the susceptor.

[0042] (Comparative Example 2)

As in Example 1, however, an epitaxial silicon wafer was manufactured with a carrier hydrogen gas flow rate of 40 s I m in the epitaxial growth step. At this time, the hydrogen flow rate (s l m) / source gas flow rate (s l m) becomes approximately 2.5.

From the image of the nanotopology of the second main surface of the epitaxial silicon wafer manufactured in this way, the area measured as nanotopology on the periphery of the second main surface is larger than that of Comparative Example 1. Spread. In addition, a slight unevenness was observed in many places corresponding to the through holes of the susceptor on the periphery of the second main surface by visual inspection.

[0043] From the above results, the effect of the present invention that almost no nanotopology irregularities were formed on the second main surface was clearly obtained.

Note that the present invention is not limited to the above embodiment. The above-described embodiment is merely an example, and any structure that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits the same function and effect may be used. It is included in the technical scope of the present invention.

Claims

The scope of the claims

[1] At least the silicon wafer is placed on the upper surface of a susceptor that is disposed in the chamber and has a counterbore portion on which the silicon wafer is placed, with the second main surface facing the susceptor. A natural oxide film removing step of removing a natural oxide film of the silicon wafer by performing a hydrogen treatment in which a hydrogen gas is flowed and heated in the chamber; and at least a source gas and a hydrogen gas in the chamber And an epitaxial growth step of growing an epitaxial silicon layer on the first main surface of the silicon wafer by flowing and heating the silicon wafer,

A susceptor in which a number of through holes are formed is used in the counterbore portion of the susceptor, and the second main surface side of the silicon wafer placed on the susceptor is removed during the hydrogen treatment. Hydrogen treatment is performed so that the entire surface is in contact with the hydrogen gas, and the ratio between the flow rate of the hydrogen gas and the flow rate of the raw material gas in the epitaxial growth process is determined by the following formula: hydrogen flow rate (slm) m) A method of manufacturing an epitaxial silicon wafer, wherein the epitaxial silicon layer is grown as ≥4.

[2] The method for producing an epitaxial silicon wafer according to [1], wherein a susceptor in which the plurality of through-holes are evenly arranged in a spot facing portion of the susceptor is used.

[3] An epitaxial silicon wafer manufactured by the method according to claim 1 or claim 2, wherein the nanotopology on the second main surface is 1 2 ηm or less. Pitaxic silicon wafer.