WO2008025919A3 - Process for marking a semi-conductor plate for its identification and the semi-conductor plate marked by this process - Google Patents

Process for marking a semi-conductor plate for its identification and the semi-conductor plate marked by this process Download PDF

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Publication number
WO2008025919A3
WO2008025919A3 PCT/FR2007/051811 FR2007051811W WO2008025919A3 WO 2008025919 A3 WO2008025919 A3 WO 2008025919A3 FR 2007051811 W FR2007051811 W FR 2007051811W WO 2008025919 A3 WO2008025919 A3 WO 2008025919A3
Authority
WO
WIPO (PCT)
Prior art keywords
semi
plate
marking
conductor plate
identification
Prior art date
Application number
PCT/FR2007/051811
Other languages
French (fr)
Other versions
WO2008025919A2 (en
Inventor
Dominique Bocquene
Pierre Tauzinat
Original Assignee
Microcomposants De Haute Secur
Dominique Bocquene
Pierre Tauzinat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microcomposants De Haute Secur, Dominique Bocquene, Pierre Tauzinat filed Critical Microcomposants De Haute Secur
Publication of WO2008025919A2 publication Critical patent/WO2008025919A2/en
Publication of WO2008025919A3 publication Critical patent/WO2008025919A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
    • B41M5/00—Duplicating or marking methods; Sheet materials for use therein
    • B41M5/26—Thermography ; Marking by high energetic means, e.g. laser otherwise than by burning, and characterised by the material used
    • B41M5/262—Thermography ; Marking by high energetic means, e.g. laser otherwise than by burning, and characterised by the material used recording or marking of inorganic surfaces or materials, e.g. glass, metal, or ceramics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67282—Marking devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67294—Apparatus for monitoring, sorting or marking using identification means, e.g. labels on substrates or labels on containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54433—Marks applied to semiconductor devices or parts containing identification or tracking information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Process for marking a semi-conductor plate for its identification and semi-conductor plate marked by this process The invention relates to a process for marking a plate (1) in semi-conductor material for its identification. In this process, the focus is on the bundle (3) of a laser (2) in the volume of the plate (1) on points of this volume. Such focusing is realized so as to locally modify, within the area of the points (4, the optical properties of the material of the plate (1). All of the points (4) of the volume of the plate (1) whose optical properties have been modified are positioned within the marking zone (8) and define a code that identifies the plate (1). The objective of the invention is to minimize the pollution during the marking of the plate and that induced later during the fabrication based on this substrate (1).
PCT/FR2007/051811 2006-08-31 2007-08-10 Process for marking a semi-conductor plate for its identification and the semi-conductor plate marked by this process WO2008025919A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0653547A FR2905521A1 (en) 2006-08-31 2006-08-31 METHOD OF MARKING A SEMICONDUCTOR PLATE FOR ITS IDENTIFICATION AND SEMICONDUCTOR PLATE MARKED THEREBY
FR0653547 2006-08-31

Publications (2)

Publication Number Publication Date
WO2008025919A2 WO2008025919A2 (en) 2008-03-06
WO2008025919A3 true WO2008025919A3 (en) 2008-05-02

Family

ID=37686495

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2007/051811 WO2008025919A2 (en) 2006-08-31 2007-08-10 Process for marking a semi-conductor plate for its identification and the semi-conductor plate marked by this process

Country Status (2)

Country Link
FR (1) FR2905521A1 (en)
WO (1) WO2008025919A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITBO20100620A1 (en) * 2010-10-15 2012-04-16 Marchesini Group Spa SUITABLE EQUIPMENT FOR OPERATING IN AN ENVIRONMENT WHERE PHARMACEUTICAL OR COSMETIC PRODUCTS ARE MANIPULATED AND THE USE OF A COMPONENT PROVIDED WITH WRITTEN AND / OR LOGO AND / OR SIGNS IN AN ENVIRONMENT WHERE PHARMACEUTICAL OR COSMETIC PRODUCTS ARE MANIPULATED
CN108630563B (en) * 2017-03-17 2020-11-03 中芯国际集成电路制造(上海)有限公司 Monitoring method and monitoring structure of wafer identification code
EP3712717A1 (en) * 2019-03-19 2020-09-23 Comadur S.A. Method for marking a sapphire watchglass

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11214299A (en) * 1998-01-27 1999-08-06 Komatsu Ltd Read device of dot mark and read method
EP1073097A2 (en) * 1999-07-26 2001-01-31 Komatsu Ltd Dot mark reading apparatus and reading method
EP1117129A2 (en) * 2000-01-12 2001-07-18 Tokyo Seimitsu Co.,Ltd. Semiconductor wafer inspection machine
US20030003608A1 (en) * 2001-03-21 2003-01-02 Tsunetoshi Arikado Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
EP1300872A1 (en) * 2001-10-08 2003-04-09 Infineon Technologies SC300 GmbH & Co. KG Semiconductor device identification apparatus
WO2003033199A1 (en) * 2001-10-19 2003-04-24 U.C. Laser Ltd. Method for improved wafer alignment
US20040089958A1 (en) * 2002-11-08 2004-05-13 Kazuhisa Arai Conductor wafer and substrate
US20060065985A1 (en) * 2004-09-30 2006-03-30 Berman Michael J Substrate edge scribe

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11214299A (en) * 1998-01-27 1999-08-06 Komatsu Ltd Read device of dot mark and read method
EP1073097A2 (en) * 1999-07-26 2001-01-31 Komatsu Ltd Dot mark reading apparatus and reading method
EP1117129A2 (en) * 2000-01-12 2001-07-18 Tokyo Seimitsu Co.,Ltd. Semiconductor wafer inspection machine
US20030003608A1 (en) * 2001-03-21 2003-01-02 Tsunetoshi Arikado Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
EP1300872A1 (en) * 2001-10-08 2003-04-09 Infineon Technologies SC300 GmbH & Co. KG Semiconductor device identification apparatus
WO2003033199A1 (en) * 2001-10-19 2003-04-24 U.C. Laser Ltd. Method for improved wafer alignment
US20040089958A1 (en) * 2002-11-08 2004-05-13 Kazuhisa Arai Conductor wafer and substrate
US20060065985A1 (en) * 2004-09-30 2006-03-30 Berman Michael J Substrate edge scribe

Also Published As

Publication number Publication date
FR2905521A1 (en) 2008-03-07
WO2008025919A2 (en) 2008-03-06

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