WO2008023693A1 - Coating developing machine, resist pattern forming device, coating developing method, resist pattern forming method, and storage medium - Google Patents

Coating developing machine, resist pattern forming device, coating developing method, resist pattern forming method, and storage medium Download PDF

Info

Publication number
WO2008023693A1
WO2008023693A1 PCT/JP2007/066174 JP2007066174W WO2008023693A1 WO 2008023693 A1 WO2008023693 A1 WO 2008023693A1 JP 2007066174 W JP2007066174 W JP 2007066174W WO 2008023693 A1 WO2008023693 A1 WO 2008023693A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
resist pattern
heating
exposure
region
Prior art date
Application number
PCT/JP2007/066174
Other languages
French (fr)
Japanese (ja)
Inventor
Ryouichirou Naitou
Tsuyoshi Shibata
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Publication of WO2008023693A1 publication Critical patent/WO2008023693A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67248Temperature monitoring
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/30Imagewise removal using liquid means
    • G03F7/3021Imagewise removal using liquid means from a wafer supported on a rotating chuck
    • G03F7/3028Imagewise removal using liquid means from a wafer supported on a rotating chuck characterised by means for on-wafer monitoring of the processing

Definitions

  • Coating and developing apparatus resist pattern forming apparatus, coating and developing method, resist pattern forming method, and storage medium
  • the present invention relates to a coating unit that forms a resist film by applying a resist solution to a substrate having a base film formed on the surface, and an image in which a resist pattern is formed by developing the exposed substrate.
  • a resist pattern forming apparatus, a coating and developing method, a resist pattern forming method, and a coating and developing apparatus including a unit; and an exposure apparatus that exposes a substrate after resist coating in addition to the coating unit and the developing unit.
  • the present invention relates to a storage medium storing a computer program for carrying out these methods.
  • a resist solution is applied to the surface of a semiconductor wafer (hereinafter referred to as a wafer) to form a resist film. After exposing with a pattern, it is developed to create a resist pattern.
  • a resist pattern forming apparatus in which an exposure apparatus is connected to a coating and developing apparatus for applying and developing a resist.
  • the wafer is, for example, on a silicon substrate (bare silicon), various films such as a SiO film and a SiN film for forming wiring on the wafer, and the optical reaction of these various films at the time of exposure.
  • It has a structure in which a base film made of an anti-reflective film that suppresses the effect on the resist pattern due to radiation is laminated.
  • the various films forming the wiring are formed before the wafer is carried into the coating and developing apparatus.
  • the antireflection film and the resist film are formed on the surface of the film forming the wiring from the lower layer to the upper layer. It forms in this order toward.
  • the wafer on which the resist film is formed is subjected to an exposure process in an exposure apparatus, and then transferred to a heating unit in a coating image forming apparatus, and subjected to a heating process called PEB (post-exposure baking).
  • PEB post-exposure baking
  • the shape of the resist pattern is adjusted by removing the influence of the standing wave received during exposure on the film.
  • the wafer is transferred to the development unit, where it corresponds to the part exposed by the development processing, or the exposed part. A portion corresponding to the portion that has not been removed is removed to form a resist pattern.
  • the wafer heating temperature in the above-described PEB and the exposure amount of the wafer in the exposure process greatly affect the dimensions of the resist pattern to be formed.
  • a resist film is formed using a chemically amplified resist
  • an acid catalyst is generated on the surface of the resist film by the exposure process, and the acid catalyst is diffused widely inside the resist by this PEB, affecting the development process. Therefore, the heating temperature of PEB has a greater influence on the pattern dimensions.
  • the variation in the dimension of the pattern is related to, for example, the film thickness and density in the base film because of the occurrence of such variations.
  • the film quality of the underlying film is different in each region in the surface of the wafer, the influence of each region on the heat treatment and the exposure processing is not uniform, and therefore it is considered that variations in pattern dimensions occur.
  • Variations in film quality such as film thickness and density can be expressed as variations in optical properties because they exhibit different reactions when irradiated to films with varying film quality.
  • the optical properties here are the reflectance and the optical constant, and the factor constituting the optical constant includes the refractive index (n) and the extinction coefficient (k).
  • the base film is usually composed of a multi-layered film and formed after many processes, and even if the variation in each process is fine. As a result of the accumulation of variations when the underlayer is formed, it may appear as a large variation in the optical properties.Therefore, the degree of variation in the optical properties of the underlayer is expected or suppressed. May be difficult.
  • each wafer may be warped by being subjected to various treatments while the base film is formed. This warpage is likely to occur as the wafer becomes larger, and the amount of warpage in each region in the surface may also vary greatly. Due to this warpage, the heating temperature differs for each area in the wafer surface during the PEB, or the distance from the light source differs during exposure, and the exposure beam irradiated to each area in the wafer surface varies. If the energy is different, the dimensions of the pattern may further vary in each area in the plane.
  • Patent Document 1 describes a force that describes a method for controlling a resist pattern by changing a heat treatment condition and an exposure process condition based on the optical properties of a base film. It cannot solve pattern variations.
  • Patent Document 1 JP 2001-332491 A
  • the present invention has been made to solve such problems, and an object of the present invention is to form a resist pattern by forming a resist film on a substrate having a base film formed on the surface of the substrate.
  • the line width of the resist pattern in the plane of the substrate and between the substrates is controlled with high accuracy.
  • the coating and developing apparatus of the present invention is a coating and developing apparatus that applies a resist solution to a substrate having a base film formed on the surface, and develops the exposed substrate to form a resist pattern! / And
  • a heating unit that can independently control heating of a plurality of heating areas by a plurality of heaters, and a heating unit that heats the substrate before development after exposure by the heating plate;
  • An optical measurement unit that measures the optical properties of each region by irradiating light to the region corresponding to each heating region of the substrate before applying the resist solution;
  • a storage unit storing correlations between optical properties of the base film of the substrate, the heating temperature of the heater, and the line width of the resist pattern obtained in advance;
  • the heater of each heating area Based on the optical properties of the base film of the substrate measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage section! /, The heater of each heating area And a controller that controls the temperature of each heating region of the hot plate based on the calculated heating temperature.
  • the apparatus further includes, for example, a warp measurement unit for measuring a warp amount of each measurement region of the substrate, and the control unit applies each of the heating regions based on the measured warp amount.
  • a correction value for the heating temperature calculated for the heating plate may be calculated, and the temperature of each heating region of the heating plate may be controlled based on the correction value and the heating temperature. .
  • a resist solution is applied to a substrate having a base film formed on the surface, then the substrate is exposed, and the exposed substrate is further developed to form a resist pattern.
  • the resist pattern forming device In the resist pattern forming apparatus of the present invention, a resist solution is applied to a substrate having a base film formed on the surface, then the substrate is exposed, and the exposed substrate is further developed to form a resist pattern.
  • An exposure apparatus that can set an exposure amount for each area in which the in-plane surface of the substrate is divided into a plurality of areas, and light is irradiated to areas corresponding to the plurality of areas on the substrate before the resist film is formed.
  • a storage unit in which correlations between optical properties, exposure amounts, and resist pattern line widths, which are obtained in advance, are stored;
  • An exposure amount is calculated for each region based on the optical properties measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage unit, and the exposure based on the calculated exposure amount And a control unit for controlling the exposure amount of the apparatus.
  • the apparatus further includes, for example, a warpage measurement unit that measures a warpage amount of each measurement region of the substrate, and the control unit applies each of the exposure regions based on the measured warpage amount.
  • An exposure correction amount for correcting the exposure amount of the exposure apparatus is calculated, and the exposure amount in each exposure region is controlled based on the exposure correction amount and the calculated exposure amount. Gore.
  • the coating and developing method of the present invention includes:
  • a coating / developing method in which a resist pattern is formed on a substrate after exposure using a hot plate that can independently control a plurality of heating regions by a plurality of heaters. Irradiating a region corresponding to each heating region of the substrate with light to measure optical properties of each region;
  • a step of measuring the amount of warpage of each measurement area of the substrate, and a correction temperature for correcting the calculated heating temperature is calculated based on the measured amount of warpage.
  • the step of heating the substrate may be negotiated based on the heating temperature and the correction temperature! /.
  • the resist pattern forming method of the present invention comprises:
  • a step of measuring the amount of warpage of each measurement region of the substrate; And a step of calculating an exposure correction amount for correcting the calculated exposure amount based on the measured amount of warpage, and the step of exposing the substrate includes V and T based on the exposure amount and the exposure correction amount.
  • the storage medium of the present invention is used in, for example, an apparatus for forming a resist pattern by applying a resist solution to a substrate having a base film formed on the surface of the substrate, and a computer program that runs on a computer.
  • a stored storage medium In the computer program, steps are included so as to carry out the resist pattern forming method, coating method, and developing method described above!
  • the present invention it is possible to suppress variation in the line width of the resist pattern for each measurement region due to variations in the optical properties of the base film in the plane of the substrate.
  • the line width of the resist pattern between the substrates can be controlled with high accuracy. Accordingly, it is possible to suppress a decrease in the yield of products manufactured from the substrate.
  • FIG. 1 is a plan view showing an example of a coating and developing apparatus of the present invention.
  • FIG. 2 is an overall perspective view showing the coating and developing apparatus.
  • FIG. 3 is a perspective view showing an interface block of the coating and developing apparatus.
  • FIG. 4 is a configuration diagram of a heating unit provided in the coating and developing apparatus.
  • FIG. 5 is a configuration diagram of a heating plate of the heating unit and a heater provided on the heating plate.
  • FIG. 6 is an explanatory view showing each region of the wafer placed on the hot plate.
  • FIG. 7 is a longitudinal side view of a refractive index measurement unit provided in the coating and developing apparatus.
  • FIG. 8 is a configuration diagram of a wafer warpage measuring unit provided in the coating and developing apparatus.
  • FIG. 9 is a configuration diagram of a control unit provided in the coating and developing apparatus.
  • FIG. 10 is a graph showing the correlation between the line width of a resist pattern, the refractive index of a base film, and the temperature of the heater stored in a storage unit provided in the control unit.
  • FIG. 11 is a flowchart showing a process of forming a resist pattern on a wafer by the coating and developing apparatus.
  • FIG. 12 is an explanatory diagram showing how the offset amount is determined.
  • FIG. 13 is a configuration diagram showing a configuration of a control unit provided in an example of a resist pattern forming apparatus of the present invention.
  • FIG. 14 is a flowchart showing a process of forming a resist pattern on a wafer by the resist pattern forming apparatus.
  • FIG. 15 is a plan view showing another example of the coating and developing apparatus of the present invention.
  • FIG. 16 is a plan view showing still another example of the coating and developing apparatus of the present invention.
  • FIG. 17 is an explanatory view showing a configuration of an inspection / measurement block of the coating and developing apparatus.
  • This embodiment is applied to, for example, a substrate having a base film formed on a silicon substrate, and before the resist film is formed on the base film, the optical properties of each predetermined region in the surface of the base film are described.
  • the refractive index is measured and the amount of warpage of the substrate in each region is measured.
  • the dimension of the formed resist pattern becomes the target value. It is intended to control the heating temperature.
  • FIGS. 1 and 2 are schematic plan views of the coating and developing apparatus, respectively. It is a body perspective view.
  • B1 is a carrier block of a coating and developing apparatus, and a carrier station 10 having a mounting portion 10a for loading and unloading a carrier C1 in which, for example, 13 wafers W are sealed and stored, and this carrier station.
  • An opening / closing part 21 provided on the front wall as viewed from 10 and a delivery means A1 for taking out the wafer W from the carrier C1 via the opening / closing part 21 are provided.
  • the wafer W accommodated in the carrier C1 and carried into the coating and developing apparatus is, for example, a large number of SiO (silicon oxide), SiN (silicon nitride), etc. on a flat and uniform silicon substrate (bare silicon).
  • the resist film formed in this coating and developing apparatus is combined with these various films between the silicon substrate and the antireflection film formed in the coating and developing apparatus. This is referred to as a base film.
  • a processing block B2 surrounded by a casing 21 is connected to the back side of the carrier block B1, and this processing block B2 has a multi-stage heating / cooling system unit from the front side.
  • the main transport means A2 and A3 for transferring the wafer W between the shelf units Ul, U2 and U3 and the liquid processing units U4 and U5 are provided alternately.
  • the main transport means A2 and A3 are one side of the shelf unit Ul, U2 and U3 arranged in the front-rear direction when viewed from the carrier block B1, and one side of the right side liquid treatment units U4 and U5, which will be described later. It is placed in a space surrounded by a partition wall 23 composed of the left side and the back side forming one side.
  • 24 and 25 are temperature / humidity control units equipped with a temperature control device for the treatment liquid used in each unit and ducts for temperature / humidity control.
  • the liquid processing unit U4 is, for example, an application unit (B ARC) for forming an antireflection film on a chemical solution storage section for storing a resist solution or a chemical solution for forming an antireflection film as shown in FIG. (Hereinafter referred to as “Anti-Reflection Film Formation Unit (BARC)”) 26 in two stages, resist film formation coating unit (COT) (hereinafter referred to as “resist coating unit (COT)”) 27 in three stages, from top to bottom The layers are stacked in this order.
  • the liquid processing unit U5 is configured by stacking development units (DEV) in five stages on a chemical solution storage section for storing a developer and the like.
  • DEV development units
  • the antireflection film forming unit 26, the resist coating unit 27, and the developing unit 28 are each provided with a nozzle that supplies a chemical solution, a resist solution, and a developer for forming the antireflection film to the surface of the wafer W.
  • the aforementioned shelf units Ul, U2, U3 are configured by laminating various units for performing pre-processing and post-processing of the liquid processing units U4, U5 in multiple stages, A hydrophobic treatment unit that performs hydrophobic treatment on the entire surface of the wafer W before applying the resist solution, a heating unit called PAB that heats the wafer W after application of the resist (beta), and the PEB described in the background section
  • the configuration of the heating unit 4 that performs PEB will be described later.
  • the shelf unit U1 has a transfer stage (TRS) force for delivering the wafer W between the carrier block B1 and the processing block B2.
  • the shelf unit U3 has a processing block B2 and an interface block B3.
  • a transfer stage (TRS) for transferring the wafer W to and from each is included.
  • a wafer W on which an antireflection film is formed is loaded at a position accessible by the main transport mechanism A2, and an optical measurement for measuring the refractive index as an optical property of the base film.
  • a unit for measuring the refractive index 5 is provided. The refractive index measuring unit 5 is described later.
  • An exposure apparatus B4 is connected to the back side of the shelf unit U3 in the processing block B2 via an interface block B3.
  • the configuration of the interface block B 3 will be described with reference to FIG.
  • the interface block B3 is composed of a first transfer chamber 3A and a second transfer chamber 3B provided before and after the processing block B2 and the exposure apparatus B4.
  • the transfer means 31A and the transfer means 31B are respectively provided. Is provided.
  • the warp measurement unit 6 for measuring the warpage of the wafer W, the transfer stage TRS32 for transferring the wafer W between the transfer means 31A and the transfer means 31B, and the temperature of the wafer W to be exposed are controlled.
  • the high-precision temperature control unit 33 and the battery that temporarily retracts the wafer W according to the transfer status.
  • the exposure apparatus B4 is provided with stages 35 and 36 force S for transferring to and from the conveying means 31B of the interface unit B3.
  • the stage 35 is exposed to the wafer W force before exposure processing. Each processed wafer W is placed.
  • FIG. Figures 4 (a) and (b) are cross-sectional plan views of the heating unit 4, respectively.
  • the heating mute 4 includes a casing 41, and a circular hot plate 43 and a cooling plate 44 are provided on a stage 42 in the casing 41.
  • the cooling plate 44 moves in the horizontal direction in the figure, and cools the mounted wafer.
  • a transfer port 46 that can be opened and closed by a shirt 45 is provided on the side wall of the casing 41, and the wafer is transferred between the main transfer means A2 and A3 that have entered the casing 41 through the transfer port 46 and the cooling plate 44. W is handed over.
  • 47 and 48 are three pins that can move up and down (only two are shown in the figure).
  • Pin 47 is between the cooling plate 44 and the main transport means A2 and A3, and pin 48 is the cooling plate 47 and heat. Wafer W is transferred to and from plate 43, respectively.
  • 46a is a slit provided in the cooling plate 44 for allowing the pins 47 and 48 to pass therethrough
  • 43a is a hole provided in the hot plate 43 for allowing the pins 48 to pass therethrough.
  • FIG. 5 is a top view of the hot plate 43.
  • the hot plate 43 surrounds the central disc-shaped region R1 and the region R1, for example, and has a fan-like shape in which the periphery of the region R1 is equally divided in the circumferential direction. Regions R2 to R5 are partitioned, and heaters 40a to 40e corresponding to the shape of each region are embedded in each region R1 to R5.
  • Each of the heaters 40a to 40e is connected to a control unit 7 to be described later via a controller 49.
  • the controller 49 supplies power to the heaters 40a to 40e independently of each other, and the heaters 40a to 40e are controlled to a predetermined temperature, as shown in FIG.
  • each region P1 to P5 indicated by a chain line corresponding to the region R;! To R5 of the hot plate 43 corresponds to the temperature of the heaters 40a to 40e. Each is heated.
  • the refractive index measuring unit 5 includes a casing 51, and a stage 52 for mounting the wafer W is provided in the casing 51.
  • the stage 52 includes the main transfer means A 2, A 3 and the casing 51. Wafer W is transferred through the transfer port 53 provided on the side wall.
  • a rotation drive unit 54 for rotating the stage 52 around the lead straight axis.
  • the rotation drive unit 54 is provided on the XY drive unit 55, and the XY drive unit 55 is provided with the rotation drive unit 54.
  • the stage 52 is moved in the front / back direction and the left / right direction of the drawing.
  • the stage 52 there is provided a light irradiation unit 56 that irradiates light onto the wafer W placed on the stage 52.
  • the light irradiation unit 56 includes, for example, a laser light source 56a, a polarizer 56b, and a correction plate. With 56c etc.! Also, on the stage 52, from the light irradiation part 56 under the wafer W.
  • a light receiving portion 57 is provided for receiving the light irradiated to the ground film and reflected from the ground film force.
  • the light receiving unit 57 includes an analyzer 57a, a photodetector 57b, and the like.
  • Operations of the XY stage 55, the rotation driving unit 54, and the light irradiation unit 56 are controlled by the control unit 7, and for example, the light irradiation unit 56 sequentially irradiates light to the respective regions P1 to P5 in the surface of the wafer W. .
  • the light receiving unit 57 detects the reflected light of the irradiated light and transmits a control signal corresponding to the detected reflected light to the control unit 7, and the control unit 7 determines the phase of the reflected light based on the control signal, By detecting the amplitude, etc., the refractive index of the underlying film in each region P1 to P5 of the wafer W is calculated.
  • FIG. 8 (a) is a longitudinal front view of the warp measurement unit 6.
  • the warp measurement unit 6 includes a casing 61, and the casing 61 has a circular shape on which the wafer W is placed.
  • Stage 62 is provided.
  • a plurality of pins 63 that support the back surface of the wafer W are provided on the surface of the stage 62.
  • FIG. 8 (b) is a perspective view showing the configuration of each part in the housing 61.
  • 64 is a hole that penetrates the stage 62 in the thickness direction.
  • the transfer means 31A enters the case 61 through the transfer port 65 provided on the side wall of the case 61, and the wafer W is placed on the stage 62.
  • air accumulates between the stage 62 and the wafer W, and has a role to prevent the wafer W from sliding on the stage 62.
  • a notch 62a is provided at the peripheral edge of the stage 62 so as to correspond to the shape of the conveying means 31A.
  • the stage 62 is configured to be rotatable and vertically movable about a vertical axis via a drive mechanism 66 provided at the lower part thereof.
  • Laser displacement meters 68 and 69 are provided above the center of stage 62 and above the peripheral edge in a state of being supported by support member 67, respectively. For example, while the stage 32 is rotating, these laser displacement meters 68 and 69 irradiate the center part and the peripheral part of the wafer W placed on the stage 62 with a laser and receive the reflected light, thereby receiving the laser.
  • displacement gauge 68, 6 9 force, the central portion of al the wafer W, respectively measuring the distance to the periphery.
  • a control signal corresponding to the measured distance is transmitted to the control unit 7. Based on the transmitted control signal, the control unit 7 calculates the warpage amount of each region P1 to P5 of the wafer W.
  • the control unit 7 includes a data bus 71.
  • the data bus 71 includes a CPU 72 for performing various operations and a program storage unit 73. Is connected.
  • the program storage unit 73 the action of a coating and developing apparatus as described later, that is, temperature adjustment of the wafer W in each heating unit and cooling unit, film formation processing of each film on the wafer W, delivery of the wafer W between the units, Stored is a program 74 made of software, for example, instructed to measure the warp of the refractive index of the undercoat film or wafer W.
  • the control unit 7 transmits a control signal to each unit of the coating and developing apparatus to control the operation of the coating and developing apparatus.
  • the program 74 is stored in the program storage unit 73 while being stored in a storage medium such as a node disk, a compact disk, a magnetic optical disk, or a memory card.
  • a storage unit 75 is connected to the data bus 71.
  • This memory unit stores a correlation 76 between the resist pattern dimension (CD) and the refractive index, a correlation between the heater temperature and CD, and a correlation 77 between the warpage amount and the heater temperature correction amount.
  • the target value of the resist pattern dimension (CD) is inputted, for example, from an external input means and is overwritten and stored on the previously inputted target value.
  • the correlations 76 and 77 show, for example, the relation with respect to the heater 40a in the center of the hot plate 43.
  • the other heaters 40b to 40e are similar to the correlations 76 and 77, for example. However, a slightly different correlation is memorized.
  • the correlation 76 between the resist pattern dimension (CD) and the refractive index is stored, for example, as a graph shown in Fig. 10 (a).
  • the straight line kl in this graph represents the wafer W on which the underlying film is provided.
  • the heater 40a temperature is set to a temperature corresponding to the target value of CD, and a series of resist pattern formation processes are performed, and the relationship between the refractive index of each underlying film and the formed CD is shown in the figure. It was created based on the plot.
  • the CD is measured using, for example, a line width measuring unit provided outside the coating and developing apparatus.
  • the correlation 77 between the temperature of the heater 40a and CD is stored, for example, as a graph shown in Fig. 10 (b).
  • the straight line k2 in this graph is based on the plot in the figure obtained by performing PEB by changing the temperature of the heater 40a and forming a resist pattern on a wafer in which a resist is uniformly applied to a silicon substrate, for example. It was created. like this
  • the correlation between the CD formed without being affected by the underlying film and the heating temperature is obtained.
  • the graph of FIG. 10 (b) shows the relationship between the temperature of the heater 40a and the line width of the pattern to be formed when there is no variation in the underlying film
  • the graph of FIG. 10 (a) It is intended to compensate for CD fluctuations when variations in the underlying film occur. Therefore, when the target value of CD is actually determined, the target value can be obtained from Fig. 10 (b) by selecting the heating temperature corresponding to this target CD. It is only necessary to correct the temperature.
  • the heating temperature in the claims is a temperature obtained by adding the temperature correction component and the offset amount, which will be described later, to the selected heating temperature.
  • the CD of the pattern depends on the refractive index and the temperature of the heater.
  • the relational expressions of the straight lines X and Y are f and g, respectively, and the refractive index is x and CD.
  • the control unit 7 calculates the reference value of the refractive index corresponding to the target value and each heater from the relational expression. Calculate the reference value for the heating temperature of 40a to 40e.
  • the reference value of each heater is slightly different for each heater.
  • the reference value of the heating temperature of the heater 40a and the reference value of the refractive index corresponding to the reference value of the heater 40a are represented by ⁇ and ⁇ , respectively.
  • the control unit 7 sets g [f (A «)] Is calculated.
  • the control unit 7 calculates the amount of warpage, the amount of warpage stored in the storage unit 7, and the correction temperature of the heater 40. Based on the correlation, a correction temperature for correcting the estimated offset amount g [f ( ⁇ )] calculated based on the refractive index deviation is calculated. Assuming that the amount of warpage is ⁇ , and the correction temperature calculated from the amount of warpage ⁇ is represented by h ( ⁇ ), the control unit 7 performs, for example, g [f (A a )] + h (y) offset to heat each heater 40a, C) Heat (PEB) treatment of W.
  • the g [f ( ⁇ )] force S which is a predetermined offset amount, is applied to the reference value / 3 as an offset.
  • the heater 40a has been described, calculation is performed for the other heaters 40b to 40e in the same manner as the heater 40a, and an offset is set.
  • FIG. 11 is a flow chart showing the process from the formation of the base film on the surface of the wafer W to the development process.
  • the operator inputs a target value for the dimension of the resist pattern.
  • the control unit 7 calculates the corresponding reference value of the refractive index and the reference value of the heating temperature of each heater 40a to 40e of the heating unit 4. To do.
  • the opening / closing part 11 is opened and the lid of the carrier C1 is removed, and the wafer W is removed by the transfer means A1. Is taken out. Then, the wafer W is transferred to the main transfer means A2 through a transfer stage (TRS) constituting one stage of the shelf unit U1.
  • TRS transfer stage
  • the main transport means A2 transports the wafer W to the antireflection film forming unit 26, where the material of the antireflection film is applied to the entire surface of the wafer W from the material supply nozzle, and then the wafer W is transported to the main transport means A2.
  • the wafer W is transported to the main transport means A2.
  • a heating unit that constitutes one shelf of the shelf units U1 to U3, and is subjected to heat treatment to form an antireflection film (step Sl).
  • the wafer W is subjected to a hydrophobic treatment unit constituting one shelf among the main transfer means A2 ⁇ one shelf among the shelf units U1 to U3 ⁇ one shelf among the shelf units U1 to U3.
  • G ⁇ Cooling unit that constitutes one of the shelf units U1 to U3 ⁇ Main transport means A2, and then transported to the refractive index measurement unit 5 by the main transport means A2 and mounted on the stage 52. Placed.
  • the stage 52 on which the wafer W is placed moves to a predetermined position via the rotation driving unit 54 and the XY driving unit 55, and the light irradiation unit 56 first, for example, a base film in the region P1 in the plane of the wafer W
  • the control unit 7 calculates the refractive index of the base film in the region P1 based on the received reflected light. Thereafter, the wafer W sequentially moves to a predetermined position via the rotation driving unit 54 and the XY driving unit 55, and the refraction of the region P1 is performed.
  • the light irradiation unit 56 irradiates the regions P2, P3, P4, and P5 of the wafer W, and the control unit 7 calculates the refractive index of each of these regions based on the reflected light. (Step S2).
  • the wafer W is transferred to the resist coating unit (COT) 27 via the main transfer means A2, and the resist solution is applied to the surface of the antireflection film. Applied (Step S3). After drying the resist solution, the wafer W is transferred to one heating unit of the shelf units U1 to U3 by the main transfer means A2 (A3), heated at a predetermined temperature (PAB), and a resist film is formed. (Step S4).
  • the wafer W is transferred to the main transfer means 8-2 (83) ⁇ the cooling unit of the shelf units U1 to U3 ⁇ the main transfer means A3 ⁇ the transfer unit (TRS) of the shelf unit U3 ⁇ the interface. It is conveyed in the order of the conveying means 31A of the one face block B3, conveyed to the warpage measuring unit 6 by the conveying means 31A, and placed on the stage 62. After that, laser displacement meter 68, 69 force, laser is applied to the center and periphery of wafer W and stage 62 rotates, and these laser displacement meters 68, 69 receive the reflected light from wafer W. Then, the control unit 7 calculates the amount of warpage of each of the regions P1 to P5 of the wafer W based on the reflected light (step S5).
  • the wafer W is temporarily retracted to the buffer cassette 34 by the transfer means 31A, and then the transfer means 31A ⁇ the high-precision temperature control unit 33 ⁇ the transfer means 31A ⁇ the delivery stage.
  • the wafer W that has undergone the exposure process is placed on the stage 36, and then the transfer means 318 ⁇ the transfer stage TRS32 ⁇ the transfer means 31A ⁇ the transfer stage of the shelf unit U3 of the processing block B2 ⁇ the main transfer means
  • the main transfer means A3 transfers the wafer W to the cooling plate 44 of the heating unit 4 constituting one shelf of the shelf units U1 to U3.
  • the controller 7 calculates the refractive index calculated based on the refractive index ( ⁇ 1) measured in the region P 1 of the wafer W and the target value of the resist pattern dimension (CD) previously. Based on the correlation value 76 between the reference value ( ⁇ ) and the CD stored in the storage unit 75 and the refractive index 76 and the correlation 77 between the temperature of the heater 40 of the heating unit 4 stored in the storage unit 75 and CD. ,refraction The estimated offset amount (expressed as ⁇ ) of the heater 40a corresponding to the rate deviation ⁇ 1 ( ⁇ a) is calculated.
  • the control unit 7 determines the value of CD corresponding to ⁇ 1 from the straight line kl in the correlation 77 graph for the refractive index ⁇ 1 taken from the refractive index measuring unit 5. 1). Subsequently, the control unit 7 plots this CD 1 on the horizontal axis of the graph of FIG. 12B, and reads the value / 31 on the vertical axis corresponding to the plotted value on the horizontal axis. Further, the control unit 7 executes the arithmetic expression (/ 3/3 1), obtains the arithmetic value ⁇ / 3, and determines this ⁇ / 3 as the offset amount for / 3.
  • control unit 7 calculates the offset expected amount from the correlation between the warpage amount measured in each region P1 of the wafer W and the warpage amount stored in the storage unit 75 and the temperature correction amount.
  • the correction temperature amount is calculated, and based on the correction temperature amount, the offset expected amount, and the reference value of the heating temperature previously calculated from the target value of CD, it corresponds to each region P 1 of the wafer W.
  • the heating temperatures of the other heaters 40b to 40e are determined by calculation in the same manner as the heater 40a.
  • control unit 7 outputs the calculated heating temperature as a set temperature to the controller 49, and the controller 49 converts the set temperature and a temperature detection value of a temperature detection unit (not shown) provided in each heating region. Based on this, the power supplied to each heater is controlled, and thus temperature control is performed.
  • step S7 When the heaters 40a to 40e are heated to the set temperature by the control unit 7, the wafer W is transferred from the cooling plate 44 to the hot plate 43, and the regions P1 to P5 of the wafer W are heated. PEB processing is performed (step S7).
  • the wafer W that has undergone PEB processing is transferred to the cooling plate 44, cooled, and then transferred to the developing unit 28 by the main transfer means A3, and the developer is supplied to the surface thereof. A portion that is soluble in the developer of the resist film is dissolved, and a predetermined resist pattern is formed on the resist film (step S8).
  • the wafer W is heated from one shelf in the shelf units U1 to U3 for main transfer means A3 ⁇ POST ⁇ main transfer means A3 ⁇ cooling unit for one shelf in one of the shelf units U1 to U3.
  • the coating and developing apparatus described above includes the refractive index measurement unit 5 that measures the refractive index that is the optical property of each of the regions P1 to P5 in the surface of the base film of the wafer W before the resist film is formed, and the region P1.
  • Heating unit 4 including a hot plate 43 provided with heaters 40a to 40e for heating the wafer W after exposure and performing PEB processing independently for each region R1 to R5 corresponding to ⁇ P5
  • a control unit 7 including a storage unit 75 in which the correlation between the refractive index determined in advance, the temperature of each heater, and the line width of the resist pattern is stored is stored in the refractive index measurement unit.
  • the temperature of each heater 40a to 40e is controlled, and each heating region R1 to R5 of the hot plate 43 is controlled.
  • the temperature of each heater 40a to 40e is controlled, and each heating region R1 to R5 of the hot plate 43 is controlled.
  • the resist pattern dimension in the plane of the wafer W can be controlled with high accuracy. Therefore, it is possible to suppress a decrease in the yield of semiconductor products manufactured with wafer W power.
  • the amount of warpage is measured for each of the regions P1 to P5 in the plane of the wafer W, and each region P1 to P5 of the wafer W is heated during PEB based on the amount of warpage. Since this is corrected, it is possible to improve the ability of the variation in resist pattern dimensions between the regions P1 to P5.
  • the measurement of the refractive index of the wafer W and the setting of the corresponding heating temperature may be performed for every wafer W in the same lot, or after the wafer W at the head of the lot is Refractive index measurement is not performed for subsequent wafers W in the same lot, and each region P;! To P5 is set to be heated at each heating temperature set for the first wafer W. Good. In this way, the refractive index is measured and the heating temperature is set only for the first wafer in the lot, or there is! /, The subsequent wafer W is set! /, And the refractive index is measured and the heating temperature is set again.
  • a threshold (allowable range) is set for the refractive index of each region of the wafer W at the head of the lot, and the control unit 7 determines that the measured refractive index is within the allowable range.
  • the temperature of the subsequent wafer W is not newly set. If it is determined that the allowable range is exceeded, the subsequent wafer W is heated to the next wafer W! The degree may be set.
  • the timing of measuring the refractive index is not limited to the timing of the above-described embodiment as long as it is before the formation of the resist film, and may be, for example, before the formation of the antireflection film. Therefore, the optical property detected at the station is transmitted from the station for detecting the optical property of the base film before being carried into the coating and developing device to the coating and developing device. The heating amount of the heating unit 4 may be adjusted based on the optical property data.
  • FIG. 13 shows the configuration of the control unit 8.
  • the exposure apparatus B5 is configured to be able to perform exposure processing by changing the exposure amount for each of the regions P1 to P5 of the wafer W with the force that is configured in substantially the same manner as the exposure apparatus B4 of the embodiment described above. Has been.
  • the heating unit for performing PEB provided in the resist pattern forming apparatus is configured in substantially the same manner as the heating unit 4 described above.
  • the heating unit is not intended to perform the heat treatment by applying an offset based on the refractive index and the amount of warpage calculated by the control unit 7. Unlike!
  • the control unit 8 includes a storage unit 81.
  • the storage unit 81 is different from the storage unit 75 described above. For example, the correlation between the temperature of the heater 40 of the heating unit 4 and the CD is obtained. Instead, the correlation between the exposure amount and the CD is stored, and the correlation between the curvature amount and the exposure correction amount is stored instead of the correlation between the curvature amount and the temperature correction amount.
  • the control unit 8 determines the CD based on the correlation between the CD and the refractive index stored in the storage unit 81 and the correlation between the exposure amount and the CD. Calculate the exposure standard value and refractive index standard value corresponding to the target value.
  • step ⁇ 5 the control unit 8 determines the refractive index in ⁇ 1 to ⁇ 5 of the wafer W calculated using the refractive index measurement unit 5, the correlation between the CD stored in the storage unit 81 and the refractive index, and Based on the correlation between the exposure amount and the CD, the offset amount of the exposure amount is calculated based on the deviation of the refractive index, and the offset is estimated based on the warpage amount of each region P1 to P5 using the warpage measurement unit 6. An exposure correction amount for correcting the amount is calculated, and an exposure amount is determined for each of the regions P1 to P5 based on the estimated offset amount and the exposure correction amount.
  • exposure apparatus B5 exposes each of regions P1 to P5 based on the determined exposure amount (step T6).
  • the wafer W is transported along a path similar to that of the above-described embodiment, and is subjected to a heating ( ⁇ ) process in the heating unit (step ⁇ 7), and thereafter a development process (step ⁇ 8).
  • this resist pattern forming apparatus since the exposure amount is controlled based on the optical properties of the regions ⁇ 1 to ⁇ 5 in the plane of the wafer W, the same as in the coating and developing apparatus of the above-described embodiment. In addition, it is possible to suppress variations in the size of the resist pattern between the regions ⁇ 1 to ⁇ 5 due to variations in the optical properties of the base film, and thus it is possible to suppress a decrease in yield. Furthermore, since the exposure amount is controlled based on the amount of warpage of each of the regions ⁇ 1 to ⁇ 5, variations in resist pattern dimensions can be further suppressed.
  • the refractive index is calculated as the optical property of the base film, and the offset of the heating temperature and the exposure amount based on the refractive index.
  • the offset is calculated based on the optical properties of reflectivity and extinction coefficient, as well as the refractive index. Also good.
  • a film thickness measuring unit for calculating the film thickness of the base film from the reflectance, refractive index or extinction coefficient is provided in the coating and developing apparatus, and based on the film thickness of the areas ⁇ 1 to ⁇ 5 measured by this film thickness measuring device.
  • the heating temperature and exposure amount of each area may be offset.
  • the controller may control the PEB overheating temperature or exposure amount.
  • the timing for measuring the warpage of the wafer W is not limited to after the resist film formation but before the exposure.
  • the heating temperature of the PEB is offset based on the refractive index
  • the PEB is measured. If the offset is applied depending on the exposure amount, it may be before exposure. Accordingly, the measurement may be performed before the wafer W is carried into the coating and developing apparatus, in which the warpage may be measured before the refractive index of the base film is measured.
  • the warpage measurement unit 6 may be arranged, for example, on the shelf units U1 to U3 of the processing block B2.
  • the coating and developing apparatus shown in FIG. 15 is configured in substantially the same manner as the coating and developing apparatus shown in FIG. 1, and is an example in which the arrangement of the warp measuring unit 6 is changed.
  • the warp measuring unit 6 is located between the shelf unit U2 and the shelf unit U3 at a position accessible by the main conveyance means A3 (the back of the main conveyance means A3). It is provided.
  • the warp measurement unit 6 may be provided on the back surface of the main transport means A2, and in that case, for example, the warp measurement unit 6 is provided so as to be laminated on the refractive index measurement unit 5.
  • the refractive index measurement unit 5 may be provided on the back surface of the main transport means A3, and the warp measurement unit 6 may be provided on the back surface of the main transport means A2.
  • a unit for measuring CD is provided outside the coating and developing apparatus, and the CD and base film formed on the wafer W like the straight line kl described above by the measuring unit.
  • a unit for measuring CD is provided in the coating and developing apparatus (so-called “in-line”). The structure in which the correlation is obtained may be used.
  • An inspection / measurement block B6 is provided between the carrier block B1 and the processing block B2 of the coating and developing apparatus of FIG. 16, and a conveying means 91 is provided at the center of the inspection / measurement block B6. Yes.
  • the configuration of the inspection / measurement block B6 will be described with reference to FIG. Shelf units U6 and U7 are respectively provided on the left and right sides of the transfer means 91.
  • the shelf unit U6 includes, for example, a surface inspection unit 92 for inspecting the surface state of the wafer W, a line width measuring unit 93 force S, They are stacked in this order from the bottom.
  • the line width measuring unit 93 irradiates the resist pattern formed on the resist film by development, and measures the line width of the pattern based on the reflected light.
  • the shelf unit U7 is configured, for example, by laminating a film thickness measuring unit 94 for measuring each film thickness of the wafer W after development processing, a warp measuring unit 6, and a refractive index measuring unit 5 in this order from the bottom.
  • the transfer means 91 includes, for example, two tweezers for holding the wafer W, can access each unit of the shelf units U6 and U7, the delivery stage TRS of the shelf unit U1, and between the delivery means A1. It is configured so that the wafer W can be delivered.
  • the number of tweezers can be 3 or more. A number that does not hinder the transfer of wafer W is selected.
  • this coating and developing apparatus first, for example, a plurality of test wafers W configured so as to have different optical properties in each of the regions P1 to P5 are loaded into the coating and developing apparatus and used for these tests. Based on the refractive index of the base film measured during the process of forming a resist pattern on the wafer W and the line width of the pattern measured in-line! / Is determined so as to be stored in the determined correlation 1S storage unit. Except that the correlation is determined in this way, the control unit of the coating and developing apparatus is configured in substantially the same manner as the control unit 7 of the above-described embodiment.
  • test wafer W carried into the coating and developing apparatus is delivered in the order of delivery means Al ⁇ conveyance means 91 ⁇ refractive index measurement unit 5 ⁇ conveyance means 91, and then delivered into the processing block B2 and described above.
  • An antireflection film and a resist film are formed in the same manner as the coating developing apparatus.
  • the test wafer W is subjected to an exposure process, and then subjected to a PEB process in a state where each of the heaters 40a to 40e is set to a temperature corresponding to the target value of the CD, and further subjected to a development process, and then again.
  • Delivered to transport means 91 The test wafer W is transferred in the order of the line width measuring unit 93 ⁇ the transfer means 91 ⁇ the transfer means A1, and returned to the carrier block B1.
  • control unit When such transfer is completed for all test wafers W, the control unit performs wafer W based on the line width and refractive index measured from the line width measurement unit 93 and the refractive index measurement unit 5, respectively. Refraction corresponding to the straight line kl in the graph of the embodiment described above for each of the regions P1 to P5 Calculate and determine the correlation between rate and CD.
  • the above-described wafer W for the product is loaded into the coating and developing apparatus, and the wafer W is transferred from the delivery means Al ⁇ conveyance means 91 ⁇ refractive index measuring unit 5 ⁇ conveyance. After being transported in the order of means 91 ⁇ warp measurement unit 6 ⁇ transport means 91, it is transferred to the processing block B2, where it is subjected to various film formation processing and exposure processing in the same manner as the test wafer W described above. Thereafter, as in the above-described embodiment, the target value of CD stored in the storage unit in advance, the correlation between the heater temperature and CD, and the correlation between the refractive index stored by measurement of the test wafer and CD. Based on the above, PEB processing is performed with offset applied to each region P1 to P5 of the wafer W.
  • the wafer W after PEB is subjected to a development process. For example, a part of the wafer W is returned to the carrier block B1 in the same manner as the test wafer W. After being transported by means 91 ⁇ surface inspection unit 92 ⁇ transport means 91 ⁇ film thickness measuring unit 94, various film thicknesses formed on the wafer W and the surface state of the wafer W are inspected, and then returned to the carrier block B1.
  • various inspection units and measuring devices are provided in the inspection / measurement block B6. Therefore, the maintenance of each unit of this inspection 'measurement block B6 is performed. Convenience can be improved.
  • a series of pattern formation processing is performed, and the wafer W returned from the processing block B2 to the carrier C of the carrier block B1 is again inspected and measured via the transfer means A1 and the transfer means 91. It may be transported to block B6 for various inspections. In this case, even if the subsequent wafer W is transferred between the units in the processing block B2 and the interface block B3, the transfer effect of the blocks B2 and B3 affects the transfer means Al and the transfer means 91.
  • a predetermined wafer W can be transported between the blocks Bl and B6 and between the blocks B2 and B3 at the same time.
  • the inspection / measurement block B6 and the carrier block B1 may be operated while the processing block B2 is turned off, and the wafer W may be transferred to various units in the various blocks B6 for inspection. In this case, power can be saved compared to the case where all the blocks of the coating and developing device are turned on. [0087] As described above, only for the first wafer W of the lot, the refractive index is measured and the heater temperature is set based on the refractive index, and the wafer W in the subsequent lot is set.
  • the heaters 40a to 40e may be set based on the inspection result every time the sampling inspection is performed.
  • the present invention is useful for coating / development processing and resist pattern formation in a photoresist process.

Abstract

A coating developing machine comprises a heating unit for heating a substrate by using a heating plate for heating and controlling the heating independently multiple regions to be heated by heaters, an optical measuring unit for measuring optical properties of each region by applying light to the region corresponding to each region to be heated of the substrate before the substrate is coated with a resist liquid, a storage section storing the correlation between the predetermined optical properties of the base film of the substrate, the heater heating temperature, and the line width of the resist pattern, and a control section for calculating the heater heating temperature for each region to be heated according to the optical properties of the base film of the substrate measured by the optical measuring unit, the target line width of the resist pattern, and the correlation stored in the storage section and controlling the temperature at each region to be heated of the heating plate according to the calculated heating temperature. According to the invention, the line width of the resist pattern in the surface of the substrate and between the substrate can be controlled with high accuracy.

Description

明 細 書  Specification
塗布現像装置、レジストパターン形成装置、塗布現像方法、レジストパタ ーンの形成方法及び記憶媒体  Coating and developing apparatus, resist pattern forming apparatus, coating and developing method, resist pattern forming method, and storage medium
技術分野  Technical field
[0001] 本発明は、表面に下地膜が形成された基板にレジスト液を塗布してレジスト膜を形 成する塗布ユニットと、露光された後の基板を現像してレジストパターンを形成する現 像ユニットと、を備えた塗布現像装置と、前記塗布ユニット及び現像ユニットに加えて さらにレジスト塗布後の基板を露光する露光装置を備えたレジストパターン形成装置 、塗布、現像方法、レジストパターンの形成方法及びこれらの方法を実施するための コンピュータプログラムを格納した記憶媒体に関するものである。  [0001] The present invention relates to a coating unit that forms a resist film by applying a resist solution to a substrate having a base film formed on the surface, and an image in which a resist pattern is formed by developing the exposed substrate. A resist pattern forming apparatus, a coating and developing method, a resist pattern forming method, and a coating and developing apparatus including a unit; and an exposure apparatus that exposes a substrate after resist coating in addition to the coating unit and the developing unit. The present invention relates to a storage medium storing a computer program for carrying out these methods.
背景技術  Background art
[0002] 従来、半導体製造工程の一つであるフォトレジスト工程においては、例えば半導体 ウェハ(以下ウェハとする)の表面にレジスト液を塗布してレジスト膜を形成し、このレ ジスト膜を所定のパターンで露光した後に、現像してレジストパターンを作成している 。このような処理は、一般にレジストの塗布、現像を行う塗布現像装置に、露光装置を 接続したレジストパターン形成装置を用いて行われる。  Conventionally, in a photoresist process which is one of semiconductor manufacturing processes, for example, a resist solution is applied to the surface of a semiconductor wafer (hereinafter referred to as a wafer) to form a resist film. After exposing with a pattern, it is developed to create a resist pattern. Such a process is generally performed using a resist pattern forming apparatus in which an exposure apparatus is connected to a coating and developing apparatus for applying and developing a resist.
[0003] 前記ウェハは、例えばシリコンの基板(ベアシリコン)上に、当該ウェハに配線を形 成するための SiO膜や SiN膜などの各種の膜及び露光時にこれら各種の膜の光反  [0003] The wafer is, for example, on a silicon substrate (bare silicon), various films such as a SiO film and a SiN film for forming wiring on the wafer, and the optical reaction of these various films at the time of exposure.
2  2
射によるレジストパターンへの影響を抑える反射防止膜からなる下地膜が積層された 構成になっている。前記配線を形成する各種の膜は、ウェハが塗布現像装置に搬入 されるまでに形成され、塗布現像装置においては、その配線を形成する膜の表面に 前記反射防止膜、レジスト膜が下層から上層に向けてこの順に形成される。  It has a structure in which a base film made of an anti-reflective film that suppresses the effect on the resist pattern due to radiation is laminated. The various films forming the wiring are formed before the wafer is carried into the coating and developing apparatus. In the coating and developing apparatus, the antireflection film and the resist film are formed on the surface of the film forming the wiring from the lower layer to the upper layer. It forms in this order toward.
[0004] レジスト膜が形成されたウェハは、露光装置において露光処理を受けた後、塗布現 像装置内の加熱ユニットに搬送され、 PEB (ポスト ェクスポージャ ベーキング)と呼 ばれる加熱処理を受けて、レジスト膜において露光時に受けた定在波の影響が除か れることにより、レジストパターンの形状が整えられる。 PEB処理後にウェハは現像ュ ニットに搬送され、現像処理により露光された部分に対応する箇所、あるいは露光さ れなかった部分に対応する箇所が除去されてレジストパターンが形成される。 [0004] The wafer on which the resist film is formed is subjected to an exposure process in an exposure apparatus, and then transferred to a heating unit in a coating image forming apparatus, and subjected to a heating process called PEB (post-exposure baking). The shape of the resist pattern is adjusted by removing the influence of the standing wave received during exposure on the film. After PEB processing, the wafer is transferred to the development unit, where it corresponds to the part exposed by the development processing, or the exposed part. A portion corresponding to the portion that has not been removed is removed to form a resist pattern.
[0005] 上述の PEBにおけるウェハの加熱温度及び露光処理におけるウェハの露光量は 、形成されるレジストパターンの寸法に大きく影響を与える。なお化学増幅型のレジス トを用いてレジスト膜を形成した場合は、露光処理によりレジスト膜の表面に酸触媒 が生成し、その酸触媒がこの PEBによりレジスト内部に広く拡散し、現像処理に影響 を与えるため、 PEBの加熱温度がパターンの寸法に、より大きく影響を与える。 [0005] The wafer heating temperature in the above-described PEB and the exposure amount of the wafer in the exposure process greatly affect the dimensions of the resist pattern to be formed. When a resist film is formed using a chemically amplified resist, an acid catalyst is generated on the surface of the resist film by the exposure process, and the acid catalyst is diffused widely inside the resist by this PEB, affecting the development process. Therefore, the heating temperature of PEB has a greater influence on the pattern dimensions.
[0006] ところで半導体製品を小型化する要請からレジストパターンを微細化する要求が年 々、高まっており、レジストパターンの寸法(CD)を精度高く制御することが要求され ている。パターンを制御するにあたり、下地膜を形成せずに、夫々平坦で均一な各シ リコン基板上に直接レジスト膜を成膜したテストウェハを用いて塗布現像装置の各部 の処理環境を調整する場合がある力 S、このテストウェハにおいて良好なパターンの寸 法制御がなされて!/、ても、前記シリコン基板上に下地膜が形成されたウェハを塗布 現像装置に搬入して製品を製造する場合にはウェハの面内の各領域において、夫 々パターンの寸法 (線幅)がばらつく場合がある。 [0006] By the way, a demand for miniaturizing a resist pattern is increasing year by year due to a demand for miniaturization of semiconductor products, and it is required to control the dimension (CD) of the resist pattern with high accuracy. When controlling the pattern, there are cases where the processing environment of each part of the coating and developing apparatus is adjusted using a test wafer in which a resist film is directly formed on each flat and uniform silicon substrate without forming a base film. A certain force S, good dimensional control of the pattern is made on this test wafer! / Even when a product with a base film formed on the silicon substrate is carried into a coating and developing apparatus to produce a product In some cases, the dimension (line width) of the pattern varies in each region in the plane of the wafer.
[0007] このようなばらつきの発生状況からパターンの寸法のばらつきには、下地膜におい て例えば膜厚や密度などが関与していると考えられている。つまりウェハの面内の各 領域において下地膜の膜質が夫々異なるため、各領域が加熱処理及び露光処理に より受ける影響が均一とはならず、従ってパターンの寸法にばらつきが発生するもの と考えられ、その膜厚や密度などの膜質のばらつきは、膜質がばらついている膜に 光を照射した際に夫々異なる反応を示すことから光学的性質のばらつきとして表すこ とができる。ここでいう光学的性質とは反射率及び光学定数であり、前記光学定数を 構成するファクタ一としては屈折率 (n)及び消衰係数 (k)が含まれる。  [0007] It is considered that the variation in the dimension of the pattern is related to, for example, the film thickness and density in the base film because of the occurrence of such variations. In other words, since the film quality of the underlying film is different in each region in the surface of the wafer, the influence of each region on the heat treatment and the exposure processing is not uniform, and therefore it is considered that variations in pattern dimensions occur. Variations in film quality such as film thickness and density can be expressed as variations in optical properties because they exhibit different reactions when irradiated to films with varying film quality. The optical properties here are the reflectance and the optical constant, and the factor constituting the optical constant includes the refractive index (n) and the extinction coefficient (k).
[0008] 既述のように通常、下地膜は何層にも積み重なった膜により構成され、多くのプロ セスを経過して形成されており、その各プロセスにおけるばらつきが微細なものであ つても、下地膜が形成されたときにはそのばらつきが積み重なった結果として、大き な光学的性質のばらつきとして現れる場合があり、従ってこの下地膜の光学的性質 のばらつきの具合を予想したり、抑えたりすることが難しい場合がある。  [0008] As described above, the base film is usually composed of a multi-layered film and formed after many processes, and even if the variation in each process is fine. As a result of the accumulation of variations when the underlayer is formed, it may appear as a large variation in the optical properties.Therefore, the degree of variation in the optical properties of the underlayer is expected or suppressed. May be difficult.
[0009] 現在は、スループットを向上させるためにウェハの大型化が進んでいる力 S、ウェハ が大型化すればウェハの面内で既述の下地膜の光学的性質のばらつきが発生しや すくなり、その結果としてこのような下地膜のばらつきによる CDのばらつきが増えるこ とにより、歩留まりが低下するおそれがある。 [0009] At present, the force of increasing the size of wafers to improve throughput S, wafers As the size of the substrate increases, the above-described variations in the optical properties of the underlying film are likely to occur within the surface of the wafer.As a result, the CD variation due to such variations in the underlying film increases, resulting in an increase in yield. May decrease.
[0010] また各ウェハは、下地膜が形成される間に様々な処理を受けることにより、反りが発 生する場合がある。この反りもウェハが大型化することにより発生しやすくなり、また面 内の各領域における反り量のばらつきも大きくなるおそれがある。この反りによって P EBの際にウェハの面内の各領域ごとに加熱される温度が異なったり、露光時に光源 からの距離が夫々異なり、ウェハの面内の各領域ごとに照射される露光ビームのェ ネルギ一が異なったりすることによってパターンの寸法がさらに面内の各領域でばら つくおそれがある。 In addition, each wafer may be warped by being subjected to various treatments while the base film is formed. This warpage is likely to occur as the wafer becomes larger, and the amount of warpage in each region in the surface may also vary greatly. Due to this warpage, the heating temperature differs for each area in the wafer surface during the PEB, or the distance from the light source differs during exposure, and the exposure beam irradiated to each area in the wafer surface varies. If the energy is different, the dimensions of the pattern may further vary in each area in the plane.
[0011] なお特許文献 1には下地膜の光学的性質に基づき、加熱処理条件、露光処理条 件を変更してレジストパターンを制御する方法について記載されている力 上述のよ うな面内で起きるパターンのばらつきを解決できるものではない。  [0011] Note that Patent Document 1 describes a force that describes a method for controlling a resist pattern by changing a heat treatment condition and an exposure process condition based on the optical properties of a base film. It cannot solve pattern variations.
特許文献 1 :特開 2001— 332491  Patent Document 1: JP 2001-332491 A
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0012] 本発明は、このような問題を解決するためになされたものであり、その目的は、基板 の表面に下地膜が形成された基板にレジスト膜を形成してレジストパターンを形成す るにあたり、基板の面内及び基板間のレジストパターンの線幅を精度高く制御するこ とである。 The present invention has been made to solve such problems, and an object of the present invention is to form a resist pattern by forming a resist film on a substrate having a base film formed on the surface of the substrate. In this case, the line width of the resist pattern in the plane of the substrate and between the substrates is controlled with high accuracy.
課題を解決するための手段  Means for solving the problem
[0013] 本発明の塗布現像装置は、表面に下地膜が形成された基板にレジスト液を塗布し 、露光された後の基板を現像してレジストパターンを形成する塗布現像装置にお!/、 て、 [0013] The coating and developing apparatus of the present invention is a coating and developing apparatus that applies a resist solution to a substrate having a base film formed on the surface, and develops the exposed substrate to form a resist pattern! / And
複数のヒータにより複数の加熱領域を夫々独立して加熱制御できる熱板を備え、前 記熱板により露光後、現像前の基板を加熱する加熱ユニットと、  A heating unit that can independently control heating of a plurality of heating areas by a plurality of heaters, and a heating unit that heats the substrate before development after exposure by the heating plate;
レジスト液を塗布する前の基板の前記各加熱領域に対応した領域に光を照射して、 各領域の光学的性質を測定する光学測定ユニットと、 予め求められた、基板の下地膜の光学的性質と、ヒータの加熱温度と、レジストバタ 一ンの線幅との相関関係が記憶された記憶部と、 An optical measurement unit that measures the optical properties of each region by irradiating light to the region corresponding to each heating region of the substrate before applying the resist solution; A storage unit storing correlations between optical properties of the base film of the substrate, the heating temperature of the heater, and the line width of the resist pattern obtained in advance;
前記光学測定ユニットにより測定された基板の下地膜の光学的性質、レジストパター ンの線幅の目標値及び前記記憶部の相関関係に基づ!/、て各加熱領域毎に前記ヒ ータの加熱温度を演算し、演算された加熱温度に基づ!/、て熱板の各加熱領域の温 度を制御する制御部と、を備えている。  Based on the optical properties of the base film of the substrate measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage section! /, The heater of each heating area And a controller that controls the temperature of each heating region of the hot plate based on the calculated heating temperature.
[0014] 前記装置にお!/、て、例えば基板の前記各測定領域の反り量を測定する反り測定ュ ニットをさらに備え、前記制御部は、測定された反り量に基づいて各加熱領域におけ る前記熱板の演算された加熱温度の補正値を演算し、当該補正値と、前記加熱温 度とに基づいて熱板の各加熱領域の温度を制御するようにしてもよい。。  [0014] The apparatus further includes, for example, a warp measurement unit for measuring a warp amount of each measurement region of the substrate, and the control unit applies each of the heating regions based on the measured warp amount. A correction value for the heating temperature calculated for the heating plate may be calculated, and the temperature of each heating region of the heating plate may be controlled based on the correction value and the heating temperature. .
[0015] 本発明のレジストパターン形成装置は、表面に下地膜が形成された基板にレジスト 液を塗布し、次いで基板を露光し、更に露光された後の基板を現像してレジストバタ ーンを形成するレジストパターン形成装置にぉレ、て、  In the resist pattern forming apparatus of the present invention, a resist solution is applied to a substrate having a base film formed on the surface, then the substrate is exposed, and the exposed substrate is further developed to form a resist pattern. The resist pattern forming device
基板の面内を複数に区画した各領域毎に露光量を設定できる露光装置と、 レジスト膜形成前の基板の前記複数の領域に対応した領域内に光を照射して、各領 域の光学的性質を測定する光学測定ユニットと、  An exposure apparatus that can set an exposure amount for each area in which the in-plane surface of the substrate is divided into a plurality of areas, and light is irradiated to areas corresponding to the plurality of areas on the substrate before the resist film is formed. An optical measurement unit for measuring physical properties;
予め求められた、光学的性質と、露光量と、レジストパターンの線幅との相関関係が 記憶された記憶部と、  A storage unit in which correlations between optical properties, exposure amounts, and resist pattern line widths, which are obtained in advance, are stored;
前記光学測定ユニットにより測定された光学的性質、レジストパターンの線幅の目標 値及び前記記憶部の相関関係に基づいて各領域毎に露光量を演算し、演算された 露光量に基づいて前記露光装置の露光量を制御する制御部と、を備えている。  An exposure amount is calculated for each region based on the optical properties measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage unit, and the exposure based on the calculated exposure amount And a control unit for controlling the exposure amount of the apparatus.
[0016] 前記装置にお!/、て例えば、基板の前記各測定領域の反り量を測定する反り測定ュ ニットをさらに備え、前記制御部は、測定された反り量に基づいて各露光領域におけ る前記露光装置の露光量を補正する露光補正量を演算し、当該露光補正量と、演 算された前記露光量と基づレ、て、各露光領域の露光量を制御するようにしてもょレ、。  [0016] The apparatus further includes, for example, a warpage measurement unit that measures a warpage amount of each measurement region of the substrate, and the control unit applies each of the exposure regions based on the measured warpage amount. An exposure correction amount for correcting the exposure amount of the exposure apparatus is calculated, and the exposure amount in each exposure region is controlled based on the exposure correction amount and the calculated exposure amount. Gore.
[0017] 本発明の塗布、現像方法は、  [0017] The coating and developing method of the present invention includes:
露光された後の基板を、複数のヒータにより複数の加熱領域を夫々独立して加熱制 御できる熱板を用いてレジストパターンを形成する塗布、現像方法において、 基板の前記各加熱領域に対応した領域に光を照射して、各領域の光学的性質を測 定する工程と、 In a coating / developing method in which a resist pattern is formed on a substrate after exposure using a hot plate that can independently control a plurality of heating regions by a plurality of heaters. Irradiating a region corresponding to each heating region of the substrate with light to measure optical properties of each region;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、  A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film;
レジスト膜が形成された基板を露光する工程と、  Exposing the substrate on which the resist film is formed;
基板の下地膜に光を照射して得られる光学的性質と前記ヒータの加熱温度とレジスト ノ ターンの線幅との相関関係について予め取得したデータと、前記工程で測定され た基板の光学的性質と、レジストパターンの線幅の目標値とに基づいて、各加熱領 域毎に加熱温度を演算する工程と、  Data obtained in advance on the correlation between the optical properties obtained by irradiating the substrate underlayer with light, the heating temperature of the heater and the line width of the resist pattern, and the optical properties of the substrate measured in the previous step And a step of calculating a heating temperature for each heating region based on the target value of the line width of the resist pattern,
演算された加熱温度に基づいて各加熱領域を加熱制御する工程と、  A step of controlling heating of each heating region based on the calculated heating temperature;
加熱された基板を現像する工程と、を有する。  Developing the heated substrate.
[0018] この方法にお!/、ては例えば基板の前記各測定領域の反り量を測定する工程と、測 定された反り量に基づいて、演算された加熱温度を補正する補正温度を演算するェ 程と、をさらに有し、基板を加熱する工程は、前記加熱温度及び補正温度に基づい てネ亍われるようにしてもよ!/、。 [0018] In this method, for example, a step of measuring the amount of warpage of each measurement area of the substrate, and a correction temperature for correcting the calculated heating temperature is calculated based on the measured amount of warpage. The step of heating the substrate may be negotiated based on the heating temperature and the correction temperature! /.
[0019] 本発明のレジストパターンの形成方法は、 [0019] The resist pattern forming method of the present invention comprises:
基板の下地膜の面内における複数の領域の各々に光を照射して、各領域の光学的 性質を測定する工程と、  Irradiating each of a plurality of regions in the surface of the base film of the substrate with light, and measuring the optical properties of each region;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、  A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film;
基板の下地膜に光を照射して得られる光学的性質と、露光装置の露光量と、レジスト ノ ターンの線幅との相関関係について予め取得したデータと、  Data acquired in advance regarding the correlation between the optical properties obtained by irradiating the substrate underlayer with light, the exposure amount of the exposure apparatus, and the line width of the resist pattern;
前記工程で測定された基板の光学的性質と、レジストパターンの線幅の目標値とに 基づいて、各領域毎の露光量を演算する工程と、  Calculating the exposure amount for each region based on the optical properties of the substrate measured in the step and the target value of the line width of the resist pattern;
演算された露光量に対応する露光量で基板を露光する工程と、  Exposing the substrate with an exposure amount corresponding to the calculated exposure amount;
露光処理された基板を加熱する工程と、  Heating the exposed substrate; and
加熱された基板を現像する工程と、を有する。  Developing the heated substrate.
[0020] この方法にお!/、ては例えば、基板の前記各測定領域の反り量を測定する工程と、 測定された反り量に基づいて、演算された露光量を補正する露光補正量を演算する 工程と、をさらに含み、基板を露光する工程は、前記露光量及び露光補正量に基づ V、てネ亍われるようにしてもよ!/、。 [0020] In this method! /, For example, a step of measuring the amount of warpage of each measurement region of the substrate; And a step of calculating an exposure correction amount for correcting the calculated exposure amount based on the measured amount of warpage, and the step of exposing the substrate includes V and T based on the exposure amount and the exposure correction amount. You can make it go!
[0021] 本発明の記憶媒体は、例えば基板の表面に下地膜が形成された基板にレジスト液 を塗布してレジストパターンを形成するための装置に使用され、コンピュータ上で動 作するコンピュータプログラムを格納した記憶媒体である。そして前記コンピュータプ ログラムは、既述のレジストパターンの形成方法または塗布、現像方法を実施するよ うにステップが,袓まれて!/、る。 The storage medium of the present invention is used in, for example, an apparatus for forming a resist pattern by applying a resist solution to a substrate having a base film formed on the surface of the substrate, and a computer program that runs on a computer. A stored storage medium. In the computer program, steps are included so as to carry out the resist pattern forming method, coating method, and developing method described above!
発明の効果  The invention's effect
[0022] 本発明によれば、基板の面内における下地膜の光学的性質のばらつきにより、前 記測定領域毎にレジストパターンの線幅がばらつくことを抑えることができるため、基 板の面内及び基板間におけるレジストパターンの線幅を精度高く制御することができ る。従って基板から製造される製品の歩留まりの低下を抑えることができる。また光学 的性質の測定領域毎にレジストパターンの線幅がばらつくことを抑えることができるた め、基板の面内及び基板間におけるレジストパターンの線幅を精度高く制御すること ができる。  [0022] According to the present invention, it is possible to suppress variation in the line width of the resist pattern for each measurement region due to variations in the optical properties of the base film in the plane of the substrate. In addition, the line width of the resist pattern between the substrates can be controlled with high accuracy. Accordingly, it is possible to suppress a decrease in the yield of products manufactured from the substrate. In addition, since it is possible to suppress variations in the line width of the resist pattern for each optical property measurement region, it is possible to control the line width of the resist pattern within and between the substrates with high accuracy.
図面の簡単な説明  Brief Description of Drawings
[0023] [図 1]本発明の塗布現像装置の一例を示す平面図である。  FIG. 1 is a plan view showing an example of a coating and developing apparatus of the present invention.
[図 2]前記塗布現像装置を示す全体斜視図である。  FIG. 2 is an overall perspective view showing the coating and developing apparatus.
[図 3]前記塗布現像装置のインターフェイスブロックを示す斜視図である。  FIG. 3 is a perspective view showing an interface block of the coating and developing apparatus.
[図 4]前記塗布現像装置に設けられた加熱ユニットの構成図である。  FIG. 4 is a configuration diagram of a heating unit provided in the coating and developing apparatus.
[図 5]前記加熱ユニットの熱板及び前記熱板に設けられたヒータの構成図である。  FIG. 5 is a configuration diagram of a heating plate of the heating unit and a heater provided on the heating plate.
[図 6]前記熱板に載置されたウェハの各領域を示す説明図である。  FIG. 6 is an explanatory view showing each region of the wafer placed on the hot plate.
[図 7]前記塗布現像装置に設けられた屈折率測定ユニットの縦断側面図である。  FIG. 7 is a longitudinal side view of a refractive index measurement unit provided in the coating and developing apparatus.
[図 8]前記塗布現像装置に設けられたウェハの反り測定ユニットの構成図である。  FIG. 8 is a configuration diagram of a wafer warpage measuring unit provided in the coating and developing apparatus.
[図 9]前記塗布現像装置に設けられた制御部の構成図である。  FIG. 9 is a configuration diagram of a control unit provided in the coating and developing apparatus.
[図 10]前記制御部に設けられた記憶部に記憶されたレジストパターンの線幅、下地 膜の屈折率及び前記ヒータの温度との相関関係を示したグラフ図である。 [図 11]前記塗布現像装置により、ウェハにレジストパターンが形成する工程を示した フローチャートである。 FIG. 10 is a graph showing the correlation between the line width of a resist pattern, the refractive index of a base film, and the temperature of the heater stored in a storage unit provided in the control unit. FIG. 11 is a flowchart showing a process of forming a resist pattern on a wafer by the coating and developing apparatus.
[図 12]オフセット量が決定される様子を示した説明図である。  FIG. 12 is an explanatory diagram showing how the offset amount is determined.
[図 13]本発明のレジストパターン形成装置の一例に設けられた制御部の構成を示し た構成図である。  FIG. 13 is a configuration diagram showing a configuration of a control unit provided in an example of a resist pattern forming apparatus of the present invention.
[図 14]前記レジストパターン形成装置により、ウェハにレジストパターンが形成するェ 程を示したフローチャートである。  FIG. 14 is a flowchart showing a process of forming a resist pattern on a wafer by the resist pattern forming apparatus.
[図 15]本発明の塗布現像装置の他の一例を示す平面図である。  FIG. 15 is a plan view showing another example of the coating and developing apparatus of the present invention.
[図 16]本発明の塗布現像装置の更に他の一例を示す平面図である。  FIG. 16 is a plan view showing still another example of the coating and developing apparatus of the present invention.
[図 17]前記塗布現像装置の検査 ·測定ブロックの構成を示した説明図である。  FIG. 17 is an explanatory view showing a configuration of an inspection / measurement block of the coating and developing apparatus.
符号の説明  Explanation of symbols
[0024] W 半導体ウェハ [0024] W Semiconductor wafer
4 加熱ユニット  4 Heating unit
40a〜40e ヒータ  40a ~ 40e heater
43 熱板  43 Hot plate
5 屈折率測定ユニット  5 Refractive index measurement unit
6 反り測定ユニット  6 Warpage measurement unit
7 制御部  7 Control unit
74 記憶部  74 Memory
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0025] 次に本発明の実施の形態の概要を説明する。この実施の形態は、例えばシリコン 基板上に下地膜が形成された基板につ!/、て、下地膜上にレジスト膜が形成される前 に下地膜の面内の各所定領域の光学的性質として屈折率を測定し、またその各領 域の基板の反り量を測定する。そして形成されるレジストパターンの寸法が目標値と なるように、露光後、現像前のウェハ Wについて、測定された各領域の屈折率及びゥ ェハ Wの反り量に基づいて、各領域ごとに加熱温度を制御しょうとするものである。  Next, the outline of the embodiment of the present invention will be described. This embodiment is applied to, for example, a substrate having a base film formed on a silicon substrate, and before the resist film is formed on the base film, the optical properties of each predetermined region in the surface of the base film are described. The refractive index is measured and the amount of warpage of the substrate in each region is measured. Then, based on the measured refractive index of each region and the amount of warpage of the wafer W for each wafer W after exposure and before development, the dimension of the formed resist pattern becomes the target value. It is intended to control the heating temperature.
[0026] 本発明の実施の形態に係る塗布現像装置に露光装置を接続したレジストパターン 形成装置について説明する。図 1、図 2は夫々前記塗布現像装置の概略平面図、全 体斜視図である。図中 B1は塗布現像装置のキャリアブロックであり、基板例えばゥェ ハ Wが例えば 13枚密閉収納されたキャリア C1を搬入出するための載置部 10aを備 えたキャリアステーション 10と、このキャリアステーション 10から見て前方の壁面に設 けられる開閉部 21と、開閉部 21を介してキャリア C1からウェハ Wを取り出すための 受け渡し手段 A1とが設けられている。 A resist pattern forming apparatus in which an exposure apparatus is connected to the coating and developing apparatus according to the embodiment of the present invention will be described. 1 and 2 are schematic plan views of the coating and developing apparatus, respectively. It is a body perspective view. In the figure, B1 is a carrier block of a coating and developing apparatus, and a carrier station 10 having a mounting portion 10a for loading and unloading a carrier C1 in which, for example, 13 wafers W are sealed and stored, and this carrier station. An opening / closing part 21 provided on the front wall as viewed from 10 and a delivery means A1 for taking out the wafer W from the carrier C1 via the opening / closing part 21 are provided.
[0027] なおキャリア C1に収納されて塗布現像装置に搬入されるウェハ Wは、例えば平坦 で均一なシリコン基板(ベアシリコン)上に SiO (酸化シリコン)、 SiN (窒化シリコン)な どからなる多数の膜が積層された構造になっており、この塗布現像装置において成 膜されるレジスト膜と、シリコン基板との間におけるこれらの各種の膜や塗布現像装置 において成膜される反射防止膜を合わせて下地膜と称する。  [0027] The wafer W accommodated in the carrier C1 and carried into the coating and developing apparatus is, for example, a large number of SiO (silicon oxide), SiN (silicon nitride), etc. on a flat and uniform silicon substrate (bare silicon). The resist film formed in this coating and developing apparatus is combined with these various films between the silicon substrate and the antireflection film formed in the coating and developing apparatus. This is referred to as a base film.
[0028] キャリアブロック B1の奥側には筐体 21にて周囲を囲まれる処理ブロック B2が接続 されており、この処理ブロック B2には手前側から順に多段化した加熱 ·冷却系のュニ ットを含む棚ユニット Ul、 U2、 U3及び液処理ユニット U4、 U5の各ユニット間のゥェ ハ Wの受け渡しを行う主搬送手段 A2、 A3とが交互に配列して設けられている。また 主搬送手段 A2、 A3は、キャリアブロック B1から見て前後方向に配置される棚ュニッ ト Ul、 U2、 U3側に一面部と、後述する例えば右側の液処理ユニット U4、 U5側の 一面側と、左側の一面側をなす背面部とで構成される区画壁 23により囲まれる空間 内に置かれている。図中 24、 25は各ユニットで用いられる処理液の温度調節装置や 温湿度調節用のダクト等を備えた温湿度調節ユニットである。  [0028] A processing block B2 surrounded by a casing 21 is connected to the back side of the carrier block B1, and this processing block B2 has a multi-stage heating / cooling system unit from the front side. The main transport means A2 and A3 for transferring the wafer W between the shelf units Ul, U2 and U3 and the liquid processing units U4 and U5 are provided alternately. The main transport means A2 and A3 are one side of the shelf unit Ul, U2 and U3 arranged in the front-rear direction when viewed from the carrier block B1, and one side of the right side liquid treatment units U4 and U5, which will be described later. It is placed in a space surrounded by a partition wall 23 composed of the left side and the back side forming one side. In the figure, 24 and 25 are temperature / humidity control units equipped with a temperature control device for the treatment liquid used in each unit and ducts for temperature / humidity control.
[0029] 液処理ユニット U4は、例えば図 2に示すようにレジスト液や反射防止膜を形成する ための薬液などを収納する薬液収納部の上に反射防止膜形成用の塗布ユニット (B ARC) (以下「反射防止膜形成ユニット (BARC)」という) 26が 2段、レジスト膜形成用 の塗布ユニット(COT) (以下「レジスト塗布ユニット(COT)」という) 27が 3段、上から 下に向かってこの順に積層されて構成されている。液処理ユニット U5は、現像液な どを収納する薬液収納部の上に、現像ユニット (DEV)が 5段に積層されて構成され ている。反射防止膜形成ユニット 26、レジスト塗布ユニット 27、現像ユニット 28は反 射防止膜形成用の薬液、レジスト液、現像液を夫々ウェハ W表面に供給するノズノレ を備えている。 [0030] 既述の棚ユニット Ul、 U2、 U3は、液処理ユニット U4、 U5にて行われる処理の前 処理及び後処理を行うための各種ユニットを複数段に積層した構成とされており、レ ジスト液を塗布する前にウェハ W表面全体に疎水化処理を行う疎水化処理ユニット、 PABと呼ばれるレジスト塗布後のウェハ Wを加熱(ベータ)する加熱ユニット、背景技 術の欄で説明した PEBを行う加熱ユニット 4、現像後のウェハ Wを加熱する POSTと 呼ばれる加熱ユニット及びウェハ Wを冷却する冷却ユニット等を含んで!/、る。 PEBを 行う加熱ユニット 4の構成は後述する。 [0029] The liquid processing unit U4 is, for example, an application unit (B ARC) for forming an antireflection film on a chemical solution storage section for storing a resist solution or a chemical solution for forming an antireflection film as shown in FIG. (Hereinafter referred to as “Anti-Reflection Film Formation Unit (BARC)”) 26 in two stages, resist film formation coating unit (COT) (hereinafter referred to as “resist coating unit (COT)”) 27 in three stages, from top to bottom The layers are stacked in this order. The liquid processing unit U5 is configured by stacking development units (DEV) in five stages on a chemical solution storage section for storing a developer and the like. The antireflection film forming unit 26, the resist coating unit 27, and the developing unit 28 are each provided with a nozzle that supplies a chemical solution, a resist solution, and a developer for forming the antireflection film to the surface of the wafer W. [0030] The aforementioned shelf units Ul, U2, U3 are configured by laminating various units for performing pre-processing and post-processing of the liquid processing units U4, U5 in multiple stages, A hydrophobic treatment unit that performs hydrophobic treatment on the entire surface of the wafer W before applying the resist solution, a heating unit called PAB that heats the wafer W after application of the resist (beta), and the PEB described in the background section This includes a heating unit 4 that performs heating, a heating unit called POST that heats the wafer W after development, and a cooling unit that cools the wafer W. The configuration of the heating unit 4 that performs PEB will be described later.
[0031] また棚ユニット U1には、キャリアブロック B1と処理ブロック B2との間でウェハ Wを受 け渡すための受け渡しステージ (TRS)力 棚ユニット U3には、処理ブロック B2とイン ターフェイスブロック B3との間でウェハ Wの受け渡しを行うための受け渡しステージ( TRS)が夫々含まれている。なお、例えば棚ユニット U1と U2との間には主搬送機構 A2がアクセスできる位置に反射防止膜が形成されたウェハ Wが搬入され、下地膜の 光学的性質として屈折率を測定する光学的測定ユニットである屈折率測定ユニット 5 が設けられて!/、る。屈折率測定ユニット 5につ!/、ては後述する。  [0031] The shelf unit U1 has a transfer stage (TRS) force for delivering the wafer W between the carrier block B1 and the processing block B2. The shelf unit U3 has a processing block B2 and an interface block B3. A transfer stage (TRS) for transferring the wafer W to and from each is included. For example, between the shelf units U1 and U2, a wafer W on which an antireflection film is formed is loaded at a position accessible by the main transport mechanism A2, and an optical measurement for measuring the refractive index as an optical property of the base film. A unit for measuring the refractive index 5 is provided. The refractive index measuring unit 5 is described later.
[0032] 処理ブロック B2における棚ユニット U3の奥側には、インターフェイスブロック B3を 介して露光装置 B4が接続されている。図 3も参照しながらインターフェイスブロック B 3の構成について説明する。インターフェイスブロック B3は、処理ブロック B2と露光装 置 B4との間に前後に設けられる第 1の搬送室 3A、第 2の搬送室 3Bにより構成されて おり、夫々に搬送手段 31A、搬送手段 31Bが設けられている。第 1の搬送室 3Aには ウェハ Wの反りを測定する反り測定ユニット 6、搬送手段 31Aと搬送手段 31Bとの間 でウェハ Wを受け渡すための受け渡しステージ TRS32、露光するウェハ Wを温調す る高精度温調ユニット 33及び搬送状況に応じてウェハ Wを一時的に退避させるバッ  [0032] An exposure apparatus B4 is connected to the back side of the shelf unit U3 in the processing block B2 via an interface block B3. The configuration of the interface block B 3 will be described with reference to FIG. The interface block B3 is composed of a first transfer chamber 3A and a second transfer chamber 3B provided before and after the processing block B2 and the exposure apparatus B4. The transfer means 31A and the transfer means 31B are respectively provided. Is provided. In the first transfer chamber 3A, the warp measurement unit 6 for measuring the warpage of the wafer W, the transfer stage TRS32 for transferring the wafer W between the transfer means 31A and the transfer means 31B, and the temperature of the wafer W to be exposed are controlled. The high-precision temperature control unit 33 and the battery that temporarily retracts the wafer W according to the transfer status.
[0033] また露光装置 B4にはインターフェイス部 B3の搬送手段 31Bとの間で受け渡しを行 うステージ 35、 36力 S設けられ、ステージ 35には露光処理前のウェハ W力 ステージ 3 6には露光処理後のウェハ Wが夫々載置される。 [0033] The exposure apparatus B4 is provided with stages 35 and 36 force S for transferring to and from the conveying means 31B of the interface unit B3. The stage 35 is exposed to the wafer W force before exposure processing. Each processed wafer W is placed.
[0034] 続いて棚ユニット U1〜U3に設けられた、 PEBを行う加熱ユニット 4の構成について 図 4を参照しながら説明する。図 4 (a)、 (b)は夫々加熱ユニット 4の横断平面図、縦 断側面図である。加熱ュュット 4は筐体 41を備え、筐体 41内のステージ 42上には円 形の熱板 43及び冷却プレート 44が設けられて!/、る。冷却プレート 44は図中左右方 向に移動し、載置されたウェハを冷却する。筐体 41の側壁にはシャツタ 45により開 閉自在な搬送口 46が設けられ、搬送口 46を介して筐体 41内に進入した主搬送手 段 A2、 A3と冷却プレート 44との間でウェハ Wが受け渡される。図中 47、 48は昇降 自在な 3本のピン(図では 2本のみ記載)であり、ピン 47は冷却プレート 44と主搬送 手段 A2、 A3との間で、ピン 48は冷却プレート 47と熱板 43との間で夫々ウェハ Wの 受け渡しを行う。図中 46aは冷却プレート 44に設けられた、ピン 47、 48が通過するた めのスリット、 43aは熱板 43に設けられた、ピン 48が通過するための孔である。 [0034] Next, the configuration of the heating unit 4 for performing PEB provided in the shelf units U1 to U3 will be described with reference to FIG. Figures 4 (a) and (b) are cross-sectional plan views of the heating unit 4, respectively. FIG. The heating mute 4 includes a casing 41, and a circular hot plate 43 and a cooling plate 44 are provided on a stage 42 in the casing 41. The cooling plate 44 moves in the horizontal direction in the figure, and cools the mounted wafer. A transfer port 46 that can be opened and closed by a shirt 45 is provided on the side wall of the casing 41, and the wafer is transferred between the main transfer means A2 and A3 that have entered the casing 41 through the transfer port 46 and the cooling plate 44. W is handed over. In the figure, 47 and 48 are three pins that can move up and down (only two are shown in the figure). Pin 47 is between the cooling plate 44 and the main transport means A2 and A3, and pin 48 is the cooling plate 47 and heat. Wafer W is transferred to and from plate 43, respectively. In the figure, 46a is a slit provided in the cooling plate 44 for allowing the pins 47 and 48 to pass therethrough, and 43a is a hole provided in the hot plate 43 for allowing the pins 48 to pass therethrough.
[0035] 図 5は熱板 43の上面図であり、熱板 43は例えば中央の円板状の領域 R1と、領域 R1を囲み、領域 R1の周囲を周方向に等分割された、扇状の領域 R2〜R5とに区画 され、各領域 R1〜R5には各領域の形状に対応するヒータ 40a〜40eが埋め込まれ ている。各ヒータ 40a〜40eは、コントローラ 49を介して後述の制御部 7に接続されて いる。制御部 7から送信された制御信号を受けてコントローラ 49が、ヒータ 40a〜40e に各々独立して電力を供給し、ヒータ 40a〜40eが夫々所定の温度に制御されること により、図 6に示すように熱板 43に載置されたウェハ Wにおいて熱板 43の領域 R;!〜 R5に夫々対応する、鎖線で示した各領域 P1〜P5が、ヒータ 40a〜40eの温度に対 応する温度に夫々加熱される。  FIG. 5 is a top view of the hot plate 43. The hot plate 43 surrounds the central disc-shaped region R1 and the region R1, for example, and has a fan-like shape in which the periphery of the region R1 is equally divided in the circumferential direction. Regions R2 to R5 are partitioned, and heaters 40a to 40e corresponding to the shape of each region are embedded in each region R1 to R5. Each of the heaters 40a to 40e is connected to a control unit 7 to be described later via a controller 49. In response to the control signal transmitted from the control unit 7, the controller 49 supplies power to the heaters 40a to 40e independently of each other, and the heaters 40a to 40e are controlled to a predetermined temperature, as shown in FIG. In the wafer W placed on the hot plate 43, each region P1 to P5 indicated by a chain line corresponding to the region R;! To R5 of the hot plate 43 corresponds to the temperature of the heaters 40a to 40e. Each is heated.
[0036] 続いて図 7を用いて屈折率測定ユニット 5について説明する。屈折率測定ユニット 5 は、筐体 51を備え、筐体 51内にはウェハ Wを載置するためのステージ 52が設けら れており、ステージ 52は主搬送手段 A2、 A3と筐体 51の側壁に設けられた搬送口 5 3を介してウェハ Wの受け渡しを行う。ステージ 52の下方には当該ステージ 52を鉛 直軸周りに回転させる回転駆動部 54が設けられ、回転駆動部 54は XY駆動部 55上 に設けられており、 XY駆動部 55は回転駆動部 54と共にステージ 52を、図の紙面の 表裏方向及び左右方向に移動させる。  Subsequently, the refractive index measuring unit 5 will be described with reference to FIG. The refractive index measurement unit 5 includes a casing 51, and a stage 52 for mounting the wafer W is provided in the casing 51. The stage 52 includes the main transfer means A 2, A 3 and the casing 51. Wafer W is transferred through the transfer port 53 provided on the side wall. Below the stage 52, there is provided a rotation drive unit 54 for rotating the stage 52 around the lead straight axis. The rotation drive unit 54 is provided on the XY drive unit 55, and the XY drive unit 55 is provided with the rotation drive unit 54. At the same time, the stage 52 is moved in the front / back direction and the left / right direction of the drawing.
[0037] ステージ 52の上方には当該ステージ 52に載置されたウェハ Wに光を照射する光 照射部 56が設けられており、光照射部 56は例えばレーザー光源 56a、偏光子 56b、 補正板 56cなどを備えて!/、る。またステージ 52上には光照射部 56からウェハ Wの下 地膜に照射され、下地膜力も反射した光を受光する受光部 57が設けられている。受 光部 57は検光子 57a、光検出器 57bなどを備えている。 [0037] Above the stage 52, there is provided a light irradiation unit 56 that irradiates light onto the wafer W placed on the stage 52. The light irradiation unit 56 includes, for example, a laser light source 56a, a polarizer 56b, and a correction plate. With 56c etc.! Also, on the stage 52, from the light irradiation part 56 under the wafer W. A light receiving portion 57 is provided for receiving the light irradiated to the ground film and reflected from the ground film force. The light receiving unit 57 includes an analyzer 57a, a photodetector 57b, and the like.
[0038] 制御部 7により XYステージ 55、回転駆動部 54及び光照射部 56の動作が制御され 、例えばウェハ Wの面内の各領域 P1〜P5に光照射部 56が順次、光を照射する。受 光部 57は、照射された光の反射光を検出し、その検出した反射光に対応する制御 信号を制御部 7に送信し、制御部 7は、その制御信号に基づき反射光の位相、振幅 などを検出することによりウェハ Wの各領域 P1〜P5における下地膜の屈折率を演算 する。 [0038] Operations of the XY stage 55, the rotation driving unit 54, and the light irradiation unit 56 are controlled by the control unit 7, and for example, the light irradiation unit 56 sequentially irradiates light to the respective regions P1 to P5 in the surface of the wafer W. . The light receiving unit 57 detects the reflected light of the irradiated light and transmits a control signal corresponding to the detected reflected light to the control unit 7, and the control unit 7 determines the phase of the reflected light based on the control signal, By detecting the amplitude, etc., the refractive index of the underlying film in each region P1 to P5 of the wafer W is calculated.
[0039] 次に反り測定ユニット 6について説明する。図 8 (a)は反り測定ユニット 6の縦断正面 図であり、この図に示すように反り測定ユニット 6は筐体 61を備え、筐体 61内にはゥ ェハ Wを載置する円形のステージ 62が設けられている。ステージ 62表面にはウェハ Wの裏面を支持する複数のピン 63が設けられている。  Next, the warpage measurement unit 6 will be described. FIG. 8 (a) is a longitudinal front view of the warp measurement unit 6. As shown in this figure, the warp measurement unit 6 includes a casing 61, and the casing 61 has a circular shape on which the wafer W is placed. Stage 62 is provided. A plurality of pins 63 that support the back surface of the wafer W are provided on the surface of the stage 62.
[0040] 図 8 (b)は筐体 61内の各部の構成を示した斜視図である。図中 64はステージ 62を 厚さ方向に貫く孔であり、搬送手段 31Aが筐体 61の側壁に設けられた搬送口 65を 介して筐体 61内に進入し、ウェハ Wをステージ 62に載置する際にステージ 62とゥェ ハ Wとの間にエアが溜まり、ウェハ Wがステージ 62上をすベることを防ぐ役割を有す る。ステージ 62の周縁部には搬送手段 31Aの形状に対応するように切欠き 62aが設 けられている。ステージ 62は、その下部に設けられた駆動機構 66を介して鉛直軸周 りに回転自在、昇降自在に構成されている。  FIG. 8 (b) is a perspective view showing the configuration of each part in the housing 61. In the figure, 64 is a hole that penetrates the stage 62 in the thickness direction. The transfer means 31A enters the case 61 through the transfer port 65 provided on the side wall of the case 61, and the wafer W is placed on the stage 62. At the time of placing, air accumulates between the stage 62 and the wafer W, and has a role to prevent the wafer W from sliding on the stage 62. A notch 62a is provided at the peripheral edge of the stage 62 so as to correspond to the shape of the conveying means 31A. The stage 62 is configured to be rotatable and vertically movable about a vertical axis via a drive mechanism 66 provided at the lower part thereof.
[0041] ステージ 62の中心部上方、周縁部上方には夫々支持部材 67に支持された状態で レーザー変位計 68、 69が設けられている。例えばステージ 32が回転する間に、これ らのレーザー変位計 68、 69はステージ 62に載置されたウェハ Wの中央部、周縁部 にレーザーを照射すると共にその反射光を受光して、当該レーザー変位計 68、 69 力、らウェハ Wの中央部、周縁部までの距離を夫々測定する。測定された距離に対応 する制御信号は、制御部 7に送信される。制御部 7は送信された制御信号に基づき、 ウェハ Wの各領域 P1〜P5の反り量を夫々演算する。 Laser displacement meters 68 and 69 are provided above the center of stage 62 and above the peripheral edge in a state of being supported by support member 67, respectively. For example, while the stage 32 is rotating, these laser displacement meters 68 and 69 irradiate the center part and the peripheral part of the wafer W placed on the stage 62 with a laser and receive the reflected light, thereby receiving the laser. displacement gauge 68, 6 9 force, the central portion of al the wafer W, respectively measuring the distance to the periphery. A control signal corresponding to the measured distance is transmitted to the control unit 7. Based on the transmitted control signal, the control unit 7 calculates the warpage amount of each region P1 to P5 of the wafer W.
[0042] 続いて制御部 7の構成について図 9を参照しながら説明する。制御部 7はデータバ ス 71を備え、データバス 71には各種の演算を行う CPU72及びプログラム格納部 73 が接続されている。プログラム格納部 73には後述するような塗布現像装置の作用、 つまり各加熱ユニット及び冷却ユニットにおけるウェハ Wの温度調節、ウェハ Wへの 各膜の成膜処理、各ユニット間におけるウェハ Wの受け渡し、下地膜の屈折率ゃゥ ェハ Wの反りの測定などが実施されるように命令が組まれた、例えばソフトウェアから なるプログラム 74が格納される。 Next, the configuration of the control unit 7 will be described with reference to FIG. The control unit 7 includes a data bus 71. The data bus 71 includes a CPU 72 for performing various operations and a program storage unit 73. Is connected. In the program storage unit 73, the action of a coating and developing apparatus as described later, that is, temperature adjustment of the wafer W in each heating unit and cooling unit, film formation processing of each film on the wafer W, delivery of the wafer W between the units, Stored is a program 74 made of software, for example, instructed to measure the warp of the refractive index of the undercoat film or wafer W.
[0043] プログラム 74がプログラム格納部 73に格納され、制御部 7に読み出されることにより 、当該制御部 7は塗布現像装置の各部に制御信号を送信し、この塗布現像装置の 作用を制御する。なおこのプログラム 74は、例えばノヽードディスク、コンパクトディスク 、マグネットオプティカルディスク、メモリーカードなどの記憶媒体に収納された状態 でプログラム格納部 73に格納される。  [0043] When the program 74 is stored in the program storage unit 73 and read out by the control unit 7, the control unit 7 transmits a control signal to each unit of the coating and developing apparatus to control the operation of the coating and developing apparatus. The program 74 is stored in the program storage unit 73 while being stored in a storage medium such as a node disk, a compact disk, a magnetic optical disk, or a memory card.
[0044] また、データバス 71には記憶部 75が接続されている。この記憶部には、レジストパ ターンの寸法(CD)と屈折率との相関関係 76、ヒータの温度と CDとの相関関係及び 反り量とヒータの温度補正量との相関関係 77が記憶されており、さらにレジストパター ンの寸法(CD)の目標値が、例えば外部の入力手段から入力され、先に入力した目 標値に上書きされて記憶されるようになっている。なお相関関係 76、 77は、例えば熱 板 43の中央のヒータ 40aについての関係を示したものであり、図示はしていないが例 えば他のヒータ 40b〜40eについても相関関係 76、 77に類似した、これらとは微妙 に異なる相関関係が記憶されている。  In addition, a storage unit 75 is connected to the data bus 71. This memory unit stores a correlation 76 between the resist pattern dimension (CD) and the refractive index, a correlation between the heater temperature and CD, and a correlation 77 between the warpage amount and the heater temperature correction amount. Further, the target value of the resist pattern dimension (CD) is inputted, for example, from an external input means and is overwritten and stored on the previously inputted target value. The correlations 76 and 77 show, for example, the relation with respect to the heater 40a in the center of the hot plate 43. Although not shown, the other heaters 40b to 40e are similar to the correlations 76 and 77, for example. However, a slightly different correlation is memorized.
[0045] レジストパターンの寸法(CD)と屈折率との相関関係 76は、例えば図 10 (a)に示す グラフとして記憶されており、このグラフ中の直線 klは、下地膜を設けたウェハ Wに ついてヒータ 40aの温度を CDの目標値に対応する温度に設定して、一連のレジスト ノ ターン形成工程を行い、各下地膜の屈折率と形成された CDとの関係とを図に示 すようにプロットしたものに基づいて作成されたものである。なお、前記 CDの測定は、 例えば塗布現像装置の外部に設けられた線幅測定ユニットを用いて行って!/、る。  [0045] The correlation 76 between the resist pattern dimension (CD) and the refractive index is stored, for example, as a graph shown in Fig. 10 (a). The straight line kl in this graph represents the wafer W on which the underlying film is provided. The heater 40a temperature is set to a temperature corresponding to the target value of CD, and a series of resist pattern formation processes are performed, and the relationship between the refractive index of each underlying film and the formed CD is shown in the figure. It was created based on the plot. The CD is measured using, for example, a line width measuring unit provided outside the coating and developing apparatus.
[0046] ヒータ 40aの温度と CDとの相関関係 77は、例えば図 10 (b)に示すグラフとして記 憶されている。このグラフ中の直線 k2は、例えばシリコン基板に均一にレジストを塗 布したウェハについて、ヒータ 40aの温度を変化させて PEBを行い、レジストパターン を形成することで得られた図中のプロットに基づいて作成されたものである。このよう にシリコン基板上にレジストパターンを直接形成することで、下地膜の影響を受けず に形成される CDと、加熱温度との相関関係を求めている。 [0046] The correlation 77 between the temperature of the heater 40a and CD is stored, for example, as a graph shown in Fig. 10 (b). The straight line k2 in this graph is based on the plot in the figure obtained by performing PEB by changing the temperature of the heater 40a and forming a resist pattern on a wafer in which a resist is uniformly applied to a silicon substrate, for example. It was created. like this In addition, by directly forming a resist pattern on a silicon substrate, the correlation between the CD formed without being affected by the underlying film and the heating temperature is obtained.
[0047] つまり図 10(b)のグラフは、下地膜のばらつきがない場合のヒータ 40a温度と形成さ れるパターンの線幅との関係を示したものであり、図 10 (a)のグラフは下地膜のばら つきが発生したときの CDの変動を補償しょうとするものである。従って実際に CDの 目標値を決めたときに、その目標値を得るには図 10(b)より、この目標 CDに対応す る加熱温度を選択すればよぐ屈折率の変化に対応する分だけその温度を補正す ればよい。特許請求の範囲における加熱温度は、その選択した加熱温度に温度補 正分、後述の言葉でレ、うオフセット予定量を加えた温度である。  That is, the graph of FIG. 10 (b) shows the relationship between the temperature of the heater 40a and the line width of the pattern to be formed when there is no variation in the underlying film, and the graph of FIG. 10 (a) It is intended to compensate for CD fluctuations when variations in the underlying film occur. Therefore, when the target value of CD is actually determined, the target value can be obtained from Fig. 10 (b) by selecting the heating temperature corresponding to this target CD. It is only necessary to correct the temperature. The heating temperature in the claims is a temperature obtained by adding the temperature correction component and the offset amount, which will be described later, to the selected heating temperature.
[0048] グラフ 76、 77に示すようにパターンの CDは屈折率及びヒータの温度に依存してお り、例えば直線 X、 Yの関係式を夫々 f、 gとし、また屈折率を x、 CDを y、ヒータ温度を zとして夫々表すと、図 10(a)からは y = f(x)、図 10(b)からは z = g(y)=g[f(x)]と いう関係式として表すことができる。新たなレジストパターンの寸法の目標値が入力さ れ、その目標値が記憶部 75に記憶されると、制御部 7はその関係式より、その目標 値に対応する屈折率の基準値及び各ヒータ 40a〜40eの加熱温度の基準値を演算 する。なお既述のようにヒータ毎に異なる CDと、そのヒータの温度と、屈折率との相 関関係が記憶されているため各ヒータの基準値は、ヒータ毎に微妙に異なっている。  [0048] As shown in graphs 76 and 77, the CD of the pattern depends on the refractive index and the temperature of the heater. For example, the relational expressions of the straight lines X and Y are f and g, respectively, and the refractive index is x and CD. Is represented by y and heater temperature z, respectively, from Fig. 10 (a), y = f (x), and from Fig. 10 (b), z = g (y) = g [f (x)] It can be expressed as a formula. When a new resist pattern dimension target value is input and the target value is stored in the storage unit 75, the control unit 7 calculates the reference value of the refractive index corresponding to the target value and each heater from the relational expression. Calculate the reference value for the heating temperature of 40a to 40e. As described above, since the correlation between CD, which is different for each heater, the temperature of the heater, and the refractive index is stored, the reference value of each heater is slightly different for each heater.
[0049] ヒータ 40aの加熱温度の基準値、そのヒータ 40aの基準値に対応する屈折率の基準 値を夫々 α、 βで表すものとし、例えばウェハ Wの各領域 P1において既述のように 実際に測定された屈折率がその基準値 αから Δ αだけずれていたとすると、制御部 7は、各領域ごとにその屈折率のずれ Δ aに対する加熱温度のオフセット予定量とし て g[f(A «)]を演算する。  [0049] The reference value of the heating temperature of the heater 40a and the reference value of the refractive index corresponding to the reference value of the heater 40a are represented by α and β, respectively. For example, as described above in each region P1 of the wafer W If the measured refractive index is deviated by Δα from the reference value α, the control unit 7 sets g [f (A «)] Is calculated.
[0050] またウェハ Wの各領域 P1において既述のように反りが検出された場合、制御部 7は 、この反り量と、記憶部 7に記憶された反り量とヒータ 40の補正温度との相関関係から 前記屈折率のずれに基づいて演算されたオフセット予定量 g [f ( Δ α )]を補正するた めの補正温度を演算する。反り量を γ、この反り量 γから演算された補正温度を h( γ )で夫々表すものとすると、制御部 7は、例えば前記加熱温度の基準値 /3に対して g[f(A a)]+h(y)のオフセットをかけてヒータ 40aを夫々加熱することにより、ゥェ ハ Wの加熱(PEB)処理を行う。なお領域 P1にお!/、て反りが検出されな!/、場合には、 オフセット予定量である g[f ( Δ α ) ]力 S、オフセットとして前記基準値 /3にかけられる。 なおヒータ 40aについて説明してきたが、他のヒータ 40b〜40eについてもこのヒータ 40aと同様に演算が行われ、オフセットが設定される。 [0050] When warpage is detected in each region P1 of the wafer W as described above, the control unit 7 calculates the amount of warpage, the amount of warpage stored in the storage unit 7, and the correction temperature of the heater 40. Based on the correlation, a correction temperature for correcting the estimated offset amount g [f (Δα)] calculated based on the refractive index deviation is calculated. Assuming that the amount of warpage is γ, and the correction temperature calculated from the amount of warpage γ is represented by h (γ), the control unit 7 performs, for example, g [f (A a )] + h (y) offset to heat each heater 40a, C) Heat (PEB) treatment of W. In addition, in the case where no warp is detected in the region P1, the g [f (Δα)] force S, which is a predetermined offset amount, is applied to the reference value / 3 as an offset. Although the heater 40a has been described, calculation is performed for the other heaters 40b to 40e in the same manner as the heater 40a, and an offset is set.
[0051] 続いて、上述の塗布現像装置の作用について図 11を参照しながら説明する。図 1 1はウェハ W表面に下地膜を形成してから現像処理を行うまでの工程を示したフロー チャートである。先ずレジストパターンの寸法の目標値をオペレータが入力する。入 力され、そして記憶部 75に記憶された前記目標値に基づいて、制御部 7がそれに対 応する屈折率の基準値及び加熱ユニット 4の各ヒータ 40a〜40eの加熱温度の基準 値を演算する。 [0051] Next, the operation of the above-described coating and developing apparatus will be described with reference to FIG. FIG. 11 is a flow chart showing the process from the formation of the base film on the surface of the wafer W to the development process. First, the operator inputs a target value for the dimension of the resist pattern. Based on the target value input and stored in the storage unit 75, the control unit 7 calculates the corresponding reference value of the refractive index and the reference value of the heating temperature of each heater 40a to 40e of the heating unit 4. To do.
[0052] 続いて外部からウェハ Wの収納されたキャリア C1が搬入され、載置台 10aに載置さ れると、開閉部 11が開くと共にキャリア C1の蓋体が外されて受け渡し手段 A1により ウェハ Wが取り出される。そしてウェハ Wは棚ユニット U1の一段を構成している受け 渡しステージ (TRS)を介して主搬送手段 A2へと受け渡される。  [0052] Subsequently, when the carrier C1 storing the wafer W is loaded from the outside and placed on the mounting table 10a, the opening / closing part 11 is opened and the lid of the carrier C1 is removed, and the wafer W is removed by the transfer means A1. Is taken out. Then, the wafer W is transferred to the main transfer means A2 through a transfer stage (TRS) constituting one stage of the shelf unit U1.
[0053] 主搬送手段 A2はウェハ Wを反射防止膜形成ユニット 26に搬送し、このユニット 26 においてウェハ Wの表面全体に材料供給ノズルから反射防止膜の原料が塗布され 、その後ウェハ Wは主搬送手段 A2により棚ユニット U1〜U3の一の棚を構成する加 熱ユニットに搬送され、加熱処理を受けて反射防止膜が形成される(ステップ Sl)。  [0053] The main transport means A2 transports the wafer W to the antireflection film forming unit 26, where the material of the antireflection film is applied to the entire surface of the wafer W from the material supply nozzle, and then the wafer W is transported to the main transport means A2. By means A2, it is conveyed to a heating unit that constitutes one shelf of the shelf units U1 to U3, and is subjected to heat treatment to form an antireflection film (step Sl).
[0054] その後ウェハ Wは、主搬送手段 A2→棚ユニット U1〜U3のうちの 1つの棚を構成 する冷却ユニット→棚ユニット U1〜U3のうちの 1つの棚を構成する疎水化処理ュニ ット→棚ユニット U1〜U3のうちの 1つの棚を構成する冷却ユニット→主搬送手段 A2 の順に搬送された後、前記主搬送手段 A2により屈折率測定ユニット 5に搬入され、 そのステージ 52に載置される。  [0054] Thereafter, the wafer W is subjected to a hydrophobic treatment unit constituting one shelf among the main transfer means A2 → one shelf among the shelf units U1 to U3 → one shelf among the shelf units U1 to U3. G → Cooling unit that constitutes one of the shelf units U1 to U3 → Main transport means A2, and then transported to the refractive index measurement unit 5 by the main transport means A2 and mounted on the stage 52. Placed.
[0055] ウェハ Wを載置したステージ 52は回転駆動部 54及び XY駆動部 55を介して、所定 の位置に移動し、光照射部 56が例えば先ずウェハ Wの面内の領域 P1の下地膜に 光を照射して、受光部 57が下地膜から反射した光を受光すると、制御部 7がその受 光した反射光に基づき領域 P1の下地膜の屈折率を演算する。その後、回転駆動部 54及び XY駆動部 55を介して順次ウェハ Wは所定の位置に移動し、領域 P1の屈折 率を測定した場合と同様に、光照射部 56がウェハ Wの領域 P2、 P3、 P4、 P5に光を 照射し、制御部 7が反射光に基づいてこれらの各領域の屈折率を夫々演算する(ス テツプ S2)。 The stage 52 on which the wafer W is placed moves to a predetermined position via the rotation driving unit 54 and the XY driving unit 55, and the light irradiation unit 56 first, for example, a base film in the region P1 in the plane of the wafer W When the light receiving unit 57 receives the light reflected from the base film, the control unit 7 calculates the refractive index of the base film in the region P1 based on the received reflected light. Thereafter, the wafer W sequentially moves to a predetermined position via the rotation driving unit 54 and the XY driving unit 55, and the refraction of the region P1 is performed. Similar to the measurement of the refractive index, the light irradiation unit 56 irradiates the regions P2, P3, P4, and P5 of the wafer W, and the control unit 7 calculates the refractive index of each of these regions based on the reflected light. (Step S2).
[0056] ウェハ Wの各領域 P1〜P5の屈折率が測定された後、ウェハ Wは主搬送手段 A2 を介してレジスト塗布ユニット(COT) 27に搬送され、反射防止膜の表面にレジスト液 が塗布される (ステップ S3)。レジスト液の乾燥後、ウェハ Wは、主搬送手段 A2 (A3) によって、棚ユニット U1〜U3の一の加熱ユニットに搬送され、所定の温度で加熱さ れ (PAB)、レジスト膜が成膜される(ステップ S4)。  [0056] After the refractive indexes of the regions P1 to P5 of the wafer W are measured, the wafer W is transferred to the resist coating unit (COT) 27 via the main transfer means A2, and the resist solution is applied to the surface of the antireflection film. Applied (Step S3). After drying the resist solution, the wafer W is transferred to one heating unit of the shelf units U1 to U3 by the main transfer means A2 (A3), heated at a predetermined temperature (PAB), and a resist film is formed. (Step S4).
[0057] レジスト膜が成膜された後、ウェハ Wは主搬送手段八2 (八3)→棚ユニット U1〜U3 の冷却ユニット→主搬送手段 A3→棚ユニット U3の受け渡しユニット (TRS)→インタ 一フェイスブロック B3の搬送手段 31Aの順に搬送され、搬送手段 31Aにより反り測 定ユニット 6に搬送され、ステージ 62に載置される。その後、レーザー変位計 68、 69 力、らレーザーがウェハ Wの中心部、及び周縁部に照射されると共にステージ 62が回 転し、これらレーザー変位計 68、 69がウェハ Wからの反射光を受光して、制御部 7が その反射光に基づいてウェハ Wの各領域 P1〜P5の反り量を夫々演算する(ステツ プ S5)。  [0057] After the resist film is formed, the wafer W is transferred to the main transfer means 8-2 (83) → the cooling unit of the shelf units U1 to U3 → the main transfer means A3 → the transfer unit (TRS) of the shelf unit U3 → the interface. It is conveyed in the order of the conveying means 31A of the one face block B3, conveyed to the warpage measuring unit 6 by the conveying means 31A, and placed on the stage 62. After that, laser displacement meter 68, 69 force, laser is applied to the center and periphery of wafer W and stage 62 rotates, and these laser displacement meters 68, 69 receive the reflected light from wafer W. Then, the control unit 7 calculates the amount of warpage of each of the regions P1 to P5 of the wafer W based on the reflected light (step S5).
[0058] 反り量の測定を終えたウェハ Wは、搬送手段 31Aによってバッファカセット 34に一 時退避された後、搬送手段 31 A→高精度温調ユニット 33→搬送手段 31 A→受け渡 しステージ TRS32→搬送手段 31B→露光装置 S4のステージ 35に受け渡され、そ の後、露光装置 S4により露光処理を受ける(ステップ S6)。  [0058] After the measurement of the warp amount, the wafer W is temporarily retracted to the buffer cassette 34 by the transfer means 31A, and then the transfer means 31A → the high-precision temperature control unit 33 → the transfer means 31A → the delivery stage. TRS32 → transport means 31B → transferred to stage 35 of exposure apparatus S4, and then subjected to exposure processing by exposure apparatus S4 (step S6).
[0059] 露光処理を受けたウェハ Wはステージ 36に載置され、その後、搬送手段 318→受 け渡しステージ TRS32→搬送手段 31A→処理ブロック B2の棚ユニット U3の受け渡 しステージ→主搬送手段 A3の順に搬送され、主搬送手段 A3は、棚ユニット U1〜U 3の一の棚を構成する加熱ユニット 4の冷却プレート 44にウェハ Wを受け渡す。  [0059] The wafer W that has undergone the exposure process is placed on the stage 36, and then the transfer means 318 → the transfer stage TRS32 → the transfer means 31A → the transfer stage of the shelf unit U3 of the processing block B2 → the main transfer means The main transfer means A3 transfers the wafer W to the cooling plate 44 of the heating unit 4 constituting one shelf of the shelf units U1 to U3.
[0060] 例えばこのとき、制御部 7は、ウェハ Wの領域 P1において測定された屈折率( α 1と する)と、先にレジストパターンの寸法(CD)の目標値に基づき演算した屈折率の基 準値( α )と、記憶部 75に記憶された CDと屈折率との相関関係 76及び記憶部 75に 記憶された加熱ユニット 4のヒータ 40の温度と CDとの相関関係 77に基づいて、屈折 率のずれ α— α 1 (前記 Δ a )に対応するヒータ 40aのオフセット予定量( Δ βとして 表す)を演算する。 For example, at this time, the controller 7 calculates the refractive index calculated based on the refractive index (α 1) measured in the region P 1 of the wafer W and the target value of the resist pattern dimension (CD) previously. Based on the correlation value 76 between the reference value (α) and the CD stored in the storage unit 75 and the refractive index 76 and the correlation 77 between the temperature of the heater 40 of the heating unit 4 stored in the storage unit 75 and CD. ,refraction The estimated offset amount (expressed as Δβ) of the heater 40a corresponding to the rate deviation α−α1 (Δa) is calculated.
[0061] 図 12を用いてこのオフセット予定量が演算される様子を具体的に説明する。制御 部 7は、図 12 (a)に示すように屈折率測定ユニット 5から取り込んだ屈折率 α 1につい て、相関関係 77のグラフの直線 klから、その α 1に対応する CDの値(CD 1とする) を求める。続いて制御部 7は、この CD 1を図 12 (b)のグラフの横軸にプロットし、プロ ットした横軸の値に対応する縦軸の値 /3 1を読み出す。さらに制御部 7は演算式(/3 /3 1 )を実行し、その演算値 Δ /3を求め、この Δ /3を /3に対するオフセット予定量と して決定する。  [0061] The manner in which the estimated offset amount is calculated will be specifically described with reference to FIG. As shown in FIG. 12 (a), the control unit 7 determines the value of CD corresponding to α 1 from the straight line kl in the correlation 77 graph for the refractive index α 1 taken from the refractive index measuring unit 5. 1). Subsequently, the control unit 7 plots this CD 1 on the horizontal axis of the graph of FIG. 12B, and reads the value / 31 on the vertical axis corresponding to the plotted value on the horizontal axis. Further, the control unit 7 executes the arithmetic expression (/ 3/3 1), obtains the arithmetic value Δ / 3, and determines this Δ / 3 as the offset amount for / 3.
[0062] また制御部 7は、ウェハ Wの各領域 P 1にお!/、て測定された反り量及び記憶部 75に 記憶された反り量と温度補正量との相関関係から前記オフセット予定量を補正する 補正温度量を演算し、この補正温度量、前記オフセット予定量及び先に CDの目標 値から演算された加熱温度の基準値に基づレ、てウェハ Wの各領域 P 1に対応するヒ ータ 40aの加熱温度を演算し、決定する。他のヒータ 40b〜40eの加熱温度もヒータ 40aと同様に演算して決定する。これにより制御部 7はこの演算された加熱温度を設 定温度として、コントローラ 49に出力し、コントローラ 49は、この設定温度と各加熱領 域に設けた図示しない温度検出部の温度検出値とに基づいて各ヒータの供給電力 を制御し、こうして温度制御が行われる。  [0062] Further, the control unit 7 calculates the offset expected amount from the correlation between the warpage amount measured in each region P1 of the wafer W and the warpage amount stored in the storage unit 75 and the temperature correction amount. The correction temperature amount is calculated, and based on the correction temperature amount, the offset expected amount, and the reference value of the heating temperature previously calculated from the target value of CD, it corresponds to each region P 1 of the wafer W. Calculate the heating temperature of the heater 40a to be determined. The heating temperatures of the other heaters 40b to 40e are determined by calculation in the same manner as the heater 40a. As a result, the control unit 7 outputs the calculated heating temperature as a set temperature to the controller 49, and the controller 49 converts the set temperature and a temperature detection value of a temperature detection unit (not shown) provided in each heating region. Based on this, the power supplied to each heater is controlled, and thus temperature control is performed.
[0063] 制御部 7によりヒータ 40a〜40eが夫々設定温度に昇温すると、冷却プレート 44か ら熱板 43にウェハ Wが受け渡され、ウェハ Wの各領域 P 1〜P5が加熱されて、 PEB 処理が行われる(ステップ S 7)。  [0063] When the heaters 40a to 40e are heated to the set temperature by the control unit 7, the wafer W is transferred from the cooling plate 44 to the hot plate 43, and the regions P1 to P5 of the wafer W are heated. PEB processing is performed (step S7).
[0064] PEB処理を受けたウェハ Wは冷却プレート 44に受け渡され、冷却された後、主搬 送手段 A3により現像ユニット 28に搬送され、その表面に現像液が供給されることに より、レジスト膜の現像液に対して可溶解性の部位が溶解され所定のレジストパター ンがレジスト膜に形成される(ステップ S8)。その後、ウェハ Wは主搬送手段 A3→PO STを行う棚ユニット U1〜U3のうちの 1つの棚の加熱ユニット→主搬送手段 A3→棚 ユニット U1〜U3の一のうちの 1つの棚の冷却ユニット→主搬送手段 A2→棚ユニット U1の受け渡しステージ→受け渡し手段 A1の順に搬送され、前記受け渡し手段 A1 によって載置台 20a上の元のキャリア CIへと戻される。 [0064] The wafer W that has undergone PEB processing is transferred to the cooling plate 44, cooled, and then transferred to the developing unit 28 by the main transfer means A3, and the developer is supplied to the surface thereof. A portion that is soluble in the developer of the resist film is dissolved, and a predetermined resist pattern is formed on the resist film (step S8). After that, the wafer W is heated from one shelf in the shelf units U1 to U3 for main transfer means A3 → POST → main transfer means A3 → cooling unit for one shelf in one of the shelf units U1 to U3. → Main transfer means A2 → Shelf unit U1 delivery stage → Transfer means A1 in this order, the delivery means A1 Is returned to the original carrier CI on the mounting table 20a.
[0065] 上述の塗布現像装置は、レジスト膜形成前のウェハ Wの下地膜における面内の各 領域 P1〜P5の光学的性質である屈折率を測定する屈折率測定ユニット 5と、前記 領域 P1〜P5に対応する各領域 R1〜R5毎に独立して、露光後、現像前のウェハ W を加熱し、 PEB処理を行うヒータ 40a〜40eが設けられた熱板 43を備えた加熱ュニッ ト 4と、を備えており、予め求められた屈折率と、各ヒータの温度と、レジストパターンの 線幅との相関関係が記憶された記憶部 75を備えた制御部 7が、前記屈折率測定ュ ニット 5により測定された屈折率、レジストパターンの線幅の目標値及び記憶部 75の 前記相関関係に基づいて各ヒータ 40a〜40eの温度を制御し、熱板 43の各加熱領 域 R1〜R5の温度を制御する。このような構成とすることでウェハ Wの面内の各領域 P1〜P5において下地膜の光学的性質のばらつきにより、レジストパターンの寸法が 各領域 P1〜P5間でばらつくことを抑えることができるため、ウェハ Wの面内における レジストパターンの寸法を精度高く制御することができる。従ってウェハ W力 製造さ れる半導体製品の歩留まりの低下を抑えることができる。  [0065] The coating and developing apparatus described above includes the refractive index measurement unit 5 that measures the refractive index that is the optical property of each of the regions P1 to P5 in the surface of the base film of the wafer W before the resist film is formed, and the region P1. Heating unit 4 including a hot plate 43 provided with heaters 40a to 40e for heating the wafer W after exposure and performing PEB processing independently for each region R1 to R5 corresponding to ~ P5 And a control unit 7 including a storage unit 75 in which the correlation between the refractive index determined in advance, the temperature of each heater, and the line width of the resist pattern is stored is stored in the refractive index measurement unit. Based on the refractive index measured by the knit 5, the target value of the line width of the resist pattern, and the correlation of the storage unit 75, the temperature of each heater 40a to 40e is controlled, and each heating region R1 to R5 of the hot plate 43 is controlled. To control the temperature. With this configuration, it is possible to suppress variations in the resist pattern dimension between the regions P1 to P5 due to variations in the optical properties of the underlying film in the regions P1 to P5 in the plane of the wafer W. Therefore, the resist pattern dimension in the plane of the wafer W can be controlled with high accuracy. Therefore, it is possible to suppress a decrease in the yield of semiconductor products manufactured with wafer W power.
[0066] また上記塗布現像装置においてはウェハ Wの面内の各領域 P1〜P5について反り 量を測定し、各反り量に基づいて PEBの際にウェハ Wの各領域 P1〜P5を加熱する 温度を補正しているため、各領域 P1〜P5間のレジストパターンの寸法のばらつきを より才卬えること力 Sできる。  [0066] In the coating and developing apparatus, the amount of warpage is measured for each of the regions P1 to P5 in the plane of the wafer W, and each region P1 to P5 of the wafer W is heated during PEB based on the amount of warpage. Since this is corrected, it is possible to improve the ability of the variation in resist pattern dimensions between the regions P1 to P5.
[0067] ウェハ Wの屈折率の測定及びそれに対応する加熱温度の設定は同一ロット内のす ベてのウェハ W毎に行ってもよぐあるいはロットの先頭のウェハ Wに対して行なった 後、同じロット内の後続のウェハ Wについては屈折率の測定を行わず、その各領域 P ;!〜 P5を先頭のウェハ Wについて設定された各加熱温度で加熱処理をするように設 定してもよい。このようにロットの先頭のウェハについてのみ屈折率の測定及び加熱 温度の設定を行うか、ある!/、は後続のウェハ Wにつ!/、てあらためて屈折率の測定及 び加熱温度を設定するかは、例えばロットの先頭のウェハ Wの各領域の屈折率につ いて閾値 (許容範囲)を設定し、制御部 7が、測定された屈折率についてその許容範 囲に収まっていると判定した場合は、後続のウェハ Wについては新たに温度設定を 行わず、許容範囲を超えたと判定した場合は後続のウェハ Wにつ!/、ても夫々加熱温 度の設定を行うように構成してもよい。このような構成とすることにより、すべてのゥェ ハについて屈折率を測定する場合に比べてスループットを向上させることができる。 [0067] The measurement of the refractive index of the wafer W and the setting of the corresponding heating temperature may be performed for every wafer W in the same lot, or after the wafer W at the head of the lot is Refractive index measurement is not performed for subsequent wafers W in the same lot, and each region P;! To P5 is set to be heated at each heating temperature set for the first wafer W. Good. In this way, the refractive index is measured and the heating temperature is set only for the first wafer in the lot, or there is! /, The subsequent wafer W is set! /, And the refractive index is measured and the heating temperature is set again. For example, a threshold (allowable range) is set for the refractive index of each region of the wafer W at the head of the lot, and the control unit 7 determines that the measured refractive index is within the allowable range. In this case, the temperature of the subsequent wafer W is not newly set. If it is determined that the allowable range is exceeded, the subsequent wafer W is heated to the next wafer W! The degree may be set. By adopting such a configuration, the throughput can be improved as compared with the case where the refractive index is measured for all wafers.
[0068] また屈折率を測定するタイミングとしてはレジスト膜を形成する以前であれば既述の 実施形態のタイミングに限られず、例えば反射防止膜を形成する前であってもよい。 従って上記の塗布現像装置に搬入される前の下地膜の光学的性質を検出するステ ーシヨンから当該塗布現像装置に、そのステーションで検出した光学的性質が送信 されるように構成し、その送信された光学的性質のデータを基に加熱ユニット 4の加 熱量が調整されるようにしてもよい。  Further, the timing of measuring the refractive index is not limited to the timing of the above-described embodiment as long as it is before the formation of the resist film, and may be, for example, before the formation of the antireflection film. Therefore, the optical property detected at the station is transmitted from the station for detecting the optical property of the base film before being carried into the coating and developing device to the coating and developing device. The heating amount of the heating unit 4 may be adjusted based on the optical property data.
[0069] 次に本発明のレジストパターン形成装置の一実施形態について説明する。このレ ジストパターン形成装置は、既述の実施形態の塗布現像装置を備えたレジストバタ ーン形成装置と略同様に構成されており、図 13はその制御部 8の構成を示している 。図 13中、既述の実施形態の塗布現像装置と同様の構成を有する各部については 既述の実施形態で用いた符号と同じ符号を付している。露光装置 B5は、既述の実 施形態の露光装置 B4と略同様に構成されている力、ウェハ Wの領域 P1〜P5毎に 露光量を変更して露光処理を行うことができるように構成されている。また図示は省 略しているがこのレジストパターン形成装置に設けられる PEBを行う加熱ユニットは、 既述の加熱ユニット 4と略同様に構成されている。し力、しその加熱ユニットは、制御部 7により演算された屈折率及び反り量に基づいてオフセットをかけて加熱処理を行う ものではなレ、と!/、う点で、前述の加熱ユニット 4と異なって!/、る。  Next, an embodiment of the resist pattern forming apparatus of the present invention will be described. This resist pattern forming apparatus is configured in substantially the same manner as the resist pattern forming apparatus including the coating and developing apparatus of the above-described embodiment, and FIG. 13 shows the configuration of the control unit 8. In FIG. 13, components having the same configurations as those of the coating and developing apparatus of the above-described embodiment are denoted by the same reference numerals as those used in the above-described embodiment. The exposure apparatus B5 is configured to be able to perform exposure processing by changing the exposure amount for each of the regions P1 to P5 of the wafer W with the force that is configured in substantially the same manner as the exposure apparatus B4 of the embodiment described above. Has been. Although not shown, the heating unit for performing PEB provided in the resist pattern forming apparatus is configured in substantially the same manner as the heating unit 4 described above. The heating unit is not intended to perform the heat treatment by applying an offset based on the refractive index and the amount of warpage calculated by the control unit 7. Unlike!
[0070] 制御部 8は記憶部 81を備えており、この記憶部 81が、既述の記憶部 75と異なる点 を挙げると、例えば加熱ユニット 4のヒータ 40の温度と CDとの相関関係の代わりに露 光量と CDとの相関関係が、反り量と温度補正量との相関関係の代わりに、反り量と 露光補正量との相関関係が夫々記憶されている。また CDの目標値が記憶部 81に 入力されると、制御部 8は、記憶部 81に記憶された CDと屈折率との相関関係及び露 光量と CDとの相関関係に基づいてその CDの目標値に対応する露光量の基準値及 び屈折率の基準値を演算する。  [0070] The control unit 8 includes a storage unit 81. The storage unit 81 is different from the storage unit 75 described above. For example, the correlation between the temperature of the heater 40 of the heating unit 4 and the CD is obtained. Instead, the correlation between the exposure amount and the CD is stored, and the correlation between the curvature amount and the exposure correction amount is stored instead of the correlation between the curvature amount and the temperature correction amount. When the target value of the CD is input to the storage unit 81, the control unit 8 determines the CD based on the correlation between the CD and the refractive index stored in the storage unit 81 and the correlation between the exposure amount and the CD. Calculate the exposure standard value and refractive index standard value corresponding to the target value.
[0071] 次にこのレジストパターン形成装置の処理の流れについて図 14を参照しながら説 明する。先ずウェハ Wが搬入される前に CDの目標値が入力され、その目標値に対 応する露光量の基準値及び屈折率の基準値を演算される。その後ウェハ Wが当該 装置に搬入されると、塗布現像装置のステップ S 1〜S5と同様の、ステップ T1〜T5 に従って一連の処理が進行する。ステップ Τ5終了後、制御部 8は、屈折率測定ュニ ット 5を用いて演算したウェハ Wの Ρ1〜Ρ5における各屈折率、記憶部 81に記憶され た CDと屈折率との相関関係及び露光量と CDとの相関関係に基づいて、屈折率の ずれに基づいた露光量のオフセット予定量を演算すると共に反り測定ユニット 6を用 いて各領域 P1〜P5の反り量に基づいた前記オフセット予定量を補正する露光補正 量を演算して、さらにこのオフセット予定量と露光補正量とに基づいて、領域 P1〜P5 毎に露光量を決定する。 Next, the processing flow of this resist pattern forming apparatus will be described with reference to FIG. First, before the wafer W is loaded, the target value of CD is input, and the target value is set. The corresponding exposure value reference value and refractive index reference value are calculated. After that, when the wafer W is carried into the apparatus, a series of processing proceeds according to steps T1 to T5 similar to steps S1 to S5 of the coating and developing apparatus. After step Τ5 is completed, the control unit 8 determines the refractive index in Ρ1 to Ρ5 of the wafer W calculated using the refractive index measurement unit 5, the correlation between the CD stored in the storage unit 81 and the refractive index, and Based on the correlation between the exposure amount and the CD, the offset amount of the exposure amount is calculated based on the deviation of the refractive index, and the offset is estimated based on the warpage amount of each region P1 to P5 using the warpage measurement unit 6. An exposure correction amount for correcting the amount is calculated, and an exposure amount is determined for each of the regions P1 to P5 based on the estimated offset amount and the exposure correction amount.
[0072] その後、ウェハ Wが露光装置 B5に搬入されると、当該露光装置 B5は、決定された 露光量に基づいて各領域 P1〜P5を夫々露光する(ステップ T6)。露光後、ウェハ W は、既述の実施形態の経路と同様の経路で搬送され、加熱ユニットにおいて加熱 (Ρ ΕΒ)処理を受け (ステップ Τ7)、その後、現像処理を受ける(ステップ Τ8)。  Thereafter, when wafer W is carried into exposure apparatus B5, exposure apparatus B5 exposes each of regions P1 to P5 based on the determined exposure amount (step T6). After the exposure, the wafer W is transported along a path similar to that of the above-described embodiment, and is subjected to a heating (ΡΡ) process in the heating unit (step Τ7), and thereafter a development process (step Τ8).
[0073] このレジストパターン形成装置によれば、ウェハ Wの面内における各領域 Ρ1〜Ρ5 の光学的性質に基づいて露光量が制御されるため、既述の実施形態の塗布現像装 置と同様に下地膜の光学的性質のばらつきによる各領域 Ρ 1〜Ρ5間におけるレジス トパターンの寸法のばらつきを抑えることができ、従って歩留まりの低下を抑えること 力できる。さらに各領域 Ρ1〜Ρ5の反り量に基づいて露光量を制御しているため、より レジストパターンの寸法のばらつきを抑えることができる。  According to this resist pattern forming apparatus, since the exposure amount is controlled based on the optical properties of the regions Ρ1 to Ρ5 in the plane of the wafer W, the same as in the coating and developing apparatus of the above-described embodiment. In addition, it is possible to suppress variations in the size of the resist pattern between the regions Ρ1 to Ρ5 due to variations in the optical properties of the base film, and thus it is possible to suppress a decrease in yield. Furthermore, since the exposure amount is controlled based on the amount of warpage of each of the regions Ρ1 to Ρ5, variations in resist pattern dimensions can be further suppressed.
[0074] なお上記の塗布現像装置及びレジストパターン形成装置の実施形態としては下地 膜の光学的性質として屈折率を演算し、その屈折率に基づレ、て ΡΕΒの加熱温度の オフセット及び露光量のオフセットを演算している力 屈折率の他に下地膜に光を照 射して得られる、光学的性質である反射率、消衰係数に基づいてこれらのオフセット を演算するように構成してもよい。また前記反射率、屈折率あるいは消衰係数から下 地膜の膜厚を演算する膜厚測定ユニットを塗布現像装置に設け、この膜厚測定装置 により測定された領域 Ρ1〜Ρ5の膜厚に基づいて前記各領域の加熱温度及び露光 量にオフセットがかけられるような構成であってもよ!/、。前記膜厚測定ユニットとしては 、膜厚と屈折率とを同時に測定するようなものを用い、その測定された膜厚、屈折率 V、ずれかに基づ!/、て制御部が PEBの過熱温度あるいは露光量を制御するような構 成であってもよい。 Note that in the embodiments of the coating and developing apparatus and the resist pattern forming apparatus described above, the refractive index is calculated as the optical property of the base film, and the offset of the heating temperature and the exposure amount based on the refractive index. In addition to the refractive index, the offset is calculated based on the optical properties of reflectivity and extinction coefficient, as well as the refractive index. Also good. In addition, a film thickness measuring unit for calculating the film thickness of the base film from the reflectance, refractive index or extinction coefficient is provided in the coating and developing apparatus, and based on the film thickness of the areas Ρ1 to Ρ5 measured by this film thickness measuring device. The heating temperature and exposure amount of each area may be offset. As the film thickness measurement unit, one that measures the film thickness and the refractive index at the same time is used, and the measured film thickness and refractive index are measured. Based on V or deviation, the controller may control the PEB overheating temperature or exposure amount.
[0075] なお上記の実施形態においてウェハ Wの反りの測定を行うタイミングとしては、レジ スト膜形成後、露光前に限られず、屈折率に基づき PEBの加熱温度にオフセットを かける場合は、その PEBの前であればよぐまた露光量によりオフセットをかける場合 は露光を行う前であればよい。従って下地膜の屈折率を測定する前に反りの測定を 行ってもよぐ塗布現像装置にウェハ Wを搬入する前に測定するような構成であって もよい。また反り測定ユニット 6は例えば処理ブロック B2の棚ユニット U1〜U3に配置 してもよい。  In the above embodiment, the timing for measuring the warpage of the wafer W is not limited to after the resist film formation but before the exposure. When the heating temperature of the PEB is offset based on the refractive index, the PEB is measured. If the offset is applied depending on the exposure amount, it may be before exposure. Accordingly, the measurement may be performed before the wafer W is carried into the coating and developing apparatus, in which the warpage may be measured before the refractive index of the base film is measured. Further, the warpage measurement unit 6 may be arranged, for example, on the shelf units U1 to U3 of the processing block B2.
[0076] 図 15に示した塗布現像装置は、図 1に示した塗布現像装置と略同様に構成された ものであり、反り測定ユニット 6の配置を変更した一例である。この塗布現像装置にお いては、図 15に示すように反り測定ユニット 6が、棚ユニット U2と棚ユニット U3との間 における、主搬送手段 A3がアクセスできる位置(主搬送手段 A3の背面)に設けられ ている。なお反り測定ユニット 6は、主搬送手段 A2の背面に設けてもよぐその場合 例えば屈折率測定ユニット 5に積層するように設けられる。なお屈折率測定ユニット 5 が主搬送手段 A3の背面に設けられ、反り測定ユニット 6が主搬送手段 A2の背面に 設けられるような構成としてもよ!/、。  The coating and developing apparatus shown in FIG. 15 is configured in substantially the same manner as the coating and developing apparatus shown in FIG. 1, and is an example in which the arrangement of the warp measuring unit 6 is changed. In this coating and developing apparatus, as shown in FIG. 15, the warp measuring unit 6 is located between the shelf unit U2 and the shelf unit U3 at a position accessible by the main conveyance means A3 (the back of the main conveyance means A3). It is provided. The warp measurement unit 6 may be provided on the back surface of the main transport means A2, and in that case, for example, the warp measurement unit 6 is provided so as to be laminated on the refractive index measurement unit 5. The refractive index measurement unit 5 may be provided on the back surface of the main transport means A3, and the warp measurement unit 6 may be provided on the back surface of the main transport means A2.
[0077] 図 1の塗布現像装置においては、例えば CDを測定するユニットが塗布現像装置の 外部に設けられ、その測定ユニットにより既述の直線 klのようなウェハ Wに形成され た CDと下地膜の屈折率との相関関係を求めている力 S、例えば図 16に示すように CD を測定するユニットが塗布現像装置内(いわゆる「インライン」)に設けられるように構 成し、その測定ユニットにより前記相関関係が求められる構成であってもよい。  In the coating and developing apparatus of FIG. 1, for example, a unit for measuring CD is provided outside the coating and developing apparatus, and the CD and base film formed on the wafer W like the straight line kl described above by the measuring unit. For example, as shown in FIG. 16, a unit for measuring CD is provided in the coating and developing apparatus (so-called “in-line”). The structure in which the correlation is obtained may be used.
[0078] この図 16の塗布現像装置のキャリアブロック B1と処理ブロック B2との間には検査. 測定ブロック B6が設けられており、検査 ·測定ブロック B6の中央には搬送手段 91が 設けられている。図 17を参照しながら検査 ·測定ブロック B6の構成について説明す る。搬送手段 91の左右両側には棚ユニット U6、 U7が夫々設けられており、棚ュニッ ト U6は、例えばウェハ Wの表面の状態を検査する表面検査ユニット 92、線幅測定ュ ニット 93力 S、下からこの順に積層されて構成されている。 [0079] 線幅測定ユニット 93は、現像されることによりレジスト膜に形成されたレジストパター ンに光を照射し、その反射光に基づいてパターンの線幅を測定する。棚ユニット U7 は、例えば現像処理後のウェハ Wの各膜厚を測定する膜厚測定ユニット 94、反り測 定ユニット 6、屈折率測定ユニット 5が下からこの順に積層されて構成されている。 [0078] An inspection / measurement block B6 is provided between the carrier block B1 and the processing block B2 of the coating and developing apparatus of FIG. 16, and a conveying means 91 is provided at the center of the inspection / measurement block B6. Yes. The configuration of the inspection / measurement block B6 will be described with reference to FIG. Shelf units U6 and U7 are respectively provided on the left and right sides of the transfer means 91. The shelf unit U6 includes, for example, a surface inspection unit 92 for inspecting the surface state of the wafer W, a line width measuring unit 93 force S, They are stacked in this order from the bottom. [0079] The line width measuring unit 93 irradiates the resist pattern formed on the resist film by development, and measures the line width of the pattern based on the reflected light. The shelf unit U7 is configured, for example, by laminating a film thickness measuring unit 94 for measuring each film thickness of the wafer W after development processing, a warp measuring unit 6, and a refractive index measuring unit 5 in this order from the bottom.
[0080] 搬送手段 91は例えばウェハ Wを保持する 2枚のピンセットを備えており、棚ユニット U6、 U7の各ユニット、棚ユニット U1の受け渡しステージ TRSにアクセスでき、且つ 受け渡し手段 A1との間でウェハ Wを受け渡すことができるように構成されている。な おピンセットの枚数は 3枚以上でもよぐウェハ Wの搬送に支障のない数が選択され  [0080] The transfer means 91 includes, for example, two tweezers for holding the wafer W, can access each unit of the shelf units U6 and U7, the delivery stage TRS of the shelf unit U1, and between the delivery means A1. It is configured so that the wafer W can be delivered. The number of tweezers can be 3 or more. A number that does not hinder the transfer of wafer W is selected.
[0081] この塗布現像装置においては先ず、例えば各領域 P1〜P5について夫々光学的 性質が異なるように構成された複数枚のテスト用ウェハ Wがこの塗布現像装置に搬 入され、これらのテスト用ウェハ Wについて一連の処理が行われて、レジストパターン が形成される工程中で測定された下地膜の屈折率と、インラインで測定されたパター ンの線幅とに基づ!/、て制御部が前記相関関係を決定し、その決定された相関関係 1S 記憶部に記憶されるように構成されている。このように相関関係が決定されること を除いて、この塗布現像装置の制御部は、既述の実施形態の制御部 7と略同様に構 成されている。 [0081] In this coating and developing apparatus, first, for example, a plurality of test wafers W configured so as to have different optical properties in each of the regions P1 to P5 are loaded into the coating and developing apparatus and used for these tests. Based on the refractive index of the base film measured during the process of forming a resist pattern on the wafer W and the line width of the pattern measured in-line! / Is determined so as to be stored in the determined correlation 1S storage unit. Except that the correlation is determined in this way, the control unit of the coating and developing apparatus is configured in substantially the same manner as the control unit 7 of the above-described embodiment.
[0082] テスト用ウェハ Wが受け渡される経路について簡単に説明する。塗布現像装置に 搬入されたテスト用ウェハ Wは、受け渡し手段 Al→搬送手段 91→屈折率測定ュニ ット 5→搬送手段 91の順に受け渡された後、処理ブロック B2に搬入され、既述の塗 布現像装置と同様に反射防止膜、レジスト膜が形成される。続いてテスト用ウェハ W は、露光処理を受けた後、各ヒータ 40a〜40eが CDの目標値に対応する温度に設 定された状態で PEB処理を受け、さらに現像処理を受けた後、再び搬送手段 91に 受け渡される。テスト用ウェハ Wは、線幅測定ユニット 93→搬送手段 91→受け渡し 手段 A1の順に搬送され、キャリアブロック B1に戻される。  [0082] A route through which the test wafer W is delivered will be briefly described. The test wafer W carried into the coating and developing apparatus is delivered in the order of delivery means Al → conveyance means 91 → refractive index measurement unit 5 → conveyance means 91, and then delivered into the processing block B2 and described above. An antireflection film and a resist film are formed in the same manner as the coating developing apparatus. Subsequently, the test wafer W is subjected to an exposure process, and then subjected to a PEB process in a state where each of the heaters 40a to 40e is set to a temperature corresponding to the target value of the CD, and further subjected to a development process, and then again. Delivered to transport means 91. The test wafer W is transferred in the order of the line width measuring unit 93 → the transfer means 91 → the transfer means A1, and returned to the carrier block B1.
[0083] すべてのテスト用ウェハ Wについてこのような搬送が終わると、制御部が線幅測定 ユニット 93、屈折率測定ユニット 5から夫々測定された線幅、屈折率に基づいて、ゥ ェハ Wの各領域 P1〜P5ごとに既述の実施形態のグラフの直線 klに相当する、屈折 率と CDとの相関関係を演算し、決定する。 [0083] When such transfer is completed for all test wafers W, the control unit performs wafer W based on the line width and refractive index measured from the line width measurement unit 93 and the refractive index measurement unit 5, respectively. Refraction corresponding to the straight line kl in the graph of the embodiment described above for each of the regions P1 to P5 Calculate and determine the correlation between rate and CD.
[0084] 前記相関関係が決定された後、塗布現像装置には製品用の既述のウェハ Wが搬 入され、そのウェハ Wは、受け渡し手段 Al→搬送手段 91→屈折率測定ユニット 5→ 搬送手段 91→反り測定ユニット 6→搬送手段 91の順に搬送された後、処理ブロック B2に受け渡され、既述のテスト用ウェハ Wと同様に各種膜の形成処理、露光処理を 受ける。その後、既述の実施形態と同様に、予め記憶部に記憶された CDの目標値、 ヒータの温度と CDとの相関関係及びテスト用ウェハの測定により記憶された屈折率 と CDとの相関関係に基づ!/、てウェハ Wの各領域 P 1〜P5ごとにオフセットをかけた 状態で PEB処理が行われる。  [0084] After the correlation is determined, the above-described wafer W for the product is loaded into the coating and developing apparatus, and the wafer W is transferred from the delivery means Al → conveyance means 91 → refractive index measuring unit 5 → conveyance. After being transported in the order of means 91 → warp measurement unit 6 → transport means 91, it is transferred to the processing block B2, where it is subjected to various film formation processing and exposure processing in the same manner as the test wafer W described above. Thereafter, as in the above-described embodiment, the target value of CD stored in the storage unit in advance, the correlation between the heater temperature and CD, and the correlation between the refractive index stored by measurement of the test wafer and CD. Based on the above, PEB processing is performed with offset applied to each region P1 to P5 of the wafer W.
[0085] PEB後のウェハ Wは現像処理を受け、例えばその中の一部のウェハ Wについては テスト用ウェハ Wと同様にキャリアブロック B1に戻される力 他の一部のウェハ Wに ついては、搬送手段 91→表面検査ユニット 92→搬送手段 91→膜厚測定ユニット 94 に搬送され、ウェハ Wに形成された各種の膜厚及びウェハ Wの表面状態を検査され た後、キャリアブロック B1に戻される。  [0085] The wafer W after PEB is subjected to a development process. For example, a part of the wafer W is returned to the carrier block B1 in the same manner as the test wafer W. After being transported by means 91 → surface inspection unit 92 → transport means 91 → film thickness measuring unit 94, various film thicknesses formed on the wafer W and the surface state of the wafer W are inspected, and then returned to the carrier block B1.
[0086] この図 16の塗布現像装置は、各種の検査ユニットや測定装置が検査 ·測定ブロッ ク B6に集約して設けられているため、この検査 '測定ブロック B6の各ユニットにおけ るメンテナンスの利便性の向上を図ることができる。また上記実施形態においては、 例えば一連のパターン形成処理を受け、処理ブロック B2からキャリアブロック B1のキ ャリア Cに戻されたウェハ Wについて受け渡し手段 A1及び搬送手段 91を介して再 び、検査 ·測定ブロック B6に搬送し、各種検査を行ってもよい。その場合、処理ブロッ ク B2、インターフェイスブロック B3内の各ユニット間を後続のウェハ Wが受け渡され ていても、このブロック B2、 B3の搬送の影響が、受け渡し手段 Al、搬送手段 91へ及 ぶことは抑えられる、つまりブロック Bl、 B6間とブロック B2、 B3間で同時に所定のゥ ェハ Wの搬送を行うことができるので、スループットの低下を抑えることができる利点 がある。なお処理ブロック B2の電源を落とした状態で検査 ·測定ブロック B6及びキヤ リアブロック B1だけを稼動させて各種ブロック B6内の各種ユニットへウェハ Wを搬送 し、検査を行うようにしてもよく、その場合は塗布現像装置のすべてのブロックに電源 を入れる場合に比べて電力を節約できる。 [0087] なお既述のようにロットの先頭のウェハ Wについてのみ、屈折率の測定及びその屈 折率に基づいたヒータの温度の設定を行い、後続のロット内のウェハ Wをその設定さ れた、同じ温度で加熱してもよいが、例えばロット内において定期的に所定の複数枚 のウェハを抜き取り、その抜き取った各ウェハ Wに対して屈折率を測定する、いわゆ る抜き取り検査を実施し、その抜き取り検査を行う度にその検査結果に基づレ、てヒー タ 40a〜40eの温度を設定するようにしてもよい。 In the coating and developing apparatus of FIG. 16, various inspection units and measuring devices are provided in the inspection / measurement block B6. Therefore, the maintenance of each unit of this inspection 'measurement block B6 is performed. Convenience can be improved. In the above embodiment, for example, a series of pattern formation processing is performed, and the wafer W returned from the processing block B2 to the carrier C of the carrier block B1 is again inspected and measured via the transfer means A1 and the transfer means 91. It may be transported to block B6 for various inspections. In this case, even if the subsequent wafer W is transferred between the units in the processing block B2 and the interface block B3, the transfer effect of the blocks B2 and B3 affects the transfer means Al and the transfer means 91. This means that a predetermined wafer W can be transported between the blocks Bl and B6 and between the blocks B2 and B3 at the same time. Note that the inspection / measurement block B6 and the carrier block B1 may be operated while the processing block B2 is turned off, and the wafer W may be transferred to various units in the various blocks B6 for inspection. In this case, power can be saved compared to the case where all the blocks of the coating and developing device are turned on. [0087] As described above, only for the first wafer W of the lot, the refractive index is measured and the heater temperature is set based on the refractive index, and the wafer W in the subsequent lot is set. However, it may be heated at the same temperature, but for example, a predetermined number of wafers are periodically extracted in the lot, and the so-called sampling inspection is performed in which the refractive index is measured for each of the extracted wafers W. The temperature of the heaters 40a to 40e may be set based on the inspection result every time the sampling inspection is performed.
[0088] 図面を参照してこの発明の一実施形態を説明したが、本発明は、図示した実施形 態に限定されるものではない。本発明と同一の範囲内において、または均等の範囲 内において、図示した実施形態に対して種々の変更を加えることが可能である。 産業上の利用可能性  [0088] Although one embodiment of the present invention has been described with reference to the drawings, the present invention is not limited to the illustrated embodiment. Various modifications can be made to the illustrated embodiment within the same scope or equivalent scope as the present invention. Industrial applicability
[0089] 本発明は、フォトレジスト工程における塗布現像処理、レジストパターン形成に有用 である。 The present invention is useful for coating / development processing and resist pattern formation in a photoresist process.

Claims

請求の範囲 The scope of the claims
[1] 表面に下地膜が形成された基板にレジスト液を塗布し、露光された後の基板を現像 してレジストパターンを形成する塗布現像装置において、  [1] In a coating and developing apparatus for applying a resist solution to a substrate having a base film formed on the surface and developing the exposed substrate to form a resist pattern.
複数のヒータにより複数の加熱領域を夫々独立して加熱制御できる熱板を備え、前 記熱板により露光後、現像前の基板を加熱する加熱ユニットと、  A heating unit that can independently control heating of a plurality of heating areas by a plurality of heaters, and a heating unit that heats the substrate before development after exposure by the heating plate;
レジスト液を塗布する前の基板の前記各加熱領域に対応した領域に光を照射して、 各領域の光学的性質を測定する光学測定ユニットと、  An optical measurement unit that measures the optical properties of each region by irradiating light to the region corresponding to each heating region of the substrate before applying the resist solution;
予め求められた基板の下地膜の光学的性質と、ヒータの加熱温度と、レジストパター ンの線幅との相関関係が記憶された記憶部と、  A storage unit in which the optical properties of the base film of the substrate obtained in advance, the heating temperature of the heater, and the correlation between the line width of the resist pattern are stored;
前記光学測定ユニットにより測定された基板の下地膜の光学的性質、レジストパター ンの線幅の目標値及び前記記憶部の相関関係に基づ!/、て各加熱領域毎に前記ヒ ータの加熱温度を演算し、演算された加熱温度に基づ!/、て熱板の各加熱領域の温 度を制御する制御部と、を有する。  Based on the optical properties of the base film of the substrate measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage section! /, The heater of each heating area And a control unit for calculating the heating temperature and controlling the temperature of each heating region of the hot plate based on the calculated heating temperature.
[2] 請求項 1記載の塗布現像装置において、 [2] In the coating and developing apparatus according to claim 1,
前記光学的性質は、反射率、屈折率、消衰係数のいずれかを含む。  The optical property includes any one of reflectance, refractive index, and extinction coefficient.
[3] 請求項 1記載の塗布現像装置において、 [3] The coating and developing apparatus according to claim 1,
基板の前記各測定領域の反り量を測定する反り測定ユニットをさらに備え、前記制御 部は、測定された反り量に基づ!/、て各加熱領域における前記熱板の演算された加 熱温度の補正値を演算し、当該補正値と、前記加熱温度とに基づいて熱板の各加 熱領域の温度を制御する。  A warp measuring unit for measuring a warp amount of each measurement region of the substrate, and the control unit is based on the measured warp amount! /, And the calculated heating temperature of the hot plate in each heating region And the temperature of each heating region of the hot plate is controlled based on the correction value and the heating temperature.
[4] 表面に下地膜が形成された基板にレジスト液を塗布し、次いで基板を露光し、更に 露光された後の基板を現像してレジストパターンを形成するレジストパターン形成装 置において、 [4] In a resist pattern forming apparatus that applies a resist solution to a substrate having a base film formed on the surface, then exposes the substrate, and further develops the exposed substrate to form a resist pattern.
基板の面内を複数に区画した各領域毎に露光量を設定できる露光装置と、 レジスト膜形成前の基板の前記複数の領域に対応した領域内に光を照射して、各領 域の光学的性質を測定する光学測定ユニットと、  An exposure apparatus that can set an exposure amount for each area in which the in-plane surface of the substrate is divided into a plurality of areas, and light is irradiated to areas corresponding to the plurality of areas on the substrate before the resist film is formed. An optical measurement unit for measuring physical properties;
予め求められた、光学的性質と、露光量と、レジストパターンの線幅との相関関係が 記憶された記憶部と、 前記光学測定ユニットにより測定された光学的性質、レジストパターンの線幅の目標 値及び前記記憶部の相関関係に基づいて各領域毎に露光量を演算し、演算された 露光量に基づいて前記露光装置の露光量を制御する制御部と、を有する。 A storage unit in which correlations between optical properties, exposure amounts, and resist pattern line widths, which are obtained in advance, are stored; An exposure amount is calculated for each region based on the optical properties measured by the optical measurement unit, the target value of the line width of the resist pattern, and the correlation of the storage unit, and the exposure based on the calculated exposure amount And a control unit for controlling the exposure amount of the apparatus.
[5] 請求項 4記載のレジストパターン形成装置にお!/、て、  [5] In the resist pattern forming apparatus according to claim 4,! /,
前記光学的性質は、反射率、屈折率、消衰係数のいずれかを含む。  The optical property includes any one of reflectance, refractive index, and extinction coefficient.
[6] 請求項 4記載のレジストパターン形成装置にお!/、て、  [6] In the resist pattern forming apparatus according to claim 4,! /,
基板の前記各測定領域の反り量を測定する反り測定ユニットをさらに備え、 前記制御部は、測定された反り量に基づいて各露光領域における前記露光装置の 露光量を補正する露光補正量を演算し、当該露光補正量と、演算された前記露光量 と基づいて、各露光領域の露光量を制御する。  A warp measurement unit for measuring a warp amount of each measurement region of the substrate; and the control unit calculates an exposure correction amount for correcting the exposure amount of the exposure apparatus in each exposure region based on the measured warp amount. Then, the exposure amount of each exposure area is controlled based on the exposure correction amount and the calculated exposure amount.
[7] 露光された後の基板を、複数のヒータにより複数の加熱領域を夫々独立して加熱制 御できる熱板を用いてレジストパターンを形成する塗布、現像方法において、 基板の前記各加熱領域に対応した領域に光を照射して、各領域の光学的性質を測 定する工程と、  [7] In the coating and developing method of forming a resist pattern using a hot plate capable of independently controlling a plurality of heating regions by a plurality of heaters on the exposed substrate, each heating region of the substrate Irradiating light to areas corresponding to, and measuring the optical properties of each area;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、  A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film;
レジスト膜が形成された基板を露光する工程と、  Exposing the substrate on which the resist film is formed;
基板の下地膜に光を照射して得られる光学的性質と前記ヒータの加熱温度とレジスト ノ ターンの線幅との相関関係について予め取得したデータと、前記工程で測定され た基板の光学的性質と、レジストパターンの線幅の目標値とに基づいて、各加熱領 域毎に加熱温度を演算する工程と、  Data obtained in advance on the correlation between the optical properties obtained by irradiating the substrate underlayer with light, the heating temperature of the heater and the line width of the resist pattern, and the optical properties of the substrate measured in the previous step And a step of calculating a heating temperature for each heating region based on the target value of the line width of the resist pattern,
演算された加熱温度に基づいて各加熱領域を加熱制御する工程と、  A step of controlling heating of each heating region based on the calculated heating temperature;
加熱された基板を現像する工程と、を有する。  Developing the heated substrate.
[8] 請求項 7記載のレジストパターンの形成方法におレ、て、 [8] The method for forming a resist pattern according to claim 7,
基板の前記各測定領域の反り量を測定する工程と、  Measuring the amount of warpage of each measurement region of the substrate;
測定された反り量に基づ!/、て、演算された加熱温度を補正する補正温度を演算する 工程と、をさらに有し、  And a step of calculating a correction temperature for correcting the calculated heating temperature based on the measured amount of warpage!
基板を加熱する工程は、前記加熱温度及び補正温度に基づ!/、て行われる。 The step of heating the substrate is performed based on the heating temperature and the correction temperature.
[9] 基板上にレジストパターンを形成する方法にお!/、て、 [9] How to form a resist pattern on a substrate! /
基板の下地膜の面内における複数の領域の各々に光を照射して、各領域の光学的 性質を測定する工程と、  Irradiating each of a plurality of regions in the surface of the base film of the substrate with light, and measuring the optical properties of each region;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、  A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film;
基板の下地膜に光を照射して得られる光学的性質と、露光装置の露光量と、レジスト ノ ターンの線幅との相関関係について予め取得したデータと、  Data acquired in advance regarding the correlation between the optical properties obtained by irradiating the substrate underlayer with light, the exposure amount of the exposure apparatus, and the line width of the resist pattern;
前記工程で測定された基板の光学的性質と、レジストパターンの線幅の目標値とに 基づいて、各領域毎の露光量を演算する工程と、  Calculating the exposure amount for each region based on the optical properties of the substrate measured in the step and the target value of the line width of the resist pattern;
演算された露光量に対応する露光量で基板を露光する工程と、  Exposing the substrate with an exposure amount corresponding to the calculated exposure amount;
露光処理された基板を加熱する工程と、  Heating the exposed substrate; and
加熱された基板を現像する工程と、  Developing a heated substrate;
を備えたことを特徴とする、レジストパターンの形成方法。  A method for forming a resist pattern, comprising:
[10] 請求項 9記載のレジストパターンの形成方法におレ、て、 [10] The method for forming a resist pattern according to claim 9,
基板の前記各測定領域の反り量を測定する工程と、  Measuring the amount of warpage of each measurement region of the substrate;
測定された反り量に基づいて、演算された露光量を補正する露光補正量を演算する 工程と、をさらに有し、  A step of calculating an exposure correction amount for correcting the calculated exposure amount based on the measured amount of warpage, and
基板を露光する工程は、前記露光量及び露光補正量に基づ!/、て行われる。  The step of exposing the substrate is performed based on the exposure amount and the exposure correction amount.
[11] コンピュータ上で動作するコンピュータプログラムを格納した記憶媒体であって、 前記コンピュータプログラムは、基板の表面に下地膜が形成された基板にレジスト液 を塗布してレジストパターンを形成するための装置に使用され、次の工程を有する塗 布現像方法を実施するようにステップが,袓まれて!/、る; [11] A storage medium storing a computer program that operates on a computer, the computer program being an apparatus for forming a resist pattern by applying a resist solution to a substrate having a base film formed on the surface of the substrate Steps are included to carry out a process for developing a paint having the following steps:
露光された後の基板を、複数のヒータにより複数の加熱領域を夫々独立して加熱制 御できる熱板を用いてレジストパターンを形成する塗布、現像方法において、 基板の前記各加熱領域に対応した領域に光を照射して、各領域の光学的性質を測 定する工程と、  In the coating and developing method of forming a resist pattern using a hot plate capable of independently controlling a plurality of heating regions by a plurality of heaters after the exposure, the substrate corresponds to each heating region of the substrate. Irradiating the area with light and measuring the optical properties of each area;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、 レジスト膜が形成された基板を露光する工程と、 A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film; Exposing the substrate on which the resist film is formed;
基板の下地膜に光を照射して得られる光学的性質と前記ヒータの加熱温度とレジスト パターンの線幅との相関関係について予め取得したデータと、前記工程で測定され た基板の光学的性質と、レジストパターンの線幅の目標値とに基づいて、各加熱領 域毎に加熱温度を演算する工程と、 The optical properties obtained by irradiating the substrate with light on the substrate, the data obtained in advance on the correlation between the heating temperature of the heater and the line width of the resist pattern, and the optical properties of the substrate measured in the step Calculating a heating temperature for each heating region based on the target value of the line width of the resist pattern;
演算された加熱温度に基づいて各加熱領域を加熱制御する工程と、 A step of controlling heating of each heating region based on the calculated heating temperature;
加熱された基板を現像する工程。 Developing the heated substrate;
コンピュータ上で動作するコンピュータプログラムを格納した記憶媒体であって、 前記コンピュータプログラムは、基板の表面に下地膜が形成された基板にレジスト液 を塗布してレジストパターンを形成するための装置に使用され、次の工程を有するレ ジストパターン形成方法を実施するようにステップが組まれて!/、る; A storage medium storing a computer program that operates on a computer, the computer program being used in an apparatus for forming a resist pattern by applying a resist solution to a substrate having a base film formed on the surface of the substrate. Steps are organized to implement a resist pattern forming method having the following steps! /
基板の下地膜の面内における複数の領域の各々に光を照射して、各領域の光学的 性質を測定する工程と、 Irradiating each of a plurality of regions in the surface of the base film of the substrate with light, and measuring the optical properties of each region;
前記光学的性質測定後に下地膜の表面にレジスト液を塗布してレジスト膜を形成す る工程と、 A step of applying a resist solution to the surface of the base film after the optical property measurement to form a resist film;
基板の下地膜に光を照射して得られる光学的性質と、露光装置の露光量と、レジスト パターンの線幅との相関関係について予め取得したデータと、 Data obtained in advance on the correlation between the optical properties obtained by irradiating the substrate underlayer with light, the exposure amount of the exposure apparatus, and the line width of the resist pattern;
前記工程で測定された基板の光学的性質と、レジストパターンの線幅の目標値とに 基づいて、各領域毎の露光量を演算する工程と、 Calculating the exposure amount for each region based on the optical properties of the substrate measured in the step and the target value of the line width of the resist pattern;
演算された露光量に対応する露光量で基板を露光する工程と、 Exposing the substrate with an exposure amount corresponding to the calculated exposure amount;
露光処理された基板を加熱する工程と、 Heating the exposed substrate; and
加熱された基板を現像する工程と、 Developing a heated substrate;
を備えたことを特徴とする、レジストパターンの形成方法。 A method for forming a resist pattern, comprising:
PCT/JP2007/066174 2006-08-24 2007-08-21 Coating developing machine, resist pattern forming device, coating developing method, resist pattern forming method, and storage medium WO2008023693A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006228258A JP2008053464A (en) 2006-08-24 2006-08-24 Applicator and developer, resist pattern formation apparatus, application and development method, method of forming resist pattern, and storage medium
JP2006-228258 2006-08-24

Publications (1)

Publication Number Publication Date
WO2008023693A1 true WO2008023693A1 (en) 2008-02-28

Family

ID=39106777

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/066174 WO2008023693A1 (en) 2006-08-24 2007-08-21 Coating developing machine, resist pattern forming device, coating developing method, resist pattern forming method, and storage medium

Country Status (3)

Country Link
JP (1) JP2008053464A (en)
TW (1) TW200811616A (en)
WO (1) WO2008023693A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101807513A (en) * 2009-02-17 2010-08-18 恩益禧电子股份有限公司 The manufacturing installation of semiconductor device, the control method of manufacturing installation and storage are used for the storage medium of the control program of manufacturing installation
CN113391520A (en) * 2021-05-14 2021-09-14 上海华力集成电路制造有限公司 Coating method of photoresist and photoetching method thereof

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5718809B2 (en) 2008-05-16 2015-05-13 マトソン テクノロジー、インコーポレイテッド Method and apparatus for preventing destruction of workpieces
JP2015510688A (en) * 2012-01-19 2015-04-09 スプリヤ ジャイスワル Materials, components and methods for use with extreme ultraviolet radiation in lithography and other applications
JP6307022B2 (en) * 2014-03-05 2018-04-04 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and recording medium
JP2016071135A (en) * 2014-09-30 2016-05-09 株式会社Screenホールディングス Drawing method
JP6444909B2 (en) * 2016-02-22 2018-12-26 東京エレクトロン株式会社 Substrate processing method, substrate processing apparatus, and computer-readable recording medium
DE102016211511A1 (en) * 2016-06-27 2017-12-28 Carl Zeiss Smt Gmbh Lighting unit for microlithography
WO2018003372A1 (en) * 2016-06-27 2018-01-04 東京エレクトロン株式会社 Substrate processing device, substrate processing method, and storage medium
NL2020776A (en) 2017-05-04 2018-11-09 Asml Holding Nv Method, substrate and apparatus to measure performance of optical metrology
JP7043777B2 (en) * 2017-10-04 2022-03-30 東京エレクトロン株式会社 Coating film forming device
CN112585721A (en) * 2018-08-23 2021-03-30 东京毅力科创株式会社 Substrate processing method and substrate processing system
CN111785626A (en) * 2019-04-04 2020-10-16 长鑫存储技术有限公司 Heating method and heating device
JP7339134B2 (en) * 2019-11-19 2023-09-05 株式会社Screenホールディングス Pattern formation method and semiconductor manufacturing method including the method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02231706A (en) * 1989-03-03 1990-09-13 Nec Corp Reduced projection exposure method
JPH0348419A (en) * 1989-04-14 1991-03-01 Hitachi Ltd Method and system for controlling production of thin film and method and system for exposure
JPH1055072A (en) * 1996-08-12 1998-02-24 Toshiba Corp Resist pattern forming method and resist pattern forming device
JP2001274069A (en) * 2000-03-27 2001-10-05 Toshiba Corp Resist pattern forming method and semiconductor manufacturing system
JP2003203837A (en) * 2001-12-28 2003-07-18 Tokyo Electron Ltd Method and apparatus for treating substrate
JP2006135080A (en) * 2004-11-05 2006-05-25 Toshiba Corp Pattern forming method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02231706A (en) * 1989-03-03 1990-09-13 Nec Corp Reduced projection exposure method
JPH0348419A (en) * 1989-04-14 1991-03-01 Hitachi Ltd Method and system for controlling production of thin film and method and system for exposure
JPH1055072A (en) * 1996-08-12 1998-02-24 Toshiba Corp Resist pattern forming method and resist pattern forming device
JP2001274069A (en) * 2000-03-27 2001-10-05 Toshiba Corp Resist pattern forming method and semiconductor manufacturing system
JP2003203837A (en) * 2001-12-28 2003-07-18 Tokyo Electron Ltd Method and apparatus for treating substrate
JP2006135080A (en) * 2004-11-05 2006-05-25 Toshiba Corp Pattern forming method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101807513A (en) * 2009-02-17 2010-08-18 恩益禧电子股份有限公司 The manufacturing installation of semiconductor device, the control method of manufacturing installation and storage are used for the storage medium of the control program of manufacturing installation
CN113391520A (en) * 2021-05-14 2021-09-14 上海华力集成电路制造有限公司 Coating method of photoresist and photoetching method thereof

Also Published As

Publication number Publication date
TW200811616A (en) 2008-03-01
TWI358010B (en) 2012-02-11
JP2008053464A (en) 2008-03-06

Similar Documents

Publication Publication Date Title
WO2008023693A1 (en) Coating developing machine, resist pattern forming device, coating developing method, resist pattern forming method, and storage medium
JP4509820B2 (en) Heat treatment plate temperature setting method, heat treatment plate temperature setting device, program, and computer-readable recording medium recording the program
KR101605918B1 (en) Heat treatment apparatus, coating and developing treatment system, heat treatment method, coating and developing treatment method, and recording medium having recorded program for executing heat treatment method or coating and developing treatment method
US7968825B2 (en) Temperature setting method of thermal processing plate, computer-readable recording medium recording program thereon, and temperature setting apparatus for thermal processing plate
US7897896B2 (en) Temperature setting method of thermal processing plate, computer-readable recording medium recording program thereon, and temperature setting apparatus for thermal processing plate
KR20090091667A (en) Substrate processing method, computer-readable storage medium, and substrate processing system
TWI501338B (en) A heat treatment method and a recording medium and a heat treatment apparatus for recording a program for carrying out the heat treatment method
JP2006228820A (en) Temperature setting method and temperature setting device for heat treatment plate, program, and computer-readable recording medium recorded with program
KR101072282B1 (en) Substrate-processing apparatus, substrate-processing method, substrate-processing program, and computer-readable recording medium recorded with such program
US7897897B2 (en) Temperature setting method of thermal processing plate, computer-readable recording medium recording program thereon, and temperature setting apparatus for thermal processing plate
KR20090096332A (en) Substrate processing method, computer storage medium, and substrate processing system
JP4970882B2 (en) Substrate measurement method, program, computer-readable recording medium storing the program, and substrate measurement system
JP4090986B2 (en) Line width measuring method, substrate processing method, and substrate processing apparatus
US7420650B2 (en) Method of setting processing condition in photolithography process, apparatus for setting processing condition in photolithography process, program, and computer readable recording medium
KR20110093611A (en) Substrate processing method
TWI401547B (en) A substrate processing method, and a substrate processing system
US20090078695A1 (en) Temperature setting method of thermal processing plate, computer-readable recording medium recording program thereon, and temperature setting apparatus for thermal processing plate
JP5258082B2 (en) Substrate processing apparatus and substrate processing method
JP6706696B2 (en) Substrate processing method, computer storage medium, and substrate processing system
JP4920317B2 (en) Substrate processing method, program, computer-readable recording medium, and substrate processing system
WO2010150584A1 (en) Substrate treatment method, computer recording medium, and substrate treatment system
WO2007132758A1 (en) Substrate treating method, program, computer-readable storage medium, and substrate treating system
WO2011099221A1 (en) Substrate processing method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07792786

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

NENP Non-entry into the national phase

Ref country code: RU

122 Ep: pct application non-entry in european phase

Ref document number: 07792786

Country of ref document: EP

Kind code of ref document: A1